xref: /linux/arch/arm64/boot/dts/renesas/ebisu.dtsi (revision 205a7309cccd34ad49c2b6b1b59b907c12395d6c) 
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the Ebisu/Ebisu-4D board
4 *
5 * Copyright (C) 2018 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/gpio/gpio.h>
9#include <dt-bindings/input/input.h>
10
11/ {
12	model = "Renesas Ebisu board";
13	compatible = "renesas,ebisu";
14
15	aliases {
16		i2c0 = &i2c0;
17		i2c1 = &i2c1;
18		i2c2 = &i2c2;
19		i2c3 = &i2c3;
20		i2c4 = &i2c4;
21		i2c5 = &i2c5;
22		i2c6 = &i2c6;
23		i2c7 = &i2c7;
24		serial0 = &scif2;
25		ethernet0 = &avb;
26		mmc0 = &sdhi3;
27		mmc1 = &sdhi0;
28		mmc2 = &sdhi1;
29	};
30
31	chosen {
32		bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
33		stdout-path = "serial0:115200n8";
34	};
35
36	audio_clkout: audio-clkout {
37		/*
38		 * This is same as <&rcar_sound 0>
39		 * but needed to avoid cs2000/rcar_sound probe dead-lock
40		 */
41		compatible = "fixed-clock";
42		#clock-cells = <0>;
43		clock-frequency = <11289600>;
44	};
45
46	backlight: backlight {
47		compatible = "pwm-backlight";
48		pwms = <&pwm3 0 50000>;
49
50		brightness-levels = <512 511 505 494 473 440 392 327 241 133 0>;
51		default-brightness-level = <10>;
52
53		power-supply = <&reg_12p0v>;
54	};
55
56	cvbs-in {
57		compatible = "composite-video-connector";
58		label = "CVBS IN";
59
60		port {
61			cvbs_con: endpoint {
62				remote-endpoint = <&adv7482_ain7>;
63			};
64		};
65	};
66
67	hdmi-in {
68		compatible = "hdmi-connector";
69		label = "HDMI IN";
70		type = "a";
71
72		port {
73			hdmi_in_con: endpoint {
74				remote-endpoint = <&adv7482_hdmi>;
75			};
76		};
77	};
78
79	hdmi-out {
80		compatible = "hdmi-connector";
81		type = "a";
82
83		port {
84			hdmi_con_out: endpoint {
85				remote-endpoint = <&adv7511_out>;
86			};
87		};
88	};
89
90	keys {
91		compatible = "gpio-keys";
92
93		pinctrl-0 = <&keys_pins>;
94		pinctrl-names = "default";
95
96		key-1 {
97			gpios = <&gpio5 10 GPIO_ACTIVE_LOW>;
98			linux,code = <KEY_1>;
99			label = "SW4-1";
100			wakeup-source;
101			debounce-interval = <20>;
102		};
103		key-2 {
104			gpios = <&gpio5 11 GPIO_ACTIVE_LOW>;
105			linux,code = <KEY_2>;
106			label = "SW4-2";
107			wakeup-source;
108			debounce-interval = <20>;
109		};
110		key-3 {
111			gpios = <&gpio5 12 GPIO_ACTIVE_LOW>;
112			linux,code = <KEY_3>;
113			label = "SW4-3";
114			wakeup-source;
115			debounce-interval = <20>;
116		};
117		key-4 {
118			gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
119			linux,code = <KEY_4>;
120			label = "SW4-4";
121			wakeup-source;
122			debounce-interval = <20>;
123		};
124	};
125
126	lvds-decoder {
127		compatible = "thine,thc63lvd1024";
128		vcc-supply = <&reg_3p3v>;
129
130		ports {
131			#address-cells = <1>;
132			#size-cells = <0>;
133
134			port@0 {
135				reg = <0>;
136				thc63lvd1024_in: endpoint {
137					remote-endpoint = <&lvds0_out>;
138				};
139			};
140
141			port@2 {
142				reg = <2>;
143				thc63lvd1024_out: endpoint {
144					remote-endpoint = <&adv7511_in>;
145				};
146			};
147		};
148	};
149
150	memory@48000000 {
151		device_type = "memory";
152		/* first 128MB is reserved for secure area. */
153		reg = <0x0 0x48000000 0x0 0x38000000>;
154	};
155
156	reg_1p8v: regulator-1p8v {
157		compatible = "regulator-fixed";
158		regulator-name = "fixed-1.8V";
159		regulator-min-microvolt = <1800000>;
160		regulator-max-microvolt = <1800000>;
161		regulator-boot-on;
162		regulator-always-on;
163	};
164
165	reg_3p3v: regulator-3p3v {
166		compatible = "regulator-fixed";
167		regulator-name = "fixed-3.3V";
168		regulator-min-microvolt = <3300000>;
169		regulator-max-microvolt = <3300000>;
170		regulator-boot-on;
171		regulator-always-on;
172	};
173
174	reg_12p0v: regulator-12p0v {
175		compatible = "regulator-fixed";
176		regulator-name = "D12.0V";
177		regulator-min-microvolt = <12000000>;
178		regulator-max-microvolt = <12000000>;
179		regulator-boot-on;
180		regulator-always-on;
181	};
182
183	rsnd_ak4613: sound {
184		compatible = "simple-audio-card";
185
186		simple-audio-card,name = "rsnd-ak4613";
187		simple-audio-card,format = "left_j";
188		simple-audio-card,bitclock-master = <&sndcpu>;
189		simple-audio-card,frame-master = <&sndcpu>;
190
191		sndcodec: simple-audio-card,codec {
192			sound-dai = <&ak4613>;
193		};
194
195		sndcpu: simple-audio-card,cpu {
196			sound-dai = <&rcar_sound>;
197		};
198	};
199
200	vbus0_usb2: regulator-vbus0-usb2 {
201		compatible = "regulator-fixed";
202
203		regulator-name = "USB20_VBUS_CN";
204		regulator-min-microvolt = <5000000>;
205		regulator-max-microvolt = <5000000>;
206
207		gpio = <&gpio6 4 GPIO_ACTIVE_HIGH>;
208		enable-active-high;
209	};
210
211	vcc_sdhi0: regulator-vcc-sdhi0 {
212		compatible = "regulator-fixed";
213
214		regulator-name = "SDHI0 Vcc";
215		regulator-min-microvolt = <3300000>;
216		regulator-max-microvolt = <3300000>;
217
218		gpio = <&gpio5 17 GPIO_ACTIVE_HIGH>;
219		enable-active-high;
220	};
221
222	vccq_sdhi0: regulator-vccq-sdhi0 {
223		compatible = "regulator-gpio";
224
225		regulator-name = "SDHI0 VccQ";
226		regulator-min-microvolt = <1800000>;
227		regulator-max-microvolt = <3300000>;
228
229		gpios = <&gpio5 18 GPIO_ACTIVE_HIGH>;
230		gpios-states = <1>;
231		states = <3300000 1>, <1800000 0>;
232	};
233
234	vcc_sdhi1: regulator-vcc-sdhi1 {
235		compatible = "regulator-fixed";
236
237		regulator-name = "SDHI1 Vcc";
238		regulator-min-microvolt = <3300000>;
239		regulator-max-microvolt = <3300000>;
240
241		gpio = <&gpio0 4 GPIO_ACTIVE_HIGH>;
242		enable-active-high;
243	};
244
245	vccq_sdhi1: regulator-vccq-sdhi1 {
246		compatible = "regulator-gpio";
247
248		regulator-name = "SDHI1 VccQ";
249		regulator-min-microvolt = <1800000>;
250		regulator-max-microvolt = <3300000>;
251
252		gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>;
253		gpios-states = <1>;
254		states = <3300000 1>, <1800000 0>;
255	};
256
257	vga {
258		compatible = "vga-connector";
259
260		port {
261			vga_in: endpoint {
262				remote-endpoint = <&adv7123_out>;
263			};
264		};
265	};
266
267	vga-encoder {
268		compatible = "adi,adv7123";
269
270		ports {
271			#address-cells = <1>;
272			#size-cells = <0>;
273
274			port@0 {
275				reg = <0>;
276				adv7123_in: endpoint {
277					remote-endpoint = <&du_out_rgb>;
278				};
279			};
280			port@1 {
281				reg = <1>;
282				adv7123_out: endpoint {
283					remote-endpoint = <&vga_in>;
284				};
285			};
286		};
287	};
288
289	x12_clk: x12 {
290		compatible = "fixed-clock";
291		#clock-cells = <0>;
292		clock-frequency = <24576000>;
293	};
294
295	x13_clk: x13 {
296		compatible = "fixed-clock";
297		#clock-cells = <0>;
298		clock-frequency = <74250000>;
299	};
300};
301
302&audio_clk_a {
303	clock-frequency = <22579200>;
304};
305
306&avb {
307	pinctrl-0 = <&avb_pins>;
308	pinctrl-names = "default";
309	phy-handle = <&phy0>;
310	status = "okay";
311
312	phy0: ethernet-phy@0 {
313		compatible = "ethernet-phy-id0022.1622",
314			     "ethernet-phy-ieee802.3-c22";
315		rxc-skew-ps = <1500>;
316		reg = <0>;
317		interrupts-extended = <&gpio2 21 IRQ_TYPE_LEVEL_LOW>;
318		reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
319		/*
320		 * TX clock internal delay mode is required for reliable
321		 * 1Gbps communication using the KSZ9031RNX phy present on
322		 * the Ebisu board, however, TX clock internal delay mode
323		 * isn't supported on R-Car E3(e).  Thus, limit speed to
324		 * 100Mbps for reliable communication.
325		 */
326		max-speed = <100>;
327	};
328};
329
330&can0 {
331	pinctrl-0 = <&can0_pins>;
332	pinctrl-names = "default";
333
334	/* Please only enable canfd or can0 */
335	/* status = "okay"; */
336};
337
338&canfd {
339	pinctrl-0 = <&canfd0_pins>;
340	pinctrl-names = "default";
341	/* Please only enable canfd or can0 */
342	status = "okay";
343
344	channel0 {
345		status = "okay";
346	};
347};
348
349&csi40 {
350	status = "okay";
351
352	ports {
353		port@0 {
354			csi40_in: endpoint {
355				clock-lanes = <0>;
356				data-lanes = <1 2>;
357				remote-endpoint = <&adv7482_txa>;
358			};
359		};
360	};
361};
362
363&du {
364	pinctrl-0 = <&du_pins>;
365	pinctrl-names = "default";
366	status = "okay";
367
368	clocks = <&cpg CPG_MOD 724>,
369		 <&cpg CPG_MOD 723>,
370		 <&x13_clk>;
371	clock-names = "du.0", "du.1", "dclkin.0";
372
373	ports {
374		port@0 {
375			du_out_rgb: endpoint {
376				remote-endpoint = <&adv7123_in>;
377			};
378		};
379	};
380};
381
382&ehci0 {
383	dr_mode = "otg";
384	status = "okay";
385};
386
387&extal_clk {
388	clock-frequency = <48000000>;
389};
390
391&hsusb {
392	dr_mode = "otg";
393	status = "okay";
394};
395
396&i2c0 {
397	status = "okay";
398
399	io_expander: gpio@20 {
400		compatible = "onnn,pca9654";
401		reg = <0x20>;
402		gpio-controller;
403		#gpio-cells = <2>;
404		interrupts-extended = <&gpio2 22 IRQ_TYPE_LEVEL_LOW>;
405	};
406
407	hdmi-encoder@39 {
408		compatible = "adi,adv7511w";
409		reg = <0x39>;
410		interrupts-extended = <&gpio1 1 IRQ_TYPE_LEVEL_LOW>;
411
412		avdd-supply = <&reg_1p8v>;
413		dvdd-supply = <&reg_1p8v>;
414		pvdd-supply = <&reg_1p8v>;
415		dvdd-3v-supply = <&reg_3p3v>;
416		bgvdd-supply = <&reg_1p8v>;
417
418		adi,input-depth = <8>;
419		adi,input-colorspace = "rgb";
420		adi,input-clock = "1x";
421
422		ports {
423			#address-cells = <1>;
424			#size-cells = <0>;
425
426			port@0 {
427				reg = <0>;
428				adv7511_in: endpoint {
429					remote-endpoint = <&thc63lvd1024_out>;
430				};
431			};
432
433			port@1 {
434				reg = <1>;
435				adv7511_out: endpoint {
436					remote-endpoint = <&hdmi_con_out>;
437				};
438			};
439		};
440	};
441
442	video-receiver@70 {
443		compatible = "adi,adv7482";
444		reg = <0x70>;
445
446		interrupts-extended = <&gpio0 7 IRQ_TYPE_LEVEL_LOW>,
447				      <&gpio0 17 IRQ_TYPE_LEVEL_LOW>;
448		interrupt-names = "intrq1", "intrq2";
449
450		ports {
451			#address-cells = <1>;
452			#size-cells = <0>;
453
454			port@7 {
455				reg = <7>;
456
457				adv7482_ain7: endpoint {
458					remote-endpoint = <&cvbs_con>;
459				};
460			};
461
462			port@8 {
463				reg = <8>;
464
465				adv7482_hdmi: endpoint {
466					remote-endpoint = <&hdmi_in_con>;
467				};
468			};
469
470			port@a {
471				reg = <10>;
472
473				adv7482_txa: endpoint {
474					clock-lanes = <0>;
475					data-lanes = <1 2>;
476					remote-endpoint = <&csi40_in>;
477				};
478			};
479		};
480	};
481};
482
483&i2c3 {
484	status = "okay";
485
486	ak4613: codec@10 {
487		compatible = "asahi-kasei,ak4613";
488		#sound-dai-cells = <0>;
489		reg = <0x10>;
490		clocks = <&rcar_sound 3>;
491
492		asahi-kasei,in1-single-end;
493		asahi-kasei,in2-single-end;
494		asahi-kasei,out1-single-end;
495		asahi-kasei,out2-single-end;
496		asahi-kasei,out3-single-end;
497		asahi-kasei,out4-single-end;
498		asahi-kasei,out5-single-end;
499		asahi-kasei,out6-single-end;
500	};
501
502	cs2000: clk-multiplier@4f {
503		#clock-cells = <0>;
504		compatible = "cirrus,cs2000-cp";
505		reg = <0x4f>;
506		clocks = <&audio_clkout>, <&x12_clk>;
507		clock-names = "clk_in", "ref_clk";
508
509		assigned-clocks = <&cs2000>;
510		assigned-clock-rates = <24576000>; /* 1/1 divide */
511	};
512};
513
514&i2c_dvfs {
515	bootph-all;
516	status = "okay";
517
518	clock-frequency = <400000>;
519
520	pmic: pmic@30 {
521		pinctrl-0 = <&irq0_pins>;
522		pinctrl-names = "default";
523
524		compatible = "rohm,bd9571mwv";
525		reg = <0x30>;
526		interrupts-extended = <&intc_ex 0 IRQ_TYPE_LEVEL_LOW>;
527		interrupt-controller;
528		#interrupt-cells = <2>;
529		gpio-controller;
530		#gpio-cells = <2>;
531		rohm,ddr-backup-power = <0x1>;
532		rohm,rstbmode-level;
533	};
534
535	eeprom@50 {
536		compatible = "rohm,br24t01", "atmel,24c01";
537		reg = <0x50>;
538		pagesize = <8>;
539		bootph-all;
540	};
541};
542
543&lvds0 {
544	status = "okay";
545
546	clocks = <&cpg CPG_MOD 727>,
547		 <&x13_clk>,
548		 <&extal_clk>;
549	clock-names = "fck", "dclkin.0", "extal";
550
551	ports {
552		port@1 {
553			lvds0_out: endpoint {
554				remote-endpoint = <&thc63lvd1024_in>;
555			};
556		};
557	};
558};
559
560&lvds1 {
561	/*
562	 * Even though the LVDS1 output is not connected, the encoder must be
563	 * enabled to supply a pixel clock to the DU for the DPAD output when
564	 * LVDS0 is in use.
565	 */
566	status = "okay";
567
568	clocks = <&cpg CPG_MOD 727>,
569		 <&x13_clk>,
570		 <&extal_clk>;
571	clock-names = "fck", "dclkin.0", "extal";
572};
573
574&ohci0 {
575	dr_mode = "otg";
576	status = "okay";
577};
578
579&pcie_bus_clk {
580	clock-frequency = <100000000>;
581};
582
583&pciec0 {
584	status = "okay";
585};
586
587&pfc {
588	avb_pins: avb {
589		groups = "avb_link", "avb_mii";
590		function = "avb";
591	};
592
593	can0_pins: can0 {
594		groups = "can0_data";
595		function = "can0";
596	};
597
598	canfd0_pins: canfd0 {
599		groups = "canfd0_data";
600		function = "canfd0";
601	};
602
603	du_pins: du {
604		groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
605		function = "du";
606	};
607
608	irq0_pins: irq0 {
609		groups = "intc_ex_irq0";
610		function = "intc_ex";
611	};
612
613	keys_pins: keys {
614		pins = "GP_5_10", "GP_5_11", "GP_5_12", "GP_5_13";
615		bias-pull-up;
616	};
617
618	pwm3_pins: pwm3 {
619		groups = "pwm3_b";
620		function = "pwm3";
621	};
622
623	pwm5_pins: pwm5 {
624		groups = "pwm5_a";
625		function = "pwm5";
626	};
627
628	rpc_pins: rpc {
629		groups = "rpc_clk2", "rpc_ctrl", "rpc_data", "rpc_reset",
630			 "rpc_int";
631		function = "rpc";
632	};
633
634	scif2_pins: scif2 {
635		groups = "scif2_data_a";
636		function = "scif2";
637	};
638
639	sdhi0_pins: sd0 {
640		groups = "sdhi0_data4", "sdhi0_ctrl";
641		function = "sdhi0";
642		power-source = <3300>;
643	};
644
645	sdhi0_pins_uhs: sd0_uhs {
646		groups = "sdhi0_data4", "sdhi0_ctrl";
647		function = "sdhi0";
648		power-source = <1800>;
649	};
650
651	sdhi1_pins: sd1 {
652		groups = "sdhi1_data4", "sdhi1_ctrl";
653		function = "sdhi1";
654		power-source = <3300>;
655	};
656
657	sdhi1_pins_uhs: sd1_uhs {
658		groups = "sdhi1_data4", "sdhi1_ctrl";
659		function = "sdhi1";
660		power-source = <1800>;
661	};
662
663	sdhi3_pins: sd3 {
664		groups = "sdhi3_data8", "sdhi3_ctrl", "sdhi3_ds";
665		function = "sdhi3";
666		power-source = <1800>;
667	};
668
669	sound_clk_pins: sound_clk {
670		groups = "audio_clk_a", "audio_clk_b_a", "audio_clk_c_a",
671			 "audio_clkout_a", "audio_clkout1_a";
672		function = "audio_clk";
673	};
674
675	sound_pins: sound {
676		groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data";
677		function = "ssi";
678	};
679
680	usb0_pins: usb {
681		groups = "usb0_b", "usb0_id";
682		function = "usb0";
683	};
684
685	usb30_pins: usb30 {
686		groups = "usb30";
687		function = "usb30";
688	};
689};
690
691&pwm3 {
692	pinctrl-0 = <&pwm3_pins>;
693	pinctrl-names = "default";
694
695	status = "okay";
696};
697
698&pwm5 {
699	pinctrl-0 = <&pwm5_pins>;
700	pinctrl-names = "default";
701
702	status = "okay";
703};
704
705&rcar_sound {
706	pinctrl-0 = <&sound_pins>, <&sound_clk_pins>;
707	pinctrl-names = "default";
708
709	/* Single DAI */
710	#sound-dai-cells = <0>;
711
712	/* audio_clkout0/1/2/3 */
713	#clock-cells = <1>;
714	clock-frequency = <12288000 11289600>;
715
716	status = "okay";
717
718	/* update <audio_clk_b> to <cs2000> */
719	clocks = <&cpg CPG_MOD 1005>,
720		 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
721		 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
722		 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
723		 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
724		 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
725		 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
726		 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
727		 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
728		 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
729		 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
730		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
731		 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
732		 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
733		 <&audio_clk_a>, <&cs2000>, <&audio_clk_c>,
734		 <&cpg CPG_CORE R8A77990_CLK_ZA2>;
735
736	rcar_sound,dai {
737		dai0 {
738			playback = <&ssi0>, <&src0>, <&dvc0>;
739			capture = <&ssi1>, <&src1>, <&dvc1>;
740		};
741	};
742
743};
744
745&rpc {
746	pinctrl-0 = <&rpc_pins>;
747	pinctrl-names = "default";
748
749	/* Left disabled.  To be enabled by firmware when unlocked. */
750
751	flash@0 {
752		compatible = "cypress,hyperflash", "cfi-flash";
753		reg = <0>;
754
755		partitions {
756			compatible = "fixed-partitions";
757			#address-cells = <1>;
758			#size-cells = <1>;
759
760			bootparam@0 {
761				reg = <0x00000000 0x040000>;
762				read-only;
763			};
764			bl2@40000 {
765				reg = <0x00040000 0x140000>;
766				read-only;
767			};
768			cert_header_sa6@180000 {
769				reg = <0x00180000 0x040000>;
770				read-only;
771			};
772			bl31@1c0000 {
773				reg = <0x001c0000 0x040000>;
774				read-only;
775			};
776			tee@200000 {
777				reg = <0x00200000 0x440000>;
778				read-only;
779			};
780			uboot@640000 {
781				reg = <0x00640000 0x100000>;
782				read-only;
783			};
784			dtb@740000 {
785				reg = <0x00740000 0x080000>;
786			};
787			kernel@7c0000 {
788				reg = <0x007c0000 0x1400000>;
789			};
790			user@1bc0000 {
791				reg = <0x01bc0000 0x2440000>;
792			};
793		};
794	};
795};
796
797&rwdt {
798	timeout-sec = <60>;
799	status = "okay";
800};
801
802&scif2 {
803	pinctrl-0 = <&scif2_pins>;
804	pinctrl-names = "default";
805	bootph-all;
806
807	status = "okay";
808};
809
810&sdhi0 {
811	pinctrl-0 = <&sdhi0_pins>;
812	pinctrl-1 = <&sdhi0_pins_uhs>;
813	pinctrl-names = "default", "state_uhs";
814
815	vmmc-supply = <&vcc_sdhi0>;
816	vqmmc-supply = <&vccq_sdhi0>;
817	cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
818	wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
819	bus-width = <4>;
820	sd-uhs-sdr50;
821	sd-uhs-sdr104;
822	status = "okay";
823};
824
825&sdhi1 {
826	pinctrl-0 = <&sdhi1_pins>;
827	pinctrl-1 = <&sdhi1_pins_uhs>;
828	pinctrl-names = "default", "state_uhs";
829
830	vmmc-supply = <&vcc_sdhi1>;
831	vqmmc-supply = <&vccq_sdhi1>;
832	cd-gpios = <&gpio3 14 GPIO_ACTIVE_LOW>;
833	bus-width = <4>;
834	sd-uhs-sdr50;
835	sd-uhs-sdr104;
836	status = "okay";
837};
838
839&sdhi3 {
840	/* used for on-board 8bit eMMC */
841	pinctrl-0 = <&sdhi3_pins>;
842	pinctrl-1 = <&sdhi3_pins>;
843	pinctrl-names = "default", "state_uhs";
844
845	vmmc-supply = <&reg_3p3v>;
846	vqmmc-supply = <&reg_1p8v>;
847	mmc-hs200-1_8v;
848	mmc-hs400-1_8v;
849	bus-width = <8>;
850	no-sd;
851	no-sdio;
852	non-removable;
853	full-pwr-cycle-in-suspend;
854	status = "okay";
855};
856
857&ssi1 {
858	shared-pin;
859};
860
861&usb2_phy0 {
862	pinctrl-0 = <&usb0_pins>;
863	pinctrl-names = "default";
864
865	vbus-supply = <&vbus0_usb2>;
866	status = "okay";
867};
868
869&usb3_peri0 {
870	companion = <&xhci0>;
871	status = "okay";
872};
873
874&vin4 {
875	status = "okay";
876};
877
878&vin5 {
879	status = "okay";
880};
881
882&xhci0 {
883	pinctrl-0 = <&usb30_pins>;
884	pinctrl-names = "default";
885
886	status = "okay";
887};
888