xref: /linux/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi (revision 7f71507851fc7764b36a3221839607d3a45c2025) 
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright 2020, Compass Electronics Group, LLC
4 */
5
6#include <dt-bindings/gpio/gpio.h>
7#include <dt-bindings/clock/versaclock.h>
8
9/ {
10	memory@48000000 {
11		device_type = "memory";
12		/* first 128MB is reserved for secure area. */
13		reg = <0x0 0x48000000 0x0 0x78000000>;
14	};
15
16	osc_32k: osc_32k {
17		compatible = "fixed-clock";
18		#clock-cells = <0>;
19		clock-frequency = <32768>;
20		clock-output-names = "osc_32k";
21	};
22
23	reg_1p8v: regulator-1p8v {
24		compatible = "regulator-fixed";
25		regulator-name = "fixed-1.8V";
26		regulator-min-microvolt = <1800000>;
27		regulator-max-microvolt = <1800000>;
28		regulator-boot-on;
29		regulator-always-on;
30	};
31
32	reg_3p3v: regulator-3p3v {
33		compatible = "regulator-fixed";
34		regulator-name = "fixed-3.3V";
35		regulator-min-microvolt = <3300000>;
36		regulator-max-microvolt = <3300000>;
37		regulator-boot-on;
38		regulator-always-on;
39	};
40
41	wlan_pwrseq: wlan_pwrseq {
42		compatible = "mmc-pwrseq-simple";
43		reset-gpios = <&pca9654 1 GPIO_ACTIVE_LOW>;
44		clocks = <&osc_32k>;
45		clock-names = "ext_clock";
46		post-power-on-delay-ms = <80>;
47	};
48};
49
50&avb {
51	pinctrl-0 = <&avb_pins>;
52	pinctrl-names = "default";
53	phy-mode = "rgmii-rxid";
54	phy-handle = <&phy0>;
55	rx-internal-delay-ps = <1800>;
56	tx-internal-delay-ps = <2000>;
57	clocks = <&cpg CPG_MOD 812>, <&versaclock5 4>;
58	clock-names = "fck", "refclk";
59	status = "okay";
60
61	phy0: ethernet-phy@0 {
62		compatible = "ethernet-phy-id0022.1640",
63			     "ethernet-phy-ieee802.3-c22";
64		reg = <0>;
65		interrupts-extended = <&gpio2 11 IRQ_TYPE_LEVEL_LOW>;
66		reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
67	};
68};
69
70&extal_clk {
71	clock-frequency = <16666666>;
72};
73
74&extalr_clk {
75	clock-frequency = <32768>;
76};
77
78&gpio6 {
79	usb-hub-reset-hog {
80		gpio-hog;
81		gpios = <10 GPIO_ACTIVE_HIGH>;
82		output-high;
83		line-name = "usb-hub-reset";
84	};
85};
86
87&hscif0 {
88	pinctrl-0 = <&hscif0_pins>;
89	pinctrl-names = "default";
90	uart-has-rtscts;
91	status = "okay";
92
93	bluetooth {
94		compatible = "brcm,bcm43438-bt";
95		shutdown-gpios = <&pca9654 2 GPIO_ACTIVE_HIGH>;
96		host-wakeup-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
97		device-wakeup-gpios = <&pca9654 5 GPIO_ACTIVE_HIGH>;
98		clocks = <&osc_32k>;
99		clock-names = "extclk";
100		max-speed = <4000000>;
101	};
102};
103
104&hscif2 {
105	status = "okay";
106	pinctrl-0 = <&hscif2_pins>;
107	pinctrl-names = "default";
108};
109
110&i2c4 {
111	status = "okay";
112	clock-frequency = <100000>;
113
114	pca9654: gpio@20 {
115		compatible = "onnn,pca9654";
116		reg = <0x20>;
117		gpio-controller;
118		#gpio-cells = <2>;
119		gpio-line-names =
120			"i2c4_20_0",
121			"wl_reg_on",
122			"bt_reg_on",
123			"i2c4_20_3",
124			"i2c4_20_4",
125			"bt_dev_wake",
126			"i2c4_20_6",
127			"i2c4_20_7";
128	};
129
130	pca9654_lte: gpio@21 {
131		compatible = "onnn,pca9654";
132		reg = <0x21>;
133		interrupts-extended = <&gpio5 25 IRQ_TYPE_EDGE_FALLING>;
134		interrupt-controller;
135		#interrupt-cells = <2>;
136		gpio-controller;
137		#gpio-cells = <2>;
138		gpio-line-names =
139			"i2c4_21_0",
140			"zoe_pwr_on",
141			"zoe_extint",
142			"zoe_reset_n",
143			"sara_reset",
144			"i2c4_21_5",
145			"sara_pwr_off",
146			"sara_networking_status";
147	};
148
149	eeprom@50 {
150		compatible = "microchip,24c64", "atmel,24c64";
151		pagesize = <32>;
152		read-only;	/* Manufacturing EEPROM programmed at factory */
153		reg = <0x50>;
154	};
155
156	rtc@51 {
157		compatible = "nxp,pcf85263";
158		reg = <0x51>;
159	};
160
161	versaclock5: versaclock_som@6a {
162		compatible = "idt,5p49v6965";
163		reg = <0x6a>;
164		#clock-cells = <1>;
165		clocks = <&x304_clk>;
166		clock-names = "xin";
167		idt,shutdown = <0>;
168		idt,output-enable-active = <0>;
169		/* du_dotclkin0, du_dotclkin2, usb_extal, avb_txcrefclk */
170		assigned-clocks = <&versaclock5 1>,
171				   <&versaclock5 2>,
172				   <&versaclock5 3>,
173				   <&versaclock5 4>;
174
175		assigned-clock-rates = <33333333>, <33333333>, <50000000>, <125000000>;
176
177		OUT1 {
178			idt,mode = <VC5_CMOS>;
179			idt,voltage-microvolt = <1800000>;
180			idt,slew-percent = <100>;
181		};
182
183		OUT2 {
184			idt,mode = <VC5_CMOS>;
185			idt,voltage-microvolt = <1800000>;
186			idt,slew-percent = <100>;
187		};
188
189		OUT3 {
190			idt,mode = <VC5_CMOS>;
191			idt,voltage-microvolt = <1800000>;
192			idt,slew-percent = <100>;
193		};
194
195		OUT4 {
196			idt,mode = <VC5_CMOS>;
197			idt,voltage-microvolt = <3300000>;
198			idt,slew-percent = <100>;
199		};
200	};
201};
202
203&pfc {
204	pinctrl-0 = <&scif_clk_pins>;
205	pinctrl-names = "default";
206
207	avb_pins: avb {
208		mux {
209			groups = "avb_link", "avb_mdio", "avb_mii";
210			function = "avb";
211		};
212
213		pins_mdio {
214			groups = "avb_mdio";
215			drive-strength = <24>;
216		};
217
218		pins_mii_tx {
219			pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",
220			       "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";
221			drive-strength = <12>;
222		};
223	};
224
225	scif2_pins: scif2 {
226		groups = "scif2_data_a";
227		function = "scif2";
228	};
229
230	hscif0_pins: hscif0 {
231		groups = "hscif0_data", "hscif0_ctrl";
232		function = "hscif0";
233	};
234
235	hscif1_pins: hscif1 {
236		groups = "hscif1_data_a", "hscif1_ctrl_a";
237		function = "hscif1";
238	};
239
240	hscif2_pins: hscif2 {
241		groups = "hscif2_data_a";
242		function = "hscif2";
243	};
244
245	scif0_pins: scif0 {
246		groups = "scif0_data";
247		function = "scif0";
248	};
249
250	scif5_pins: scif5 {
251		groups = "scif5_data_a";
252		function = "scif5";
253	};
254
255	scif_clk_pins: scif_clk {
256		groups = "scif_clk_a";
257		function = "scif_clk";
258	};
259
260	i2c0_pins: i2c0 {
261		groups = "i2c0";
262		function = "i2c0";
263	};
264
265	sdhi2_pins: sd2 {
266		groups = "sdhi2_data4", "sdhi2_ctrl";
267		function = "sdhi2";
268		power-source = <1800>;
269	};
270
271	sdhi3_pins: sd3 {
272		groups = "sdhi3_data8", "sdhi3_ctrl", "sdhi3_ds";
273		function = "sdhi3";
274		power-source = <1800>;
275	};
276};
277
278&scif_clk {
279	clock-frequency = <14745600>;
280};
281
282&scif2 {
283	pinctrl-0 = <&scif2_pins>;
284	pinctrl-names = "default";
285	status = "okay";
286};
287
288&sdhi2 {
289	pinctrl-names = "default";
290	pinctrl-0 = <&sdhi2_pins>;
291	bus-width = <4>;
292	vmmc-supply = <&reg_3p3v>;
293	vqmmc-supply = <&reg_1p8v>;
294	non-removable;
295	cap-power-off-card;
296	keep-power-in-suspend;
297	mmc-pwrseq = <&wlan_pwrseq>;
298	status = "okay";
299	#address-cells = <1>;
300	#size-cells = <0>;
301
302	brcmf: bcrmf@1 {
303		reg = <1>;
304		compatible = "brcm,bcm4329-fmac";
305		interrupts-extended = <&gpio1 27 IRQ_TYPE_LEVEL_LOW>;
306		interrupt-names = "host-wake";
307	};
308};
309
310&sdhi3 {
311	pinctrl-0 = <&sdhi3_pins>;
312	pinctrl-1 = <&sdhi3_pins>;
313	pinctrl-names = "default", "state_uhs";
314	vmmc-supply = <&reg_3p3v>;
315	vqmmc-supply = <&reg_1p8v>;
316	bus-width = <8>;
317	mmc-hs200-1_8v;
318	no-sd;
319	no-sdio;
320	non-removable;
321	fixed-emmc-driver-type = <1>;
322	status = "okay";
323};
324
325&usb2_clksel {
326	clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>,
327		  <&versaclock5 3>, <&usb3s0_clk>;
328	status = "okay";
329};
330
331&usb3s0_clk {
332	clock-frequency = <100000000>;
333};
334