16f18b8d4SJens Glathe// SPDX-License-Identifier: BSD-3-Clause 26f18b8d4SJens Glathe/* 36f18b8d4SJens Glathe * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 46f18b8d4SJens Glathe * Copyright (c) 2024, Xilin Wu <wuxilin123@gmail.com> 56f18b8d4SJens Glathe */ 66f18b8d4SJens Glathe 76f18b8d4SJens Glathe/dts-v1/; 86f18b8d4SJens Glathe 96f18b8d4SJens Glathe#include <dt-bindings/gpio/gpio.h> 106f18b8d4SJens Glathe#include <dt-bindings/input/gpio-keys.h> 116f18b8d4SJens Glathe#include <dt-bindings/input/input.h> 126f18b8d4SJens Glathe#include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 136f18b8d4SJens Glathe#include <dt-bindings/regulator/qcom,rpmh-regulator.h> 146f18b8d4SJens Glathe 156f18b8d4SJens Glathe#include "x1e80100.dtsi" 166f18b8d4SJens Glathe#include "x1e80100-pmics.dtsi" 176f18b8d4SJens Glathe 186f18b8d4SJens Glathe/ { 196f18b8d4SJens Glathe model = "HP Omnibook X 14"; 206f18b8d4SJens Glathe compatible = "hp,omnibook-x14", "qcom,x1e80100"; 216f18b8d4SJens Glathe chassis-type = "laptop"; 226f18b8d4SJens Glathe 236f18b8d4SJens Glathe aliases { 246f18b8d4SJens Glathe serial0 = &uart21; 256f18b8d4SJens Glathe serial1 = &uart14; 266f18b8d4SJens Glathe }; 276f18b8d4SJens Glathe 286f18b8d4SJens Glathe wcd938x: audio-codec { 296f18b8d4SJens Glathe compatible = "qcom,wcd9385-codec"; 306f18b8d4SJens Glathe 316f18b8d4SJens Glathe pinctrl-names = "default"; 326f18b8d4SJens Glathe pinctrl-0 = <&wcd_default>; 336f18b8d4SJens Glathe 346f18b8d4SJens Glathe qcom,micbias1-microvolt = <1800000>; 356f18b8d4SJens Glathe qcom,micbias2-microvolt = <1800000>; 366f18b8d4SJens Glathe qcom,micbias3-microvolt = <1800000>; 376f18b8d4SJens Glathe qcom,micbias4-microvolt = <1800000>; 386f18b8d4SJens Glathe qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000 500000 500000 500000>; 396f18b8d4SJens Glathe qcom,mbhc-headset-vthreshold-microvolt = <1700000>; 406f18b8d4SJens Glathe qcom,mbhc-headphone-vthreshold-microvolt = <50000>; 416f18b8d4SJens Glathe qcom,rx-device = <&wcd_rx>; 426f18b8d4SJens Glathe qcom,tx-device = <&wcd_tx>; 436f18b8d4SJens Glathe 446f18b8d4SJens Glathe reset-gpios = <&tlmm 191 GPIO_ACTIVE_LOW>; 456f18b8d4SJens Glathe 466f18b8d4SJens Glathe vdd-buck-supply = <&vreg_l15b_1p8>; 476f18b8d4SJens Glathe vdd-rxtx-supply = <&vreg_l15b_1p8>; 486f18b8d4SJens Glathe vdd-io-supply = <&vreg_l15b_1p8>; 496f18b8d4SJens Glathe vdd-mic-bias-supply = <&vreg_bob1>; 506f18b8d4SJens Glathe 516f18b8d4SJens Glathe #sound-dai-cells = <1>; 526f18b8d4SJens Glathe }; 536f18b8d4SJens Glathe 546f18b8d4SJens Glathe backlight: backlight { 556f18b8d4SJens Glathe compatible = "pwm-backlight"; 566f18b8d4SJens Glathe pwms = <&pmk8550_pwm 0 5000000>; 576f18b8d4SJens Glathe 586f18b8d4SJens Glathe brightness-levels = <0 2048 4096 8192 16384 65535>; 596f18b8d4SJens Glathe num-interpolated-steps = <20>; 606f18b8d4SJens Glathe default-brightness-level = <80>; 616f18b8d4SJens Glathe 626f18b8d4SJens Glathe enable-gpios = <&pmc8380_3_gpios 4 GPIO_ACTIVE_HIGH>; 636f18b8d4SJens Glathe power-supply = <&vreg_edp_bl>; 646f18b8d4SJens Glathe 656f18b8d4SJens Glathe pinctrl-0 = <&edp_bl_en>, <&edp_bl_pwm>; 666f18b8d4SJens Glathe pinctrl-names = "default"; 676f18b8d4SJens Glathe }; 686f18b8d4SJens Glathe 696f18b8d4SJens Glathe gpio-keys { 706f18b8d4SJens Glathe compatible = "gpio-keys"; 716f18b8d4SJens Glathe 726f18b8d4SJens Glathe pinctrl-0 = <&hall_int_n_default>; 736f18b8d4SJens Glathe pinctrl-names = "default"; 746f18b8d4SJens Glathe 756f18b8d4SJens Glathe switch-lid { 766f18b8d4SJens Glathe gpios = <&tlmm 92 GPIO_ACTIVE_LOW>; 776f18b8d4SJens Glathe linux,input-type = <EV_SW>; 786f18b8d4SJens Glathe linux,code = <SW_LID>; 796f18b8d4SJens Glathe wakeup-source; 806f18b8d4SJens Glathe wakeup-event-action = <EV_ACT_DEASSERTED>; 816f18b8d4SJens Glathe }; 826f18b8d4SJens Glathe }; 836f18b8d4SJens Glathe 846f18b8d4SJens Glathe pmic-glink { 856f18b8d4SJens Glathe compatible = "qcom,x1e80100-pmic-glink", 866f18b8d4SJens Glathe "qcom,sm8550-pmic-glink", 876f18b8d4SJens Glathe "qcom,pmic-glink"; 886f18b8d4SJens Glathe orientation-gpios = <&tlmm 121 GPIO_ACTIVE_HIGH>, 896f18b8d4SJens Glathe <&tlmm 123 GPIO_ACTIVE_HIGH>; 906f18b8d4SJens Glathe #address-cells = <1>; 916f18b8d4SJens Glathe #size-cells = <0>; 926f18b8d4SJens Glathe 936f18b8d4SJens Glathe /* Left-side port, closer to the screen */ 946f18b8d4SJens Glathe connector@0 { 956f18b8d4SJens Glathe compatible = "usb-c-connector"; 966f18b8d4SJens Glathe reg = <0>; 976f18b8d4SJens Glathe power-role = "dual"; 986f18b8d4SJens Glathe data-role = "dual"; 996f18b8d4SJens Glathe 1006f18b8d4SJens Glathe ports { 1016f18b8d4SJens Glathe #address-cells = <1>; 1026f18b8d4SJens Glathe #size-cells = <0>; 1036f18b8d4SJens Glathe 1046f18b8d4SJens Glathe port@0 { 1056f18b8d4SJens Glathe reg = <0>; 1066f18b8d4SJens Glathe 1076f18b8d4SJens Glathe pmic_glink_ss0_hs_in: endpoint { 1086f18b8d4SJens Glathe remote-endpoint = <&usb_1_ss0_dwc3_hs>; 1096f18b8d4SJens Glathe }; 1106f18b8d4SJens Glathe }; 1116f18b8d4SJens Glathe 1126f18b8d4SJens Glathe port@1 { 1136f18b8d4SJens Glathe reg = <1>; 1146f18b8d4SJens Glathe 1156f18b8d4SJens Glathe pmic_glink_ss0_ss_in: endpoint { 1166f18b8d4SJens Glathe remote-endpoint = <&retimer_ss0_ss_out>; 1176f18b8d4SJens Glathe }; 1186f18b8d4SJens Glathe }; 1196f18b8d4SJens Glathe 1206f18b8d4SJens Glathe port@2 { 1216f18b8d4SJens Glathe reg = <2>; 1226f18b8d4SJens Glathe 1236f18b8d4SJens Glathe pmic_glink_ss0_con_sbu_in: endpoint { 1246f18b8d4SJens Glathe remote-endpoint = <&retimer_ss0_con_sbu_out>; 1256f18b8d4SJens Glathe }; 1266f18b8d4SJens Glathe }; 1276f18b8d4SJens Glathe }; 1286f18b8d4SJens Glathe }; 1296f18b8d4SJens Glathe 1306f18b8d4SJens Glathe /* Left-side port, farther from the screen */ 1316f18b8d4SJens Glathe connector@1 { 1326f18b8d4SJens Glathe compatible = "usb-c-connector"; 1336f18b8d4SJens Glathe reg = <1>; 1346f18b8d4SJens Glathe power-role = "dual"; 1356f18b8d4SJens Glathe data-role = "dual"; 1366f18b8d4SJens Glathe 1376f18b8d4SJens Glathe ports { 1386f18b8d4SJens Glathe #address-cells = <1>; 1396f18b8d4SJens Glathe #size-cells = <0>; 1406f18b8d4SJens Glathe 1416f18b8d4SJens Glathe port@0 { 1426f18b8d4SJens Glathe reg = <0>; 1436f18b8d4SJens Glathe 1446f18b8d4SJens Glathe pmic_glink_ss1_hs_in: endpoint { 1456f18b8d4SJens Glathe remote-endpoint = <&usb_1_ss1_dwc3_hs>; 1466f18b8d4SJens Glathe }; 1476f18b8d4SJens Glathe }; 1486f18b8d4SJens Glathe 1496f18b8d4SJens Glathe port@1 { 1506f18b8d4SJens Glathe reg = <1>; 1516f18b8d4SJens Glathe 1526f18b8d4SJens Glathe pmic_glink_ss1_ss_in: endpoint { 1539c6ee9a7SJohan Hovold remote-endpoint = <&usb_1_ss1_qmpphy_out>; 1546f18b8d4SJens Glathe }; 1556f18b8d4SJens Glathe }; 156b9137c58SJens Glathe 157b9137c58SJens Glathe port@2 { 158b9137c58SJens Glathe reg = <2>; 159b9137c58SJens Glathe 160b9137c58SJens Glathe pmic_glink_ss1_sbu: endpoint { 161b9137c58SJens Glathe remote-endpoint = <&usb_1_ss1_sbu_mux>; 162b9137c58SJens Glathe }; 163b9137c58SJens Glathe }; 1646f18b8d4SJens Glathe }; 1656f18b8d4SJens Glathe }; 1666f18b8d4SJens Glathe }; 1676f18b8d4SJens Glathe 1686f18b8d4SJens Glathe reserved-memory { 1696f18b8d4SJens Glathe linux,cma { 1706f18b8d4SJens Glathe compatible = "shared-dma-pool"; 1716f18b8d4SJens Glathe size = <0x0 0x8000000>; 1726f18b8d4SJens Glathe reusable; 1736f18b8d4SJens Glathe linux,cma-default; 1746f18b8d4SJens Glathe }; 1756f18b8d4SJens Glathe }; 1766f18b8d4SJens Glathe 1773858e56dSJuerg Haefliger sound: sound { 1786f18b8d4SJens Glathe compatible = "qcom,x1e80100-sndcard"; 1796f18b8d4SJens Glathe model = "X1E80100-HP-OMNIBOOK-X14"; 1806f18b8d4SJens Glathe audio-routing = "SpkrLeft IN", "WSA WSA_SPK1 OUT", 1816f18b8d4SJens Glathe "SpkrRight IN", "WSA WSA_SPK2 OUT", 1826f18b8d4SJens Glathe "IN1_HPHL", "HPHL_OUT", 1836f18b8d4SJens Glathe "IN2_HPHR", "HPHR_OUT", 1846f18b8d4SJens Glathe "AMIC2", "MIC BIAS2", 1856f18b8d4SJens Glathe "VA DMIC0", "MIC BIAS3", 1866f18b8d4SJens Glathe "VA DMIC1", "MIC BIAS3", 1876f18b8d4SJens Glathe "VA DMIC2", "MIC BIAS1", 1886f18b8d4SJens Glathe "VA DMIC3", "MIC BIAS1", 1896f18b8d4SJens Glathe "VA DMIC0", "VA MIC BIAS3", 1906f18b8d4SJens Glathe "VA DMIC1", "VA MIC BIAS3", 1916f18b8d4SJens Glathe "VA DMIC2", "VA MIC BIAS1", 1926f18b8d4SJens Glathe "VA DMIC3", "VA MIC BIAS1", 1936f18b8d4SJens Glathe "TX SWR_INPUT1", "ADC2_OUTPUT"; 1946f18b8d4SJens Glathe 1956f18b8d4SJens Glathe wcd-playback-dai-link { 1966f18b8d4SJens Glathe link-name = "WCD Playback"; 1976f18b8d4SJens Glathe 1986f18b8d4SJens Glathe cpu { 1996f18b8d4SJens Glathe sound-dai = <&q6apmbedai RX_CODEC_DMA_RX_0>; 2006f18b8d4SJens Glathe }; 2016f18b8d4SJens Glathe 2026f18b8d4SJens Glathe codec { 2036f18b8d4SJens Glathe sound-dai = <&wcd938x 0>, <&swr1 0>, <&lpass_rxmacro 0>; 2046f18b8d4SJens Glathe }; 2056f18b8d4SJens Glathe 2066f18b8d4SJens Glathe platform { 2076f18b8d4SJens Glathe sound-dai = <&q6apm>; 2086f18b8d4SJens Glathe }; 2096f18b8d4SJens Glathe }; 2106f18b8d4SJens Glathe 2116f18b8d4SJens Glathe wcd-capture-dai-link { 2126f18b8d4SJens Glathe link-name = "WCD Capture"; 2136f18b8d4SJens Glathe 2146f18b8d4SJens Glathe cpu { 2156f18b8d4SJens Glathe sound-dai = <&q6apmbedai TX_CODEC_DMA_TX_3>; 2166f18b8d4SJens Glathe }; 2176f18b8d4SJens Glathe 2186f18b8d4SJens Glathe codec { 2196f18b8d4SJens Glathe sound-dai = <&wcd938x 1>, <&swr2 1>, <&lpass_txmacro 0>; 2206f18b8d4SJens Glathe }; 2216f18b8d4SJens Glathe 2226f18b8d4SJens Glathe platform { 2236f18b8d4SJens Glathe sound-dai = <&q6apm>; 2246f18b8d4SJens Glathe }; 2256f18b8d4SJens Glathe }; 2266f18b8d4SJens Glathe 2276f18b8d4SJens Glathe wsa-dai-link { 2286f18b8d4SJens Glathe link-name = "WSA Playback"; 2296f18b8d4SJens Glathe 2306f18b8d4SJens Glathe cpu { 2316f18b8d4SJens Glathe sound-dai = <&q6apmbedai WSA_CODEC_DMA_RX_0>; 2326f18b8d4SJens Glathe }; 2336f18b8d4SJens Glathe 2346f18b8d4SJens Glathe codec { 2356f18b8d4SJens Glathe sound-dai = <&left_spkr>, <&right_spkr>, <&swr0 0>, <&lpass_wsamacro 0>; 2366f18b8d4SJens Glathe }; 2376f18b8d4SJens Glathe 2386f18b8d4SJens Glathe platform { 2396f18b8d4SJens Glathe sound-dai = <&q6apm>; 2406f18b8d4SJens Glathe }; 2416f18b8d4SJens Glathe }; 2426f18b8d4SJens Glathe 2436f18b8d4SJens Glathe va-dai-link { 2446f18b8d4SJens Glathe link-name = "VA Capture"; 2456f18b8d4SJens Glathe 2466f18b8d4SJens Glathe cpu { 2476f18b8d4SJens Glathe sound-dai = <&q6apmbedai VA_CODEC_DMA_TX_0>; 2486f18b8d4SJens Glathe }; 2496f18b8d4SJens Glathe 2506f18b8d4SJens Glathe codec { 2516f18b8d4SJens Glathe sound-dai = <&lpass_vamacro 0>; 2526f18b8d4SJens Glathe }; 2536f18b8d4SJens Glathe 2546f18b8d4SJens Glathe platform { 2556f18b8d4SJens Glathe sound-dai = <&q6apm>; 2566f18b8d4SJens Glathe }; 2576f18b8d4SJens Glathe }; 2586f18b8d4SJens Glathe }; 2596f18b8d4SJens Glathe 2606f18b8d4SJens Glathe vreg_edp_3p3: regulator-edp-3p3 { 2616f18b8d4SJens Glathe compatible = "regulator-fixed"; 2626f18b8d4SJens Glathe 2636f18b8d4SJens Glathe regulator-name = "VREG_EDP_3P3"; 2646f18b8d4SJens Glathe regulator-min-microvolt = <3300000>; 2656f18b8d4SJens Glathe regulator-max-microvolt = <3300000>; 2666f18b8d4SJens Glathe 2676f18b8d4SJens Glathe gpio = <&tlmm 70 GPIO_ACTIVE_HIGH>; 2686f18b8d4SJens Glathe enable-active-high; 2696f18b8d4SJens Glathe 2706f18b8d4SJens Glathe pinctrl-0 = <&edp_reg_en>; 2716f18b8d4SJens Glathe pinctrl-names = "default"; 2726f18b8d4SJens Glathe 2736f18b8d4SJens Glathe regulator-boot-on; 2746f18b8d4SJens Glathe }; 2756f18b8d4SJens Glathe 2766f18b8d4SJens Glathe vreg_edp_bl: regulator-edp-bl { 2776f18b8d4SJens Glathe compatible = "regulator-fixed"; 2786f18b8d4SJens Glathe 2796f18b8d4SJens Glathe regulator-name = "VBL9"; 2806f18b8d4SJens Glathe regulator-min-microvolt = <3600000>; 2816f18b8d4SJens Glathe regulator-max-microvolt = <3600000>; 2826f18b8d4SJens Glathe 2836f18b8d4SJens Glathe gpio = <&pmc8380_3_gpios 10 GPIO_ACTIVE_HIGH>; 2846f18b8d4SJens Glathe enable-active-high; 2856f18b8d4SJens Glathe 2866f18b8d4SJens Glathe pinctrl-names = "default"; 2876f18b8d4SJens Glathe pinctrl-0 = <&edp_bl_reg_en>; 2886f18b8d4SJens Glathe 2896f18b8d4SJens Glathe regulator-boot-on; 2906f18b8d4SJens Glathe }; 2916f18b8d4SJens Glathe 2926f18b8d4SJens Glathe vreg_misc_3p3: regulator-misc-3p3 { 2936f18b8d4SJens Glathe compatible = "regulator-fixed"; 2946f18b8d4SJens Glathe 2956f18b8d4SJens Glathe regulator-name = "VREG_MISC_3P3"; 2966f18b8d4SJens Glathe regulator-min-microvolt = <3300000>; 2976f18b8d4SJens Glathe regulator-max-microvolt = <3300000>; 2986f18b8d4SJens Glathe 2996f18b8d4SJens Glathe gpio = <&pm8550ve_8_gpios 6 GPIO_ACTIVE_HIGH>; 3006f18b8d4SJens Glathe enable-active-high; 3016f18b8d4SJens Glathe 3026f18b8d4SJens Glathe pinctrl-names = "default"; 3036f18b8d4SJens Glathe pinctrl-0 = <&misc_3p3_reg_en>; 3046f18b8d4SJens Glathe 3056f18b8d4SJens Glathe regulator-boot-on; 3066f18b8d4SJens Glathe regulator-always-on; 3076f18b8d4SJens Glathe }; 3086f18b8d4SJens Glathe 3096f18b8d4SJens Glathe vreg_nvme: regulator-nvme { 3106f18b8d4SJens Glathe compatible = "regulator-fixed"; 3116f18b8d4SJens Glathe 3126f18b8d4SJens Glathe regulator-name = "VREG_NVME_3P3"; 3136f18b8d4SJens Glathe regulator-min-microvolt = <3300000>; 3146f18b8d4SJens Glathe regulator-max-microvolt = <3300000>; 3156f18b8d4SJens Glathe 3166f18b8d4SJens Glathe gpio = <&tlmm 18 GPIO_ACTIVE_HIGH>; 3176f18b8d4SJens Glathe enable-active-high; 3186f18b8d4SJens Glathe 3196f18b8d4SJens Glathe pinctrl-0 = <&nvme_reg_en>; 3206f18b8d4SJens Glathe pinctrl-names = "default"; 3216f18b8d4SJens Glathe 3226f18b8d4SJens Glathe regulator-boot-on; 3236f18b8d4SJens Glathe }; 3246f18b8d4SJens Glathe 3256f18b8d4SJens Glathe vreg_rtmr0_1p15: regulator-rtmr0-1p15 { 3266f18b8d4SJens Glathe compatible = "regulator-fixed"; 3276f18b8d4SJens Glathe 3286f18b8d4SJens Glathe regulator-name = "VREG_RTMR0_1P15"; 3296f18b8d4SJens Glathe regulator-min-microvolt = <1150000>; 3306f18b8d4SJens Glathe regulator-max-microvolt = <1150000>; 3316f18b8d4SJens Glathe 3326f18b8d4SJens Glathe gpio = <&pmc8380_5_gpios 8 GPIO_ACTIVE_HIGH>; 3336f18b8d4SJens Glathe enable-active-high; 3346f18b8d4SJens Glathe 3356f18b8d4SJens Glathe pinctrl-0 = <&usb0_pwr_1p15_reg_en>; 3366f18b8d4SJens Glathe pinctrl-names = "default"; 3376f18b8d4SJens Glathe 3386f18b8d4SJens Glathe regulator-boot-on; 3396f18b8d4SJens Glathe }; 3406f18b8d4SJens Glathe 3416f18b8d4SJens Glathe vreg_rtmr0_1p8: regulator-rtmr0-1p8 { 3426f18b8d4SJens Glathe compatible = "regulator-fixed"; 3436f18b8d4SJens Glathe 3446f18b8d4SJens Glathe regulator-name = "VREG_RTMR0_1P8"; 3456f18b8d4SJens Glathe regulator-min-microvolt = <1800000>; 3466f18b8d4SJens Glathe regulator-max-microvolt = <1800000>; 3476f18b8d4SJens Glathe 3486f18b8d4SJens Glathe gpio = <&pm8550ve_9_gpios 8 GPIO_ACTIVE_HIGH>; 3496f18b8d4SJens Glathe enable-active-high; 3506f18b8d4SJens Glathe 3516f18b8d4SJens Glathe pinctrl-0 = <&usb0_1p8_reg_en>; 3526f18b8d4SJens Glathe pinctrl-names = "default"; 3536f18b8d4SJens Glathe 3546f18b8d4SJens Glathe regulator-boot-on; 3556f18b8d4SJens Glathe }; 3566f18b8d4SJens Glathe 3576f18b8d4SJens Glathe vreg_rtmr0_3p3: regulator-rtmr0-3p3 { 3586f18b8d4SJens Glathe compatible = "regulator-fixed"; 3596f18b8d4SJens Glathe 3606f18b8d4SJens Glathe regulator-name = "VREG_RTMR0_3P3"; 3616f18b8d4SJens Glathe regulator-min-microvolt = <3300000>; 3626f18b8d4SJens Glathe regulator-max-microvolt = <3300000>; 3636f18b8d4SJens Glathe 3646f18b8d4SJens Glathe gpio = <&pm8550_gpios 11 GPIO_ACTIVE_HIGH>; 3656f18b8d4SJens Glathe enable-active-high; 3666f18b8d4SJens Glathe 3676f18b8d4SJens Glathe pinctrl-0 = <&usb0_3p3_reg_en>; 3686f18b8d4SJens Glathe pinctrl-names = "default"; 3696f18b8d4SJens Glathe 3706f18b8d4SJens Glathe regulator-boot-on; 3716f18b8d4SJens Glathe }; 3726f18b8d4SJens Glathe 3736f18b8d4SJens Glathe vreg_vph_pwr: regulator-vph-pwr { 3746f18b8d4SJens Glathe compatible = "regulator-fixed"; 3756f18b8d4SJens Glathe 3766f18b8d4SJens Glathe regulator-name = "vreg_vph_pwr"; 3776f18b8d4SJens Glathe regulator-min-microvolt = <3700000>; 3786f18b8d4SJens Glathe regulator-max-microvolt = <3700000>; 3796f18b8d4SJens Glathe 3806f18b8d4SJens Glathe regulator-always-on; 3816f18b8d4SJens Glathe regulator-boot-on; 3826f18b8d4SJens Glathe }; 3836f18b8d4SJens Glathe 3846f18b8d4SJens Glathe vreg_wcn_3p3: regulator-wcn-3p3 { 3856f18b8d4SJens Glathe compatible = "regulator-fixed"; 3866f18b8d4SJens Glathe 3876f18b8d4SJens Glathe regulator-name = "VREG_WCN_3P3"; 3886f18b8d4SJens Glathe regulator-min-microvolt = <3300000>; 3896f18b8d4SJens Glathe regulator-max-microvolt = <3300000>; 3906f18b8d4SJens Glathe 3916f18b8d4SJens Glathe gpio = <&tlmm 214 GPIO_ACTIVE_HIGH>; 3926f18b8d4SJens Glathe enable-active-high; 3936f18b8d4SJens Glathe 3946f18b8d4SJens Glathe pinctrl-0 = <&wcn_sw_en>; 3956f18b8d4SJens Glathe pinctrl-names = "default"; 3966f18b8d4SJens Glathe 3976f18b8d4SJens Glathe regulator-boot-on; 3986f18b8d4SJens Glathe }; 3996f18b8d4SJens Glathe 4006f18b8d4SJens Glathe /* 4016f18b8d4SJens Glathe * TODO: These two regulators are actually part of the removable M.2 4026f18b8d4SJens Glathe * card and not the CRD mainboard. Need to describe this differently. 4036f18b8d4SJens Glathe * Functionally it works correctly, because all we need to do is to 4046f18b8d4SJens Glathe * turn on the actual 3.3V supply above. 4056f18b8d4SJens Glathe */ 4066f18b8d4SJens Glathe vreg_wcn_0p95: regulator-wcn-0p95 { 4076f18b8d4SJens Glathe compatible = "regulator-fixed"; 4086f18b8d4SJens Glathe 4096f18b8d4SJens Glathe regulator-name = "VREG_WCN_0P95"; 4106f18b8d4SJens Glathe regulator-min-microvolt = <950000>; 4116f18b8d4SJens Glathe regulator-max-microvolt = <950000>; 4126f18b8d4SJens Glathe 4136f18b8d4SJens Glathe vin-supply = <&vreg_wcn_3p3>; 4146f18b8d4SJens Glathe }; 4156f18b8d4SJens Glathe 4166f18b8d4SJens Glathe vreg_wcn_1p9: regulator-wcn-1p9 { 4176f18b8d4SJens Glathe compatible = "regulator-fixed"; 4186f18b8d4SJens Glathe 4196f18b8d4SJens Glathe regulator-name = "VREG_WCN_1P9"; 4206f18b8d4SJens Glathe regulator-min-microvolt = <1900000>; 4216f18b8d4SJens Glathe regulator-max-microvolt = <1900000>; 4226f18b8d4SJens Glathe 4236f18b8d4SJens Glathe vin-supply = <&vreg_wcn_3p3>; 4246f18b8d4SJens Glathe }; 4256f18b8d4SJens Glathe 4266f18b8d4SJens Glathe wcn6855-pmu { 4276f18b8d4SJens Glathe compatible = "qcom,wcn6855-pmu"; 4286f18b8d4SJens Glathe 4296f18b8d4SJens Glathe vddaon-supply = <&vreg_wcn_0p95>; 4306f18b8d4SJens Glathe vddio-supply = <&vreg_wcn_1p9>; 4316f18b8d4SJens Glathe vddpcie1p3-supply = <&vreg_wcn_1p9>; 4326f18b8d4SJens Glathe vddpcie1p9-supply = <&vreg_wcn_1p9>; 4336f18b8d4SJens Glathe vddpmu-supply = <&vreg_wcn_0p95>; 4346f18b8d4SJens Glathe vddpmumx-supply = <&vreg_wcn_0p95>; 4356f18b8d4SJens Glathe vddpmucx-supply = <&vreg_wcn_0p95>; 4366f18b8d4SJens Glathe vddrfa0p95-supply = <&vreg_wcn_0p95>; 4376f18b8d4SJens Glathe vddrfa1p3-supply = <&vreg_wcn_1p9>; 4386f18b8d4SJens Glathe vddrfa1p9-supply = <&vreg_wcn_1p9>; 4396f18b8d4SJens Glathe 4406f18b8d4SJens Glathe wlan-enable-gpios = <&tlmm 117 GPIO_ACTIVE_HIGH>; 4416f18b8d4SJens Glathe bt-enable-gpios = <&tlmm 116 GPIO_ACTIVE_HIGH>; 4426f18b8d4SJens Glathe 4436f18b8d4SJens Glathe pinctrl-0 = <&wcn_wlan_bt_en>; 4446f18b8d4SJens Glathe pinctrl-names = "default"; 4456f18b8d4SJens Glathe 4466f18b8d4SJens Glathe regulators { 4476f18b8d4SJens Glathe vreg_pmu_rfa_cmn_0p8: ldo0 { 4486f18b8d4SJens Glathe regulator-name = "vreg_pmu_rfa_cmn_0p8"; 4496f18b8d4SJens Glathe }; 4506f18b8d4SJens Glathe 4516f18b8d4SJens Glathe vreg_pmu_aon_0p8: ldo1 { 4526f18b8d4SJens Glathe regulator-name = "vreg_pmu_aon_0p8"; 4536f18b8d4SJens Glathe }; 4546f18b8d4SJens Glathe 4556f18b8d4SJens Glathe vreg_pmu_wlcx_0p8: ldo2 { 4566f18b8d4SJens Glathe regulator-name = "vreg_pmu_wlcx_0p8"; 4576f18b8d4SJens Glathe }; 4586f18b8d4SJens Glathe 4596f18b8d4SJens Glathe vreg_pmu_wlmx_0p8: ldo3 { 4606f18b8d4SJens Glathe regulator-name = "vreg_pmu_wlmx_0p8"; 4616f18b8d4SJens Glathe }; 4626f18b8d4SJens Glathe 4636f18b8d4SJens Glathe vreg_pmu_btcmx_0p8: ldo4 { 4646f18b8d4SJens Glathe regulator-name = "vreg_pmu_btcmx_0p8"; 4656f18b8d4SJens Glathe }; 4666f18b8d4SJens Glathe 4676f18b8d4SJens Glathe vreg_pmu_pcie_1p8: ldo5 { 4686f18b8d4SJens Glathe regulator-name = "vreg_pmu_pcie_1p8"; 4696f18b8d4SJens Glathe }; 4706f18b8d4SJens Glathe 4716f18b8d4SJens Glathe vreg_pmu_pcie_0p9: ldo6 { 4726f18b8d4SJens Glathe regulator-name = "vreg_pmu_pcie_0p9"; 4736f18b8d4SJens Glathe }; 4746f18b8d4SJens Glathe 4756f18b8d4SJens Glathe vreg_pmu_rfa_0p8: ldo7 { 4766f18b8d4SJens Glathe regulator-name = "vreg_pmu_rfa_0p8"; 4776f18b8d4SJens Glathe }; 4786f18b8d4SJens Glathe 4796f18b8d4SJens Glathe vreg_pmu_rfa_1p2: ldo8 { 4806f18b8d4SJens Glathe regulator-name = "vreg_pmu_rfa_1p2"; 4816f18b8d4SJens Glathe }; 4826f18b8d4SJens Glathe 4836f18b8d4SJens Glathe vreg_pmu_rfa_1p7: ldo9 { 4846f18b8d4SJens Glathe regulator-name = "vreg_pmu_rfa_1p7"; 4856f18b8d4SJens Glathe }; 4866f18b8d4SJens Glathe }; 4876f18b8d4SJens Glathe }; 488b9137c58SJens Glathe 489b9137c58SJens Glathe usb-1-ss1-sbu-mux { 490b9137c58SJens Glathe compatible = "onnn,fsusb42", "gpio-sbu-mux"; 491b9137c58SJens Glathe 492b9137c58SJens Glathe enable-gpios = <&tlmm 179 GPIO_ACTIVE_LOW>; 493b9137c58SJens Glathe select-gpios = <&tlmm 178 GPIO_ACTIVE_HIGH>; 494b9137c58SJens Glathe 495b9137c58SJens Glathe pinctrl-0 = <&usb_1_ss1_sbu_default>; 496b9137c58SJens Glathe pinctrl-names = "default"; 497b9137c58SJens Glathe 498b9137c58SJens Glathe mode-switch; 499b9137c58SJens Glathe orientation-switch; 500b9137c58SJens Glathe 501b9137c58SJens Glathe port { 502b9137c58SJens Glathe usb_1_ss1_sbu_mux: endpoint { 503b9137c58SJens Glathe remote-endpoint = <&pmic_glink_ss1_sbu>; 504b9137c58SJens Glathe }; 505b9137c58SJens Glathe }; 506b9137c58SJens Glathe }; 5076f18b8d4SJens Glathe}; 5086f18b8d4SJens Glathe 5096f18b8d4SJens Glathe&apps_rsc { 5106f18b8d4SJens Glathe regulators-0 { 5116f18b8d4SJens Glathe compatible = "qcom,pm8550-rpmh-regulators"; 5126f18b8d4SJens Glathe qcom,pmic-id = "b"; 5136f18b8d4SJens Glathe 5146f18b8d4SJens Glathe vdd-bob1-supply = <&vreg_vph_pwr>; 5156f18b8d4SJens Glathe vdd-bob2-supply = <&vreg_vph_pwr>; 5166f18b8d4SJens Glathe vdd-l1-l4-l10-supply = <&vreg_s4c_1p8>; 5176f18b8d4SJens Glathe vdd-l2-l13-l14-supply = <&vreg_bob1>; 5186f18b8d4SJens Glathe vdd-l5-l16-supply = <&vreg_bob1>; 5196f18b8d4SJens Glathe vdd-l6-l7-supply = <&vreg_bob2>; 5206f18b8d4SJens Glathe vdd-l8-l9-supply = <&vreg_bob1>; 5216f18b8d4SJens Glathe vdd-l12-supply = <&vreg_s5j_1p2>; 5226f18b8d4SJens Glathe vdd-l15-supply = <&vreg_s4c_1p8>; 5236f18b8d4SJens Glathe vdd-l17-supply = <&vreg_bob2>; 5246f18b8d4SJens Glathe 5256f18b8d4SJens Glathe vreg_bob1: bob1 { 5266f18b8d4SJens Glathe regulator-name = "vreg_bob1"; 5276f18b8d4SJens Glathe regulator-min-microvolt = <3008000>; 5286f18b8d4SJens Glathe regulator-max-microvolt = <3960000>; 5296f18b8d4SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 5306f18b8d4SJens Glathe }; 5316f18b8d4SJens Glathe 5326f18b8d4SJens Glathe vreg_bob2: bob2 { 5336f18b8d4SJens Glathe regulator-name = "vreg_bob2"; 5346f18b8d4SJens Glathe regulator-min-microvolt = <2504000>; 5356f18b8d4SJens Glathe regulator-max-microvolt = <3008000>; 5366f18b8d4SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 5376f18b8d4SJens Glathe }; 5386f18b8d4SJens Glathe 5396f18b8d4SJens Glathe vreg_l1b_1p8: ldo1 { 5406f18b8d4SJens Glathe regulator-name = "vreg_l1b_1p8"; 5416f18b8d4SJens Glathe regulator-min-microvolt = <1800000>; 5426f18b8d4SJens Glathe regulator-max-microvolt = <1800000>; 5436f18b8d4SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 5446f18b8d4SJens Glathe }; 5456f18b8d4SJens Glathe 5466f18b8d4SJens Glathe vreg_l2b_3p0: ldo2 { 5476f18b8d4SJens Glathe regulator-name = "vreg_l2b_3p0"; 5486f18b8d4SJens Glathe regulator-min-microvolt = <3072000>; 5496f18b8d4SJens Glathe regulator-max-microvolt = <3100000>; 5506f18b8d4SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 5516f18b8d4SJens Glathe }; 5526f18b8d4SJens Glathe 5536f18b8d4SJens Glathe vreg_l4b_1p8: ldo4 { 5546f18b8d4SJens Glathe regulator-name = "vreg_l4b_1p8"; 5556f18b8d4SJens Glathe regulator-min-microvolt = <1800000>; 5566f18b8d4SJens Glathe regulator-max-microvolt = <1800000>; 5576f18b8d4SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 5586f18b8d4SJens Glathe }; 5596f18b8d4SJens Glathe 5606f18b8d4SJens Glathe vreg_l5b_3p0: ldo5 { 5616f18b8d4SJens Glathe regulator-name = "vreg_l5b_3p0"; 5626f18b8d4SJens Glathe regulator-min-microvolt = <3000000>; 5636f18b8d4SJens Glathe regulator-max-microvolt = <3000000>; 5646f18b8d4SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 5656f18b8d4SJens Glathe }; 5666f18b8d4SJens Glathe 5676f18b8d4SJens Glathe vreg_l6b_1p8: ldo6 { 5686f18b8d4SJens Glathe regulator-name = "vreg_l6b_1p8"; 5696f18b8d4SJens Glathe regulator-min-microvolt = <1800000>; 5706f18b8d4SJens Glathe regulator-max-microvolt = <2960000>; 5716f18b8d4SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 5726f18b8d4SJens Glathe }; 5736f18b8d4SJens Glathe 5746f18b8d4SJens Glathe vreg_l7b_2p8: ldo7 { 5756f18b8d4SJens Glathe regulator-name = "vreg_l7b_2p8"; 5766f18b8d4SJens Glathe regulator-min-microvolt = <2800000>; 5776f18b8d4SJens Glathe regulator-max-microvolt = <2800000>; 5786f18b8d4SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 5796f18b8d4SJens Glathe }; 5806f18b8d4SJens Glathe 5816f18b8d4SJens Glathe vreg_l8b_3p0: ldo8 { 5826f18b8d4SJens Glathe regulator-name = "vreg_l8b_3p0"; 5836f18b8d4SJens Glathe regulator-min-microvolt = <3072000>; 5846f18b8d4SJens Glathe regulator-max-microvolt = <3072000>; 5856f18b8d4SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 5866f18b8d4SJens Glathe }; 5876f18b8d4SJens Glathe 5886f18b8d4SJens Glathe vreg_l9b_2p9: ldo9 { 5896f18b8d4SJens Glathe regulator-name = "vreg_l9b_2p9"; 5906f18b8d4SJens Glathe regulator-min-microvolt = <2960000>; 5916f18b8d4SJens Glathe regulator-max-microvolt = <2960000>; 5926f18b8d4SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 5936f18b8d4SJens Glathe }; 5946f18b8d4SJens Glathe 5956f18b8d4SJens Glathe vreg_l10b_1p8: ldo10 { 5966f18b8d4SJens Glathe regulator-name = "vreg_l10b_1p8"; 5976f18b8d4SJens Glathe regulator-min-microvolt = <1800000>; 5986f18b8d4SJens Glathe regulator-max-microvolt = <1800000>; 5996f18b8d4SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 6006f18b8d4SJens Glathe }; 6016f18b8d4SJens Glathe 6026f18b8d4SJens Glathe vreg_l12b_1p2: ldo12 { 6036f18b8d4SJens Glathe regulator-name = "vreg_l12b_1p2"; 6046f18b8d4SJens Glathe regulator-min-microvolt = <1200000>; 6056f18b8d4SJens Glathe regulator-max-microvolt = <1200000>; 6066f18b8d4SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 6073ab4e212SJohan Hovold regulator-always-on; 6086f18b8d4SJens Glathe }; 6096f18b8d4SJens Glathe 6106f18b8d4SJens Glathe vreg_l13b_3p0: ldo13 { 6116f18b8d4SJens Glathe regulator-name = "vreg_l13b_3p0"; 6126f18b8d4SJens Glathe regulator-min-microvolt = <3072000>; 6136f18b8d4SJens Glathe regulator-max-microvolt = <3100000>; 6146f18b8d4SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 6156f18b8d4SJens Glathe }; 6166f18b8d4SJens Glathe 6176f18b8d4SJens Glathe vreg_l14b_3p0: ldo14 { 6186f18b8d4SJens Glathe regulator-name = "vreg_l14b_3p0"; 6196f18b8d4SJens Glathe regulator-min-microvolt = <3072000>; 6206f18b8d4SJens Glathe regulator-max-microvolt = <3072000>; 6216f18b8d4SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 6226f18b8d4SJens Glathe }; 6236f18b8d4SJens Glathe 6246f18b8d4SJens Glathe vreg_l15b_1p8: ldo15 { 6256f18b8d4SJens Glathe regulator-name = "vreg_l15b_1p8"; 6266f18b8d4SJens Glathe regulator-min-microvolt = <1800000>; 6276f18b8d4SJens Glathe regulator-max-microvolt = <1800000>; 6286f18b8d4SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 6293ab4e212SJohan Hovold regulator-always-on; 6306f18b8d4SJens Glathe }; 6316f18b8d4SJens Glathe 6326f18b8d4SJens Glathe vreg_l16b_2p9: ldo16 { 6336f18b8d4SJens Glathe regulator-name = "vreg_l16b_2p9"; 6346f18b8d4SJens Glathe regulator-min-microvolt = <2912000>; 6356f18b8d4SJens Glathe regulator-max-microvolt = <2912000>; 6366f18b8d4SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 6376f18b8d4SJens Glathe }; 6386f18b8d4SJens Glathe 6396f18b8d4SJens Glathe vreg_l17b_2p5: ldo17 { 6406f18b8d4SJens Glathe regulator-name = "vreg_l17b_2p5"; 6416f18b8d4SJens Glathe regulator-min-microvolt = <2504000>; 6426f18b8d4SJens Glathe regulator-max-microvolt = <2504000>; 6436f18b8d4SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 6446f18b8d4SJens Glathe }; 6456f18b8d4SJens Glathe }; 6466f18b8d4SJens Glathe 6476f18b8d4SJens Glathe regulators-1 { 6486f18b8d4SJens Glathe compatible = "qcom,pm8550ve-rpmh-regulators"; 6496f18b8d4SJens Glathe qcom,pmic-id = "c"; 6506f18b8d4SJens Glathe 6516f18b8d4SJens Glathe vdd-l1-supply = <&vreg_s5j_1p2>; 6526f18b8d4SJens Glathe vdd-l2-supply = <&vreg_s1f_0p7>; 6536f18b8d4SJens Glathe vdd-l3-supply = <&vreg_s1f_0p7>; 6546f18b8d4SJens Glathe vdd-s4-supply = <&vreg_vph_pwr>; 6556f18b8d4SJens Glathe 6566f18b8d4SJens Glathe vreg_s4c_1p8: smps4 { 6576f18b8d4SJens Glathe regulator-name = "vreg_s4c_1p8"; 6586f18b8d4SJens Glathe regulator-min-microvolt = <1856000>; 6596f18b8d4SJens Glathe regulator-max-microvolt = <2000000>; 6606f18b8d4SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 6616f18b8d4SJens Glathe }; 6626f18b8d4SJens Glathe 6636f18b8d4SJens Glathe vreg_l1c_1p2: ldo1 { 6646f18b8d4SJens Glathe regulator-name = "vreg_l1c_1p2"; 6656f18b8d4SJens Glathe regulator-min-microvolt = <1200000>; 6666f18b8d4SJens Glathe regulator-max-microvolt = <1200000>; 6676f18b8d4SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 6686f18b8d4SJens Glathe }; 6696f18b8d4SJens Glathe 6706f18b8d4SJens Glathe vreg_l2c_0p8: ldo2 { 6716f18b8d4SJens Glathe regulator-name = "vreg_l2c_0p8"; 6726f18b8d4SJens Glathe regulator-min-microvolt = <880000>; 6736f18b8d4SJens Glathe regulator-max-microvolt = <920000>; 6746f18b8d4SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 6756f18b8d4SJens Glathe }; 6766f18b8d4SJens Glathe 6776f18b8d4SJens Glathe vreg_l3c_0p8: ldo3 { 6786f18b8d4SJens Glathe regulator-name = "vreg_l3c_0p8"; 6796f18b8d4SJens Glathe regulator-min-microvolt = <880000>; 6806f18b8d4SJens Glathe regulator-max-microvolt = <920000>; 6816f18b8d4SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 6826f18b8d4SJens Glathe }; 6836f18b8d4SJens Glathe }; 6846f18b8d4SJens Glathe 6856f18b8d4SJens Glathe regulators-2 { 6866f18b8d4SJens Glathe compatible = "qcom,pmc8380-rpmh-regulators"; 6876f18b8d4SJens Glathe qcom,pmic-id = "d"; 6886f18b8d4SJens Glathe 6896f18b8d4SJens Glathe vdd-l1-supply = <&vreg_s1f_0p7>; 6906f18b8d4SJens Glathe vdd-l2-supply = <&vreg_s1f_0p7>; 6916f18b8d4SJens Glathe vdd-l3-supply = <&vreg_s4c_1p8>; 6926f18b8d4SJens Glathe vdd-s1-supply = <&vreg_vph_pwr>; 6936f18b8d4SJens Glathe 6946f18b8d4SJens Glathe vreg_l1d_0p8: ldo1 { 6956f18b8d4SJens Glathe regulator-name = "vreg_l1d_0p8"; 6966f18b8d4SJens Glathe regulator-min-microvolt = <880000>; 6976f18b8d4SJens Glathe regulator-max-microvolt = <920000>; 6986f18b8d4SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 6996f18b8d4SJens Glathe }; 7006f18b8d4SJens Glathe 7016f18b8d4SJens Glathe vreg_l2d_0p9: ldo2 { 7026f18b8d4SJens Glathe regulator-name = "vreg_l2d_0p9"; 7036f18b8d4SJens Glathe regulator-min-microvolt = <912000>; 7046f18b8d4SJens Glathe regulator-max-microvolt = <920000>; 7056f18b8d4SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 7066f18b8d4SJens Glathe }; 7076f18b8d4SJens Glathe 7086f18b8d4SJens Glathe vreg_l3d_1p8: ldo3 { 7096f18b8d4SJens Glathe regulator-name = "vreg_l3d_1p8"; 7106f18b8d4SJens Glathe regulator-min-microvolt = <1800000>; 7116f18b8d4SJens Glathe regulator-max-microvolt = <1800000>; 7126f18b8d4SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 7136f18b8d4SJens Glathe }; 7146f18b8d4SJens Glathe }; 7156f18b8d4SJens Glathe 7166f18b8d4SJens Glathe regulators-3 { 7176f18b8d4SJens Glathe compatible = "qcom,pmc8380-rpmh-regulators"; 7186f18b8d4SJens Glathe qcom,pmic-id = "e"; 7196f18b8d4SJens Glathe 7206f18b8d4SJens Glathe vdd-l2-supply = <&vreg_s1f_0p7>; 7216f18b8d4SJens Glathe vdd-l3-supply = <&vreg_s5j_1p2>; 7226f18b8d4SJens Glathe 7236f18b8d4SJens Glathe vreg_l2e_0p8: ldo2 { 7246f18b8d4SJens Glathe regulator-name = "vreg_l2e_0p8"; 7256f18b8d4SJens Glathe regulator-min-microvolt = <880000>; 7266f18b8d4SJens Glathe regulator-max-microvolt = <920000>; 7276f18b8d4SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 7286f18b8d4SJens Glathe }; 7296f18b8d4SJens Glathe 7306f18b8d4SJens Glathe vreg_l3e_1p2: ldo3 { 7316f18b8d4SJens Glathe regulator-name = "vreg_l3e_1p2"; 7326f18b8d4SJens Glathe regulator-min-microvolt = <1200000>; 7336f18b8d4SJens Glathe regulator-max-microvolt = <1200000>; 7346f18b8d4SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 7356f18b8d4SJens Glathe }; 7366f18b8d4SJens Glathe }; 7376f18b8d4SJens Glathe 7386f18b8d4SJens Glathe regulators-4 { 7396f18b8d4SJens Glathe compatible = "qcom,pmc8380-rpmh-regulators"; 7406f18b8d4SJens Glathe qcom,pmic-id = "f"; 7416f18b8d4SJens Glathe 7426f18b8d4SJens Glathe vdd-l1-supply = <&vreg_s5j_1p2>; 7436f18b8d4SJens Glathe vdd-l2-supply = <&vreg_s5j_1p2>; 7446f18b8d4SJens Glathe vdd-l3-supply = <&vreg_s5j_1p2>; 7456f18b8d4SJens Glathe vdd-s1-supply = <&vreg_vph_pwr>; 7466f18b8d4SJens Glathe 7476f18b8d4SJens Glathe vreg_s1f_0p7: smps1 { 7486f18b8d4SJens Glathe regulator-name = "vreg_s1f_0p7"; 7496f18b8d4SJens Glathe regulator-min-microvolt = <700000>; 7506f18b8d4SJens Glathe regulator-max-microvolt = <1100000>; 7516f18b8d4SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 7526f18b8d4SJens Glathe }; 7536f18b8d4SJens Glathe 7546f18b8d4SJens Glathe vreg_l1f_1p0: ldo1 { 7556f18b8d4SJens Glathe regulator-name = "vreg_l1f_1p0"; 7566f18b8d4SJens Glathe regulator-min-microvolt = <1024000>; 7576f18b8d4SJens Glathe regulator-max-microvolt = <1024000>; 7586f18b8d4SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 7596f18b8d4SJens Glathe }; 7606f18b8d4SJens Glathe 7616f18b8d4SJens Glathe vreg_l2f_1p0: ldo2 { 7626f18b8d4SJens Glathe regulator-name = "vreg_l2f_1p0"; 7636f18b8d4SJens Glathe regulator-min-microvolt = <1024000>; 7646f18b8d4SJens Glathe regulator-max-microvolt = <1024000>; 7656f18b8d4SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 7666f18b8d4SJens Glathe }; 7676f18b8d4SJens Glathe 7686f18b8d4SJens Glathe vreg_l3f_1p0: ldo3 { 7696f18b8d4SJens Glathe regulator-name = "vreg_l3f_1p0"; 7706f18b8d4SJens Glathe regulator-min-microvolt = <1024000>; 7716f18b8d4SJens Glathe regulator-max-microvolt = <1024000>; 7726f18b8d4SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 7736f18b8d4SJens Glathe }; 7746f18b8d4SJens Glathe }; 7756f18b8d4SJens Glathe 7766f18b8d4SJens Glathe regulators-6 { 7776f18b8d4SJens Glathe compatible = "qcom,pm8550ve-rpmh-regulators"; 7786f18b8d4SJens Glathe qcom,pmic-id = "i"; 7796f18b8d4SJens Glathe 7806f18b8d4SJens Glathe vdd-l1-supply = <&vreg_s4c_1p8>; 7816f18b8d4SJens Glathe vdd-l2-supply = <&vreg_s5j_1p2>; 7826f18b8d4SJens Glathe vdd-l3-supply = <&vreg_s1f_0p7>; 7836f18b8d4SJens Glathe vdd-s1-supply = <&vreg_vph_pwr>; 7846f18b8d4SJens Glathe vdd-s2-supply = <&vreg_vph_pwr>; 7856f18b8d4SJens Glathe 7866f18b8d4SJens Glathe vreg_s1i_0p9: smps1 { 7876f18b8d4SJens Glathe regulator-name = "vreg_s1i_0p9"; 7886f18b8d4SJens Glathe regulator-min-microvolt = <900000>; 7896f18b8d4SJens Glathe regulator-max-microvolt = <920000>; 7906f18b8d4SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 7916f18b8d4SJens Glathe }; 7926f18b8d4SJens Glathe 7936f18b8d4SJens Glathe vreg_s2i_1p0: smps2 { 7946f18b8d4SJens Glathe regulator-name = "vreg_s2i_1p0"; 7956f18b8d4SJens Glathe regulator-min-microvolt = <1000000>; 7966f18b8d4SJens Glathe regulator-max-microvolt = <1100000>; 7976f18b8d4SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 7986f18b8d4SJens Glathe }; 7996f18b8d4SJens Glathe 8006f18b8d4SJens Glathe vreg_l1i_1p8: ldo1 { 8016f18b8d4SJens Glathe regulator-name = "vreg_l1i_1p8"; 8026f18b8d4SJens Glathe regulator-min-microvolt = <1800000>; 8036f18b8d4SJens Glathe regulator-max-microvolt = <1800000>; 8046f18b8d4SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 8056f18b8d4SJens Glathe }; 8066f18b8d4SJens Glathe 8076f18b8d4SJens Glathe vreg_l2i_1p2: ldo2 { 8086f18b8d4SJens Glathe regulator-name = "vreg_l2i_1p2"; 8096f18b8d4SJens Glathe regulator-min-microvolt = <1200000>; 8106f18b8d4SJens Glathe regulator-max-microvolt = <1200000>; 8116f18b8d4SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 8126f18b8d4SJens Glathe }; 8136f18b8d4SJens Glathe 8146f18b8d4SJens Glathe vreg_l3i_0p8: ldo3 { 8156f18b8d4SJens Glathe regulator-name = "vreg_l3i_0p8"; 8166f18b8d4SJens Glathe regulator-min-microvolt = <880000>; 8176f18b8d4SJens Glathe regulator-max-microvolt = <920000>; 8186f18b8d4SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 8196f18b8d4SJens Glathe }; 8206f18b8d4SJens Glathe }; 8216f18b8d4SJens Glathe 8226f18b8d4SJens Glathe regulators-7 { 8236f18b8d4SJens Glathe compatible = "qcom,pm8550ve-rpmh-regulators"; 8246f18b8d4SJens Glathe qcom,pmic-id = "j"; 8256f18b8d4SJens Glathe 8266f18b8d4SJens Glathe vdd-l1-supply = <&vreg_s1f_0p7>; 8276f18b8d4SJens Glathe vdd-l2-supply = <&vreg_s5j_1p2>; 8286f18b8d4SJens Glathe vdd-l3-supply = <&vreg_s1f_0p7>; 8296f18b8d4SJens Glathe vdd-s5-supply = <&vreg_vph_pwr>; 8306f18b8d4SJens Glathe 8316f18b8d4SJens Glathe vreg_s5j_1p2: smps5 { 8326f18b8d4SJens Glathe regulator-name = "vreg_s5j_1p2"; 8336f18b8d4SJens Glathe regulator-min-microvolt = <1256000>; 8346f18b8d4SJens Glathe regulator-max-microvolt = <1304000>; 8356f18b8d4SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 8366f18b8d4SJens Glathe }; 8376f18b8d4SJens Glathe 8386f18b8d4SJens Glathe vreg_l1j_0p8: ldo1 { 8396f18b8d4SJens Glathe regulator-name = "vreg_l1j_0p8"; 8406f18b8d4SJens Glathe regulator-min-microvolt = <880000>; 8416f18b8d4SJens Glathe regulator-max-microvolt = <920000>; 8426f18b8d4SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 8436f18b8d4SJens Glathe }; 8446f18b8d4SJens Glathe 8456f18b8d4SJens Glathe vreg_l2j_1p2: ldo2 { 8466f18b8d4SJens Glathe regulator-name = "vreg_l2j_1p2"; 8474a09dad9SStephan Gerhold regulator-min-microvolt = <1256000>; 8484a09dad9SStephan Gerhold regulator-max-microvolt = <1256000>; 8496f18b8d4SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 8506f18b8d4SJens Glathe }; 8516f18b8d4SJens Glathe 8526f18b8d4SJens Glathe vreg_l3j_0p8: ldo3 { 8536f18b8d4SJens Glathe regulator-name = "vreg_l3j_0p8"; 8546f18b8d4SJens Glathe regulator-min-microvolt = <880000>; 8556f18b8d4SJens Glathe regulator-max-microvolt = <920000>; 8566f18b8d4SJens Glathe regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 8576f18b8d4SJens Glathe }; 8586f18b8d4SJens Glathe }; 8596f18b8d4SJens Glathe}; 8606f18b8d4SJens Glathe 8616f18b8d4SJens Glathe&gpu { 8626f18b8d4SJens Glathe status = "okay"; 8636f18b8d4SJens Glathe 8646f18b8d4SJens Glathe zap-shader { 8656f18b8d4SJens Glathe firmware-name = "qcom/x1e80100/hp/omnibook-x14/qcdxkmsuc8380.mbn"; 8666f18b8d4SJens Glathe }; 8676f18b8d4SJens Glathe}; 8686f18b8d4SJens Glathe 8696f18b8d4SJens Glathe&i2c0 { 8706f18b8d4SJens Glathe clock-frequency = <400000>; 8716f18b8d4SJens Glathe 8726f18b8d4SJens Glathe status = "okay"; 8736f18b8d4SJens Glathe 8746f18b8d4SJens Glathe keyboard@3a { 8756f18b8d4SJens Glathe compatible = "hid-over-i2c"; 8766f18b8d4SJens Glathe reg = <0x3a>; 8776f18b8d4SJens Glathe 8786f18b8d4SJens Glathe hid-descr-addr = <0x1>; 8796f18b8d4SJens Glathe interrupts-extended = <&tlmm 67 IRQ_TYPE_LEVEL_LOW>; 8806f18b8d4SJens Glathe 8816f18b8d4SJens Glathe vdd-supply = <&vreg_misc_3p3>; 8826f18b8d4SJens Glathe vddl-supply = <&vreg_l12b_1p2>; 8836f18b8d4SJens Glathe 8846f18b8d4SJens Glathe pinctrl-0 = <&kybd_default>; 8856f18b8d4SJens Glathe pinctrl-names = "default"; 8866f18b8d4SJens Glathe 8876f18b8d4SJens Glathe wakeup-source; 8886f18b8d4SJens Glathe }; 8896f18b8d4SJens Glathe 8906f18b8d4SJens Glathe touchpad@15 { 8916f18b8d4SJens Glathe compatible = "hid-over-i2c"; 8926f18b8d4SJens Glathe reg = <0x15>; 8936f18b8d4SJens Glathe 8946f18b8d4SJens Glathe hid-descr-addr = <0x1>; 8956f18b8d4SJens Glathe interrupts-extended = <&tlmm 3 IRQ_TYPE_LEVEL_LOW>; 8966f18b8d4SJens Glathe 8976f18b8d4SJens Glathe vdd-supply = <&vreg_misc_3p3>; 8986f18b8d4SJens Glathe vddl-supply = <&vreg_l12b_1p2>; 8996f18b8d4SJens Glathe 9006f18b8d4SJens Glathe pinctrl-0 = <&tpad_default>; 9016f18b8d4SJens Glathe pinctrl-names = "default"; 9026f18b8d4SJens Glathe 9036f18b8d4SJens Glathe wakeup-source; 9046f18b8d4SJens Glathe }; 9056f18b8d4SJens Glathe}; 9066f18b8d4SJens Glathe 9076f18b8d4SJens Glathe&i2c3 { 9086f18b8d4SJens Glathe clock-frequency = <400000>; 9096f18b8d4SJens Glathe 9106f18b8d4SJens Glathe status = "okay"; 9116f18b8d4SJens Glathe 9126f18b8d4SJens Glathe typec-mux@8 { 9136f18b8d4SJens Glathe compatible = "parade,ps8830"; 9146f18b8d4SJens Glathe reg = <0x08>; 9156f18b8d4SJens Glathe 9166f18b8d4SJens Glathe clocks = <&rpmhcc RPMH_RF_CLK3>; 9176f18b8d4SJens Glathe 9186f18b8d4SJens Glathe vdd-supply = <&vreg_rtmr0_1p15>; 9196f18b8d4SJens Glathe vdd33-supply = <&vreg_rtmr0_3p3>; 9206f18b8d4SJens Glathe vdd33-cap-supply = <&vreg_rtmr0_3p3>; 9216f18b8d4SJens Glathe vddar-supply = <&vreg_rtmr0_1p15>; 9226f18b8d4SJens Glathe vddat-supply = <&vreg_rtmr0_1p15>; 9236f18b8d4SJens Glathe vddio-supply = <&vreg_rtmr0_1p8>; 9246f18b8d4SJens Glathe 9256f18b8d4SJens Glathe reset-gpios = <&pm8550_gpios 10 GPIO_ACTIVE_LOW>; 9266f18b8d4SJens Glathe 9276f18b8d4SJens Glathe pinctrl-0 = <&rtmr0_default>; 9286f18b8d4SJens Glathe pinctrl-names = "default"; 9296f18b8d4SJens Glathe 9306f18b8d4SJens Glathe orientation-switch; 9316f18b8d4SJens Glathe retimer-switch; 9326f18b8d4SJens Glathe 9336f18b8d4SJens Glathe ports { 9346f18b8d4SJens Glathe #address-cells = <1>; 9356f18b8d4SJens Glathe #size-cells = <0>; 9366f18b8d4SJens Glathe 9376f18b8d4SJens Glathe port@0 { 9386f18b8d4SJens Glathe reg = <0>; 9396f18b8d4SJens Glathe 9406f18b8d4SJens Glathe retimer_ss0_ss_out: endpoint { 9416f18b8d4SJens Glathe remote-endpoint = <&pmic_glink_ss0_ss_in>; 9426f18b8d4SJens Glathe }; 9436f18b8d4SJens Glathe }; 9446f18b8d4SJens Glathe 9456f18b8d4SJens Glathe port@1 { 9466f18b8d4SJens Glathe reg = <1>; 9476f18b8d4SJens Glathe 9486f18b8d4SJens Glathe retimer_ss0_ss_in: endpoint { 9496f18b8d4SJens Glathe remote-endpoint = <&usb_1_ss0_qmpphy_out>; 9506f18b8d4SJens Glathe }; 9516f18b8d4SJens Glathe }; 9526f18b8d4SJens Glathe 9536f18b8d4SJens Glathe port@2 { 9546f18b8d4SJens Glathe reg = <2>; 9556f18b8d4SJens Glathe 9566f18b8d4SJens Glathe retimer_ss0_con_sbu_out: endpoint { 9576f18b8d4SJens Glathe remote-endpoint = <&pmic_glink_ss0_con_sbu_in>; 9586f18b8d4SJens Glathe }; 9596f18b8d4SJens Glathe }; 9606f18b8d4SJens Glathe }; 9616f18b8d4SJens Glathe }; 9626f18b8d4SJens Glathe}; 9636f18b8d4SJens Glathe 9646f18b8d4SJens Glathe&i2c5 { 9656f18b8d4SJens Glathe clock-frequency = <400000>; 9666f18b8d4SJens Glathe status = "okay"; 9676f18b8d4SJens Glathe 9686f18b8d4SJens Glathe eusb3_repeater: redriver@47 { 9696f18b8d4SJens Glathe compatible = "nxp,ptn3222"; 9706f18b8d4SJens Glathe reg = <0x47>; 9716f18b8d4SJens Glathe #phy-cells = <0>; 9726f18b8d4SJens Glathe 9736f18b8d4SJens Glathe vdd3v3-supply = <&vreg_l13b_3p0>; 9746f18b8d4SJens Glathe vdd1v8-supply = <&vreg_l4b_1p8>; 9756f18b8d4SJens Glathe 9766f18b8d4SJens Glathe reset-gpios = <&tlmm 6 GPIO_ACTIVE_LOW>; 9776f18b8d4SJens Glathe 9786f18b8d4SJens Glathe pinctrl-0 = <&eusb3_reset_n>; 9796f18b8d4SJens Glathe pinctrl-names = "default"; 9806f18b8d4SJens Glathe 9816f18b8d4SJens Glathe }; 9826f18b8d4SJens Glathe}; 9836f18b8d4SJens Glathe 9846f18b8d4SJens Glathe&i2c8 { 9856f18b8d4SJens Glathe clock-frequency = <400000>; 9866f18b8d4SJens Glathe 9876f18b8d4SJens Glathe status = "okay"; 9886f18b8d4SJens Glathe 9896f18b8d4SJens Glathe touchscreen@10 { 9906f18b8d4SJens Glathe compatible = "hid-over-i2c"; 9916f18b8d4SJens Glathe reg = <0x10>; 9926f18b8d4SJens Glathe 9936f18b8d4SJens Glathe hid-descr-addr = <0x1>; 9946f18b8d4SJens Glathe interrupts-extended = <&tlmm 51 IRQ_TYPE_LEVEL_LOW>; 9956f18b8d4SJens Glathe 9966f18b8d4SJens Glathe vdd-supply = <&vreg_misc_3p3>; 9976f18b8d4SJens Glathe vddl-supply = <&vreg_l15b_1p8>; 9986f18b8d4SJens Glathe 9996f18b8d4SJens Glathe pinctrl-0 = <&ts0_default>; 10006f18b8d4SJens Glathe pinctrl-names = "default"; 10016f18b8d4SJens Glathe }; 10026f18b8d4SJens Glathe}; 10036f18b8d4SJens Glathe 10046f18b8d4SJens Glathe&lpass_tlmm { 10056f18b8d4SJens Glathe spkr_01_sd_n_active: spkr-01-sd-n-active-state { 10066f18b8d4SJens Glathe pins = "gpio12"; 10076f18b8d4SJens Glathe function = "gpio"; 10086f18b8d4SJens Glathe drive-strength = <16>; 10096f18b8d4SJens Glathe bias-disable; 10106f18b8d4SJens Glathe output-low; 10116f18b8d4SJens Glathe }; 10126f18b8d4SJens Glathe}; 10136f18b8d4SJens Glathe 10146f18b8d4SJens Glathe&lpass_vamacro { 10156f18b8d4SJens Glathe pinctrl-0 = <&dmic01_default>, <&dmic23_default>; 10166f18b8d4SJens Glathe pinctrl-names = "default"; 10176f18b8d4SJens Glathe 10186f18b8d4SJens Glathe vdd-micb-supply = <&vreg_l1b_1p8>; 10196f18b8d4SJens Glathe qcom,dmic-sample-rate = <4800000>; 10206f18b8d4SJens Glathe}; 10216f18b8d4SJens Glathe 10226f18b8d4SJens Glathe&mdss { 10236f18b8d4SJens Glathe status = "okay"; 10246f18b8d4SJens Glathe}; 10256f18b8d4SJens Glathe 10266f18b8d4SJens Glathe&mdss_dp0 { 10276f18b8d4SJens Glathe status = "okay"; 10286f18b8d4SJens Glathe}; 10296f18b8d4SJens Glathe 10306f18b8d4SJens Glathe&mdss_dp0_out { 10316f18b8d4SJens Glathe data-lanes = <0 1>; 10329a496982SAleksandrs Vinarskis link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>; 10336f18b8d4SJens Glathe}; 10346f18b8d4SJens Glathe 10356f18b8d4SJens Glathe&mdss_dp1 { 10366f18b8d4SJens Glathe status = "okay"; 10376f18b8d4SJens Glathe}; 10386f18b8d4SJens Glathe 10396f18b8d4SJens Glathe&mdss_dp1_out { 10406f18b8d4SJens Glathe data-lanes = <0 1>; 10419a496982SAleksandrs Vinarskis link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>; 10426f18b8d4SJens Glathe}; 10436f18b8d4SJens Glathe 10446f18b8d4SJens Glathe&mdss_dp3 { 10456f18b8d4SJens Glathe /delete-property/ #sound-dai-cells; 10466f18b8d4SJens Glathe 10476f18b8d4SJens Glathe status = "okay"; 10486f18b8d4SJens Glathe 10496f18b8d4SJens Glathe aux-bus { 10506f18b8d4SJens Glathe panel { 10516f18b8d4SJens Glathe compatible = "edp-panel"; 10526f18b8d4SJens Glathe power-supply = <&vreg_edp_3p3>; 10536f18b8d4SJens Glathe 10546f18b8d4SJens Glathe backlight = <&backlight>; 10556f18b8d4SJens Glathe 10566f18b8d4SJens Glathe port { 10576f18b8d4SJens Glathe edp_panel_in: endpoint { 10586f18b8d4SJens Glathe remote-endpoint = <&mdss_dp3_out>; 10596f18b8d4SJens Glathe }; 10606f18b8d4SJens Glathe }; 10616f18b8d4SJens Glathe }; 10626f18b8d4SJens Glathe }; 10636f18b8d4SJens Glathe 10646f18b8d4SJens Glathe ports { 10656f18b8d4SJens Glathe port@1 { 10666f18b8d4SJens Glathe reg = <1>; 10676f18b8d4SJens Glathe 10686f18b8d4SJens Glathe mdss_dp3_out: endpoint { 10696f18b8d4SJens Glathe data-lanes = <0 1 2 3>; 10706f18b8d4SJens Glathe link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>; 10716f18b8d4SJens Glathe 10726f18b8d4SJens Glathe remote-endpoint = <&edp_panel_in>; 10736f18b8d4SJens Glathe }; 10746f18b8d4SJens Glathe }; 10756f18b8d4SJens Glathe }; 10766f18b8d4SJens Glathe}; 10776f18b8d4SJens Glathe 10786f18b8d4SJens Glathe&mdss_dp3_phy { 10796f18b8d4SJens Glathe vdda-phy-supply = <&vreg_l3j_0p8>; 10806f18b8d4SJens Glathe vdda-pll-supply = <&vreg_l2j_1p2>; 10816f18b8d4SJens Glathe 10826f18b8d4SJens Glathe status = "okay"; 10836f18b8d4SJens Glathe}; 10846f18b8d4SJens Glathe 10856f18b8d4SJens Glathe&pcie4 { 10866f18b8d4SJens Glathe perst-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>; 10876f18b8d4SJens Glathe wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>; 10886f18b8d4SJens Glathe 10896f18b8d4SJens Glathe pinctrl-0 = <&pcie4_default>; 10906f18b8d4SJens Glathe pinctrl-names = "default"; 10916f18b8d4SJens Glathe 10926f18b8d4SJens Glathe status = "okay"; 10936f18b8d4SJens Glathe}; 10946f18b8d4SJens Glathe 10956f18b8d4SJens Glathe&pcie4_phy { 10966f18b8d4SJens Glathe vdda-phy-supply = <&vreg_l3i_0p8>; 10976f18b8d4SJens Glathe vdda-pll-supply = <&vreg_l3e_1p2>; 10986f18b8d4SJens Glathe 10996f18b8d4SJens Glathe status = "okay"; 11006f18b8d4SJens Glathe}; 11016f18b8d4SJens Glathe 11026f18b8d4SJens Glathe&pcie4_port0 { 11036f18b8d4SJens Glathe wifi@0 { 11046f18b8d4SJens Glathe compatible = "pci17cb,1107"; 11056f18b8d4SJens Glathe reg = <0x10000 0x0 0x0 0x0 0x0>; 11066f18b8d4SJens Glathe 11076f18b8d4SJens Glathe vddaon-supply = <&vreg_pmu_aon_0p8>; 11086f18b8d4SJens Glathe vddpcie0p9-supply = <&vreg_pmu_pcie_0p9>; 11096f18b8d4SJens Glathe vddpcie1p8-supply = <&vreg_pmu_pcie_1p8>; 11106f18b8d4SJens Glathe vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>; 11116f18b8d4SJens Glathe vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>; 11126f18b8d4SJens Glathe vddrfa1p8-supply = <&vreg_pmu_rfa_1p7>; 11136f18b8d4SJens Glathe vddrfacmn-supply = <&vreg_pmu_rfa_cmn_0p8>; 11146f18b8d4SJens Glathe vddwlcx-supply = <&vreg_pmu_wlcx_0p8>; 11156f18b8d4SJens Glathe vddwlmx-supply = <&vreg_pmu_wlmx_0p8>; 11166f18b8d4SJens Glathe }; 11176f18b8d4SJens Glathe}; 11186f18b8d4SJens Glathe 11196f18b8d4SJens Glathe&pcie6a { 11206f18b8d4SJens Glathe perst-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>; 11216f18b8d4SJens Glathe wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>; 11226f18b8d4SJens Glathe 11236f18b8d4SJens Glathe vddpe-3v3-supply = <&vreg_nvme>; 11246f18b8d4SJens Glathe 11256f18b8d4SJens Glathe pinctrl-0 = <&pcie6a_default>; 11266f18b8d4SJens Glathe pinctrl-names = "default"; 11276f18b8d4SJens Glathe 11286f18b8d4SJens Glathe status = "okay"; 11296f18b8d4SJens Glathe}; 11306f18b8d4SJens Glathe 11316f18b8d4SJens Glathe&pcie6a_phy { 11326f18b8d4SJens Glathe vdda-phy-supply = <&vreg_l1d_0p8>; 11336f18b8d4SJens Glathe vdda-pll-supply = <&vreg_l2j_1p2>; 11346f18b8d4SJens Glathe 11356f18b8d4SJens Glathe status = "okay"; 11366f18b8d4SJens Glathe}; 11376f18b8d4SJens Glathe 11386f18b8d4SJens Glathe&pm8550_gpios { 11396f18b8d4SJens Glathe rtmr0_default: rtmr0-reset-n-active-state { 11406f18b8d4SJens Glathe pins = "gpio10"; 11416f18b8d4SJens Glathe function = "normal"; 11426f18b8d4SJens Glathe power-source = <1>; /* 1.8V */ 11436f18b8d4SJens Glathe bias-disable; 11446f18b8d4SJens Glathe input-disable; 11456f18b8d4SJens Glathe output-enable; 11466f18b8d4SJens Glathe }; 11476f18b8d4SJens Glathe 11486f18b8d4SJens Glathe usb0_3p3_reg_en: usb0-3p3-reg-en-state { 11496f18b8d4SJens Glathe pins = "gpio11"; 11506f18b8d4SJens Glathe function = "normal"; 11516f18b8d4SJens Glathe power-source = <1>; /* 1.8V */ 11526f18b8d4SJens Glathe bias-disable; 11536f18b8d4SJens Glathe input-disable; 11546f18b8d4SJens Glathe output-enable; 11556f18b8d4SJens Glathe }; 11566f18b8d4SJens Glathe}; 11576f18b8d4SJens Glathe 11586f18b8d4SJens Glathe&pm8550ve_8_gpios { 11596f18b8d4SJens Glathe misc_3p3_reg_en: misc-3p3-reg-en-state { 11606f18b8d4SJens Glathe pins = "gpio6"; 11616f18b8d4SJens Glathe function = "normal"; 11626f18b8d4SJens Glathe bias-disable; 11636f18b8d4SJens Glathe drive-push-pull; 11646f18b8d4SJens Glathe input-disable; 11656f18b8d4SJens Glathe output-enable; 11666f18b8d4SJens Glathe power-source = <1>; /* 1.8 V */ 11676f18b8d4SJens Glathe qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>; 11686f18b8d4SJens Glathe }; 11696f18b8d4SJens Glathe}; 11706f18b8d4SJens Glathe 11716f18b8d4SJens Glathe&pm8550ve_9_gpios { 11726f18b8d4SJens Glathe usb0_1p8_reg_en: usb0-1p8-reg-en-state { 11736f18b8d4SJens Glathe pins = "gpio8"; 11746f18b8d4SJens Glathe function = "normal"; 11756f18b8d4SJens Glathe power-source = <1>; /* 1.8V */ 11766f18b8d4SJens Glathe bias-disable; 11776f18b8d4SJens Glathe input-disable; 11786f18b8d4SJens Glathe output-enable; 11796f18b8d4SJens Glathe }; 11806f18b8d4SJens Glathe}; 11816f18b8d4SJens Glathe 11826f18b8d4SJens Glathe&pmc8380_3_gpios { 11836f18b8d4SJens Glathe edp_bl_en: edp-bl-en-state { 11846f18b8d4SJens Glathe pins = "gpio4"; 11856f18b8d4SJens Glathe function = "normal"; 11866f18b8d4SJens Glathe power-source = <1>; /* 1.8V */ 11876f18b8d4SJens Glathe input-disable; 11886f18b8d4SJens Glathe output-enable; 11896f18b8d4SJens Glathe }; 11906f18b8d4SJens Glathe 11916f18b8d4SJens Glathe edp_bl_reg_en: edp-bl-reg-en-state { 11926f18b8d4SJens Glathe pins = "gpio10"; 11936f18b8d4SJens Glathe function = "normal"; 11946f18b8d4SJens Glathe }; 11956f18b8d4SJens Glathe 11966f18b8d4SJens Glathe}; 11976f18b8d4SJens Glathe 11986f18b8d4SJens Glathe&pmc8380_5_gpios { 11996f18b8d4SJens Glathe usb0_pwr_1p15_reg_en: usb0-pwr-1p15-reg-en-state { 12006f18b8d4SJens Glathe pins = "gpio8"; 12016f18b8d4SJens Glathe function = "normal"; 12026f18b8d4SJens Glathe power-source = <1>; /* 1.8V */ 12036f18b8d4SJens Glathe bias-disable; 12046f18b8d4SJens Glathe input-disable; 12056f18b8d4SJens Glathe output-enable; 12066f18b8d4SJens Glathe }; 12076f18b8d4SJens Glathe}; 12086f18b8d4SJens Glathe 1209*0bc88e66SJens Glathe&pmk8550_gpios { 1210*0bc88e66SJens Glathe edp_bl_pwm: edp-bl-pwm-state { 1211*0bc88e66SJens Glathe pins = "gpio5"; 1212*0bc88e66SJens Glathe function = "func3"; 1213*0bc88e66SJens Glathe }; 1214*0bc88e66SJens Glathe}; 1215*0bc88e66SJens Glathe 1216*0bc88e66SJens Glathe&pmk8550_pwm { 1217*0bc88e66SJens Glathe status = "okay"; 1218*0bc88e66SJens Glathe}; 1219*0bc88e66SJens Glathe 12206f18b8d4SJens Glathe&qupv3_0 { 12216f18b8d4SJens Glathe status = "okay"; 12226f18b8d4SJens Glathe}; 12236f18b8d4SJens Glathe 12246f18b8d4SJens Glathe&qupv3_1 { 12256f18b8d4SJens Glathe status = "okay"; 12266f18b8d4SJens Glathe}; 12276f18b8d4SJens Glathe 12286f18b8d4SJens Glathe&qupv3_2 { 12296f18b8d4SJens Glathe status = "okay"; 12306f18b8d4SJens Glathe}; 12316f18b8d4SJens Glathe 12326f18b8d4SJens Glathe&remoteproc_adsp { 12336f18b8d4SJens Glathe firmware-name = "qcom/x1e80100/hp/omnibook-x14/qcadsp8380.mbn", 12346f18b8d4SJens Glathe "qcom/x1e80100/hp/omnibook-x14/adsp_dtbs.elf"; 12356f18b8d4SJens Glathe 12366f18b8d4SJens Glathe status = "okay"; 12376f18b8d4SJens Glathe}; 12386f18b8d4SJens Glathe 12396f18b8d4SJens Glathe&remoteproc_cdsp { 12406f18b8d4SJens Glathe firmware-name = "qcom/x1e80100/hp/omnibook-x14/qccdsp8380.mbn", 12416f18b8d4SJens Glathe "qcom/x1e80100/hp/omnibook-x14/cdsp_dtbs.elf"; 12426f18b8d4SJens Glathe 12436f18b8d4SJens Glathe status = "okay"; 12446f18b8d4SJens Glathe}; 12456f18b8d4SJens Glathe 124648274b40SJuerg Haefliger&smb2360_0 { 124748274b40SJuerg Haefliger status = "okay"; 124848274b40SJuerg Haefliger}; 124948274b40SJuerg Haefliger 12506f18b8d4SJens Glathe&smb2360_0_eusb2_repeater { 12516f18b8d4SJens Glathe vdd18-supply = <&vreg_l3d_1p8>; 12526f18b8d4SJens Glathe vdd3-supply = <&vreg_l2b_3p0>; 125348274b40SJuerg Haefliger}; 12546f18b8d4SJens Glathe 125548274b40SJuerg Haefliger&smb2360_1 { 12566f18b8d4SJens Glathe status = "okay"; 12576f18b8d4SJens Glathe}; 12586f18b8d4SJens Glathe 12596f18b8d4SJens Glathe&smb2360_1_eusb2_repeater { 12606f18b8d4SJens Glathe vdd18-supply = <&vreg_l3d_1p8>; 12616f18b8d4SJens Glathe vdd3-supply = <&vreg_l14b_3p0>; 12626f18b8d4SJens Glathe}; 12636f18b8d4SJens Glathe 12646f18b8d4SJens Glathe&swr0 { 12656f18b8d4SJens Glathe pinctrl-0 = <&wsa_swr_active>, <&spkr_01_sd_n_active>; 12666f18b8d4SJens Glathe pinctrl-names = "default"; 12676f18b8d4SJens Glathe 12686f18b8d4SJens Glathe status = "okay"; 12696f18b8d4SJens Glathe 12706f18b8d4SJens Glathe /* WSA8845, Left Speaker */ 12716f18b8d4SJens Glathe left_spkr: speaker@0,0 { 12726f18b8d4SJens Glathe compatible = "sdw20217020400"; 12736f18b8d4SJens Glathe reg = <0 0>; 12746f18b8d4SJens Glathe reset-gpios = <&lpass_tlmm 12 GPIO_ACTIVE_LOW>; 12756f18b8d4SJens Glathe #sound-dai-cells = <0>; 12766f18b8d4SJens Glathe sound-name-prefix = "SpkrLeft"; 12776f18b8d4SJens Glathe vdd-1p8-supply = <&vreg_l15b_1p8>; 12786f18b8d4SJens Glathe vdd-io-supply = <&vreg_l12b_1p2>; 12796f18b8d4SJens Glathe qcom,port-mapping = <1 2 3 7 10 13>; 12806f18b8d4SJens Glathe }; 12816f18b8d4SJens Glathe 12826f18b8d4SJens Glathe /* WSA8845, Right Speaker */ 12836f18b8d4SJens Glathe right_spkr: speaker@0,1 { 12846f18b8d4SJens Glathe compatible = "sdw20217020400"; 12856f18b8d4SJens Glathe reg = <0 1>; 12866f18b8d4SJens Glathe reset-gpios = <&lpass_tlmm 12 GPIO_ACTIVE_LOW>; 12876f18b8d4SJens Glathe #sound-dai-cells = <0>; 12886f18b8d4SJens Glathe sound-name-prefix = "SpkrRight"; 12896f18b8d4SJens Glathe vdd-1p8-supply = <&vreg_l15b_1p8>; 12906f18b8d4SJens Glathe vdd-io-supply = <&vreg_l12b_1p2>; 12916f18b8d4SJens Glathe qcom,port-mapping = <4 5 6 7 11 13>; 12926f18b8d4SJens Glathe }; 12936f18b8d4SJens Glathe}; 12946f18b8d4SJens Glathe 12956f18b8d4SJens Glathe&swr1 { 12966f18b8d4SJens Glathe status = "okay"; 12976f18b8d4SJens Glathe 12986f18b8d4SJens Glathe /* WCD9385 RX */ 12996f18b8d4SJens Glathe wcd_rx: codec@0,4 { 13006f18b8d4SJens Glathe compatible = "sdw20217010d00"; 13016f18b8d4SJens Glathe reg = <0 4>; 13026f18b8d4SJens Glathe qcom,rx-port-mapping = <1 2 3 4 5>; 13036f18b8d4SJens Glathe }; 13046f18b8d4SJens Glathe}; 13056f18b8d4SJens Glathe 13066f18b8d4SJens Glathe&swr2 { 13076f18b8d4SJens Glathe status = "okay"; 13086f18b8d4SJens Glathe 13096f18b8d4SJens Glathe /* WCD9385 TX */ 13106f18b8d4SJens Glathe wcd_tx: codec@0,3 { 13116f18b8d4SJens Glathe compatible = "sdw20217010d00"; 13126f18b8d4SJens Glathe reg = <0 3>; 13136f18b8d4SJens Glathe qcom,tx-port-mapping = <2 2 3 4>; 13146f18b8d4SJens Glathe }; 13156f18b8d4SJens Glathe}; 13166f18b8d4SJens Glathe 13176f18b8d4SJens Glathe&tlmm { 13186f18b8d4SJens Glathe gpio-reserved-ranges = <34 2>, /* Unused */ 13196f18b8d4SJens Glathe <44 4>, /* SPI (TPM) */ 13206f18b8d4SJens Glathe <72 2>, /* Secure EC I2C connection (?) */ 13216f18b8d4SJens Glathe <238 1>; /* UFS Reset */ 13226f18b8d4SJens Glathe 13236f18b8d4SJens Glathe edp_reg_en: edp-reg-en-state { 13246f18b8d4SJens Glathe pins = "gpio70"; 13256f18b8d4SJens Glathe function = "gpio"; 13266f18b8d4SJens Glathe drive-strength = <16>; 13276f18b8d4SJens Glathe bias-disable; 13286f18b8d4SJens Glathe }; 13296f18b8d4SJens Glathe 13306f18b8d4SJens Glathe eusb3_reset_n: eusb3-reset-n-state { 13316f18b8d4SJens Glathe pins = "gpio6"; 13326f18b8d4SJens Glathe function = "gpio"; 13336f18b8d4SJens Glathe drive-strength = <2>; 13346f18b8d4SJens Glathe bias-disable; 13356f18b8d4SJens Glathe output-low; 13366f18b8d4SJens Glathe }; 13376f18b8d4SJens Glathe 13386f18b8d4SJens Glathe hall_int_n_default: hall-int-n-state { 13396f18b8d4SJens Glathe pins = "gpio92"; 13406f18b8d4SJens Glathe function = "gpio"; 13416f18b8d4SJens Glathe bias-disable; 13426f18b8d4SJens Glathe }; 13436f18b8d4SJens Glathe 13446f18b8d4SJens Glathe kybd_default: kybd-default-state { 13456f18b8d4SJens Glathe pins = "gpio67"; 13466f18b8d4SJens Glathe function = "gpio"; 13476f18b8d4SJens Glathe bias-pull-up; 13486f18b8d4SJens Glathe }; 13496f18b8d4SJens Glathe 13506f18b8d4SJens Glathe nvme_reg_en: nvme-reg-en-state { 13516f18b8d4SJens Glathe pins = "gpio18"; 13526f18b8d4SJens Glathe function = "gpio"; 13536f18b8d4SJens Glathe drive-strength = <2>; 13546f18b8d4SJens Glathe bias-disable; 13556f18b8d4SJens Glathe }; 13566f18b8d4SJens Glathe 13576f18b8d4SJens Glathe pcie4_default: pcie4-default-state { 13586f18b8d4SJens Glathe clkreq-n-pins { 13596f18b8d4SJens Glathe pins = "gpio147"; 13606f18b8d4SJens Glathe function = "pcie4_clk"; 13616f18b8d4SJens Glathe drive-strength = <2>; 13626f18b8d4SJens Glathe bias-pull-up; 13636f18b8d4SJens Glathe }; 13646f18b8d4SJens Glathe 13656f18b8d4SJens Glathe perst-n-pins { 13666f18b8d4SJens Glathe pins = "gpio146"; 13676f18b8d4SJens Glathe function = "gpio"; 13686f18b8d4SJens Glathe drive-strength = <2>; 13696f18b8d4SJens Glathe bias-disable; 13706f18b8d4SJens Glathe }; 13716f18b8d4SJens Glathe 13726f18b8d4SJens Glathe wake-n-pins { 13736f18b8d4SJens Glathe pins = "gpio148"; 13746f18b8d4SJens Glathe function = "gpio"; 13756f18b8d4SJens Glathe drive-strength = <2>; 13766f18b8d4SJens Glathe bias-pull-up; 13776f18b8d4SJens Glathe }; 13786f18b8d4SJens Glathe }; 13796f18b8d4SJens Glathe 13806f18b8d4SJens Glathe pcie6a_default: pcie6a-default-state { 13816f18b8d4SJens Glathe clkreq-n-pins { 13826f18b8d4SJens Glathe pins = "gpio153"; 13836f18b8d4SJens Glathe function = "pcie6a_clk"; 13846f18b8d4SJens Glathe drive-strength = <2>; 13856f18b8d4SJens Glathe bias-pull-up; 13866f18b8d4SJens Glathe }; 13876f18b8d4SJens Glathe 13886f18b8d4SJens Glathe perst-n-pins { 13896f18b8d4SJens Glathe pins = "gpio152"; 13906f18b8d4SJens Glathe function = "gpio"; 13916f18b8d4SJens Glathe drive-strength = <2>; 13926f18b8d4SJens Glathe bias-disable; 13936f18b8d4SJens Glathe }; 13946f18b8d4SJens Glathe 13956f18b8d4SJens Glathe wake-n-pins { 13966f18b8d4SJens Glathe pins = "gpio154"; 13976f18b8d4SJens Glathe function = "gpio"; 13986f18b8d4SJens Glathe drive-strength = <2>; 13996f18b8d4SJens Glathe bias-pull-up; 14006f18b8d4SJens Glathe }; 14016f18b8d4SJens Glathe }; 14026f18b8d4SJens Glathe 14036f18b8d4SJens Glathe tpad_default: tpad-default-state { 14046f18b8d4SJens Glathe pins = "gpio3"; 14056f18b8d4SJens Glathe function = "gpio"; 14066f18b8d4SJens Glathe bias-pull-up; 14076f18b8d4SJens Glathe }; 14086f18b8d4SJens Glathe 14096f18b8d4SJens Glathe ts0_default: ts0-default-state { 14106f18b8d4SJens Glathe int-n-pins { 14116f18b8d4SJens Glathe pins = "gpio51"; 14126f18b8d4SJens Glathe function = "gpio"; 14136f18b8d4SJens Glathe bias-pull-up; 14146f18b8d4SJens Glathe }; 14156f18b8d4SJens Glathe 14166f18b8d4SJens Glathe reset-n-pins { 14176f18b8d4SJens Glathe pins = "gpio48"; 14186f18b8d4SJens Glathe function = "gpio"; 14196f18b8d4SJens Glathe output-high; 14206f18b8d4SJens Glathe drive-strength = <16>; 14216f18b8d4SJens Glathe }; 14226f18b8d4SJens Glathe }; 14236f18b8d4SJens Glathe 1424b9137c58SJens Glathe usb_1_ss1_sbu_default: usb-1-ss1-sbu-state { 1425b9137c58SJens Glathe mode-pins { 1426b9137c58SJens Glathe pins = "gpio177"; 1427b9137c58SJens Glathe function = "gpio"; 1428b9137c58SJens Glathe bias-disable; 1429b9137c58SJens Glathe drive-strength = <2>; 1430b9137c58SJens Glathe output-high; 1431b9137c58SJens Glathe }; 1432b9137c58SJens Glathe 1433b9137c58SJens Glathe oe-n-pins { 1434b9137c58SJens Glathe pins = "gpio179"; 1435b9137c58SJens Glathe function = "gpio"; 1436b9137c58SJens Glathe bias-disable; 1437b9137c58SJens Glathe drive-strength = <2>; 1438b9137c58SJens Glathe }; 1439b9137c58SJens Glathe 1440b9137c58SJens Glathe sel-pins { 1441b9137c58SJens Glathe pins = "gpio178"; 1442b9137c58SJens Glathe function = "gpio"; 1443b9137c58SJens Glathe bias-disable; 1444b9137c58SJens Glathe drive-strength = <2>; 1445b9137c58SJens Glathe }; 1446b9137c58SJens Glathe }; 1447b9137c58SJens Glathe 14486f18b8d4SJens Glathe wcd_default: wcd-reset-n-active-state { 14496f18b8d4SJens Glathe pins = "gpio191"; 14506f18b8d4SJens Glathe function = "gpio"; 14516f18b8d4SJens Glathe drive-strength = <16>; 14526f18b8d4SJens Glathe bias-disable; 14536f18b8d4SJens Glathe output-low; 14546f18b8d4SJens Glathe }; 14556f18b8d4SJens Glathe 14566f18b8d4SJens Glathe wcn_sw_en: wcn-sw-en-state { 14576f18b8d4SJens Glathe pins = "gpio214"; 14586f18b8d4SJens Glathe function = "gpio"; 14596f18b8d4SJens Glathe drive-strength = <2>; 14606f18b8d4SJens Glathe bias-disable; 14616f18b8d4SJens Glathe }; 14626f18b8d4SJens Glathe 14636f18b8d4SJens Glathe wcn_wlan_bt_en: wcn-wlan-bt-en-state { 14646f18b8d4SJens Glathe pins = "gpio116", "gpio117"; 14656f18b8d4SJens Glathe function = "gpio"; 14666f18b8d4SJens Glathe drive-strength = <2>; 14676f18b8d4SJens Glathe bias-disable; 14686f18b8d4SJens Glathe }; 14696f18b8d4SJens Glathe}; 14706f18b8d4SJens Glathe 14716f18b8d4SJens Glathe&uart14 { 14726f18b8d4SJens Glathe status = "okay"; 14736f18b8d4SJens Glathe 14746f18b8d4SJens Glathe bluetooth { 14756f18b8d4SJens Glathe compatible = "qcom,wcn6855-bt"; 14766f18b8d4SJens Glathe max-speed = <3200000>; 14776f18b8d4SJens Glathe 14786f18b8d4SJens Glathe vddrfacmn-supply = <&vreg_pmu_rfa_cmn_0p8>; 14796f18b8d4SJens Glathe vddaon-supply = <&vreg_pmu_aon_0p8>; 14806f18b8d4SJens Glathe vddwlcx-supply = <&vreg_pmu_wlcx_0p8>; 14816f18b8d4SJens Glathe vddwlmx-supply = <&vreg_pmu_wlmx_0p8>; 14826f18b8d4SJens Glathe vddbtcmx-supply = <&vreg_pmu_btcmx_0p8>; 14836f18b8d4SJens Glathe vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>; 14846f18b8d4SJens Glathe vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>; 14856f18b8d4SJens Glathe vddrfa1p8-supply = <&vreg_pmu_rfa_1p7>; 14866f18b8d4SJens Glathe }; 14876f18b8d4SJens Glathe}; 14886f18b8d4SJens Glathe 14896f18b8d4SJens Glathe&usb_1_ss0_hsphy { 14906f18b8d4SJens Glathe vdd-supply = <&vreg_l3j_0p8>; 14916f18b8d4SJens Glathe vdda12-supply = <&vreg_l2j_1p2>; 14926f18b8d4SJens Glathe 14936f18b8d4SJens Glathe phys = <&smb2360_0_eusb2_repeater>; 14946f18b8d4SJens Glathe 14956f18b8d4SJens Glathe status = "okay"; 14966f18b8d4SJens Glathe}; 14976f18b8d4SJens Glathe 14986f18b8d4SJens Glathe&usb_1_ss0_qmpphy { 14996f18b8d4SJens Glathe vdda-phy-supply = <&vreg_l3e_1p2>; 15006f18b8d4SJens Glathe vdda-pll-supply = <&vreg_l1j_0p8>; 15016f18b8d4SJens Glathe 15026f18b8d4SJens Glathe status = "okay"; 15036f18b8d4SJens Glathe}; 15046f18b8d4SJens Glathe 15056f18b8d4SJens Glathe&usb_1_ss0 { 15066f18b8d4SJens Glathe status = "okay"; 15076f18b8d4SJens Glathe}; 15086f18b8d4SJens Glathe 15096f18b8d4SJens Glathe&usb_1_ss0_dwc3 { 15106f18b8d4SJens Glathe dr_mode = "host"; 15116f18b8d4SJens Glathe}; 15126f18b8d4SJens Glathe 15136f18b8d4SJens Glathe&usb_1_ss0_dwc3_hs { 15146f18b8d4SJens Glathe remote-endpoint = <&pmic_glink_ss0_hs_in>; 15156f18b8d4SJens Glathe}; 15166f18b8d4SJens Glathe 15176f18b8d4SJens Glathe&usb_1_ss0_qmpphy_out { 15186f18b8d4SJens Glathe remote-endpoint = <&retimer_ss0_ss_in>; 15196f18b8d4SJens Glathe}; 15206f18b8d4SJens Glathe 15216f18b8d4SJens Glathe&usb_1_ss1_hsphy { 15226f18b8d4SJens Glathe vdd-supply = <&vreg_l3j_0p8>; 15236f18b8d4SJens Glathe vdda12-supply = <&vreg_l2j_1p2>; 15246f18b8d4SJens Glathe 15256f18b8d4SJens Glathe phys = <&smb2360_1_eusb2_repeater>; 15266f18b8d4SJens Glathe 15276f18b8d4SJens Glathe status = "okay"; 15286f18b8d4SJens Glathe}; 15296f18b8d4SJens Glathe 15306f18b8d4SJens Glathe&usb_1_ss1_qmpphy { 15316f18b8d4SJens Glathe vdda-phy-supply = <&vreg_l3e_1p2>; 15326f18b8d4SJens Glathe vdda-pll-supply = <&vreg_l2d_0p9>; 15336f18b8d4SJens Glathe 15346f18b8d4SJens Glathe status = "okay"; 15356f18b8d4SJens Glathe}; 15366f18b8d4SJens Glathe 15376f18b8d4SJens Glathe&usb_1_ss1 { 15386f18b8d4SJens Glathe status = "okay"; 15396f18b8d4SJens Glathe}; 15406f18b8d4SJens Glathe 15416f18b8d4SJens Glathe&usb_1_ss1_dwc3 { 15426f18b8d4SJens Glathe dr_mode = "host"; 15436f18b8d4SJens Glathe}; 15446f18b8d4SJens Glathe 15456f18b8d4SJens Glathe&usb_1_ss1_dwc3_hs { 15466f18b8d4SJens Glathe remote-endpoint = <&pmic_glink_ss1_hs_in>; 15476f18b8d4SJens Glathe}; 15486f18b8d4SJens Glathe 15496f18b8d4SJens Glathe&usb_1_ss1_qmpphy_out { 15509c6ee9a7SJohan Hovold remote-endpoint = <&pmic_glink_ss1_ss_in>; 15516f18b8d4SJens Glathe}; 15526f18b8d4SJens Glathe 15536f18b8d4SJens Glathe&usb_mp { 15546f18b8d4SJens Glathe status = "okay"; 15556f18b8d4SJens Glathe}; 15566f18b8d4SJens Glathe 15576f18b8d4SJens Glathe&usb_mp_dwc3 { 15586f18b8d4SJens Glathe phys = <&usb_mp_hsphy0>, <&usb_mp_qmpphy0>; 15596f18b8d4SJens Glathe phy-names = "usb2-0", "usb3-0"; 15606f18b8d4SJens Glathe}; 15616f18b8d4SJens Glathe 15626f18b8d4SJens Glathe&usb_mp_hsphy0 { 15636f18b8d4SJens Glathe vdd-supply = <&vreg_l2e_0p8>; 15646f18b8d4SJens Glathe vdda12-supply = <&vreg_l3e_1p2>; 15656f18b8d4SJens Glathe 15666f18b8d4SJens Glathe phys = <&eusb3_repeater>; 15676f18b8d4SJens Glathe 15686f18b8d4SJens Glathe status = "okay"; 15696f18b8d4SJens Glathe}; 15706f18b8d4SJens Glathe 15716f18b8d4SJens Glathe&usb_mp_qmpphy0 { 15726f18b8d4SJens Glathe vdda-phy-supply = <&vreg_l3e_1p2>; 15736f18b8d4SJens Glathe vdda-pll-supply = <&vreg_l3c_0p8>; 15746f18b8d4SJens Glathe 15756f18b8d4SJens Glathe status = "okay"; 15766f18b8d4SJens Glathe}; 1577