xref: /linux/arch/arm64/boot/dts/qcom/x1e80100-crd.dts (revision 8e1bb4a41aa78d6105e59186af3dcd545fc66e70)
1// SPDX-License-Identifier: BSD-3-Clause
2/*
3 * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
4 */
5
6/dts-v1/;
7
8#include <dt-bindings/gpio/gpio.h>
9#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
10
11#include "x1e80100.dtsi"
12#include "x1e80100-pmics.dtsi"
13
14/ {
15	model = "Qualcomm Technologies, Inc. X1E80100 CRD";
16	compatible = "qcom,x1e80100-crd", "qcom,x1e80100";
17
18	aliases {
19		serial0 = &uart21;
20	};
21
22	wcd938x: audio-codec {
23		compatible = "qcom,wcd9385-codec";
24
25		pinctrl-names = "default";
26		pinctrl-0 = <&wcd_default>;
27
28		qcom,micbias1-microvolt = <1800000>;
29		qcom,micbias2-microvolt = <1800000>;
30		qcom,micbias3-microvolt = <1800000>;
31		qcom,micbias4-microvolt = <1800000>;
32		qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000 500000 500000 500000>;
33		qcom,mbhc-headset-vthreshold-microvolt = <1700000>;
34		qcom,mbhc-headphone-vthreshold-microvolt = <50000>;
35		qcom,rx-device = <&wcd_rx>;
36		qcom,tx-device = <&wcd_tx>;
37
38		reset-gpios = <&tlmm 191 GPIO_ACTIVE_LOW>;
39
40		vdd-buck-supply = <&vreg_l15b_1p8>;
41		vdd-rxtx-supply = <&vreg_l15b_1p8>;
42		vdd-io-supply = <&vreg_l15b_1p8>;
43		vdd-mic-bias-supply = <&vreg_bob1>;
44
45		#sound-dai-cells = <1>;
46	};
47
48	chosen {
49		stdout-path = "serial0:115200n8";
50	};
51
52	pmic-glink {
53		compatible = "qcom,x1e80100-pmic-glink",
54			     "qcom,sm8550-pmic-glink",
55			     "qcom,pmic-glink";
56		#address-cells = <1>;
57		#size-cells = <0>;
58		orientation-gpios = <&tlmm 121 GPIO_ACTIVE_HIGH>,
59				    <&tlmm 123 GPIO_ACTIVE_HIGH>,
60				    <&tlmm 125 GPIO_ACTIVE_HIGH>;
61
62		/* Left-side rear port */
63		connector@0 {
64			compatible = "usb-c-connector";
65			reg = <0>;
66			power-role = "dual";
67			data-role = "dual";
68
69			ports {
70				#address-cells = <1>;
71				#size-cells = <0>;
72
73				port@0 {
74					reg = <0>;
75
76					pmic_glink_ss0_hs_in: endpoint {
77						remote-endpoint = <&usb_1_ss0_dwc3_hs>;
78					};
79				};
80
81				port@1 {
82					reg = <1>;
83
84					pmic_glink_ss0_ss_in: endpoint {
85						remote-endpoint = <&usb_1_ss0_qmpphy_out>;
86					};
87				};
88			};
89		};
90
91		/* Left-side front port */
92		connector@1 {
93			compatible = "usb-c-connector";
94			reg = <1>;
95			power-role = "dual";
96			data-role = "dual";
97
98			ports {
99				#address-cells = <1>;
100				#size-cells = <0>;
101
102				port@0 {
103					reg = <0>;
104
105					pmic_glink_ss1_hs_in: endpoint {
106						remote-endpoint = <&usb_1_ss1_dwc3_hs>;
107					};
108				};
109
110				port@1 {
111					reg = <1>;
112
113					pmic_glink_ss1_ss_in: endpoint {
114						remote-endpoint = <&usb_1_ss1_qmpphy_out>;
115					};
116				};
117			};
118		};
119
120		/* Right-side port */
121		connector@2 {
122			compatible = "usb-c-connector";
123			reg = <2>;
124			power-role = "dual";
125			data-role = "dual";
126
127			ports {
128				#address-cells = <1>;
129				#size-cells = <0>;
130
131				port@0 {
132					reg = <0>;
133
134					pmic_glink_ss2_hs_in: endpoint {
135						remote-endpoint = <&usb_1_ss2_dwc3_hs>;
136					};
137				};
138
139				port@1 {
140					reg = <1>;
141
142					pmic_glink_ss2_ss_in: endpoint {
143						remote-endpoint = <&usb_1_ss2_qmpphy_out>;
144					};
145				};
146			};
147		};
148	};
149
150	reserved-memory {
151		linux,cma {
152			compatible = "shared-dma-pool";
153			size = <0x0 0x8000000>;
154			reusable;
155			linux,cma-default;
156		};
157	};
158
159	sound {
160		compatible = "qcom,x1e80100-sndcard";
161		model = "X1E80100-CRD";
162		audio-routing = "WooferLeft IN", "WSA WSA_SPK1 OUT",
163				"TwitterLeft IN", "WSA WSA_SPK2 OUT",
164				"WooferRight IN", "WSA2 WSA_SPK2 OUT",
165				"TwitterRight IN", "WSA2 WSA_SPK2 OUT",
166				"IN1_HPHL", "HPHL_OUT",
167				"IN2_HPHR", "HPHR_OUT",
168				"AMIC2", "MIC BIAS2",
169				"VA DMIC0", "MIC BIAS3",
170				"VA DMIC1", "MIC BIAS3",
171				"VA DMIC2", "MIC BIAS1",
172				"VA DMIC3", "MIC BIAS1",
173				"VA DMIC0", "VA MIC BIAS3",
174				"VA DMIC1", "VA MIC BIAS3",
175				"VA DMIC2", "VA MIC BIAS1",
176				"VA DMIC3", "VA MIC BIAS1",
177				"TX SWR_INPUT1", "ADC2_OUTPUT";
178
179		wcd-playback-dai-link {
180			link-name = "WCD Playback";
181
182			cpu {
183				sound-dai = <&q6apmbedai RX_CODEC_DMA_RX_0>;
184			};
185
186			codec {
187				sound-dai = <&wcd938x 0>, <&swr1 0>, <&lpass_rxmacro 0>;
188			};
189
190			platform {
191				sound-dai = <&q6apm>;
192			};
193		};
194
195		wcd-capture-dai-link {
196			link-name = "WCD Capture";
197
198			cpu {
199				sound-dai = <&q6apmbedai TX_CODEC_DMA_TX_3>;
200			};
201
202			codec {
203				sound-dai = <&wcd938x 1>, <&swr2 1>, <&lpass_txmacro 0>;
204			};
205
206			platform {
207				sound-dai = <&q6apm>;
208			};
209		};
210
211		wsa-dai-link {
212			link-name = "WSA Playback";
213
214			cpu {
215				sound-dai = <&q6apmbedai WSA_CODEC_DMA_RX_0>;
216			};
217
218			codec {
219				sound-dai = <&left_woofer>, <&left_tweeter>,
220					    <&swr0 0>, <&lpass_wsamacro 0>,
221					    <&right_woofer>, <&right_tweeter>,
222					    <&swr3 0>, <&lpass_wsa2macro 0>;
223			};
224
225			platform {
226				sound-dai = <&q6apm>;
227			};
228		};
229
230		va-dai-link {
231			link-name = "VA Capture";
232
233			cpu {
234				sound-dai = <&q6apmbedai VA_CODEC_DMA_TX_0>;
235			};
236
237			codec {
238				sound-dai = <&lpass_vamacro 0>;
239			};
240
241			platform {
242				sound-dai = <&q6apm>;
243			};
244		};
245	};
246
247	vph_pwr: vph-pwr-regulator {
248		compatible = "regulator-fixed";
249
250		regulator-name = "vph_pwr";
251		regulator-min-microvolt = <3700000>;
252		regulator-max-microvolt = <3700000>;
253
254		regulator-always-on;
255		regulator-boot-on;
256	};
257
258	vreg_edp_3p3: regulator-edp-3p3 {
259		compatible = "regulator-fixed";
260
261		regulator-name = "VREG_EDP_3P3";
262		regulator-min-microvolt = <3300000>;
263		regulator-max-microvolt = <3300000>;
264
265		gpio = <&tlmm 70 GPIO_ACTIVE_HIGH>;
266		enable-active-high;
267
268		pinctrl-0 = <&edp_reg_en>;
269		pinctrl-names = "default";
270
271		regulator-always-on;
272		regulator-boot-on;
273	};
274
275	vreg_nvme: regulator-nvme {
276		compatible = "regulator-fixed";
277
278		regulator-name = "VREG_NVME_3P3";
279		regulator-min-microvolt = <3300000>;
280		regulator-max-microvolt = <3300000>;
281
282		gpio = <&tlmm 18 GPIO_ACTIVE_HIGH>;
283		enable-active-high;
284
285		pinctrl-names = "default";
286		pinctrl-0 = <&nvme_reg_en>;
287	};
288};
289
290&apps_rsc {
291	regulators-0 {
292		compatible = "qcom,pm8550-rpmh-regulators";
293		qcom,pmic-id = "b";
294
295		vdd-bob1-supply = <&vph_pwr>;
296		vdd-bob2-supply = <&vph_pwr>;
297		vdd-l1-l4-l10-supply = <&vreg_s4c_1p8>;
298		vdd-l2-l13-l14-supply = <&vreg_bob1>;
299		vdd-l5-l16-supply = <&vreg_bob1>;
300		vdd-l6-l7-supply = <&vreg_bob2>;
301		vdd-l8-l9-supply = <&vreg_bob1>;
302		vdd-l12-supply = <&vreg_s5j_1p2>;
303		vdd-l15-supply = <&vreg_s4c_1p8>;
304		vdd-l17-supply = <&vreg_bob2>;
305
306		vreg_bob1: bob1 {
307			regulator-name = "vreg_bob1";
308			regulator-min-microvolt = <3008000>;
309			regulator-max-microvolt = <3960000>;
310			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
311		};
312
313		vreg_bob2: bob2 {
314			regulator-name = "vreg_bob2";
315			regulator-min-microvolt = <2504000>;
316			regulator-max-microvolt = <3008000>;
317			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
318		};
319
320		vreg_l1b_1p8: ldo1 {
321			regulator-name = "vreg_l1b_1p8";
322			regulator-min-microvolt = <1800000>;
323			regulator-max-microvolt = <1800000>;
324			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
325		};
326
327		vreg_l2b_3p0: ldo2 {
328			regulator-name = "vreg_l2b_3p0";
329			regulator-min-microvolt = <3072000>;
330			regulator-max-microvolt = <3100000>;
331			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
332		};
333
334		vreg_l4b_1p8: ldo4 {
335			regulator-name = "vreg_l4b_1p8";
336			regulator-min-microvolt = <1800000>;
337			regulator-max-microvolt = <1800000>;
338			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
339		};
340
341		vreg_l5b_3p0: ldo5 {
342			regulator-name = "vreg_l5b_3p0";
343			regulator-min-microvolt = <3000000>;
344			regulator-max-microvolt = <3000000>;
345			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
346		};
347
348		vreg_l6b_1p8: ldo6 {
349			regulator-name = "vreg_l6b_1p8";
350			regulator-min-microvolt = <1800000>;
351			regulator-max-microvolt = <2960000>;
352			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
353		};
354
355		vreg_l7b_2p8: ldo7 {
356			regulator-name = "vreg_l7b_2p8";
357			regulator-min-microvolt = <2800000>;
358			regulator-max-microvolt = <2800000>;
359			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
360		};
361
362		vreg_l8b_3p0: ldo8 {
363			regulator-name = "vreg_l8b_3p0";
364			regulator-min-microvolt = <3072000>;
365			regulator-max-microvolt = <3072000>;
366			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
367		};
368
369		vreg_l9b_2p9: ldo9 {
370			regulator-name = "vreg_l9b_2p9";
371			regulator-min-microvolt = <2960000>;
372			regulator-max-microvolt = <2960000>;
373			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
374		};
375
376		vreg_l10b_1p8: ldo10 {
377			regulator-name = "vreg_l10b_1p8";
378			regulator-min-microvolt = <1800000>;
379			regulator-max-microvolt = <1800000>;
380			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
381		};
382
383		vreg_l12b_1p2: ldo12 {
384			regulator-name = "vreg_l12b_1p2";
385			regulator-min-microvolt = <1200000>;
386			regulator-max-microvolt = <1200000>;
387			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
388		};
389
390		vreg_l13b_3p0: ldo13 {
391			regulator-name = "vreg_l13b_3p0";
392			regulator-min-microvolt = <3072000>;
393			regulator-max-microvolt = <3100000>;
394			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
395		};
396
397		vreg_l14b_3p0: ldo14 {
398			regulator-name = "vreg_l14b_3p0";
399			regulator-min-microvolt = <3072000>;
400			regulator-max-microvolt = <3072000>;
401			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
402		};
403
404		vreg_l15b_1p8: ldo15 {
405			regulator-name = "vreg_l15b_1p8";
406			regulator-min-microvolt = <1800000>;
407			regulator-max-microvolt = <1800000>;
408			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
409		};
410
411		vreg_l16b_2p9: ldo16 {
412			regulator-name = "vreg_l16b_2p9";
413			regulator-min-microvolt = <2912000>;
414			regulator-max-microvolt = <2912000>;
415			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
416		};
417
418		vreg_l17b_2p5: ldo17 {
419			regulator-name = "vreg_l17b_2p5";
420			regulator-min-microvolt = <2504000>;
421			regulator-max-microvolt = <2504000>;
422			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
423		};
424	};
425
426	regulators-1 {
427		compatible = "qcom,pm8550ve-rpmh-regulators";
428		qcom,pmic-id = "c";
429
430		vdd-l1-supply = <&vreg_s5j_1p2>;
431		vdd-l2-supply = <&vreg_s1f_0p7>;
432		vdd-l3-supply = <&vreg_s1f_0p7>;
433		vdd-s4-supply = <&vph_pwr>;
434
435		vreg_s4c_1p8: smps4 {
436			regulator-name = "vreg_s4c_1p8";
437			regulator-min-microvolt = <1856000>;
438			regulator-max-microvolt = <2000000>;
439			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
440		};
441
442		vreg_l1c_1p2: ldo1 {
443			regulator-name = "vreg_l1c_1p2";
444			regulator-min-microvolt = <1200000>;
445			regulator-max-microvolt = <1200000>;
446			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
447		};
448
449		vreg_l2c_0p8: ldo2 {
450			regulator-name = "vreg_l2c_0p8";
451			regulator-min-microvolt = <880000>;
452			regulator-max-microvolt = <920000>;
453			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
454		};
455
456		vreg_l3c_0p8: ldo3 {
457			regulator-name = "vreg_l3c_0p8";
458			regulator-min-microvolt = <880000>;
459			regulator-max-microvolt = <920000>;
460			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
461		};
462	};
463
464	regulators-2 {
465		compatible = "qcom,pmc8380-rpmh-regulators";
466		qcom,pmic-id = "d";
467
468		vdd-l1-supply = <&vreg_s1f_0p7>;
469		vdd-l2-supply = <&vreg_s1f_0p7>;
470		vdd-l3-supply = <&vreg_s4c_1p8>;
471		vdd-s1-supply = <&vph_pwr>;
472
473		vreg_l1d_0p8: ldo1 {
474			regulator-name = "vreg_l1d_0p8";
475			regulator-min-microvolt = <880000>;
476			regulator-max-microvolt = <920000>;
477			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
478		};
479
480		vreg_l2d_0p9: ldo2 {
481			regulator-name = "vreg_l2d_0p9";
482			regulator-min-microvolt = <912000>;
483			regulator-max-microvolt = <920000>;
484			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
485		};
486
487		vreg_l3d_1p8: ldo3 {
488			regulator-name = "vreg_l3d_1p8";
489			regulator-min-microvolt = <1800000>;
490			regulator-max-microvolt = <1800000>;
491			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
492		};
493	};
494
495	regulators-3 {
496		compatible = "qcom,pmc8380-rpmh-regulators";
497		qcom,pmic-id = "e";
498
499		vdd-l2-supply = <&vreg_s1f_0p7>;
500		vdd-l3-supply = <&vreg_s5j_1p2>;
501
502		vreg_l2e_0p8: ldo2 {
503			regulator-name = "vreg_l2e_0p8";
504			regulator-min-microvolt = <880000>;
505			regulator-max-microvolt = <920000>;
506			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
507		};
508
509		vreg_l3e_1p2: ldo3 {
510			regulator-name = "vreg_l3e_1p2";
511			regulator-min-microvolt = <1200000>;
512			regulator-max-microvolt = <1200000>;
513			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
514		};
515	};
516
517	regulators-4 {
518		compatible = "qcom,pmc8380-rpmh-regulators";
519		qcom,pmic-id = "f";
520
521		vdd-l1-supply = <&vreg_s5j_1p2>;
522		vdd-l2-supply = <&vreg_s5j_1p2>;
523		vdd-l3-supply = <&vreg_s5j_1p2>;
524		vdd-s1-supply = <&vph_pwr>;
525
526		vreg_s1f_0p7: smps1 {
527			regulator-name = "vreg_s1f_0p7";
528			regulator-min-microvolt = <700000>;
529			regulator-max-microvolt = <1100000>;
530			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
531		};
532
533		vreg_l1f_1p0: ldo1 {
534			regulator-name = "vreg_l1f_1p0";
535			regulator-min-microvolt = <1024000>;
536			regulator-max-microvolt = <1024000>;
537			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
538		};
539
540		vreg_l2f_1p0: ldo2 {
541			regulator-name = "vreg_l2f_1p0";
542			regulator-min-microvolt = <1024000>;
543			regulator-max-microvolt = <1024000>;
544			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
545		};
546
547		vreg_l3f_1p0: ldo3 {
548			regulator-name = "vreg_l3f_1p0";
549			regulator-min-microvolt = <1024000>;
550			regulator-max-microvolt = <1024000>;
551			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
552		};
553	};
554
555	regulators-6 {
556		compatible = "qcom,pm8550ve-rpmh-regulators";
557		qcom,pmic-id = "i";
558
559		vdd-l1-supply = <&vreg_s4c_1p8>;
560		vdd-l2-supply = <&vreg_s5j_1p2>;
561		vdd-l3-supply = <&vreg_s1f_0p7>;
562		vdd-s1-supply = <&vph_pwr>;
563		vdd-s2-supply = <&vph_pwr>;
564
565		vreg_s1i_0p9: smps1 {
566			regulator-name = "vreg_s1i_0p9";
567			regulator-min-microvolt = <900000>;
568			regulator-max-microvolt = <920000>;
569			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
570		};
571
572		vreg_s2i_1p0: smps2 {
573			regulator-name = "vreg_s2i_1p0";
574			regulator-min-microvolt = <1000000>;
575			regulator-max-microvolt = <1100000>;
576			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
577		};
578
579		vreg_l1i_1p8: ldo1 {
580			regulator-name = "vreg_l1i_1p8";
581			regulator-min-microvolt = <1800000>;
582			regulator-max-microvolt = <1800000>;
583			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
584		};
585
586		vreg_l2i_1p2: ldo2 {
587			regulator-name = "vreg_l2i_1p2";
588			regulator-min-microvolt = <1200000>;
589			regulator-max-microvolt = <1200000>;
590			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
591		};
592
593		vreg_l3i_0p8: ldo3 {
594			regulator-name = "vreg_l3i_0p8";
595			regulator-min-microvolt = <880000>;
596			regulator-max-microvolt = <920000>;
597			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
598		};
599	};
600
601	regulators-7 {
602		compatible = "qcom,pm8550ve-rpmh-regulators";
603		qcom,pmic-id = "j";
604
605		vdd-l1-supply = <&vreg_s1f_0p7>;
606		vdd-l2-supply = <&vreg_s5j_1p2>;
607		vdd-l3-supply = <&vreg_s1f_0p7>;
608		vdd-s5-supply = <&vph_pwr>;
609
610		vreg_s5j_1p2: smps5 {
611			regulator-name = "vreg_s5j_1p2";
612			regulator-min-microvolt = <1256000>;
613			regulator-max-microvolt = <1304000>;
614			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
615		};
616
617		vreg_l1j_0p8: ldo1 {
618			regulator-name = "vreg_l1j_0p8";
619			regulator-min-microvolt = <880000>;
620			regulator-max-microvolt = <920000>;
621			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
622		};
623
624		vreg_l2j_1p2: ldo2 {
625			regulator-name = "vreg_l2j_1p2";
626			regulator-min-microvolt = <1200000>;
627			regulator-max-microvolt = <1200000>;
628			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
629		};
630
631		vreg_l3j_0p8: ldo3 {
632			regulator-name = "vreg_l3j_0p8";
633			regulator-min-microvolt = <880000>;
634			regulator-max-microvolt = <920000>;
635			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
636		};
637	};
638};
639
640&i2c0 {
641	clock-frequency = <400000>;
642
643	status = "okay";
644
645	touchpad@15 {
646		compatible = "hid-over-i2c";
647		reg = <0x15>;
648
649		hid-descr-addr = <0x1>;
650		interrupts-extended = <&tlmm 3 IRQ_TYPE_LEVEL_LOW>;
651
652		pinctrl-0 = <&tpad_default>;
653		pinctrl-names = "default";
654
655		wakeup-source;
656	};
657
658	keyboard@3a {
659		compatible = "hid-over-i2c";
660		reg = <0x3a>;
661
662		hid-descr-addr = <0x1>;
663		interrupts-extended = <&tlmm 67 IRQ_TYPE_LEVEL_LOW>;
664
665		pinctrl-0 = <&kybd_default>;
666		pinctrl-names = "default";
667
668		wakeup-source;
669	};
670};
671
672&i2c8 {
673	clock-frequency = <400000>;
674
675	status = "okay";
676
677	touchscreen@10 {
678		compatible = "hid-over-i2c";
679		reg = <0x10>;
680
681		hid-descr-addr = <0x1>;
682		interrupts-extended = <&tlmm 51 IRQ_TYPE_LEVEL_LOW>;
683
684		pinctrl-0 = <&ts0_default>;
685		pinctrl-names = "default";
686	};
687};
688
689&lpass_tlmm {
690	spkr_01_sd_n_active: spkr-01-sd-n-active-state {
691		pins = "gpio12";
692		function = "gpio";
693		drive-strength = <16>;
694		bias-disable;
695		output-low;
696	};
697
698	spkr_23_sd_n_active: spkr-23-sd-n-active-state {
699		pins = "gpio13";
700		function = "gpio";
701		drive-strength = <16>;
702		bias-disable;
703		output-low;
704	};
705};
706
707&lpass_vamacro {
708	pinctrl-0 = <&dmic01_default>, <&dmic23_default>;
709	pinctrl-names = "default";
710
711	vdd-micb-supply = <&vreg_l1b_1p8>;
712	qcom,dmic-sample-rate = <4800000>;
713};
714
715&mdss {
716	status = "okay";
717};
718
719&mdss_dp3 {
720	compatible = "qcom,x1e80100-dp";
721	/delete-property/ #sound-dai-cells;
722
723	status = "okay";
724
725	aux-bus {
726		panel {
727			compatible = "edp-panel";
728			power-supply = <&vreg_edp_3p3>;
729
730			port {
731				edp_panel_in: endpoint {
732					remote-endpoint = <&mdss_dp3_out>;
733				};
734			};
735		};
736	};
737
738	ports {
739		port@1 {
740			reg = <1>;
741			mdss_dp3_out: endpoint {
742				data-lanes = <0 1 2 3>;
743				link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>;
744
745				remote-endpoint = <&edp_panel_in>;
746			};
747		};
748	};
749};
750
751&mdss_dp3_phy {
752	vdda-phy-supply = <&vreg_l3j_0p8>;
753	vdda-pll-supply = <&vreg_l2j_1p2>;
754
755	status = "okay";
756};
757
758&pcie4 {
759	status = "okay";
760};
761
762&pcie4_phy {
763	vdda-phy-supply = <&vreg_l3j_0p8>;
764	vdda-pll-supply = <&vreg_l3e_1p2>;
765
766	status = "okay";
767};
768
769&pcie6a {
770	perst-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>;
771	wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>;
772
773	vddpe-3v3-supply = <&vreg_nvme>;
774
775	pinctrl-names = "default";
776	pinctrl-0 = <&pcie6a_default>;
777
778	status = "okay";
779};
780
781&pcie6a_phy {
782	vdda-phy-supply = <&vreg_l1d_0p8>;
783	vdda-pll-supply = <&vreg_l2j_1p2>;
784
785	status = "okay";
786};
787
788&qupv3_0 {
789	status = "okay";
790};
791
792&qupv3_1 {
793	status = "okay";
794};
795
796&qupv3_2 {
797	status = "okay";
798};
799
800&remoteproc_adsp {
801	firmware-name = "qcom/x1e80100/adsp.mbn",
802			"qcom/x1e80100/adsp_dtb.mbn";
803
804	status = "okay";
805};
806
807&remoteproc_cdsp {
808	firmware-name = "qcom/x1e80100/cdsp.mbn",
809			"qcom/x1e80100/cdsp_dtb.mbn";
810
811	status = "okay";
812};
813
814&smb2360_0_eusb2_repeater {
815	vdd18-supply = <&vreg_l3d_1p8>;
816	vdd3-supply = <&vreg_l2b_3p0>;
817};
818
819&smb2360_1_eusb2_repeater {
820	vdd18-supply = <&vreg_l3d_1p8>;
821	vdd3-supply = <&vreg_l14b_3p0>;
822};
823
824&smb2360_2_eusb2_repeater {
825	vdd18-supply = <&vreg_l3d_1p8>;
826	vdd3-supply = <&vreg_l8b_3p0>;
827};
828
829&swr0 {
830	status = "okay";
831
832	pinctrl-0 = <&wsa_swr_active>, <&spkr_01_sd_n_active>;
833	pinctrl-names = "default";
834
835	/* WSA8845, Left Woofer */
836	left_woofer: speaker@0,0 {
837		compatible = "sdw20217020400";
838		reg = <0 0>;
839		reset-gpios = <&lpass_tlmm 12 GPIO_ACTIVE_LOW>;
840		#sound-dai-cells = <0>;
841		sound-name-prefix = "WooferLeft";
842		vdd-1p8-supply = <&vreg_l15b_1p8>;
843		vdd-io-supply = <&vreg_l12b_1p2>;
844	};
845
846	/* WSA8845, Left Tweeter */
847	left_tweeter: speaker@0,1 {
848		compatible = "sdw20217020400";
849		reg = <0 1>;
850		reset-gpios = <&lpass_tlmm 12 GPIO_ACTIVE_LOW>;
851		#sound-dai-cells = <0>;
852		sound-name-prefix = "TwitterLeft";
853		vdd-1p8-supply = <&vreg_l15b_1p8>;
854		vdd-io-supply = <&vreg_l12b_1p2>;
855	};
856};
857
858&swr1 {
859	status = "okay";
860
861	/* WCD9385 RX */
862	wcd_rx: codec@0,4 {
863		compatible = "sdw20217010d00";
864		reg = <0 4>;
865		qcom,rx-port-mapping = <1 2 3 4 5>;
866	};
867};
868
869&swr2 {
870	status = "okay";
871
872	/* WCD9385 TX */
873	wcd_tx: codec@0,3 {
874		compatible = "sdw20217010d00";
875		reg = <0 3>;
876		qcom,tx-port-mapping = <2 2 3 4>;
877	};
878};
879
880&swr3 {
881	status = "okay";
882
883	pinctrl-0 = <&wsa2_swr_active>, <&spkr_23_sd_n_active>;
884	pinctrl-names = "default";
885
886	/* WSA8845, Right Woofer */
887	right_woofer: speaker@0,0 {
888		compatible = "sdw20217020400";
889		reg = <0 0>;
890		reset-gpios = <&lpass_tlmm 13 GPIO_ACTIVE_LOW>;
891		#sound-dai-cells = <0>;
892		sound-name-prefix = "WooferRight";
893		vdd-1p8-supply = <&vreg_l15b_1p8>;
894		vdd-io-supply = <&vreg_l12b_1p2>;
895	};
896
897	/* WSA8845, Right Tweeter */
898	right_tweeter: speaker@0,1 {
899		compatible = "sdw20217020400";
900		reg = <0 1>;
901		reset-gpios = <&lpass_tlmm 13 GPIO_ACTIVE_LOW>;
902		#sound-dai-cells = <0>;
903		sound-name-prefix = "TwitterRight";
904		vdd-1p8-supply = <&vreg_l15b_1p8>;
905		vdd-io-supply = <&vreg_l12b_1p2>;
906	};
907};
908
909&tlmm {
910	gpio-reserved-ranges = <34 2>, /* Unused */
911			       <44 4>, /* SPI (TPM) */
912			       <238 1>; /* UFS Reset */
913
914	edp_reg_en: edp-reg-en-state {
915		pins = "gpio70";
916		function = "gpio";
917		drive-strength = <16>;
918		bias-disable;
919	};
920
921	kybd_default: kybd-default-state {
922		pins = "gpio67";
923		function = "gpio";
924		bias-disable;
925	};
926
927	nvme_reg_en: nvme-reg-en-state {
928		pins = "gpio18";
929		function = "gpio";
930		drive-strength = <2>;
931		bias-disable;
932	};
933
934	pcie6a_default: pcie2a-default-state {
935		clkreq-n-pins {
936			pins = "gpio153";
937			function = "pcie6a_clk";
938			drive-strength = <2>;
939			bias-pull-up;
940		};
941
942		perst-n-pins {
943			pins = "gpio152";
944			function = "gpio";
945			drive-strength = <2>;
946			bias-pull-down;
947		};
948
949		wake-n-pins {
950		       pins = "gpio154";
951		       function = "gpio";
952		       drive-strength = <2>;
953		       bias-pull-up;
954	       };
955	};
956
957	tpad_default: tpad-default-state {
958		pins = "gpio3";
959		function = "gpio";
960		bias-disable;
961	};
962
963	ts0_default: ts0-default-state {
964		int-n-pins {
965			pins = "gpio51";
966			function = "gpio";
967			bias-disable;
968		};
969
970		reset-n-pins {
971			pins = "gpio48";
972			function = "gpio";
973			output-high;
974			drive-strength = <16>;
975		};
976	};
977
978	wcd_default: wcd-reset-n-active-state {
979		pins = "gpio191";
980		function = "gpio";
981		drive-strength = <16>;
982		bias-disable;
983		output-low;
984	};
985};
986
987&uart21 {
988	compatible = "qcom,geni-debug-uart";
989	status = "okay";
990};
991
992&usb_1_ss0_hsphy {
993	vdd-supply = <&vreg_l3j_0p8>;
994	vdda12-supply = <&vreg_l2j_1p2>;
995
996	phys = <&smb2360_0_eusb2_repeater>;
997
998	status = "okay";
999};
1000
1001&usb_1_ss0_qmpphy {
1002	vdda-phy-supply = <&vreg_l3e_1p2>;
1003	vdda-pll-supply = <&vreg_l1j_0p8>;
1004
1005	status = "okay";
1006};
1007
1008&usb_1_ss0 {
1009	status = "okay";
1010};
1011
1012&usb_1_ss0_dwc3 {
1013	dr_mode = "host";
1014};
1015
1016&usb_1_ss0_dwc3_hs {
1017	remote-endpoint = <&pmic_glink_ss0_hs_in>;
1018};
1019
1020&usb_1_ss0_qmpphy_out {
1021	remote-endpoint = <&pmic_glink_ss0_ss_in>;
1022};
1023
1024&usb_1_ss1_hsphy {
1025	vdd-supply = <&vreg_l3j_0p8>;
1026	vdda12-supply = <&vreg_l2j_1p2>;
1027
1028	phys = <&smb2360_1_eusb2_repeater>;
1029
1030	status = "okay";
1031};
1032
1033&usb_1_ss1_qmpphy {
1034	vdda-phy-supply = <&vreg_l3e_1p2>;
1035	vdda-pll-supply = <&vreg_l2d_0p9>;
1036
1037	status = "okay";
1038};
1039
1040&usb_1_ss1 {
1041	status = "okay";
1042};
1043
1044&usb_1_ss1_dwc3 {
1045	dr_mode = "host";
1046};
1047
1048&usb_1_ss1_dwc3_hs {
1049	remote-endpoint = <&pmic_glink_ss1_hs_in>;
1050};
1051
1052&usb_1_ss1_qmpphy_out {
1053	remote-endpoint = <&pmic_glink_ss1_ss_in>;
1054};
1055
1056&usb_1_ss2_hsphy {
1057	vdd-supply = <&vreg_l3j_0p8>;
1058	vdda12-supply = <&vreg_l2j_1p2>;
1059
1060	phys = <&smb2360_2_eusb2_repeater>;
1061
1062	status = "okay";
1063};
1064
1065&usb_1_ss2_qmpphy {
1066	vdda-phy-supply = <&vreg_l3e_1p2>;
1067	vdda-pll-supply = <&vreg_l2d_0p9>;
1068
1069	status = "okay";
1070};
1071
1072&usb_1_ss2 {
1073	status = "okay";
1074};
1075
1076&usb_1_ss2_dwc3 {
1077	dr_mode = "host";
1078};
1079
1080&usb_1_ss2_dwc3_hs {
1081	remote-endpoint = <&pmic_glink_ss2_hs_in>;
1082};
1083
1084&usb_1_ss2_qmpphy_out {
1085	remote-endpoint = <&pmic_glink_ss2_ss_in>;
1086};
1087