1// SPDX-License-Identifier: BSD-3-Clause 2/* 3 * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 4 */ 5 6/dts-v1/; 7 8#include <dt-bindings/gpio/gpio.h> 9#include <dt-bindings/input/gpio-keys.h> 10#include <dt-bindings/input/input.h> 11#include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 12#include <dt-bindings/regulator/qcom,rpmh-regulator.h> 13 14#include "x1e80100.dtsi" 15#include "x1e80100-pmics.dtsi" 16 17/ { 18 model = "Qualcomm Technologies, Inc. X1E80100 CRD"; 19 compatible = "qcom,x1e80100-crd", "qcom,x1e80100"; 20 21 aliases { 22 serial0 = &uart21; 23 }; 24 25 wcd938x: audio-codec { 26 compatible = "qcom,wcd9385-codec"; 27 28 pinctrl-names = "default"; 29 pinctrl-0 = <&wcd_default>; 30 31 qcom,micbias1-microvolt = <1800000>; 32 qcom,micbias2-microvolt = <1800000>; 33 qcom,micbias3-microvolt = <1800000>; 34 qcom,micbias4-microvolt = <1800000>; 35 qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000 500000 500000 500000>; 36 qcom,mbhc-headset-vthreshold-microvolt = <1700000>; 37 qcom,mbhc-headphone-vthreshold-microvolt = <50000>; 38 qcom,rx-device = <&wcd_rx>; 39 qcom,tx-device = <&wcd_tx>; 40 41 reset-gpios = <&tlmm 191 GPIO_ACTIVE_LOW>; 42 43 vdd-buck-supply = <&vreg_l15b_1p8>; 44 vdd-rxtx-supply = <&vreg_l15b_1p8>; 45 vdd-io-supply = <&vreg_l15b_1p8>; 46 vdd-mic-bias-supply = <&vreg_bob1>; 47 48 #sound-dai-cells = <1>; 49 }; 50 51 chosen { 52 stdout-path = "serial0:115200n8"; 53 }; 54 55 gpio-keys { 56 compatible = "gpio-keys"; 57 58 pinctrl-0 = <&hall_int_n_default>; 59 pinctrl-names = "default"; 60 61 switch-lid { 62 gpios = <&tlmm 92 GPIO_ACTIVE_LOW>; 63 linux,input-type = <EV_SW>; 64 linux,code = <SW_LID>; 65 wakeup-source; 66 wakeup-event-action = <EV_ACT_DEASSERTED>; 67 }; 68 }; 69 70 pmic-glink { 71 compatible = "qcom,x1e80100-pmic-glink", 72 "qcom,sm8550-pmic-glink", 73 "qcom,pmic-glink"; 74 #address-cells = <1>; 75 #size-cells = <0>; 76 orientation-gpios = <&tlmm 121 GPIO_ACTIVE_HIGH>, 77 <&tlmm 123 GPIO_ACTIVE_HIGH>, 78 <&tlmm 125 GPIO_ACTIVE_HIGH>; 79 80 /* Left-side rear port */ 81 connector@0 { 82 compatible = "usb-c-connector"; 83 reg = <0>; 84 power-role = "dual"; 85 data-role = "dual"; 86 87 ports { 88 #address-cells = <1>; 89 #size-cells = <0>; 90 91 port@0 { 92 reg = <0>; 93 94 pmic_glink_ss0_hs_in: endpoint { 95 remote-endpoint = <&usb_1_ss0_dwc3_hs>; 96 }; 97 }; 98 99 port@1 { 100 reg = <1>; 101 102 pmic_glink_ss0_ss_in: endpoint { 103 remote-endpoint = <&usb_1_ss0_qmpphy_out>; 104 }; 105 }; 106 }; 107 }; 108 109 /* Left-side front port */ 110 connector@1 { 111 compatible = "usb-c-connector"; 112 reg = <1>; 113 power-role = "dual"; 114 data-role = "dual"; 115 116 ports { 117 #address-cells = <1>; 118 #size-cells = <0>; 119 120 port@0 { 121 reg = <0>; 122 123 pmic_glink_ss1_hs_in: endpoint { 124 remote-endpoint = <&usb_1_ss1_dwc3_hs>; 125 }; 126 }; 127 128 port@1 { 129 reg = <1>; 130 131 pmic_glink_ss1_ss_in: endpoint { 132 remote-endpoint = <&usb_1_ss1_qmpphy_out>; 133 }; 134 }; 135 }; 136 }; 137 138 /* Right-side port */ 139 connector@2 { 140 compatible = "usb-c-connector"; 141 reg = <2>; 142 power-role = "dual"; 143 data-role = "dual"; 144 145 ports { 146 #address-cells = <1>; 147 #size-cells = <0>; 148 149 port@0 { 150 reg = <0>; 151 152 pmic_glink_ss2_hs_in: endpoint { 153 remote-endpoint = <&usb_1_ss2_dwc3_hs>; 154 }; 155 }; 156 157 port@1 { 158 reg = <1>; 159 160 pmic_glink_ss2_ss_in: endpoint { 161 remote-endpoint = <&usb_1_ss2_qmpphy_out>; 162 }; 163 }; 164 }; 165 }; 166 }; 167 168 reserved-memory { 169 linux,cma { 170 compatible = "shared-dma-pool"; 171 size = <0x0 0x8000000>; 172 reusable; 173 linux,cma-default; 174 }; 175 }; 176 177 sound { 178 compatible = "qcom,x1e80100-sndcard"; 179 model = "X1E80100-CRD"; 180 audio-routing = "WooferLeft IN", "WSA WSA_SPK1 OUT", 181 "TweeterLeft IN", "WSA WSA_SPK2 OUT", 182 "WooferRight IN", "WSA2 WSA_SPK2 OUT", 183 "TweeterRight IN", "WSA2 WSA_SPK2 OUT", 184 "IN1_HPHL", "HPHL_OUT", 185 "IN2_HPHR", "HPHR_OUT", 186 "AMIC2", "MIC BIAS2", 187 "VA DMIC0", "MIC BIAS3", 188 "VA DMIC1", "MIC BIAS3", 189 "VA DMIC2", "MIC BIAS1", 190 "VA DMIC3", "MIC BIAS1", 191 "VA DMIC0", "VA MIC BIAS3", 192 "VA DMIC1", "VA MIC BIAS3", 193 "VA DMIC2", "VA MIC BIAS1", 194 "VA DMIC3", "VA MIC BIAS1", 195 "TX SWR_INPUT1", "ADC2_OUTPUT"; 196 197 wcd-playback-dai-link { 198 link-name = "WCD Playback"; 199 200 cpu { 201 sound-dai = <&q6apmbedai RX_CODEC_DMA_RX_0>; 202 }; 203 204 codec { 205 sound-dai = <&wcd938x 0>, <&swr1 0>, <&lpass_rxmacro 0>; 206 }; 207 208 platform { 209 sound-dai = <&q6apm>; 210 }; 211 }; 212 213 wcd-capture-dai-link { 214 link-name = "WCD Capture"; 215 216 cpu { 217 sound-dai = <&q6apmbedai TX_CODEC_DMA_TX_3>; 218 }; 219 220 codec { 221 sound-dai = <&wcd938x 1>, <&swr2 1>, <&lpass_txmacro 0>; 222 }; 223 224 platform { 225 sound-dai = <&q6apm>; 226 }; 227 }; 228 229 wsa-dai-link { 230 link-name = "WSA Playback"; 231 232 cpu { 233 sound-dai = <&q6apmbedai WSA_CODEC_DMA_RX_0>; 234 }; 235 236 codec { 237 sound-dai = <&left_woofer>, <&left_tweeter>, 238 <&swr0 0>, <&lpass_wsamacro 0>, 239 <&right_woofer>, <&right_tweeter>, 240 <&swr3 0>, <&lpass_wsa2macro 0>; 241 }; 242 243 platform { 244 sound-dai = <&q6apm>; 245 }; 246 }; 247 248 va-dai-link { 249 link-name = "VA Capture"; 250 251 cpu { 252 sound-dai = <&q6apmbedai VA_CODEC_DMA_TX_0>; 253 }; 254 255 codec { 256 sound-dai = <&lpass_vamacro 0>; 257 }; 258 259 platform { 260 sound-dai = <&q6apm>; 261 }; 262 }; 263 }; 264 265 vreg_edp_3p3: regulator-edp-3p3 { 266 compatible = "regulator-fixed"; 267 268 regulator-name = "VREG_EDP_3P3"; 269 regulator-min-microvolt = <3300000>; 270 regulator-max-microvolt = <3300000>; 271 272 gpio = <&tlmm 70 GPIO_ACTIVE_HIGH>; 273 enable-active-high; 274 275 pinctrl-0 = <&edp_reg_en>; 276 pinctrl-names = "default"; 277 278 regulator-boot-on; 279 }; 280 281 vreg_misc_3p3: regulator-misc-3p3 { 282 compatible = "regulator-fixed"; 283 284 regulator-name = "VREG_MISC_3P3"; 285 regulator-min-microvolt = <3300000>; 286 regulator-max-microvolt = <3300000>; 287 288 gpio = <&pm8550ve_8_gpios 6 GPIO_ACTIVE_HIGH>; 289 enable-active-high; 290 291 pinctrl-names = "default"; 292 pinctrl-0 = <&misc_3p3_reg_en>; 293 294 regulator-boot-on; 295 regulator-always-on; 296 }; 297 298 vreg_nvme: regulator-nvme { 299 compatible = "regulator-fixed"; 300 301 regulator-name = "VREG_NVME_3P3"; 302 regulator-min-microvolt = <3300000>; 303 regulator-max-microvolt = <3300000>; 304 305 gpio = <&tlmm 18 GPIO_ACTIVE_HIGH>; 306 enable-active-high; 307 308 pinctrl-names = "default"; 309 pinctrl-0 = <&nvme_reg_en>; 310 311 regulator-boot-on; 312 }; 313 314 vph_pwr: regulator-vph-pwr { 315 compatible = "regulator-fixed"; 316 317 regulator-name = "vph_pwr"; 318 regulator-min-microvolt = <3700000>; 319 regulator-max-microvolt = <3700000>; 320 321 regulator-always-on; 322 regulator-boot-on; 323 }; 324 325 vreg_wwan: regulator-wwan { 326 compatible = "regulator-fixed"; 327 328 regulator-name = "SDX_VPH_PWR"; 329 regulator-min-microvolt = <3300000>; 330 regulator-max-microvolt = <3300000>; 331 332 gpio = <&tlmm 221 GPIO_ACTIVE_HIGH>; 333 enable-active-high; 334 335 pinctrl-0 = <&wwan_sw_en>; 336 pinctrl-names = "default"; 337 338 regulator-boot-on; 339 }; 340}; 341 342&apps_rsc { 343 regulators-0 { 344 compatible = "qcom,pm8550-rpmh-regulators"; 345 qcom,pmic-id = "b"; 346 347 vdd-bob1-supply = <&vph_pwr>; 348 vdd-bob2-supply = <&vph_pwr>; 349 vdd-l1-l4-l10-supply = <&vreg_s4c_1p8>; 350 vdd-l2-l13-l14-supply = <&vreg_bob1>; 351 vdd-l5-l16-supply = <&vreg_bob1>; 352 vdd-l6-l7-supply = <&vreg_bob2>; 353 vdd-l8-l9-supply = <&vreg_bob1>; 354 vdd-l12-supply = <&vreg_s5j_1p2>; 355 vdd-l15-supply = <&vreg_s4c_1p8>; 356 vdd-l17-supply = <&vreg_bob2>; 357 358 vreg_bob1: bob1 { 359 regulator-name = "vreg_bob1"; 360 regulator-min-microvolt = <3008000>; 361 regulator-max-microvolt = <3960000>; 362 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 363 }; 364 365 vreg_bob2: bob2 { 366 regulator-name = "vreg_bob2"; 367 regulator-min-microvolt = <2504000>; 368 regulator-max-microvolt = <3008000>; 369 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 370 }; 371 372 vreg_l1b_1p8: ldo1 { 373 regulator-name = "vreg_l1b_1p8"; 374 regulator-min-microvolt = <1800000>; 375 regulator-max-microvolt = <1800000>; 376 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 377 }; 378 379 vreg_l2b_3p0: ldo2 { 380 regulator-name = "vreg_l2b_3p0"; 381 regulator-min-microvolt = <3072000>; 382 regulator-max-microvolt = <3100000>; 383 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 384 }; 385 386 vreg_l4b_1p8: ldo4 { 387 regulator-name = "vreg_l4b_1p8"; 388 regulator-min-microvolt = <1800000>; 389 regulator-max-microvolt = <1800000>; 390 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 391 }; 392 393 vreg_l5b_3p0: ldo5 { 394 regulator-name = "vreg_l5b_3p0"; 395 regulator-min-microvolt = <3000000>; 396 regulator-max-microvolt = <3000000>; 397 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 398 }; 399 400 vreg_l6b_1p8: ldo6 { 401 regulator-name = "vreg_l6b_1p8"; 402 regulator-min-microvolt = <1800000>; 403 regulator-max-microvolt = <2960000>; 404 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 405 }; 406 407 vreg_l7b_2p8: ldo7 { 408 regulator-name = "vreg_l7b_2p8"; 409 regulator-min-microvolt = <2800000>; 410 regulator-max-microvolt = <2800000>; 411 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 412 }; 413 414 vreg_l8b_3p0: ldo8 { 415 regulator-name = "vreg_l8b_3p0"; 416 regulator-min-microvolt = <3072000>; 417 regulator-max-microvolt = <3072000>; 418 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 419 }; 420 421 vreg_l9b_2p9: ldo9 { 422 regulator-name = "vreg_l9b_2p9"; 423 regulator-min-microvolt = <2960000>; 424 regulator-max-microvolt = <2960000>; 425 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 426 }; 427 428 vreg_l10b_1p8: ldo10 { 429 regulator-name = "vreg_l10b_1p8"; 430 regulator-min-microvolt = <1800000>; 431 regulator-max-microvolt = <1800000>; 432 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 433 }; 434 435 vreg_l12b_1p2: ldo12 { 436 regulator-name = "vreg_l12b_1p2"; 437 regulator-min-microvolt = <1200000>; 438 regulator-max-microvolt = <1200000>; 439 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 440 }; 441 442 vreg_l13b_3p0: ldo13 { 443 regulator-name = "vreg_l13b_3p0"; 444 regulator-min-microvolt = <3072000>; 445 regulator-max-microvolt = <3100000>; 446 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 447 }; 448 449 vreg_l14b_3p0: ldo14 { 450 regulator-name = "vreg_l14b_3p0"; 451 regulator-min-microvolt = <3072000>; 452 regulator-max-microvolt = <3072000>; 453 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 454 }; 455 456 vreg_l15b_1p8: ldo15 { 457 regulator-name = "vreg_l15b_1p8"; 458 regulator-min-microvolt = <1800000>; 459 regulator-max-microvolt = <1800000>; 460 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 461 }; 462 463 vreg_l16b_2p9: ldo16 { 464 regulator-name = "vreg_l16b_2p9"; 465 regulator-min-microvolt = <2912000>; 466 regulator-max-microvolt = <2912000>; 467 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 468 }; 469 470 vreg_l17b_2p5: ldo17 { 471 regulator-name = "vreg_l17b_2p5"; 472 regulator-min-microvolt = <2504000>; 473 regulator-max-microvolt = <2504000>; 474 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 475 }; 476 }; 477 478 regulators-1 { 479 compatible = "qcom,pm8550ve-rpmh-regulators"; 480 qcom,pmic-id = "c"; 481 482 vdd-l1-supply = <&vreg_s5j_1p2>; 483 vdd-l2-supply = <&vreg_s1f_0p7>; 484 vdd-l3-supply = <&vreg_s1f_0p7>; 485 vdd-s4-supply = <&vph_pwr>; 486 487 vreg_s4c_1p8: smps4 { 488 regulator-name = "vreg_s4c_1p8"; 489 regulator-min-microvolt = <1856000>; 490 regulator-max-microvolt = <2000000>; 491 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 492 }; 493 494 vreg_l1c_1p2: ldo1 { 495 regulator-name = "vreg_l1c_1p2"; 496 regulator-min-microvolt = <1200000>; 497 regulator-max-microvolt = <1200000>; 498 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 499 }; 500 501 vreg_l2c_0p8: ldo2 { 502 regulator-name = "vreg_l2c_0p8"; 503 regulator-min-microvolt = <880000>; 504 regulator-max-microvolt = <920000>; 505 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 506 }; 507 508 vreg_l3c_0p8: ldo3 { 509 regulator-name = "vreg_l3c_0p8"; 510 regulator-min-microvolt = <880000>; 511 regulator-max-microvolt = <920000>; 512 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 513 }; 514 }; 515 516 regulators-2 { 517 compatible = "qcom,pmc8380-rpmh-regulators"; 518 qcom,pmic-id = "d"; 519 520 vdd-l1-supply = <&vreg_s1f_0p7>; 521 vdd-l2-supply = <&vreg_s1f_0p7>; 522 vdd-l3-supply = <&vreg_s4c_1p8>; 523 vdd-s1-supply = <&vph_pwr>; 524 525 vreg_l1d_0p8: ldo1 { 526 regulator-name = "vreg_l1d_0p8"; 527 regulator-min-microvolt = <880000>; 528 regulator-max-microvolt = <920000>; 529 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 530 }; 531 532 vreg_l2d_0p9: ldo2 { 533 regulator-name = "vreg_l2d_0p9"; 534 regulator-min-microvolt = <912000>; 535 regulator-max-microvolt = <920000>; 536 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 537 }; 538 539 vreg_l3d_1p8: ldo3 { 540 regulator-name = "vreg_l3d_1p8"; 541 regulator-min-microvolt = <1800000>; 542 regulator-max-microvolt = <1800000>; 543 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 544 }; 545 }; 546 547 regulators-3 { 548 compatible = "qcom,pmc8380-rpmh-regulators"; 549 qcom,pmic-id = "e"; 550 551 vdd-l2-supply = <&vreg_s1f_0p7>; 552 vdd-l3-supply = <&vreg_s5j_1p2>; 553 554 vreg_l2e_0p8: ldo2 { 555 regulator-name = "vreg_l2e_0p8"; 556 regulator-min-microvolt = <880000>; 557 regulator-max-microvolt = <920000>; 558 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 559 }; 560 561 vreg_l3e_1p2: ldo3 { 562 regulator-name = "vreg_l3e_1p2"; 563 regulator-min-microvolt = <1200000>; 564 regulator-max-microvolt = <1200000>; 565 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 566 }; 567 }; 568 569 regulators-4 { 570 compatible = "qcom,pmc8380-rpmh-regulators"; 571 qcom,pmic-id = "f"; 572 573 vdd-l1-supply = <&vreg_s5j_1p2>; 574 vdd-l2-supply = <&vreg_s5j_1p2>; 575 vdd-l3-supply = <&vreg_s5j_1p2>; 576 vdd-s1-supply = <&vph_pwr>; 577 578 vreg_s1f_0p7: smps1 { 579 regulator-name = "vreg_s1f_0p7"; 580 regulator-min-microvolt = <700000>; 581 regulator-max-microvolt = <1100000>; 582 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 583 }; 584 585 vreg_l1f_1p0: ldo1 { 586 regulator-name = "vreg_l1f_1p0"; 587 regulator-min-microvolt = <1024000>; 588 regulator-max-microvolt = <1024000>; 589 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 590 }; 591 592 vreg_l2f_1p0: ldo2 { 593 regulator-name = "vreg_l2f_1p0"; 594 regulator-min-microvolt = <1024000>; 595 regulator-max-microvolt = <1024000>; 596 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 597 }; 598 599 vreg_l3f_1p0: ldo3 { 600 regulator-name = "vreg_l3f_1p0"; 601 regulator-min-microvolt = <1024000>; 602 regulator-max-microvolt = <1024000>; 603 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 604 }; 605 }; 606 607 regulators-6 { 608 compatible = "qcom,pm8550ve-rpmh-regulators"; 609 qcom,pmic-id = "i"; 610 611 vdd-l1-supply = <&vreg_s4c_1p8>; 612 vdd-l2-supply = <&vreg_s5j_1p2>; 613 vdd-l3-supply = <&vreg_s1f_0p7>; 614 vdd-s1-supply = <&vph_pwr>; 615 vdd-s2-supply = <&vph_pwr>; 616 617 vreg_s1i_0p9: smps1 { 618 regulator-name = "vreg_s1i_0p9"; 619 regulator-min-microvolt = <900000>; 620 regulator-max-microvolt = <920000>; 621 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 622 }; 623 624 vreg_s2i_1p0: smps2 { 625 regulator-name = "vreg_s2i_1p0"; 626 regulator-min-microvolt = <1000000>; 627 regulator-max-microvolt = <1100000>; 628 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 629 }; 630 631 vreg_l1i_1p8: ldo1 { 632 regulator-name = "vreg_l1i_1p8"; 633 regulator-min-microvolt = <1800000>; 634 regulator-max-microvolt = <1800000>; 635 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 636 }; 637 638 vreg_l2i_1p2: ldo2 { 639 regulator-name = "vreg_l2i_1p2"; 640 regulator-min-microvolt = <1200000>; 641 regulator-max-microvolt = <1200000>; 642 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 643 }; 644 645 vreg_l3i_0p8: ldo3 { 646 regulator-name = "vreg_l3i_0p8"; 647 regulator-min-microvolt = <880000>; 648 regulator-max-microvolt = <920000>; 649 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 650 }; 651 }; 652 653 regulators-7 { 654 compatible = "qcom,pm8550ve-rpmh-regulators"; 655 qcom,pmic-id = "j"; 656 657 vdd-l1-supply = <&vreg_s1f_0p7>; 658 vdd-l2-supply = <&vreg_s5j_1p2>; 659 vdd-l3-supply = <&vreg_s1f_0p7>; 660 vdd-s5-supply = <&vph_pwr>; 661 662 vreg_s5j_1p2: smps5 { 663 regulator-name = "vreg_s5j_1p2"; 664 regulator-min-microvolt = <1256000>; 665 regulator-max-microvolt = <1304000>; 666 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 667 }; 668 669 vreg_l1j_0p8: ldo1 { 670 regulator-name = "vreg_l1j_0p8"; 671 regulator-min-microvolt = <880000>; 672 regulator-max-microvolt = <920000>; 673 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 674 }; 675 676 vreg_l2j_1p2: ldo2 { 677 regulator-name = "vreg_l2j_1p2"; 678 regulator-min-microvolt = <1200000>; 679 regulator-max-microvolt = <1200000>; 680 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 681 }; 682 683 vreg_l3j_0p8: ldo3 { 684 regulator-name = "vreg_l3j_0p8"; 685 regulator-min-microvolt = <880000>; 686 regulator-max-microvolt = <920000>; 687 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 688 }; 689 }; 690}; 691 692&gpu { 693 status = "okay"; 694 695 zap-shader { 696 firmware-name = "qcom/x1e80100/gen70500_zap.mbn"; 697 }; 698}; 699 700&i2c0 { 701 clock-frequency = <400000>; 702 703 status = "okay"; 704 705 touchpad@15 { 706 compatible = "hid-over-i2c"; 707 reg = <0x15>; 708 709 hid-descr-addr = <0x1>; 710 interrupts-extended = <&tlmm 3 IRQ_TYPE_LEVEL_LOW>; 711 712 vdd-supply = <&vreg_misc_3p3>; 713 vddl-supply = <&vreg_l12b_1p2>; 714 715 pinctrl-0 = <&tpad_default>; 716 pinctrl-names = "default"; 717 718 wakeup-source; 719 }; 720 721 keyboard@3a { 722 compatible = "hid-over-i2c"; 723 reg = <0x3a>; 724 725 hid-descr-addr = <0x1>; 726 interrupts-extended = <&tlmm 67 IRQ_TYPE_LEVEL_LOW>; 727 728 vdd-supply = <&vreg_misc_3p3>; 729 vddl-supply = <&vreg_l12b_1p2>; 730 731 pinctrl-0 = <&kybd_default>; 732 pinctrl-names = "default"; 733 734 wakeup-source; 735 }; 736}; 737 738&i2c8 { 739 clock-frequency = <400000>; 740 741 status = "okay"; 742 743 touchscreen@10 { 744 compatible = "hid-over-i2c"; 745 reg = <0x10>; 746 747 hid-descr-addr = <0x1>; 748 interrupts-extended = <&tlmm 51 IRQ_TYPE_LEVEL_LOW>; 749 750 vdd-supply = <&vreg_misc_3p3>; 751 vddl-supply = <&vreg_l15b_1p8>; 752 753 pinctrl-0 = <&ts0_default>; 754 pinctrl-names = "default"; 755 }; 756}; 757 758&lpass_tlmm { 759 spkr_01_sd_n_active: spkr-01-sd-n-active-state { 760 pins = "gpio12"; 761 function = "gpio"; 762 drive-strength = <16>; 763 bias-disable; 764 output-low; 765 }; 766 767 spkr_23_sd_n_active: spkr-23-sd-n-active-state { 768 pins = "gpio13"; 769 function = "gpio"; 770 drive-strength = <16>; 771 bias-disable; 772 output-low; 773 }; 774}; 775 776&lpass_vamacro { 777 pinctrl-0 = <&dmic01_default>, <&dmic23_default>; 778 pinctrl-names = "default"; 779 780 vdd-micb-supply = <&vreg_l1b_1p8>; 781 qcom,dmic-sample-rate = <4800000>; 782}; 783 784&mdss { 785 status = "okay"; 786}; 787 788&mdss_dp3 { 789 compatible = "qcom,x1e80100-dp"; 790 /delete-property/ #sound-dai-cells; 791 792 status = "okay"; 793 794 aux-bus { 795 panel { 796 compatible = "samsung,atna45af01", "samsung,atna33xc20"; 797 enable-gpios = <&pmc8380_3_gpios 4 GPIO_ACTIVE_HIGH>; 798 power-supply = <&vreg_edp_3p3>; 799 800 pinctrl-0 = <&edp_bl_en>; 801 pinctrl-names = "default"; 802 803 port { 804 edp_panel_in: endpoint { 805 remote-endpoint = <&mdss_dp3_out>; 806 }; 807 }; 808 }; 809 }; 810 811 ports { 812 port@1 { 813 reg = <1>; 814 mdss_dp3_out: endpoint { 815 data-lanes = <0 1 2 3>; 816 link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>; 817 818 remote-endpoint = <&edp_panel_in>; 819 }; 820 }; 821 }; 822}; 823 824&mdss_dp3_phy { 825 vdda-phy-supply = <&vreg_l3j_0p8>; 826 vdda-pll-supply = <&vreg_l2j_1p2>; 827 828 status = "okay"; 829}; 830 831&pcie4 { 832 perst-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>; 833 wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>; 834 835 pinctrl-0 = <&pcie4_default>; 836 pinctrl-names = "default"; 837 838 status = "okay"; 839}; 840 841&pcie4_phy { 842 vdda-phy-supply = <&vreg_l3i_0p8>; 843 vdda-pll-supply = <&vreg_l3e_1p2>; 844 845 status = "okay"; 846}; 847 848&pcie5 { 849 perst-gpios = <&tlmm 149 GPIO_ACTIVE_LOW>; 850 wake-gpios = <&tlmm 151 GPIO_ACTIVE_LOW>; 851 852 vddpe-3v3-supply = <&vreg_wwan>; 853 854 pinctrl-0 = <&pcie5_default>; 855 pinctrl-names = "default"; 856 857 status = "okay"; 858}; 859 860&pcie5_phy { 861 vdda-phy-supply = <&vreg_l3i_0p8>; 862 vdda-pll-supply = <&vreg_l3e_1p2>; 863 864 status = "okay"; 865}; 866 867&pcie6a { 868 perst-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>; 869 wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>; 870 871 vddpe-3v3-supply = <&vreg_nvme>; 872 873 pinctrl-names = "default"; 874 pinctrl-0 = <&pcie6a_default>; 875 876 status = "okay"; 877}; 878 879&pcie6a_phy { 880 vdda-phy-supply = <&vreg_l1d_0p8>; 881 vdda-pll-supply = <&vreg_l2j_1p2>; 882 883 status = "okay"; 884}; 885 886&pm8550ve_8_gpios { 887 misc_3p3_reg_en: misc-3p3-reg-en-state { 888 pins = "gpio6"; 889 function = "normal"; 890 bias-disable; 891 input-disable; 892 output-enable; 893 drive-push-pull; 894 power-source = <1>; /* 1.8 V */ 895 qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>; 896 }; 897}; 898 899&pmc8380_3_gpios { 900 edp_bl_en: edp-bl-en-state { 901 pins = "gpio4"; 902 function = "normal"; 903 power-source = <1>; /* 1.8V */ 904 input-disable; 905 output-enable; 906 }; 907}; 908 909&qupv3_0 { 910 status = "okay"; 911}; 912 913&qupv3_1 { 914 status = "okay"; 915}; 916 917&qupv3_2 { 918 status = "okay"; 919}; 920 921&remoteproc_adsp { 922 firmware-name = "qcom/x1e80100/adsp.mbn", 923 "qcom/x1e80100/adsp_dtb.mbn"; 924 925 status = "okay"; 926}; 927 928&remoteproc_cdsp { 929 firmware-name = "qcom/x1e80100/cdsp.mbn", 930 "qcom/x1e80100/cdsp_dtb.mbn"; 931 932 status = "okay"; 933}; 934 935&smb2360_0_eusb2_repeater { 936 vdd18-supply = <&vreg_l3d_1p8>; 937 vdd3-supply = <&vreg_l2b_3p0>; 938}; 939 940&smb2360_1_eusb2_repeater { 941 vdd18-supply = <&vreg_l3d_1p8>; 942 vdd3-supply = <&vreg_l14b_3p0>; 943}; 944 945&smb2360_2 { 946 status = "okay"; 947}; 948 949&smb2360_2_eusb2_repeater { 950 vdd18-supply = <&vreg_l3d_1p8>; 951 vdd3-supply = <&vreg_l8b_3p0>; 952}; 953 954&swr0 { 955 status = "okay"; 956 957 pinctrl-0 = <&wsa_swr_active>, <&spkr_01_sd_n_active>; 958 pinctrl-names = "default"; 959 960 /* WSA8845, Left Woofer */ 961 left_woofer: speaker@0,0 { 962 compatible = "sdw20217020400"; 963 reg = <0 0>; 964 reset-gpios = <&lpass_tlmm 12 GPIO_ACTIVE_LOW>; 965 #sound-dai-cells = <0>; 966 sound-name-prefix = "WooferLeft"; 967 vdd-1p8-supply = <&vreg_l15b_1p8>; 968 vdd-io-supply = <&vreg_l12b_1p2>; 969 qcom,port-mapping = <1 2 3 7 10 13>; 970 }; 971 972 /* WSA8845, Left Tweeter */ 973 left_tweeter: speaker@0,1 { 974 compatible = "sdw20217020400"; 975 reg = <0 1>; 976 reset-gpios = <&lpass_tlmm 12 GPIO_ACTIVE_LOW>; 977 #sound-dai-cells = <0>; 978 sound-name-prefix = "TweeterLeft"; 979 vdd-1p8-supply = <&vreg_l15b_1p8>; 980 vdd-io-supply = <&vreg_l12b_1p2>; 981 qcom,port-mapping = <4 5 6 7 11 13>; 982 }; 983}; 984 985&swr1 { 986 status = "okay"; 987 988 /* WCD9385 RX */ 989 wcd_rx: codec@0,4 { 990 compatible = "sdw20217010d00"; 991 reg = <0 4>; 992 qcom,rx-port-mapping = <1 2 3 4 5>; 993 }; 994}; 995 996&swr2 { 997 status = "okay"; 998 999 /* WCD9385 TX */ 1000 wcd_tx: codec@0,3 { 1001 compatible = "sdw20217010d00"; 1002 reg = <0 3>; 1003 qcom,tx-port-mapping = <2 2 3 4>; 1004 }; 1005}; 1006 1007&swr3 { 1008 status = "okay"; 1009 1010 pinctrl-0 = <&wsa2_swr_active>, <&spkr_23_sd_n_active>; 1011 pinctrl-names = "default"; 1012 1013 /* WSA8845, Right Woofer */ 1014 right_woofer: speaker@0,0 { 1015 compatible = "sdw20217020400"; 1016 reg = <0 0>; 1017 reset-gpios = <&lpass_tlmm 13 GPIO_ACTIVE_LOW>; 1018 #sound-dai-cells = <0>; 1019 sound-name-prefix = "WooferRight"; 1020 vdd-1p8-supply = <&vreg_l15b_1p8>; 1021 vdd-io-supply = <&vreg_l12b_1p2>; 1022 qcom,port-mapping = <1 2 3 7 10 13>; 1023 }; 1024 1025 /* WSA8845, Right Tweeter */ 1026 right_tweeter: speaker@0,1 { 1027 compatible = "sdw20217020400"; 1028 reg = <0 1>; 1029 reset-gpios = <&lpass_tlmm 13 GPIO_ACTIVE_LOW>; 1030 #sound-dai-cells = <0>; 1031 sound-name-prefix = "TweeterRight"; 1032 vdd-1p8-supply = <&vreg_l15b_1p8>; 1033 vdd-io-supply = <&vreg_l12b_1p2>; 1034 qcom,port-mapping = <4 5 6 7 11 13>; 1035 }; 1036}; 1037 1038&tlmm { 1039 gpio-reserved-ranges = <34 2>, /* Unused */ 1040 <44 4>, /* SPI (TPM) */ 1041 <238 1>; /* UFS Reset */ 1042 1043 edp_reg_en: edp-reg-en-state { 1044 pins = "gpio70"; 1045 function = "gpio"; 1046 drive-strength = <16>; 1047 bias-disable; 1048 }; 1049 1050 hall_int_n_default: hall-int-n-state { 1051 pins = "gpio92"; 1052 function = "gpio"; 1053 bias-disable; 1054 }; 1055 1056 kybd_default: kybd-default-state { 1057 pins = "gpio67"; 1058 function = "gpio"; 1059 bias-disable; 1060 }; 1061 1062 nvme_reg_en: nvme-reg-en-state { 1063 pins = "gpio18"; 1064 function = "gpio"; 1065 drive-strength = <2>; 1066 bias-disable; 1067 }; 1068 1069 pcie4_default: pcie4-default-state { 1070 clkreq-n-pins { 1071 pins = "gpio147"; 1072 function = "pcie4_clk"; 1073 drive-strength = <2>; 1074 bias-pull-up; 1075 }; 1076 1077 perst-n-pins { 1078 pins = "gpio146"; 1079 function = "gpio"; 1080 drive-strength = <2>; 1081 bias-disable; 1082 }; 1083 1084 wake-n-pins { 1085 pins = "gpio148"; 1086 function = "gpio"; 1087 drive-strength = <2>; 1088 bias-pull-up; 1089 }; 1090 }; 1091 1092 pcie5_default: pcie5-default-state { 1093 clkreq-n-pins { 1094 pins = "gpio150"; 1095 function = "pcie5_clk"; 1096 drive-strength = <2>; 1097 bias-pull-up; 1098 }; 1099 1100 perst-n-pins { 1101 pins = "gpio149"; 1102 function = "gpio"; 1103 drive-strength = <2>; 1104 bias-disable; 1105 }; 1106 1107 wake-n-pins { 1108 pins = "gpio151"; 1109 function = "gpio"; 1110 drive-strength = <2>; 1111 bias-pull-up; 1112 }; 1113 }; 1114 1115 pcie6a_default: pcie6a-default-state { 1116 clkreq-n-pins { 1117 pins = "gpio153"; 1118 function = "pcie6a_clk"; 1119 drive-strength = <2>; 1120 bias-pull-up; 1121 }; 1122 1123 perst-n-pins { 1124 pins = "gpio152"; 1125 function = "gpio"; 1126 drive-strength = <2>; 1127 bias-disable; 1128 }; 1129 1130 wake-n-pins { 1131 pins = "gpio154"; 1132 function = "gpio"; 1133 drive-strength = <2>; 1134 bias-pull-up; 1135 }; 1136 }; 1137 1138 tpad_default: tpad-default-state { 1139 pins = "gpio3"; 1140 function = "gpio"; 1141 bias-disable; 1142 }; 1143 1144 ts0_default: ts0-default-state { 1145 int-n-pins { 1146 pins = "gpio51"; 1147 function = "gpio"; 1148 bias-disable; 1149 }; 1150 1151 reset-n-pins { 1152 pins = "gpio48"; 1153 function = "gpio"; 1154 output-high; 1155 drive-strength = <16>; 1156 }; 1157 }; 1158 1159 wcd_default: wcd-reset-n-active-state { 1160 pins = "gpio191"; 1161 function = "gpio"; 1162 drive-strength = <16>; 1163 bias-disable; 1164 output-low; 1165 }; 1166 1167 wwan_sw_en: wwan-sw-en-state { 1168 pins = "gpio221"; 1169 function = "gpio"; 1170 drive-strength = <4>; 1171 bias-disable; 1172 }; 1173}; 1174 1175&uart21 { 1176 compatible = "qcom,geni-debug-uart"; 1177 status = "okay"; 1178}; 1179 1180&usb_1_ss0_hsphy { 1181 vdd-supply = <&vreg_l3j_0p8>; 1182 vdda12-supply = <&vreg_l2j_1p2>; 1183 1184 phys = <&smb2360_0_eusb2_repeater>; 1185 1186 status = "okay"; 1187}; 1188 1189&usb_1_ss0_qmpphy { 1190 vdda-phy-supply = <&vreg_l3e_1p2>; 1191 vdda-pll-supply = <&vreg_l1j_0p8>; 1192 1193 status = "okay"; 1194}; 1195 1196&usb_1_ss0 { 1197 status = "okay"; 1198}; 1199 1200&usb_1_ss0_dwc3_hs { 1201 remote-endpoint = <&pmic_glink_ss0_hs_in>; 1202}; 1203 1204&usb_1_ss0_qmpphy_out { 1205 remote-endpoint = <&pmic_glink_ss0_ss_in>; 1206}; 1207 1208&usb_1_ss1_hsphy { 1209 vdd-supply = <&vreg_l3j_0p8>; 1210 vdda12-supply = <&vreg_l2j_1p2>; 1211 1212 phys = <&smb2360_1_eusb2_repeater>; 1213 1214 status = "okay"; 1215}; 1216 1217&usb_1_ss1_qmpphy { 1218 vdda-phy-supply = <&vreg_l3e_1p2>; 1219 vdda-pll-supply = <&vreg_l2d_0p9>; 1220 1221 status = "okay"; 1222}; 1223 1224&usb_1_ss1 { 1225 status = "okay"; 1226}; 1227 1228&usb_1_ss1_dwc3_hs { 1229 remote-endpoint = <&pmic_glink_ss1_hs_in>; 1230}; 1231 1232&usb_1_ss1_qmpphy_out { 1233 remote-endpoint = <&pmic_glink_ss1_ss_in>; 1234}; 1235 1236&usb_1_ss2_hsphy { 1237 vdd-supply = <&vreg_l3j_0p8>; 1238 vdda12-supply = <&vreg_l2j_1p2>; 1239 1240 phys = <&smb2360_2_eusb2_repeater>; 1241 1242 status = "okay"; 1243}; 1244 1245&usb_1_ss2_qmpphy { 1246 vdda-phy-supply = <&vreg_l3e_1p2>; 1247 vdda-pll-supply = <&vreg_l2d_0p9>; 1248 1249 status = "okay"; 1250}; 1251 1252&usb_1_ss2 { 1253 status = "okay"; 1254}; 1255 1256&usb_1_ss2_dwc3_hs { 1257 remote-endpoint = <&pmic_glink_ss2_hs_in>; 1258}; 1259 1260&usb_1_ss2_qmpphy_out { 1261 remote-endpoint = <&pmic_glink_ss2_ss_in>; 1262}; 1263