xref: /linux/arch/arm64/boot/dts/qcom/x1e80100-crd.dts (revision 235f0da3274690f540aa53fccf77d433e344e4b8)
1// SPDX-License-Identifier: BSD-3-Clause
2/*
3 * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
4 */
5
6/dts-v1/;
7
8#include <dt-bindings/gpio/gpio.h>
9#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
10
11#include "x1e80100.dtsi"
12#include "x1e80100-pmics.dtsi"
13
14/ {
15	model = "Qualcomm Technologies, Inc. X1E80100 CRD";
16	compatible = "qcom,x1e80100-crd", "qcom,x1e80100";
17
18	aliases {
19		serial0 = &uart21;
20	};
21
22	wcd938x: audio-codec {
23		compatible = "qcom,wcd9385-codec";
24
25		pinctrl-names = "default";
26		pinctrl-0 = <&wcd_default>;
27
28		qcom,micbias1-microvolt = <1800000>;
29		qcom,micbias2-microvolt = <1800000>;
30		qcom,micbias3-microvolt = <1800000>;
31		qcom,micbias4-microvolt = <1800000>;
32		qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000 500000 500000 500000>;
33		qcom,mbhc-headset-vthreshold-microvolt = <1700000>;
34		qcom,mbhc-headphone-vthreshold-microvolt = <50000>;
35		qcom,rx-device = <&wcd_rx>;
36		qcom,tx-device = <&wcd_tx>;
37
38		reset-gpios = <&tlmm 191 GPIO_ACTIVE_LOW>;
39
40		vdd-buck-supply = <&vreg_l15b_1p8>;
41		vdd-rxtx-supply = <&vreg_l15b_1p8>;
42		vdd-io-supply = <&vreg_l15b_1p8>;
43		vdd-mic-bias-supply = <&vreg_bob1>;
44
45		#sound-dai-cells = <1>;
46	};
47
48	chosen {
49		stdout-path = "serial0:115200n8";
50	};
51
52	pmic-glink {
53		compatible = "qcom,x1e80100-pmic-glink",
54			     "qcom,sm8550-pmic-glink",
55			     "qcom,pmic-glink";
56		#address-cells = <1>;
57		#size-cells = <0>;
58		orientation-gpios = <&tlmm 121 GPIO_ACTIVE_HIGH>,
59				    <&tlmm 123 GPIO_ACTIVE_HIGH>,
60				    <&tlmm 125 GPIO_ACTIVE_HIGH>;
61
62		/* Left-side rear port */
63		connector@0 {
64			compatible = "usb-c-connector";
65			reg = <0>;
66			power-role = "dual";
67			data-role = "dual";
68
69			ports {
70				#address-cells = <1>;
71				#size-cells = <0>;
72
73				port@0 {
74					reg = <0>;
75
76					pmic_glink_ss0_hs_in: endpoint {
77						remote-endpoint = <&usb_1_ss0_dwc3_hs>;
78					};
79				};
80
81				port@1 {
82					reg = <1>;
83
84					pmic_glink_ss0_ss_in: endpoint {
85						remote-endpoint = <&usb_1_ss0_qmpphy_out>;
86					};
87				};
88			};
89		};
90
91		/* Left-side front port */
92		connector@1 {
93			compatible = "usb-c-connector";
94			reg = <1>;
95			power-role = "dual";
96			data-role = "dual";
97
98			ports {
99				#address-cells = <1>;
100				#size-cells = <0>;
101
102				port@0 {
103					reg = <0>;
104
105					pmic_glink_ss1_hs_in: endpoint {
106						remote-endpoint = <&usb_1_ss1_dwc3_hs>;
107					};
108				};
109
110				port@1 {
111					reg = <1>;
112
113					pmic_glink_ss1_ss_in: endpoint {
114						remote-endpoint = <&usb_1_ss1_qmpphy_out>;
115					};
116				};
117			};
118		};
119
120		/* Right-side port */
121		connector@2 {
122			compatible = "usb-c-connector";
123			reg = <2>;
124			power-role = "dual";
125			data-role = "dual";
126
127			ports {
128				#address-cells = <1>;
129				#size-cells = <0>;
130
131				port@0 {
132					reg = <0>;
133
134					pmic_glink_ss2_hs_in: endpoint {
135						remote-endpoint = <&usb_1_ss2_dwc3_hs>;
136					};
137				};
138
139				port@1 {
140					reg = <1>;
141
142					pmic_glink_ss2_ss_in: endpoint {
143						remote-endpoint = <&usb_1_ss2_qmpphy_out>;
144					};
145				};
146			};
147		};
148	};
149
150	reserved-memory {
151		linux,cma {
152			compatible = "shared-dma-pool";
153			size = <0x0 0x8000000>;
154			reusable;
155			linux,cma-default;
156		};
157	};
158
159	sound {
160		compatible = "qcom,x1e80100-sndcard";
161		model = "X1E80100-CRD";
162		audio-routing = "WooferLeft IN", "WSA WSA_SPK1 OUT",
163				"TwitterLeft IN", "WSA WSA_SPK2 OUT",
164				"WooferRight IN", "WSA2 WSA_SPK2 OUT",
165				"TwitterRight IN", "WSA2 WSA_SPK2 OUT",
166				"IN1_HPHL", "HPHL_OUT",
167				"IN2_HPHR", "HPHR_OUT",
168				"AMIC2", "MIC BIAS2",
169				"VA DMIC0", "MIC BIAS3",
170				"VA DMIC1", "MIC BIAS3",
171				"VA DMIC2", "MIC BIAS1",
172				"VA DMIC3", "MIC BIAS1",
173				"VA DMIC0", "VA MIC BIAS3",
174				"VA DMIC1", "VA MIC BIAS3",
175				"VA DMIC2", "VA MIC BIAS1",
176				"VA DMIC3", "VA MIC BIAS1",
177				"TX SWR_INPUT1", "ADC2_OUTPUT";
178
179		wcd-playback-dai-link {
180			link-name = "WCD Playback";
181
182			cpu {
183				sound-dai = <&q6apmbedai RX_CODEC_DMA_RX_0>;
184			};
185
186			codec {
187				sound-dai = <&wcd938x 0>, <&swr1 0>, <&lpass_rxmacro 0>;
188			};
189
190			platform {
191				sound-dai = <&q6apm>;
192			};
193		};
194
195		wcd-capture-dai-link {
196			link-name = "WCD Capture";
197
198			cpu {
199				sound-dai = <&q6apmbedai TX_CODEC_DMA_TX_3>;
200			};
201
202			codec {
203				sound-dai = <&wcd938x 1>, <&swr2 1>, <&lpass_txmacro 0>;
204			};
205
206			platform {
207				sound-dai = <&q6apm>;
208			};
209		};
210
211		wsa-dai-link {
212			link-name = "WSA Playback";
213
214			cpu {
215				sound-dai = <&q6apmbedai WSA_CODEC_DMA_RX_0>;
216			};
217
218			codec {
219				sound-dai = <&left_woofer>, <&left_tweeter>,
220					    <&swr0 0>, <&lpass_wsamacro 0>,
221					    <&right_woofer>, <&right_tweeter>,
222					    <&swr3 0>, <&lpass_wsa2macro 0>;
223			};
224
225			platform {
226				sound-dai = <&q6apm>;
227			};
228		};
229
230		va-dai-link {
231			link-name = "VA Capture";
232
233			cpu {
234				sound-dai = <&q6apmbedai VA_CODEC_DMA_TX_0>;
235			};
236
237			codec {
238				sound-dai = <&lpass_vamacro 0>;
239			};
240
241			platform {
242				sound-dai = <&q6apm>;
243			};
244		};
245	};
246
247	vph_pwr: vph-pwr-regulator {
248		compatible = "regulator-fixed";
249
250		regulator-name = "vph_pwr";
251		regulator-min-microvolt = <3700000>;
252		regulator-max-microvolt = <3700000>;
253
254		regulator-always-on;
255		regulator-boot-on;
256	};
257
258	vreg_edp_3p3: regulator-edp-3p3 {
259		compatible = "regulator-fixed";
260
261		regulator-name = "VREG_EDP_3P3";
262		regulator-min-microvolt = <3300000>;
263		regulator-max-microvolt = <3300000>;
264
265		gpio = <&tlmm 70 GPIO_ACTIVE_HIGH>;
266		enable-active-high;
267
268		pinctrl-0 = <&edp_reg_en>;
269		pinctrl-names = "default";
270
271		regulator-boot-on;
272	};
273
274	vreg_nvme: regulator-nvme {
275		compatible = "regulator-fixed";
276
277		regulator-name = "VREG_NVME_3P3";
278		regulator-min-microvolt = <3300000>;
279		regulator-max-microvolt = <3300000>;
280
281		gpio = <&tlmm 18 GPIO_ACTIVE_HIGH>;
282		enable-active-high;
283
284		pinctrl-names = "default";
285		pinctrl-0 = <&nvme_reg_en>;
286	};
287};
288
289&apps_rsc {
290	regulators-0 {
291		compatible = "qcom,pm8550-rpmh-regulators";
292		qcom,pmic-id = "b";
293
294		vdd-bob1-supply = <&vph_pwr>;
295		vdd-bob2-supply = <&vph_pwr>;
296		vdd-l1-l4-l10-supply = <&vreg_s4c_1p8>;
297		vdd-l2-l13-l14-supply = <&vreg_bob1>;
298		vdd-l5-l16-supply = <&vreg_bob1>;
299		vdd-l6-l7-supply = <&vreg_bob2>;
300		vdd-l8-l9-supply = <&vreg_bob1>;
301		vdd-l12-supply = <&vreg_s5j_1p2>;
302		vdd-l15-supply = <&vreg_s4c_1p8>;
303		vdd-l17-supply = <&vreg_bob2>;
304
305		vreg_bob1: bob1 {
306			regulator-name = "vreg_bob1";
307			regulator-min-microvolt = <3008000>;
308			regulator-max-microvolt = <3960000>;
309			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
310		};
311
312		vreg_bob2: bob2 {
313			regulator-name = "vreg_bob2";
314			regulator-min-microvolt = <2504000>;
315			regulator-max-microvolt = <3008000>;
316			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
317		};
318
319		vreg_l1b_1p8: ldo1 {
320			regulator-name = "vreg_l1b_1p8";
321			regulator-min-microvolt = <1800000>;
322			regulator-max-microvolt = <1800000>;
323			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
324		};
325
326		vreg_l2b_3p0: ldo2 {
327			regulator-name = "vreg_l2b_3p0";
328			regulator-min-microvolt = <3072000>;
329			regulator-max-microvolt = <3100000>;
330			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
331		};
332
333		vreg_l4b_1p8: ldo4 {
334			regulator-name = "vreg_l4b_1p8";
335			regulator-min-microvolt = <1800000>;
336			regulator-max-microvolt = <1800000>;
337			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
338		};
339
340		vreg_l5b_3p0: ldo5 {
341			regulator-name = "vreg_l5b_3p0";
342			regulator-min-microvolt = <3000000>;
343			regulator-max-microvolt = <3000000>;
344			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
345		};
346
347		vreg_l6b_1p8: ldo6 {
348			regulator-name = "vreg_l6b_1p8";
349			regulator-min-microvolt = <1800000>;
350			regulator-max-microvolt = <2960000>;
351			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
352		};
353
354		vreg_l7b_2p8: ldo7 {
355			regulator-name = "vreg_l7b_2p8";
356			regulator-min-microvolt = <2800000>;
357			regulator-max-microvolt = <2800000>;
358			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
359		};
360
361		vreg_l8b_3p0: ldo8 {
362			regulator-name = "vreg_l8b_3p0";
363			regulator-min-microvolt = <3072000>;
364			regulator-max-microvolt = <3072000>;
365			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
366		};
367
368		vreg_l9b_2p9: ldo9 {
369			regulator-name = "vreg_l9b_2p9";
370			regulator-min-microvolt = <2960000>;
371			regulator-max-microvolt = <2960000>;
372			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
373		};
374
375		vreg_l10b_1p8: ldo10 {
376			regulator-name = "vreg_l10b_1p8";
377			regulator-min-microvolt = <1800000>;
378			regulator-max-microvolt = <1800000>;
379			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
380		};
381
382		vreg_l12b_1p2: ldo12 {
383			regulator-name = "vreg_l12b_1p2";
384			regulator-min-microvolt = <1200000>;
385			regulator-max-microvolt = <1200000>;
386			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
387		};
388
389		vreg_l13b_3p0: ldo13 {
390			regulator-name = "vreg_l13b_3p0";
391			regulator-min-microvolt = <3072000>;
392			regulator-max-microvolt = <3100000>;
393			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
394		};
395
396		vreg_l14b_3p0: ldo14 {
397			regulator-name = "vreg_l14b_3p0";
398			regulator-min-microvolt = <3072000>;
399			regulator-max-microvolt = <3072000>;
400			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
401		};
402
403		vreg_l15b_1p8: ldo15 {
404			regulator-name = "vreg_l15b_1p8";
405			regulator-min-microvolt = <1800000>;
406			regulator-max-microvolt = <1800000>;
407			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
408		};
409
410		vreg_l16b_2p9: ldo16 {
411			regulator-name = "vreg_l16b_2p9";
412			regulator-min-microvolt = <2912000>;
413			regulator-max-microvolt = <2912000>;
414			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
415		};
416
417		vreg_l17b_2p5: ldo17 {
418			regulator-name = "vreg_l17b_2p5";
419			regulator-min-microvolt = <2504000>;
420			regulator-max-microvolt = <2504000>;
421			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
422		};
423	};
424
425	regulators-1 {
426		compatible = "qcom,pm8550ve-rpmh-regulators";
427		qcom,pmic-id = "c";
428
429		vdd-l1-supply = <&vreg_s5j_1p2>;
430		vdd-l2-supply = <&vreg_s1f_0p7>;
431		vdd-l3-supply = <&vreg_s1f_0p7>;
432		vdd-s4-supply = <&vph_pwr>;
433
434		vreg_s4c_1p8: smps4 {
435			regulator-name = "vreg_s4c_1p8";
436			regulator-min-microvolt = <1856000>;
437			regulator-max-microvolt = <2000000>;
438			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
439		};
440
441		vreg_l1c_1p2: ldo1 {
442			regulator-name = "vreg_l1c_1p2";
443			regulator-min-microvolt = <1200000>;
444			regulator-max-microvolt = <1200000>;
445			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
446		};
447
448		vreg_l2c_0p8: ldo2 {
449			regulator-name = "vreg_l2c_0p8";
450			regulator-min-microvolt = <880000>;
451			regulator-max-microvolt = <920000>;
452			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
453		};
454
455		vreg_l3c_0p8: ldo3 {
456			regulator-name = "vreg_l3c_0p8";
457			regulator-min-microvolt = <880000>;
458			regulator-max-microvolt = <920000>;
459			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
460		};
461	};
462
463	regulators-2 {
464		compatible = "qcom,pmc8380-rpmh-regulators";
465		qcom,pmic-id = "d";
466
467		vdd-l1-supply = <&vreg_s1f_0p7>;
468		vdd-l2-supply = <&vreg_s1f_0p7>;
469		vdd-l3-supply = <&vreg_s4c_1p8>;
470		vdd-s1-supply = <&vph_pwr>;
471
472		vreg_l1d_0p8: ldo1 {
473			regulator-name = "vreg_l1d_0p8";
474			regulator-min-microvolt = <880000>;
475			regulator-max-microvolt = <920000>;
476			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
477		};
478
479		vreg_l2d_0p9: ldo2 {
480			regulator-name = "vreg_l2d_0p9";
481			regulator-min-microvolt = <912000>;
482			regulator-max-microvolt = <920000>;
483			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
484		};
485
486		vreg_l3d_1p8: ldo3 {
487			regulator-name = "vreg_l3d_1p8";
488			regulator-min-microvolt = <1800000>;
489			regulator-max-microvolt = <1800000>;
490			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
491		};
492	};
493
494	regulators-3 {
495		compatible = "qcom,pmc8380-rpmh-regulators";
496		qcom,pmic-id = "e";
497
498		vdd-l2-supply = <&vreg_s1f_0p7>;
499		vdd-l3-supply = <&vreg_s5j_1p2>;
500
501		vreg_l2e_0p8: ldo2 {
502			regulator-name = "vreg_l2e_0p8";
503			regulator-min-microvolt = <880000>;
504			regulator-max-microvolt = <920000>;
505			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
506		};
507
508		vreg_l3e_1p2: ldo3 {
509			regulator-name = "vreg_l3e_1p2";
510			regulator-min-microvolt = <1200000>;
511			regulator-max-microvolt = <1200000>;
512			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
513		};
514	};
515
516	regulators-4 {
517		compatible = "qcom,pmc8380-rpmh-regulators";
518		qcom,pmic-id = "f";
519
520		vdd-l1-supply = <&vreg_s5j_1p2>;
521		vdd-l2-supply = <&vreg_s5j_1p2>;
522		vdd-l3-supply = <&vreg_s5j_1p2>;
523		vdd-s1-supply = <&vph_pwr>;
524
525		vreg_s1f_0p7: smps1 {
526			regulator-name = "vreg_s1f_0p7";
527			regulator-min-microvolt = <700000>;
528			regulator-max-microvolt = <1100000>;
529			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
530		};
531
532		vreg_l1f_1p0: ldo1 {
533			regulator-name = "vreg_l1f_1p0";
534			regulator-min-microvolt = <1024000>;
535			regulator-max-microvolt = <1024000>;
536			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
537		};
538
539		vreg_l2f_1p0: ldo2 {
540			regulator-name = "vreg_l2f_1p0";
541			regulator-min-microvolt = <1024000>;
542			regulator-max-microvolt = <1024000>;
543			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
544		};
545
546		vreg_l3f_1p0: ldo3 {
547			regulator-name = "vreg_l3f_1p0";
548			regulator-min-microvolt = <1024000>;
549			regulator-max-microvolt = <1024000>;
550			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
551		};
552	};
553
554	regulators-6 {
555		compatible = "qcom,pm8550ve-rpmh-regulators";
556		qcom,pmic-id = "i";
557
558		vdd-l1-supply = <&vreg_s4c_1p8>;
559		vdd-l2-supply = <&vreg_s5j_1p2>;
560		vdd-l3-supply = <&vreg_s1f_0p7>;
561		vdd-s1-supply = <&vph_pwr>;
562		vdd-s2-supply = <&vph_pwr>;
563
564		vreg_s1i_0p9: smps1 {
565			regulator-name = "vreg_s1i_0p9";
566			regulator-min-microvolt = <900000>;
567			regulator-max-microvolt = <920000>;
568			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
569		};
570
571		vreg_s2i_1p0: smps2 {
572			regulator-name = "vreg_s2i_1p0";
573			regulator-min-microvolt = <1000000>;
574			regulator-max-microvolt = <1100000>;
575			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
576		};
577
578		vreg_l1i_1p8: ldo1 {
579			regulator-name = "vreg_l1i_1p8";
580			regulator-min-microvolt = <1800000>;
581			regulator-max-microvolt = <1800000>;
582			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
583		};
584
585		vreg_l2i_1p2: ldo2 {
586			regulator-name = "vreg_l2i_1p2";
587			regulator-min-microvolt = <1200000>;
588			regulator-max-microvolt = <1200000>;
589			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
590		};
591
592		vreg_l3i_0p8: ldo3 {
593			regulator-name = "vreg_l3i_0p8";
594			regulator-min-microvolt = <880000>;
595			regulator-max-microvolt = <920000>;
596			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
597		};
598	};
599
600	regulators-7 {
601		compatible = "qcom,pm8550ve-rpmh-regulators";
602		qcom,pmic-id = "j";
603
604		vdd-l1-supply = <&vreg_s1f_0p7>;
605		vdd-l2-supply = <&vreg_s5j_1p2>;
606		vdd-l3-supply = <&vreg_s1f_0p7>;
607		vdd-s5-supply = <&vph_pwr>;
608
609		vreg_s5j_1p2: smps5 {
610			regulator-name = "vreg_s5j_1p2";
611			regulator-min-microvolt = <1256000>;
612			regulator-max-microvolt = <1304000>;
613			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
614		};
615
616		vreg_l1j_0p8: ldo1 {
617			regulator-name = "vreg_l1j_0p8";
618			regulator-min-microvolt = <880000>;
619			regulator-max-microvolt = <920000>;
620			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
621		};
622
623		vreg_l2j_1p2: ldo2 {
624			regulator-name = "vreg_l2j_1p2";
625			regulator-min-microvolt = <1200000>;
626			regulator-max-microvolt = <1200000>;
627			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
628		};
629
630		vreg_l3j_0p8: ldo3 {
631			regulator-name = "vreg_l3j_0p8";
632			regulator-min-microvolt = <880000>;
633			regulator-max-microvolt = <920000>;
634			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
635		};
636	};
637};
638
639&gpu {
640	status = "okay";
641
642	zap-shader {
643		firmware-name = "qcom/x1e80100/gen70500_zap.mbn";
644	};
645};
646
647&i2c0 {
648	clock-frequency = <400000>;
649
650	status = "okay";
651
652	touchpad@15 {
653		compatible = "hid-over-i2c";
654		reg = <0x15>;
655
656		hid-descr-addr = <0x1>;
657		interrupts-extended = <&tlmm 3 IRQ_TYPE_LEVEL_LOW>;
658
659		pinctrl-0 = <&tpad_default>;
660		pinctrl-names = "default";
661
662		wakeup-source;
663	};
664
665	keyboard@3a {
666		compatible = "hid-over-i2c";
667		reg = <0x3a>;
668
669		hid-descr-addr = <0x1>;
670		interrupts-extended = <&tlmm 67 IRQ_TYPE_LEVEL_LOW>;
671
672		pinctrl-0 = <&kybd_default>;
673		pinctrl-names = "default";
674
675		wakeup-source;
676	};
677};
678
679&i2c8 {
680	clock-frequency = <400000>;
681
682	status = "okay";
683
684	touchscreen@10 {
685		compatible = "hid-over-i2c";
686		reg = <0x10>;
687
688		hid-descr-addr = <0x1>;
689		interrupts-extended = <&tlmm 51 IRQ_TYPE_LEVEL_LOW>;
690
691		pinctrl-0 = <&ts0_default>;
692		pinctrl-names = "default";
693	};
694};
695
696&lpass_tlmm {
697	spkr_01_sd_n_active: spkr-01-sd-n-active-state {
698		pins = "gpio12";
699		function = "gpio";
700		drive-strength = <16>;
701		bias-disable;
702		output-low;
703	};
704
705	spkr_23_sd_n_active: spkr-23-sd-n-active-state {
706		pins = "gpio13";
707		function = "gpio";
708		drive-strength = <16>;
709		bias-disable;
710		output-low;
711	};
712};
713
714&lpass_vamacro {
715	pinctrl-0 = <&dmic01_default>, <&dmic23_default>;
716	pinctrl-names = "default";
717
718	vdd-micb-supply = <&vreg_l1b_1p8>;
719	qcom,dmic-sample-rate = <4800000>;
720};
721
722&mdss {
723	status = "okay";
724};
725
726&mdss_dp3 {
727	compatible = "qcom,x1e80100-dp";
728	/delete-property/ #sound-dai-cells;
729
730	status = "okay";
731
732	aux-bus {
733		panel {
734			compatible = "samsung,atna45af01", "samsung,atna33xc20";
735			enable-gpios = <&pmc8380_3_gpios 4 GPIO_ACTIVE_HIGH>;
736			power-supply = <&vreg_edp_3p3>;
737
738			pinctrl-0 = <&edp_bl_en>;
739			pinctrl-names = "default";
740
741			port {
742				edp_panel_in: endpoint {
743					remote-endpoint = <&mdss_dp3_out>;
744				};
745			};
746		};
747	};
748
749	ports {
750		port@1 {
751			reg = <1>;
752			mdss_dp3_out: endpoint {
753				data-lanes = <0 1 2 3>;
754				link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>;
755
756				remote-endpoint = <&edp_panel_in>;
757			};
758		};
759	};
760};
761
762&mdss_dp3_phy {
763	vdda-phy-supply = <&vreg_l3j_0p8>;
764	vdda-pll-supply = <&vreg_l2j_1p2>;
765
766	status = "okay";
767};
768
769&pcie4 {
770	perst-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>;
771	wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>;
772
773	pinctrl-0 = <&pcie4_default>;
774	pinctrl-names = "default";
775
776	status = "okay";
777};
778
779&pcie4_phy {
780	vdda-phy-supply = <&vreg_l3i_0p8>;
781	vdda-pll-supply = <&vreg_l3e_1p2>;
782
783	status = "okay";
784};
785
786&pcie6a {
787	perst-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>;
788	wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>;
789
790	vddpe-3v3-supply = <&vreg_nvme>;
791
792	pinctrl-names = "default";
793	pinctrl-0 = <&pcie6a_default>;
794
795	status = "okay";
796};
797
798&pcie6a_phy {
799	vdda-phy-supply = <&vreg_l1d_0p8>;
800	vdda-pll-supply = <&vreg_l2j_1p2>;
801
802	status = "okay";
803};
804
805&pmc8380_3_gpios {
806	edp_bl_en: edp-bl-en-state {
807		pins = "gpio4";
808		function = "normal";
809		power-source = <1>; /* 1.8V */
810		input-disable;
811		output-enable;
812	};
813};
814
815&qupv3_0 {
816	status = "okay";
817};
818
819&qupv3_1 {
820	status = "okay";
821};
822
823&qupv3_2 {
824	status = "okay";
825};
826
827&remoteproc_adsp {
828	firmware-name = "qcom/x1e80100/adsp.mbn",
829			"qcom/x1e80100/adsp_dtb.mbn";
830
831	status = "okay";
832};
833
834&remoteproc_cdsp {
835	firmware-name = "qcom/x1e80100/cdsp.mbn",
836			"qcom/x1e80100/cdsp_dtb.mbn";
837
838	status = "okay";
839};
840
841&smb2360_0_eusb2_repeater {
842	vdd18-supply = <&vreg_l3d_1p8>;
843	vdd3-supply = <&vreg_l2b_3p0>;
844};
845
846&smb2360_1_eusb2_repeater {
847	vdd18-supply = <&vreg_l3d_1p8>;
848	vdd3-supply = <&vreg_l14b_3p0>;
849};
850
851&smb2360_2_eusb2_repeater {
852	vdd18-supply = <&vreg_l3d_1p8>;
853	vdd3-supply = <&vreg_l8b_3p0>;
854};
855
856&swr0 {
857	status = "okay";
858
859	pinctrl-0 = <&wsa_swr_active>, <&spkr_01_sd_n_active>;
860	pinctrl-names = "default";
861
862	/* WSA8845, Left Woofer */
863	left_woofer: speaker@0,0 {
864		compatible = "sdw20217020400";
865		reg = <0 0>;
866		reset-gpios = <&lpass_tlmm 12 GPIO_ACTIVE_LOW>;
867		#sound-dai-cells = <0>;
868		sound-name-prefix = "WooferLeft";
869		vdd-1p8-supply = <&vreg_l15b_1p8>;
870		vdd-io-supply = <&vreg_l12b_1p2>;
871	};
872
873	/* WSA8845, Left Tweeter */
874	left_tweeter: speaker@0,1 {
875		compatible = "sdw20217020400";
876		reg = <0 1>;
877		reset-gpios = <&lpass_tlmm 12 GPIO_ACTIVE_LOW>;
878		#sound-dai-cells = <0>;
879		sound-name-prefix = "TwitterLeft";
880		vdd-1p8-supply = <&vreg_l15b_1p8>;
881		vdd-io-supply = <&vreg_l12b_1p2>;
882	};
883};
884
885&swr1 {
886	status = "okay";
887
888	/* WCD9385 RX */
889	wcd_rx: codec@0,4 {
890		compatible = "sdw20217010d00";
891		reg = <0 4>;
892		qcom,rx-port-mapping = <1 2 3 4 5>;
893	};
894};
895
896&swr2 {
897	status = "okay";
898
899	/* WCD9385 TX */
900	wcd_tx: codec@0,3 {
901		compatible = "sdw20217010d00";
902		reg = <0 3>;
903		qcom,tx-port-mapping = <2 2 3 4>;
904	};
905};
906
907&swr3 {
908	status = "okay";
909
910	pinctrl-0 = <&wsa2_swr_active>, <&spkr_23_sd_n_active>;
911	pinctrl-names = "default";
912
913	/* WSA8845, Right Woofer */
914	right_woofer: speaker@0,0 {
915		compatible = "sdw20217020400";
916		reg = <0 0>;
917		reset-gpios = <&lpass_tlmm 13 GPIO_ACTIVE_LOW>;
918		#sound-dai-cells = <0>;
919		sound-name-prefix = "WooferRight";
920		vdd-1p8-supply = <&vreg_l15b_1p8>;
921		vdd-io-supply = <&vreg_l12b_1p2>;
922	};
923
924	/* WSA8845, Right Tweeter */
925	right_tweeter: speaker@0,1 {
926		compatible = "sdw20217020400";
927		reg = <0 1>;
928		reset-gpios = <&lpass_tlmm 13 GPIO_ACTIVE_LOW>;
929		#sound-dai-cells = <0>;
930		sound-name-prefix = "TwitterRight";
931		vdd-1p8-supply = <&vreg_l15b_1p8>;
932		vdd-io-supply = <&vreg_l12b_1p2>;
933	};
934};
935
936&tlmm {
937	gpio-reserved-ranges = <34 2>, /* Unused */
938			       <44 4>, /* SPI (TPM) */
939			       <238 1>; /* UFS Reset */
940
941	edp_reg_en: edp-reg-en-state {
942		pins = "gpio70";
943		function = "gpio";
944		drive-strength = <16>;
945		bias-disable;
946	};
947
948	kybd_default: kybd-default-state {
949		pins = "gpio67";
950		function = "gpio";
951		bias-disable;
952	};
953
954	nvme_reg_en: nvme-reg-en-state {
955		pins = "gpio18";
956		function = "gpio";
957		drive-strength = <2>;
958		bias-disable;
959	};
960
961	pcie4_default: pcie4-default-state {
962		clkreq-n-pins {
963			pins = "gpio147";
964			function = "pcie4_clk";
965			drive-strength = <2>;
966			bias-pull-up;
967		};
968
969		perst-n-pins {
970			pins = "gpio146";
971			function = "gpio";
972			drive-strength = <2>;
973			bias-disable;
974		};
975
976		wake-n-pins {
977			pins = "gpio148";
978			function = "gpio";
979			drive-strength = <2>;
980			bias-pull-up;
981		};
982	};
983
984	pcie6a_default: pcie6a-default-state {
985		clkreq-n-pins {
986			pins = "gpio153";
987			function = "pcie6a_clk";
988			drive-strength = <2>;
989			bias-pull-up;
990		};
991
992		perst-n-pins {
993			pins = "gpio152";
994			function = "gpio";
995			drive-strength = <2>;
996			bias-disable;
997		};
998
999		wake-n-pins {
1000			pins = "gpio154";
1001			function = "gpio";
1002			drive-strength = <2>;
1003			bias-pull-up;
1004		};
1005	};
1006
1007	tpad_default: tpad-default-state {
1008		pins = "gpio3";
1009		function = "gpio";
1010		bias-disable;
1011	};
1012
1013	ts0_default: ts0-default-state {
1014		int-n-pins {
1015			pins = "gpio51";
1016			function = "gpio";
1017			bias-disable;
1018		};
1019
1020		reset-n-pins {
1021			pins = "gpio48";
1022			function = "gpio";
1023			output-high;
1024			drive-strength = <16>;
1025		};
1026	};
1027
1028	wcd_default: wcd-reset-n-active-state {
1029		pins = "gpio191";
1030		function = "gpio";
1031		drive-strength = <16>;
1032		bias-disable;
1033		output-low;
1034	};
1035};
1036
1037&uart21 {
1038	compatible = "qcom,geni-debug-uart";
1039	status = "okay";
1040};
1041
1042&usb_1_ss0_hsphy {
1043	vdd-supply = <&vreg_l3j_0p8>;
1044	vdda12-supply = <&vreg_l2j_1p2>;
1045
1046	phys = <&smb2360_0_eusb2_repeater>;
1047
1048	status = "okay";
1049};
1050
1051&usb_1_ss0_qmpphy {
1052	vdda-phy-supply = <&vreg_l3e_1p2>;
1053	vdda-pll-supply = <&vreg_l1j_0p8>;
1054
1055	status = "okay";
1056};
1057
1058&usb_1_ss0 {
1059	status = "okay";
1060};
1061
1062&usb_1_ss0_dwc3 {
1063	dr_mode = "host";
1064};
1065
1066&usb_1_ss0_dwc3_hs {
1067	remote-endpoint = <&pmic_glink_ss0_hs_in>;
1068};
1069
1070&usb_1_ss0_qmpphy_out {
1071	remote-endpoint = <&pmic_glink_ss0_ss_in>;
1072};
1073
1074&usb_1_ss1_hsphy {
1075	vdd-supply = <&vreg_l3j_0p8>;
1076	vdda12-supply = <&vreg_l2j_1p2>;
1077
1078	phys = <&smb2360_1_eusb2_repeater>;
1079
1080	status = "okay";
1081};
1082
1083&usb_1_ss1_qmpphy {
1084	vdda-phy-supply = <&vreg_l3e_1p2>;
1085	vdda-pll-supply = <&vreg_l2d_0p9>;
1086
1087	status = "okay";
1088};
1089
1090&usb_1_ss1 {
1091	status = "okay";
1092};
1093
1094&usb_1_ss1_dwc3 {
1095	dr_mode = "host";
1096};
1097
1098&usb_1_ss1_dwc3_hs {
1099	remote-endpoint = <&pmic_glink_ss1_hs_in>;
1100};
1101
1102&usb_1_ss1_qmpphy_out {
1103	remote-endpoint = <&pmic_glink_ss1_ss_in>;
1104};
1105
1106&usb_1_ss2_hsphy {
1107	vdd-supply = <&vreg_l3j_0p8>;
1108	vdda12-supply = <&vreg_l2j_1p2>;
1109
1110	phys = <&smb2360_2_eusb2_repeater>;
1111
1112	status = "okay";
1113};
1114
1115&usb_1_ss2_qmpphy {
1116	vdda-phy-supply = <&vreg_l3e_1p2>;
1117	vdda-pll-supply = <&vreg_l2d_0p9>;
1118
1119	status = "okay";
1120};
1121
1122&usb_1_ss2 {
1123	status = "okay";
1124};
1125
1126&usb_1_ss2_dwc3 {
1127	dr_mode = "host";
1128};
1129
1130&usb_1_ss2_dwc3_hs {
1131	remote-endpoint = <&pmic_glink_ss2_hs_in>;
1132};
1133
1134&usb_1_ss2_qmpphy_out {
1135	remote-endpoint = <&pmic_glink_ss2_ss_in>;
1136};
1137