1// SPDX-License-Identifier: BSD-3-Clause 2/* 3 * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. 4 */ 5 6/dts-v1/; 7 8#include <dt-bindings/gpio/gpio.h> 9#include <dt-bindings/regulator/qcom,rpmh-regulator.h> 10 11#include "x1e80100.dtsi" 12#include "x1e80100-pmics.dtsi" 13 14/ { 15 model = "Qualcomm Technologies, Inc. X1E001DE Snapdragon Devkit for Windows"; 16 compatible = "qcom,x1e001de-devkit", "qcom,x1e001de", "qcom,x1e80100"; 17 18 aliases { 19 serial0 = &uart21; 20 }; 21 22 wcd938x: audio-codec { 23 compatible = "qcom,wcd9385-codec"; 24 25 pinctrl-names = "default"; 26 pinctrl-0 = <&wcd_default>; 27 28 qcom,micbias1-microvolt = <1800000>; 29 qcom,micbias2-microvolt = <1800000>; 30 qcom,micbias3-microvolt = <1800000>; 31 qcom,micbias4-microvolt = <1800000>; 32 qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000 500000 500000 500000>; 33 qcom,mbhc-headset-vthreshold-microvolt = <1700000>; 34 qcom,mbhc-headphone-vthreshold-microvolt = <50000>; 35 qcom,rx-device = <&wcd_rx>; 36 qcom,tx-device = <&wcd_tx>; 37 38 reset-gpios = <&tlmm 191 GPIO_ACTIVE_LOW>; 39 40 vdd-buck-supply = <&vreg_l15b_1p8>; 41 vdd-rxtx-supply = <&vreg_l15b_1p8>; 42 vdd-io-supply = <&vreg_l15b_1p8>; 43 vdd-mic-bias-supply = <&vreg_bob1>; 44 45 #sound-dai-cells = <1>; 46 }; 47 48 chosen { 49 stdout-path = "serial0:115200n8"; 50 }; 51 52 pmic-glink { 53 compatible = "qcom,x1e80100-pmic-glink", 54 "qcom,sm8550-pmic-glink", 55 "qcom,pmic-glink"; 56 #address-cells = <1>; 57 #size-cells = <0>; 58 orientation-gpios = <&tlmm 121 GPIO_ACTIVE_HIGH>, 59 <&tlmm 123 GPIO_ACTIVE_HIGH>, 60 <&tlmm 125 GPIO_ACTIVE_HIGH>; 61 62 /* Back panel port closer to the RJ45 connector */ 63 connector@0 { 64 compatible = "usb-c-connector"; 65 reg = <0>; 66 power-role = "dual"; 67 data-role = "dual"; 68 69 ports { 70 #address-cells = <1>; 71 #size-cells = <0>; 72 73 port@0 { 74 reg = <0>; 75 76 pmic_glink_ss0_hs_in: endpoint { 77 remote-endpoint = <&usb_1_ss0_dwc3_hs>; 78 }; 79 }; 80 81 port@1 { 82 reg = <1>; 83 84 pmic_glink_ss0_ss_in: endpoint { 85 remote-endpoint = <&retimer_ss0_ss_out>; 86 }; 87 }; 88 89 port@2 { 90 reg = <2>; 91 92 pmic_glink_ss0_con_sbu_in: endpoint { 93 remote-endpoint = <&retimer_ss0_con_sbu_out>; 94 }; 95 }; 96 }; 97 }; 98 99 /* Back panel port closer to the audio jack */ 100 connector@1 { 101 compatible = "usb-c-connector"; 102 reg = <1>; 103 power-role = "dual"; 104 data-role = "host"; 105 106 ports { 107 #address-cells = <1>; 108 #size-cells = <0>; 109 110 port@0 { 111 reg = <0>; 112 113 pmic_glink_ss1_hs_in: endpoint { 114 remote-endpoint = <&usb_1_ss1_dwc3_hs>; 115 }; 116 }; 117 118 port@1 { 119 reg = <1>; 120 121 pmic_glink_ss1_ss_in: endpoint { 122 remote-endpoint = <&retimer_ss1_ss_out>; 123 }; 124 }; 125 126 port@2 { 127 reg = <2>; 128 129 pmic_glink_ss1_con_sbu_in: endpoint { 130 remote-endpoint = <&retimer_ss1_con_sbu_out>; 131 }; 132 }; 133 }; 134 }; 135 136 /* Front panel port */ 137 connector@2 { 138 compatible = "usb-c-connector"; 139 reg = <2>; 140 power-role = "dual"; 141 data-role = "host"; 142 143 ports { 144 #address-cells = <1>; 145 #size-cells = <0>; 146 147 port@0 { 148 reg = <0>; 149 150 pmic_glink_ss2_hs_in: endpoint { 151 remote-endpoint = <&usb_1_ss2_dwc3_hs>; 152 }; 153 }; 154 155 port@1 { 156 reg = <1>; 157 158 pmic_glink_ss2_ss_in: endpoint { 159 remote-endpoint = <&retimer_ss2_ss_out>; 160 }; 161 }; 162 163 port@2 { 164 reg = <2>; 165 166 pmic_glink_ss2_con_sbu_in: endpoint { 167 remote-endpoint = <&retimer_ss2_con_sbu_out>; 168 }; 169 }; 170 }; 171 }; 172 }; 173 174 reserved-memory { 175 linux,cma { 176 compatible = "shared-dma-pool"; 177 size = <0x0 0x8000000>; 178 reusable; 179 linux,cma-default; 180 }; 181 }; 182 183 sound { 184 compatible = "qcom,x1e80100-sndcard"; 185 model = "X1E001DE-DEVKIT"; 186 audio-routing = "IN1_HPHL", "HPHL_OUT", 187 "IN2_HPHR", "HPHR_OUT", 188 "AMIC2", "MIC BIAS2", 189 "TX SWR_INPUT1", "ADC2_OUTPUT"; 190 191 wcd-playback-dai-link { 192 link-name = "WCD Playback"; 193 194 cpu { 195 sound-dai = <&q6apmbedai RX_CODEC_DMA_RX_0>; 196 }; 197 198 codec { 199 sound-dai = <&wcd938x 0>, <&swr1 0>, <&lpass_rxmacro 0>; 200 }; 201 202 platform { 203 sound-dai = <&q6apm>; 204 }; 205 }; 206 207 wcd-capture-dai-link { 208 link-name = "WCD Capture"; 209 210 cpu { 211 sound-dai = <&q6apmbedai TX_CODEC_DMA_TX_3>; 212 }; 213 214 codec { 215 sound-dai = <&wcd938x 1>, <&swr2 1>, <&lpass_txmacro 0>; 216 }; 217 218 platform { 219 sound-dai = <&q6apm>; 220 }; 221 }; 222 }; 223 224 vreg_nvme: regulator-nvme { 225 compatible = "regulator-fixed"; 226 227 regulator-name = "VREG_NVME_3P3"; 228 regulator-min-microvolt = <3300000>; 229 regulator-max-microvolt = <3300000>; 230 231 gpio = <&tlmm 18 GPIO_ACTIVE_HIGH>; 232 enable-active-high; 233 234 pinctrl-names = "default"; 235 pinctrl-0 = <&nvme_reg_en>; 236 237 regulator-boot-on; 238 }; 239 240 vreg_rtmr0_1p15: regulator-rtmr0-1p15 { 241 compatible = "regulator-fixed"; 242 243 regulator-name = "VREG_RTMR0_1P15"; 244 regulator-min-microvolt = <1150000>; 245 regulator-max-microvolt = <1150000>; 246 247 gpio = <&pmc8380_5_gpios 8 GPIO_ACTIVE_HIGH>; 248 enable-active-high; 249 250 pinctrl-0 = <&usb0_pwr_1p15_en>; 251 pinctrl-names = "default"; 252 253 regulator-boot-on; 254 }; 255 256 vreg_rtmr0_1p8: regulator-rtmr0-1p8 { 257 compatible = "regulator-fixed"; 258 259 regulator-name = "VREG_RTMR0_1P8"; 260 regulator-min-microvolt = <1800000>; 261 regulator-max-microvolt = <1800000>; 262 263 gpio = <&pm8550ve_9_gpios 8 GPIO_ACTIVE_HIGH>; 264 enable-active-high; 265 266 pinctrl-0 = <&usb0_1p8_reg_en>; 267 pinctrl-names = "default"; 268 269 regulator-boot-on; 270 }; 271 272 vreg_rtmr0_3p3: regulator-rtmr0-3p3 { 273 compatible = "regulator-fixed"; 274 275 regulator-name = "VREG_RTMR0_3P3"; 276 regulator-min-microvolt = <3300000>; 277 regulator-max-microvolt = <3300000>; 278 279 gpio = <&pm8550_gpios 11 GPIO_ACTIVE_HIGH>; 280 enable-active-high; 281 282 pinctrl-0 = <&usb0_3p3_reg_en>; 283 pinctrl-names = "default"; 284 285 regulator-boot-on; 286 }; 287 288 vreg_rtmr1_1p15: regulator-rtmr1-1p15 { 289 compatible = "regulator-fixed"; 290 291 regulator-name = "VREG_RTMR1_1P15"; 292 regulator-min-microvolt = <1150000>; 293 regulator-max-microvolt = <1150000>; 294 295 gpio = <&tlmm 188 GPIO_ACTIVE_HIGH>; 296 enable-active-high; 297 298 pinctrl-0 = <&rtmr1_1p15_reg_en>; 299 pinctrl-names = "default"; 300 301 regulator-boot-on; 302 }; 303 304 vreg_rtmr1_1p8: regulator-rtmr1-1p8 { 305 compatible = "regulator-fixed"; 306 307 regulator-name = "VREG_RTMR1_1P8"; 308 regulator-min-microvolt = <1800000>; 309 regulator-max-microvolt = <1800000>; 310 311 gpio = <&tlmm 175 GPIO_ACTIVE_HIGH>; 312 enable-active-high; 313 314 pinctrl-0 = <&rtmr1_1p8_reg_en>; 315 pinctrl-names = "default"; 316 317 regulator-boot-on; 318 }; 319 320 vreg_rtmr1_3p3: regulator-rtmr1-3p3 { 321 compatible = "regulator-fixed"; 322 323 regulator-name = "VREG_RTMR1_3P3"; 324 regulator-min-microvolt = <3300000>; 325 regulator-max-microvolt = <3300000>; 326 327 gpio = <&tlmm 186 GPIO_ACTIVE_HIGH>; 328 enable-active-high; 329 330 pinctrl-0 = <&rtmr1_3p3_reg_en>; 331 pinctrl-names = "default"; 332 333 regulator-boot-on; 334 }; 335 336 vreg_rtmr2_1p15: regulator-rtmr2-1p15 { 337 compatible = "regulator-fixed"; 338 339 regulator-name = "VREG_RTMR2_1P15"; 340 regulator-min-microvolt = <1150000>; 341 regulator-max-microvolt = <1150000>; 342 343 gpio = <&tlmm 189 GPIO_ACTIVE_HIGH>; 344 enable-active-high; 345 346 pinctrl-0 = <&rtmr2_1p15_reg_en>; 347 pinctrl-names = "default"; 348 349 regulator-boot-on; 350 }; 351 352 vreg_rtmr2_1p8: regulator-rtmr2-1p8 { 353 compatible = "regulator-fixed"; 354 355 regulator-name = "VREG_RTMR2_1P8"; 356 regulator-min-microvolt = <1800000>; 357 regulator-max-microvolt = <1800000>; 358 359 gpio = <&tlmm 126 GPIO_ACTIVE_HIGH>; 360 enable-active-high; 361 362 pinctrl-0 = <&rtmr2_1p8_reg_en>; 363 pinctrl-names = "default"; 364 365 regulator-boot-on; 366 }; 367 368 vreg_rtmr2_3p3: regulator-rtmr2-3p3 { 369 compatible = "regulator-fixed"; 370 371 regulator-name = "VREG_RTMR2_3P3"; 372 regulator-min-microvolt = <3300000>; 373 regulator-max-microvolt = <3300000>; 374 375 gpio = <&tlmm 187 GPIO_ACTIVE_HIGH>; 376 enable-active-high; 377 378 pinctrl-0 = <&rtmr2_3p3_reg_en>; 379 pinctrl-names = "default"; 380 381 regulator-boot-on; 382 }; 383 384 vph_pwr: regulator-vph-pwr { 385 compatible = "regulator-fixed"; 386 387 regulator-name = "vph_pwr"; 388 regulator-min-microvolt = <3700000>; 389 regulator-max-microvolt = <3700000>; 390 391 regulator-always-on; 392 regulator-boot-on; 393 }; 394 395 vreg_wwan: regulator-wwan { 396 compatible = "regulator-fixed"; 397 398 regulator-name = "SDX_VPH_PWR"; 399 regulator-min-microvolt = <3300000>; 400 regulator-max-microvolt = <3300000>; 401 402 gpio = <&tlmm 221 GPIO_ACTIVE_HIGH>; 403 enable-active-high; 404 405 pinctrl-0 = <&wwan_sw_en>; 406 pinctrl-names = "default"; 407 408 regulator-boot-on; 409 }; 410}; 411 412&apps_rsc { 413 regulators-0 { 414 compatible = "qcom,pm8550-rpmh-regulators"; 415 qcom,pmic-id = "b"; 416 417 vdd-bob1-supply = <&vph_pwr>; 418 vdd-bob2-supply = <&vph_pwr>; 419 vdd-l1-l4-l10-supply = <&vreg_s4c_1p8>; 420 vdd-l2-l13-l14-supply = <&vreg_bob1>; 421 vdd-l5-l16-supply = <&vreg_bob1>; 422 vdd-l6-l7-supply = <&vreg_bob2>; 423 vdd-l8-l9-supply = <&vreg_bob1>; 424 vdd-l12-supply = <&vreg_s5j_1p2>; 425 vdd-l15-supply = <&vreg_s4c_1p8>; 426 vdd-l17-supply = <&vreg_bob2>; 427 428 vreg_bob1: bob1 { 429 regulator-name = "vreg_bob1"; 430 regulator-min-microvolt = <3008000>; 431 regulator-max-microvolt = <3960000>; 432 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 433 }; 434 435 vreg_bob2: bob2 { 436 regulator-name = "vreg_bob2"; 437 regulator-min-microvolt = <2504000>; 438 regulator-max-microvolt = <3008000>; 439 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 440 }; 441 442 vreg_l1b_1p8: ldo1 { 443 regulator-name = "vreg_l1b_1p8"; 444 regulator-min-microvolt = <1800000>; 445 regulator-max-microvolt = <1800000>; 446 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 447 }; 448 449 vreg_l2b_3p0: ldo2 { 450 regulator-name = "vreg_l2b_3p0"; 451 regulator-min-microvolt = <3072000>; 452 regulator-max-microvolt = <3100000>; 453 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 454 }; 455 456 vreg_l4b_1p8: ldo4 { 457 regulator-name = "vreg_l4b_1p8"; 458 regulator-min-microvolt = <1800000>; 459 regulator-max-microvolt = <1800000>; 460 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 461 }; 462 463 vreg_l5b_3p0: ldo5 { 464 regulator-name = "vreg_l5b_3p0"; 465 regulator-min-microvolt = <3000000>; 466 regulator-max-microvolt = <3000000>; 467 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 468 }; 469 470 vreg_l6b_1p8: ldo6 { 471 regulator-name = "vreg_l6b_1p8"; 472 regulator-min-microvolt = <1800000>; 473 regulator-max-microvolt = <2960000>; 474 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 475 }; 476 477 vreg_l7b_2p8: ldo7 { 478 regulator-name = "vreg_l7b_2p8"; 479 regulator-min-microvolt = <2800000>; 480 regulator-max-microvolt = <2800000>; 481 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 482 }; 483 484 vreg_l8b_3p0: ldo8 { 485 regulator-name = "vreg_l8b_3p0"; 486 regulator-min-microvolt = <3072000>; 487 regulator-max-microvolt = <3072000>; 488 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 489 }; 490 491 vreg_l9b_2p9: ldo9 { 492 regulator-name = "vreg_l9b_2p9"; 493 regulator-min-microvolt = <2960000>; 494 regulator-max-microvolt = <2960000>; 495 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 496 }; 497 498 vreg_l10b_1p8: ldo10 { 499 regulator-name = "vreg_l10b_1p8"; 500 regulator-min-microvolt = <1800000>; 501 regulator-max-microvolt = <1800000>; 502 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 503 }; 504 505 vreg_l12b_1p2: ldo12 { 506 regulator-name = "vreg_l12b_1p2"; 507 regulator-min-microvolt = <1200000>; 508 regulator-max-microvolt = <1200000>; 509 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 510 regulator-always-on; 511 }; 512 513 vreg_l13b_3p0: ldo13 { 514 regulator-name = "vreg_l13b_3p0"; 515 regulator-min-microvolt = <3072000>; 516 regulator-max-microvolt = <3100000>; 517 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 518 }; 519 520 vreg_l14b_3p0: ldo14 { 521 regulator-name = "vreg_l14b_3p0"; 522 regulator-min-microvolt = <3072000>; 523 regulator-max-microvolt = <3072000>; 524 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 525 }; 526 527 vreg_l15b_1p8: ldo15 { 528 regulator-name = "vreg_l15b_1p8"; 529 regulator-min-microvolt = <1800000>; 530 regulator-max-microvolt = <1800000>; 531 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 532 regulator-always-on; 533 }; 534 535 vreg_l16b_2p9: ldo16 { 536 regulator-name = "vreg_l16b_2p9"; 537 regulator-min-microvolt = <2912000>; 538 regulator-max-microvolt = <2912000>; 539 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 540 }; 541 542 vreg_l17b_2p5: ldo17 { 543 regulator-name = "vreg_l17b_2p5"; 544 regulator-min-microvolt = <2504000>; 545 regulator-max-microvolt = <2504000>; 546 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 547 }; 548 }; 549 550 regulators-1 { 551 compatible = "qcom,pm8550ve-rpmh-regulators"; 552 qcom,pmic-id = "c"; 553 554 vdd-l1-supply = <&vreg_s5j_1p2>; 555 vdd-l2-supply = <&vreg_s1f_0p7>; 556 vdd-l3-supply = <&vreg_s1f_0p7>; 557 vdd-s4-supply = <&vph_pwr>; 558 559 vreg_s4c_1p8: smps4 { 560 regulator-name = "vreg_s4c_1p8"; 561 regulator-min-microvolt = <1856000>; 562 regulator-max-microvolt = <2000000>; 563 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 564 }; 565 566 vreg_l1c_1p2: ldo1 { 567 regulator-name = "vreg_l1c_1p2"; 568 regulator-min-microvolt = <1200000>; 569 regulator-max-microvolt = <1200000>; 570 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 571 }; 572 573 vreg_l2c_0p8: ldo2 { 574 regulator-name = "vreg_l2c_0p8"; 575 regulator-min-microvolt = <880000>; 576 regulator-max-microvolt = <920000>; 577 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 578 }; 579 580 vreg_l3c_0p8: ldo3 { 581 regulator-name = "vreg_l3c_0p8"; 582 regulator-min-microvolt = <880000>; 583 regulator-max-microvolt = <920000>; 584 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 585 }; 586 }; 587 588 regulators-2 { 589 compatible = "qcom,pmc8380-rpmh-regulators"; 590 qcom,pmic-id = "d"; 591 592 vdd-l1-supply = <&vreg_s1f_0p7>; 593 vdd-l2-supply = <&vreg_s1f_0p7>; 594 vdd-l3-supply = <&vreg_s4c_1p8>; 595 vdd-s1-supply = <&vph_pwr>; 596 597 vreg_l1d_0p8: ldo1 { 598 regulator-name = "vreg_l1d_0p8"; 599 regulator-min-microvolt = <880000>; 600 regulator-max-microvolt = <920000>; 601 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 602 }; 603 604 vreg_l2d_0p9: ldo2 { 605 regulator-name = "vreg_l2d_0p9"; 606 regulator-min-microvolt = <912000>; 607 regulator-max-microvolt = <920000>; 608 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 609 }; 610 611 vreg_l3d_1p8: ldo3 { 612 regulator-name = "vreg_l3d_1p8"; 613 regulator-min-microvolt = <1800000>; 614 regulator-max-microvolt = <1800000>; 615 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 616 }; 617 }; 618 619 regulators-3 { 620 compatible = "qcom,pmc8380-rpmh-regulators"; 621 qcom,pmic-id = "e"; 622 623 vdd-l2-supply = <&vreg_s1f_0p7>; 624 vdd-l3-supply = <&vreg_s5j_1p2>; 625 626 vreg_l2e_0p8: ldo2 { 627 regulator-name = "vreg_l2e_0p8"; 628 regulator-min-microvolt = <880000>; 629 regulator-max-microvolt = <920000>; 630 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 631 }; 632 633 vreg_l3e_1p2: ldo3 { 634 regulator-name = "vreg_l3e_1p2"; 635 regulator-min-microvolt = <1200000>; 636 regulator-max-microvolt = <1200000>; 637 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 638 }; 639 }; 640 641 regulators-4 { 642 compatible = "qcom,pmc8380-rpmh-regulators"; 643 qcom,pmic-id = "f"; 644 645 vdd-l1-supply = <&vreg_s5j_1p2>; 646 vdd-l2-supply = <&vreg_s5j_1p2>; 647 vdd-l3-supply = <&vreg_s5j_1p2>; 648 vdd-s1-supply = <&vph_pwr>; 649 650 vreg_s1f_0p7: smps1 { 651 regulator-name = "vreg_s1f_0p7"; 652 regulator-min-microvolt = <700000>; 653 regulator-max-microvolt = <1100000>; 654 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 655 }; 656 657 vreg_l1f_1p0: ldo1 { 658 regulator-name = "vreg_l1f_1p0"; 659 regulator-min-microvolt = <1024000>; 660 regulator-max-microvolt = <1024000>; 661 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 662 }; 663 664 vreg_l2f_1p0: ldo2 { 665 regulator-name = "vreg_l2f_1p0"; 666 regulator-min-microvolt = <1024000>; 667 regulator-max-microvolt = <1024000>; 668 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 669 }; 670 671 vreg_l3f_1p0: ldo3 { 672 regulator-name = "vreg_l3f_1p0"; 673 regulator-min-microvolt = <1024000>; 674 regulator-max-microvolt = <1024000>; 675 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 676 }; 677 }; 678 679 regulators-6 { 680 compatible = "qcom,pm8550ve-rpmh-regulators"; 681 qcom,pmic-id = "i"; 682 683 vdd-l1-supply = <&vreg_s4c_1p8>; 684 vdd-l2-supply = <&vreg_s5j_1p2>; 685 vdd-l3-supply = <&vreg_s1f_0p7>; 686 vdd-s1-supply = <&vph_pwr>; 687 vdd-s2-supply = <&vph_pwr>; 688 689 vreg_s1i_0p9: smps1 { 690 regulator-name = "vreg_s1i_0p9"; 691 regulator-min-microvolt = <900000>; 692 regulator-max-microvolt = <920000>; 693 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 694 }; 695 696 vreg_s2i_1p0: smps2 { 697 regulator-name = "vreg_s2i_1p0"; 698 regulator-min-microvolt = <1000000>; 699 regulator-max-microvolt = <1100000>; 700 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 701 }; 702 703 vreg_l1i_1p8: ldo1 { 704 regulator-name = "vreg_l1i_1p8"; 705 regulator-min-microvolt = <1800000>; 706 regulator-max-microvolt = <1800000>; 707 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 708 }; 709 710 vreg_l2i_1p2: ldo2 { 711 regulator-name = "vreg_l2i_1p2"; 712 regulator-min-microvolt = <1200000>; 713 regulator-max-microvolt = <1200000>; 714 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 715 }; 716 717 vreg_l3i_0p8: ldo3 { 718 regulator-name = "vreg_l3i_0p8"; 719 regulator-min-microvolt = <880000>; 720 regulator-max-microvolt = <920000>; 721 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 722 }; 723 }; 724 725 regulators-7 { 726 compatible = "qcom,pm8550ve-rpmh-regulators"; 727 qcom,pmic-id = "j"; 728 729 vdd-l1-supply = <&vreg_s1f_0p7>; 730 vdd-l2-supply = <&vreg_s5j_1p2>; 731 vdd-l3-supply = <&vreg_s1f_0p7>; 732 vdd-s5-supply = <&vph_pwr>; 733 734 vreg_s5j_1p2: smps5 { 735 regulator-name = "vreg_s5j_1p2"; 736 regulator-min-microvolt = <1256000>; 737 regulator-max-microvolt = <1304000>; 738 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 739 }; 740 741 vreg_l1j_0p8: ldo1 { 742 regulator-name = "vreg_l1j_0p8"; 743 regulator-min-microvolt = <880000>; 744 regulator-max-microvolt = <920000>; 745 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 746 }; 747 748 vreg_l2j_1p2: ldo2 { 749 regulator-name = "vreg_l2j_1p2"; 750 regulator-min-microvolt = <1256000>; 751 regulator-max-microvolt = <1256000>; 752 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 753 }; 754 755 vreg_l3j_0p8: ldo3 { 756 regulator-name = "vreg_l3j_0p8"; 757 regulator-min-microvolt = <880000>; 758 regulator-max-microvolt = <920000>; 759 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 760 }; 761 }; 762}; 763 764&gpu { 765 status = "okay"; 766 767 zap-shader { 768 firmware-name = "qcom/x1e80100/Thundercomm/DEVKIT/qcdxkmsuc8380.mbn"; 769 }; 770}; 771 772&i2c1 { 773 clock-frequency = <400000>; 774 775 status = "okay"; 776 777 typec-mux@8 { 778 compatible = "parade,ps8830"; 779 reg = <0x08>; 780 781 clocks = <&rpmhcc RPMH_RF_CLK5>; 782 783 vdd-supply = <&vreg_rtmr2_1p15>; 784 vdd33-supply = <&vreg_rtmr2_3p3>; 785 vdd33-cap-supply = <&vreg_rtmr2_3p3>; 786 vddar-supply = <&vreg_rtmr2_1p15>; 787 vddat-supply = <&vreg_rtmr2_1p15>; 788 vddio-supply = <&vreg_rtmr2_1p8>; 789 790 reset-gpios = <&tlmm 185 GPIO_ACTIVE_LOW>; 791 792 pinctrl-0 = <&rtmr2_default>; 793 pinctrl-names = "default"; 794 795 orientation-switch; 796 retimer-switch; 797 798 ports { 799 #address-cells = <1>; 800 #size-cells = <0>; 801 802 port@0 { 803 reg = <0>; 804 805 retimer_ss2_ss_out: endpoint { 806 remote-endpoint = <&pmic_glink_ss2_ss_in>; 807 }; 808 }; 809 810 port@1 { 811 reg = <1>; 812 813 retimer_ss2_ss_in: endpoint { 814 remote-endpoint = <&usb_1_ss2_qmpphy_out>; 815 }; 816 }; 817 818 port@2 { 819 reg = <2>; 820 821 retimer_ss2_con_sbu_out: endpoint { 822 remote-endpoint = <&pmic_glink_ss2_con_sbu_in>; 823 }; 824 }; 825 }; 826 }; 827}; 828 829&i2c3 { 830 clock-frequency = <400000>; 831 832 status = "okay"; 833 834 typec-mux@8 { 835 compatible = "parade,ps8830"; 836 reg = <0x08>; 837 838 clocks = <&rpmhcc RPMH_RF_CLK3>; 839 840 vdd-supply = <&vreg_rtmr0_1p15>; 841 vdd33-supply = <&vreg_rtmr0_3p3>; 842 vdd33-cap-supply = <&vreg_rtmr0_3p3>; 843 vddar-supply = <&vreg_rtmr0_1p15>; 844 vddat-supply = <&vreg_rtmr0_1p15>; 845 vddio-supply = <&vreg_rtmr0_1p8>; 846 847 reset-gpios = <&pm8550_gpios 10 GPIO_ACTIVE_LOW>; 848 849 pinctrl-0 = <&rtmr0_default>; 850 pinctrl-names = "default"; 851 852 retimer-switch; 853 orientation-switch; 854 855 ports { 856 #address-cells = <1>; 857 #size-cells = <0>; 858 859 port@0 { 860 reg = <0>; 861 862 retimer_ss0_ss_out: endpoint { 863 remote-endpoint = <&pmic_glink_ss0_ss_in>; 864 }; 865 }; 866 867 port@1 { 868 reg = <1>; 869 870 retimer_ss0_ss_in: endpoint { 871 remote-endpoint = <&usb_1_ss0_qmpphy_out>; 872 }; 873 }; 874 875 port@2 { 876 reg = <2>; 877 878 retimer_ss0_con_sbu_out: endpoint { 879 remote-endpoint = <&pmic_glink_ss0_con_sbu_in>; 880 }; 881 }; 882 }; 883 }; 884}; 885 886&i2c5 { 887 clock-frequency = <400000>; 888 889 status = "okay"; 890 891 eusb3_repeater: redriver@47 { 892 compatible = "nxp,ptn3222"; 893 reg = <0x47>; 894 #phy-cells = <0>; 895 896 vdd3v3-supply = <&vreg_l13b_3p0>; 897 vdd1v8-supply = <&vreg_l4b_1p8>; 898 899 reset-gpios = <&tlmm 6 GPIO_ACTIVE_LOW>; 900 901 pinctrl-0 = <&eusb3_reset_n>; 902 pinctrl-names = "default"; 903 }; 904 905 eusb6_repeater: redriver@4f { 906 compatible = "nxp,ptn3222"; 907 reg = <0x4f>; 908 #phy-cells = <0>; 909 910 vdd3v3-supply = <&vreg_l13b_3p0>; 911 vdd1v8-supply = <&vreg_l4b_1p8>; 912 913 reset-gpios = <&tlmm 184 GPIO_ACTIVE_LOW>; 914 915 pinctrl-0 = <&eusb6_reset_n>; 916 pinctrl-names = "default"; 917 }; 918}; 919 920&i2c7 { 921 clock-frequency = <400000>; 922 923 status = "okay"; 924 925 typec-mux@8 { 926 compatible = "parade,ps8830"; 927 reg = <0x8>; 928 929 clocks = <&rpmhcc RPMH_RF_CLK4>; 930 931 vdd-supply = <&vreg_rtmr1_1p15>; 932 vdd33-supply = <&vreg_rtmr1_3p3>; 933 vdd33-cap-supply = <&vreg_rtmr1_3p3>; 934 vddar-supply = <&vreg_rtmr1_1p15>; 935 vddat-supply = <&vreg_rtmr1_1p15>; 936 vddio-supply = <&vreg_rtmr1_1p8>; 937 938 reset-gpios = <&tlmm 176 GPIO_ACTIVE_LOW>; 939 940 pinctrl-0 = <&rtmr1_default>; 941 pinctrl-names = "default"; 942 943 retimer-switch; 944 orientation-switch; 945 946 ports { 947 #address-cells = <1>; 948 #size-cells = <0>; 949 950 port@0 { 951 reg = <0>; 952 953 retimer_ss1_ss_out: endpoint { 954 remote-endpoint = <&pmic_glink_ss1_ss_in>; 955 }; 956 }; 957 958 port@1 { 959 reg = <1>; 960 961 retimer_ss1_ss_in: endpoint { 962 remote-endpoint = <&usb_1_ss1_qmpphy_out>; 963 }; 964 }; 965 966 port@2 { 967 reg = <2>; 968 969 retimer_ss1_con_sbu_out: endpoint { 970 remote-endpoint = <&pmic_glink_ss1_con_sbu_in>; 971 }; 972 }; 973 }; 974 }; 975}; 976 977&mdss { 978 status = "okay"; 979}; 980 981&mdss_dp0 { 982 status = "okay"; 983}; 984 985&mdss_dp0_out { 986 link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>; 987}; 988 989&mdss_dp1 { 990 status = "okay"; 991}; 992 993&mdss_dp1_out { 994 link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>; 995}; 996 997&mdss_dp2 { 998 status = "okay"; 999}; 1000 1001&mdss_dp2_out { 1002 link-frequencies = /bits/ 64 <1620000000 2700000000 5400000000 8100000000>; 1003}; 1004 1005&pcie4 { 1006 perst-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>; 1007 wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>; 1008 1009 pinctrl-0 = <&pcie4_default>; 1010 pinctrl-names = "default"; 1011 1012 status = "okay"; 1013}; 1014 1015&pcie4_phy { 1016 vdda-phy-supply = <&vreg_l3i_0p8>; 1017 vdda-pll-supply = <&vreg_l3e_1p2>; 1018 1019 status = "okay"; 1020}; 1021 1022&pcie5 { 1023 perst-gpios = <&tlmm 149 GPIO_ACTIVE_LOW>; 1024 wake-gpios = <&tlmm 151 GPIO_ACTIVE_LOW>; 1025 1026 vddpe-3v3-supply = <&vreg_wwan>; 1027 1028 pinctrl-0 = <&pcie5_default>; 1029 pinctrl-names = "default"; 1030 1031 status = "okay"; 1032}; 1033 1034&pcie5_phy { 1035 vdda-phy-supply = <&vreg_l3i_0p8>; 1036 vdda-pll-supply = <&vreg_l3e_1p2>; 1037 1038 status = "okay"; 1039}; 1040 1041&pcie6a { 1042 perst-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>; 1043 wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>; 1044 1045 vddpe-3v3-supply = <&vreg_nvme>; 1046 1047 pinctrl-names = "default"; 1048 pinctrl-0 = <&pcie6a_default>; 1049 1050 status = "okay"; 1051}; 1052 1053&pcie6a_phy { 1054 vdda-phy-supply = <&vreg_l1d_0p8>; 1055 vdda-pll-supply = <&vreg_l2j_1p2>; 1056 1057 status = "okay"; 1058}; 1059 1060&pm8550_gpios { 1061 rtmr0_default: rtmr0-reset-n-active-state { 1062 pins = "gpio10"; 1063 function = "normal"; 1064 power-source = <1>; /* 1.8 V */ 1065 bias-disable; 1066 input-disable; 1067 output-enable; 1068 }; 1069 1070 usb0_3p3_reg_en: usb0-3p3-reg-en-state { 1071 pins = "gpio11"; 1072 function = "normal"; 1073 power-source = <1>; /* 1.8 V */ 1074 bias-disable; 1075 input-disable; 1076 output-enable; 1077 }; 1078}; 1079 1080&pmc8380_5_gpios { 1081 usb0_pwr_1p15_en: usb0-pwr-1p15-en-state { 1082 pins = "gpio8"; 1083 function = "normal"; 1084 power-source = <1>; /* 1.8 V */ 1085 bias-disable; 1086 input-disable; 1087 output-enable; 1088 }; 1089}; 1090 1091&pm8550ve_9_gpios { 1092 usb0_1p8_reg_en: usb0-1p8-reg-en-state { 1093 pins = "gpio8"; 1094 function = "normal"; 1095 power-source = <1>; /* 1.8 V */ 1096 bias-disable; 1097 input-disable; 1098 output-enable; 1099 }; 1100}; 1101 1102&qupv3_0 { 1103 status = "okay"; 1104}; 1105 1106&qupv3_1 { 1107 status = "okay"; 1108}; 1109 1110&qupv3_2 { 1111 status = "okay"; 1112}; 1113 1114&remoteproc_adsp { 1115 firmware-name = "qcom/x1e80100/Thundercomm/DEVKIT/qcadsp8380.mbn", 1116 "qcom/x1e80100/Thundercomm/DEVKIT/adsp_dtbs.elf"; 1117 1118 status = "okay"; 1119}; 1120 1121&remoteproc_cdsp { 1122 firmware-name = "qcom/x1e80100/Thundercomm/DEVKIT/qccdsp8380.mbn", 1123 "qcom/x1e80100/Thundercomm/DEVKIT/cdsp_dtbs.elf"; 1124 1125 status = "okay"; 1126}; 1127 1128&sdhc_2 { 1129 cd-gpios = <&tlmm 71 GPIO_ACTIVE_LOW>; 1130 pinctrl-0 = <&sdc2_default &sdc2_card_det_n>; 1131 pinctrl-1 = <&sdc2_sleep &sdc2_card_det_n>; 1132 pinctrl-names = "default", "sleep"; 1133 vmmc-supply = <&vreg_l9b_2p9>; 1134 vqmmc-supply = <&vreg_l6b_1p8>; 1135 bus-width = <4>; 1136 no-sdio; 1137 no-mmc; 1138 status = "okay"; 1139}; 1140 1141&smb2360_0 { 1142 status = "okay"; 1143}; 1144 1145&smb2360_0_eusb2_repeater { 1146 vdd18-supply = <&vreg_l3d_1p8>; 1147 vdd3-supply = <&vreg_l2b_3p0>; 1148}; 1149 1150&smb2360_1 { 1151 status = "okay"; 1152}; 1153 1154&smb2360_1_eusb2_repeater { 1155 vdd18-supply = <&vreg_l3d_1p8>; 1156 vdd3-supply = <&vreg_l14b_3p0>; 1157}; 1158 1159&smb2360_2 { 1160 status = "okay"; 1161}; 1162 1163&smb2360_2_eusb2_repeater { 1164 vdd18-supply = <&vreg_l3d_1p8>; 1165 vdd3-supply = <&vreg_l8b_3p0>; 1166}; 1167 1168&swr1 { 1169 status = "okay"; 1170 1171 /* WCD9385 RX */ 1172 wcd_rx: codec@0,4 { 1173 compatible = "sdw20217010d00"; 1174 reg = <0 4>; 1175 qcom,rx-port-mapping = <1 2 3 4 5>; 1176 }; 1177}; 1178 1179&swr2 { 1180 status = "okay"; 1181 1182 /* WCD9385 TX */ 1183 wcd_tx: codec@0,3 { 1184 compatible = "sdw20217010d00"; 1185 reg = <0 3>; 1186 qcom,tx-port-mapping = <2 2 3 4>; 1187 }; 1188}; 1189 1190&tlmm { 1191 gpio-reserved-ranges = <44 4>; /* SPI (TPM) */ 1192 1193 eusb3_reset_n: eusb3-reset-n-state { 1194 pins = "gpio6"; 1195 function = "gpio"; 1196 drive-strength = <2>; 1197 bias-disable; 1198 output-low; 1199 }; 1200 1201 eusb6_reset_n: eusb6-reset-n-state { 1202 pins = "gpio184"; 1203 function = "gpio"; 1204 drive-strength = <2>; 1205 bias-disable; 1206 output-low; 1207 }; 1208 1209 nvme_reg_en: nvme-reg-en-state { 1210 pins = "gpio18"; 1211 function = "gpio"; 1212 drive-strength = <2>; 1213 bias-disable; 1214 }; 1215 1216 pcie4_default: pcie4-default-state { 1217 clkreq-n-pins { 1218 pins = "gpio147"; 1219 function = "pcie4_clk"; 1220 drive-strength = <2>; 1221 bias-pull-up; 1222 }; 1223 1224 perst-n-pins { 1225 pins = "gpio146"; 1226 function = "gpio"; 1227 drive-strength = <2>; 1228 bias-disable; 1229 }; 1230 1231 wake-n-pins { 1232 pins = "gpio148"; 1233 function = "gpio"; 1234 drive-strength = <2>; 1235 bias-pull-up; 1236 }; 1237 }; 1238 1239 pcie5_default: pcie5-default-state { 1240 clkreq-n-pins { 1241 pins = "gpio150"; 1242 function = "pcie5_clk"; 1243 drive-strength = <2>; 1244 bias-pull-up; 1245 }; 1246 1247 perst-n-pins { 1248 pins = "gpio149"; 1249 function = "gpio"; 1250 drive-strength = <2>; 1251 bias-disable; 1252 }; 1253 1254 wake-n-pins { 1255 pins = "gpio151"; 1256 function = "gpio"; 1257 drive-strength = <2>; 1258 bias-pull-up; 1259 }; 1260 }; 1261 1262 pcie6a_default: pcie6a-default-state { 1263 clkreq-n-pins { 1264 pins = "gpio153"; 1265 function = "pcie6a_clk"; 1266 drive-strength = <2>; 1267 bias-pull-up; 1268 }; 1269 1270 perst-n-pins { 1271 pins = "gpio152"; 1272 function = "gpio"; 1273 drive-strength = <2>; 1274 bias-disable; 1275 }; 1276 1277 wake-n-pins { 1278 pins = "gpio154"; 1279 function = "gpio"; 1280 drive-strength = <2>; 1281 bias-pull-up; 1282 }; 1283 }; 1284 1285 rtmr1_default: rtmr1-reset-n-active-state { 1286 pins = "gpio176"; 1287 function = "gpio"; 1288 drive-strength = <2>; 1289 bias-disable; 1290 }; 1291 1292 rtmr2_default: rtmr2-reset-n-active-state { 1293 pins = "gpio185"; 1294 function = "gpio"; 1295 drive-strength = <2>; 1296 bias-disable; 1297 }; 1298 1299 rtmr1_1p15_reg_en: rtmr1-1p15-reg-en-state { 1300 pins = "gpio188"; 1301 function = "gpio"; 1302 drive-strength = <2>; 1303 bias-disable; 1304 }; 1305 1306 rtmr1_1p8_reg_en: rtmr1-1p8-reg-en-state { 1307 pins = "gpio175"; 1308 function = "gpio"; 1309 drive-strength = <2>; 1310 bias-disable; 1311 }; 1312 1313 rtmr1_3p3_reg_en: rtmr1-3p3-reg-en-state { 1314 pins = "gpio186"; 1315 function = "gpio"; 1316 drive-strength = <2>; 1317 bias-disable; 1318 }; 1319 1320 rtmr2_1p15_reg_en: rtmr2-1p15-reg-en-state { 1321 pins = "gpio189"; 1322 function = "gpio"; 1323 drive-strength = <2>; 1324 bias-disable; 1325 }; 1326 1327 rtmr2_1p8_reg_en: rtmr2-1p8-reg-en-state { 1328 pins = "gpio126"; 1329 function = "gpio"; 1330 drive-strength = <2>; 1331 bias-disable; 1332 }; 1333 1334 rtmr2_3p3_reg_en: rtmr2-3p3-reg-en-state { 1335 pins = "gpio187"; 1336 function = "gpio"; 1337 drive-strength = <2>; 1338 bias-disable; 1339 }; 1340 1341 sdc2_card_det_n: sdc2-card-det-state { 1342 pins = "gpio71"; 1343 function = "gpio"; 1344 drive-strength = <2>; 1345 bias-pull-up; 1346 }; 1347 1348 wcd_default: wcd-reset-n-active-state { 1349 pins = "gpio191"; 1350 function = "gpio"; 1351 drive-strength = <16>; 1352 bias-disable; 1353 output-low; 1354 }; 1355 1356 wwan_sw_en: wwan-sw-en-state { 1357 pins = "gpio221"; 1358 function = "gpio"; 1359 drive-strength = <4>; 1360 bias-disable; 1361 }; 1362}; 1363 1364&uart21 { 1365 compatible = "qcom,geni-debug-uart"; 1366 status = "okay"; 1367}; 1368 1369&usb_1_ss0_hsphy { 1370 vdd-supply = <&vreg_l3j_0p8>; 1371 vdda12-supply = <&vreg_l2j_1p2>; 1372 1373 phys = <&smb2360_0_eusb2_repeater>; 1374 1375 status = "okay"; 1376}; 1377 1378&usb_1_ss0_qmpphy { 1379 vdda-phy-supply = <&vreg_l2j_1p2>; 1380 vdda-pll-supply = <&vreg_l1j_0p8>; 1381 1382 status = "okay"; 1383}; 1384 1385&usb_1_ss0 { 1386 status = "okay"; 1387}; 1388 1389&usb_1_ss0_dwc3 { 1390 dr_mode = "otg"; 1391 usb-role-switch; 1392}; 1393 1394&usb_1_ss0_dwc3_hs { 1395 remote-endpoint = <&pmic_glink_ss0_hs_in>; 1396}; 1397 1398&usb_1_ss0_qmpphy_out { 1399 remote-endpoint = <&retimer_ss0_ss_in>; 1400}; 1401 1402&usb_1_ss1_hsphy { 1403 vdd-supply = <&vreg_l3j_0p8>; 1404 vdda12-supply = <&vreg_l2j_1p2>; 1405 1406 phys = <&smb2360_1_eusb2_repeater>; 1407 1408 status = "okay"; 1409}; 1410 1411&usb_1_ss1_qmpphy { 1412 vdda-phy-supply = <&vreg_l2j_1p2>; 1413 vdda-pll-supply = <&vreg_l2d_0p9>; 1414 1415 status = "okay"; 1416}; 1417 1418&usb_1_ss1 { 1419 status = "okay"; 1420}; 1421 1422&usb_1_ss1_dwc3 { 1423 dr_mode = "host"; 1424}; 1425 1426&usb_1_ss1_dwc3_hs { 1427 remote-endpoint = <&pmic_glink_ss1_hs_in>; 1428}; 1429 1430&usb_1_ss1_qmpphy_out { 1431 remote-endpoint = <&retimer_ss1_ss_in>; 1432}; 1433 1434&usb_1_ss2_hsphy { 1435 vdd-supply = <&vreg_l3j_0p8>; 1436 vdda12-supply = <&vreg_l2j_1p2>; 1437 1438 phys = <&smb2360_2_eusb2_repeater>; 1439 1440 status = "okay"; 1441}; 1442 1443&usb_1_ss2_qmpphy { 1444 vdda-phy-supply = <&vreg_l2j_1p2>; 1445 vdda-pll-supply = <&vreg_l2d_0p9>; 1446 1447 status = "okay"; 1448}; 1449 1450&usb_1_ss2 { 1451 status = "okay"; 1452}; 1453 1454&usb_1_ss2_dwc3 { 1455 dr_mode = "host"; 1456}; 1457 1458&usb_1_ss2_dwc3_hs { 1459 remote-endpoint = <&pmic_glink_ss2_hs_in>; 1460}; 1461 1462&usb_1_ss2_qmpphy_out { 1463 remote-endpoint = <&retimer_ss2_ss_in>; 1464}; 1465 1466&usb_mp { 1467 status = "okay"; 1468}; 1469 1470&usb_mp_hsphy0 { 1471 vdd-supply = <&vreg_l2e_0p8>; 1472 vdda12-supply = <&vreg_l3e_1p2>; 1473 1474 phys = <&eusb3_repeater>; 1475 1476 status = "okay"; 1477}; 1478 1479&usb_mp_hsphy1 { 1480 vdd-supply = <&vreg_l2e_0p8>; 1481 vdda12-supply = <&vreg_l3e_1p2>; 1482 1483 phys = <&eusb6_repeater>; 1484 1485 status = "okay"; 1486}; 1487 1488&usb_mp_qmpphy0 { 1489 vdda-phy-supply = <&vreg_l3e_1p2>; 1490 vdda-pll-supply = <&vreg_l3c_0p8>; 1491 1492 status = "okay"; 1493}; 1494 1495&usb_mp_qmpphy1 { 1496 vdda-phy-supply = <&vreg_l3e_1p2>; 1497 vdda-pll-supply = <&vreg_l3c_0p8>; 1498 1499 status = "okay"; 1500}; 1501