xref: /linux/arch/arm64/boot/dts/qcom/sm8650-hdk.dts (revision fcc79e1714e8c2b8e216dc3149812edd37884eef)
1// SPDX-License-Identifier: BSD-3-Clause
2/*
3 * Copyright (c) 2024, Linaro Limited
4 */
5
6/dts-v1/;
7
8#include <dt-bindings/leds/common.h>
9#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
10#include "sm8650.dtsi"
11#include "pm8010.dtsi"
12#include "pm8550.dtsi"
13#include "pm8550b.dtsi"
14#define PMK8550VE_SID 8
15#include "pm8550ve.dtsi"
16#include "pm8550vs.dtsi"
17#include "pmk8550.dtsi"
18
19/ {
20	model = "Qualcomm Technologies, Inc. SM8650 HDK";
21	compatible = "qcom,sm8650-hdk", "qcom,sm8650";
22	chassis-type = "embedded";
23
24	aliases {
25		serial0 = &uart15;
26		serial1 = &uart14;
27	};
28
29	chosen {
30		stdout-path = "serial0:115200n8";
31	};
32
33	hdmi-out {
34		compatible = "hdmi-connector";
35		type = "a";
36
37		port {
38			hdmi_connector_out: endpoint {
39				remote-endpoint = <&lt9611_out>;
40			};
41		};
42	};
43
44	gpio-keys {
45		compatible = "gpio-keys";
46
47		pinctrl-0 = <&volume_up_n>;
48		pinctrl-names = "default";
49
50		key-volume-up {
51			label = "Volume Up";
52			linux,code = <KEY_VOLUMEUP>;
53			gpios = <&pm8550_gpios 6 GPIO_ACTIVE_LOW>;
54			debounce-interval = <15>;
55			linux,can-disable;
56			wakeup-source;
57		};
58	};
59
60	leds {
61		compatible = "gpio-leds";
62
63		led-0 {
64			function = LED_FUNCTION_BLUETOOTH;
65			color = <LED_COLOR_ID_BLUE>;
66			gpios = <&pm8550_gpios 11 GPIO_ACTIVE_HIGH>;
67			linux,default-trigger = "bluetooth-power";
68			default-state = "off";
69		};
70
71		led-1 {
72			function = LED_FUNCTION_INDICATOR;
73			color = <LED_COLOR_ID_GREEN>;
74			gpios = <&pm8550b_gpios 9 GPIO_ACTIVE_HIGH>;
75			default-state = "off";
76			panic-indicator;
77		};
78
79		led-2 {
80			function = LED_FUNCTION_WLAN;
81			color = <LED_COLOR_ID_ORANGE>;
82			gpios = <&pm8550b_gpios 10 GPIO_ACTIVE_HIGH>;
83			linux,default-trigger = "phy0tx";
84			default-state = "off";
85		};
86	};
87
88	pmic-glink {
89		compatible = "qcom,sm8650-pmic-glink",
90			     "qcom,sm8550-pmic-glink",
91			     "qcom,pmic-glink";
92		#address-cells = <1>;
93		#size-cells = <0>;
94		orientation-gpios = <&tlmm 29 GPIO_ACTIVE_HIGH>;
95
96		connector@0 {
97			compatible = "usb-c-connector";
98			reg = <0>;
99
100			power-role = "dual";
101			data-role = "dual";
102
103			ports {
104				#address-cells = <1>;
105				#size-cells = <0>;
106
107				port@0 {
108					reg = <0>;
109
110					pmic_glink_hs_in: endpoint {
111						remote-endpoint = <&usb_1_dwc3_hs>;
112					};
113				};
114
115				port@1 {
116					reg = <1>;
117
118					pmic_glink_ss_in: endpoint {
119						remote-endpoint = <&usb_dp_qmpphy_out>;
120					};
121				};
122
123				port@2 {
124					reg = <2>;
125
126					pmic_glink_sbu: endpoint {
127						remote-endpoint = <&wcd_usbss_sbu_mux>;
128				    };
129				};
130			};
131		};
132	};
133
134	lt9611_1v2: regulator-lt9611-1v2 {
135		compatible = "regulator-fixed";
136
137		regulator-name = "LT9611_1V2";
138		regulator-min-microvolt = <1200000>;
139		regulator-max-microvolt = <1200000>;
140
141		vin-supply = <&vph_pwr>;
142		gpio = <&tlmm 79 GPIO_ACTIVE_HIGH>;
143
144		enable-active-high;
145	};
146
147	lt9611_3v3: regulator-lt9611-3v3 {
148		compatible = "regulator-fixed";
149
150		regulator-name = "LT9611_3V3";
151		regulator-min-microvolt = <3300000>;
152		regulator-max-microvolt = <3300000>;
153
154		vin-supply = <&vreg_bob_3v3>;
155		gpio = <&tlmm 78 GPIO_ACTIVE_HIGH>;
156
157		enable-active-high;
158	};
159
160	sound {
161		compatible = "qcom,sm8650-sndcard", "qcom,sm8450-sndcard";
162		model = "SM8650-HDK";
163		audio-routing = "SpkrLeft IN", "WSA_SPK1 OUT",
164				"SpkrRight IN", "WSA_SPK2 OUT",
165				"IN1_HPHL", "HPHL_OUT",
166				"IN2_HPHR", "HPHR_OUT",
167				"AMIC1", "MIC BIAS1",
168				"AMIC2", "MIC BIAS2",
169				"AMIC5", "MIC BIAS4",
170				"TX SWR_INPUT0", "ADC1_OUTPUT",
171				"TX SWR_INPUT1", "ADC2_OUTPUT",
172				"TX SWR_INPUT3", "ADC4_OUTPUT";
173
174		wcd-playback-dai-link {
175			link-name = "WCD Playback";
176
177			cpu {
178				sound-dai = <&q6apmbedai RX_CODEC_DMA_RX_0>;
179			};
180
181			codec {
182				sound-dai = <&wcd939x 0>, <&swr1 0>, <&lpass_rxmacro 0>;
183			};
184
185			platform {
186				sound-dai = <&q6apm>;
187			};
188		};
189
190		wcd-capture-dai-link {
191			link-name = "WCD Capture";
192
193			cpu {
194				sound-dai = <&q6apmbedai TX_CODEC_DMA_TX_3>;
195			};
196
197			codec {
198				sound-dai = <&wcd939x 1>, <&swr2 0>, <&lpass_txmacro 0>;
199			};
200
201			platform {
202				sound-dai = <&q6apm>;
203			};
204		};
205
206		wsa-dai-link {
207			link-name = "WSA Playback";
208
209			cpu {
210				sound-dai = <&q6apmbedai WSA_CODEC_DMA_RX_0>;
211			};
212
213			codec {
214				sound-dai = <&north_spkr>, <&south_spkr>, <&swr0 0>, <&lpass_wsamacro 0>;
215			};
216
217			platform {
218				sound-dai = <&q6apm>;
219			};
220		};
221	};
222
223	vph_pwr: regulator-vph-pwr {
224		compatible = "regulator-fixed";
225
226		regulator-name = "vph_pwr";
227		regulator-min-microvolt = <3700000>;
228		regulator-max-microvolt = <3700000>;
229
230		regulator-always-on;
231		regulator-boot-on;
232	};
233
234	vreg_bob_3v3: regulator-vreg-bob-3v3 {
235		compatible = "regulator-fixed";
236
237		regulator-name = "VREG_BOB_3P3";
238		regulator-min-microvolt = <3300000>;
239		regulator-max-microvolt = <3300000>;
240
241		vin-supply = <&vph_pwr>;
242	};
243
244	wcd939x: audio-codec {
245		compatible = "qcom,wcd9395-codec", "qcom,wcd9390-codec";
246
247		pinctrl-0 = <&wcd_default>;
248		pinctrl-names = "default";
249
250		qcom,micbias1-microvolt = <1800000>;
251		qcom,micbias2-microvolt = <1800000>;
252		qcom,micbias3-microvolt = <1800000>;
253		qcom,micbias4-microvolt = <1800000>;
254		qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000 500000 500000 500000>;
255		qcom,mbhc-headset-vthreshold-microvolt = <1700000>;
256		qcom,mbhc-headphone-vthreshold-microvolt = <50000>;
257		qcom,rx-device = <&wcd_rx>;
258		qcom,tx-device = <&wcd_tx>;
259
260		reset-gpios = <&tlmm 107 GPIO_ACTIVE_LOW>;
261
262		vdd-buck-supply = <&vreg_l15b_1p8>;
263		vdd-rxtx-supply = <&vreg_l15b_1p8>;
264		vdd-io-supply = <&vreg_l15b_1p8>;
265		vdd-mic-bias-supply = <&vreg_bob1>;
266
267		#sound-dai-cells = <1>;
268	};
269
270	wcn7850-pmu {
271		compatible = "qcom,wcn7850-pmu";
272
273		pinctrl-names = "default";
274		pinctrl-0 = <&wlan_en>, <&bt_default>;
275
276		wlan-enable-gpios = <&tlmm 16 GPIO_ACTIVE_HIGH>;
277		bt-enable-gpios = <&tlmm 17 GPIO_ACTIVE_HIGH>;
278
279		vdd-supply = <&vreg_s4i_0p85>;
280		vddio-supply = <&vreg_l15b_1p8>;
281		vddio1p2-supply = <&vreg_l3c_1p2>;
282		vddaon-supply = <&vreg_s2c_0p8>;
283		vdddig-supply = <&vreg_s3c_0p9>;
284		vddrfa1p2-supply = <&vreg_s1c_1p2>;
285		vddrfa1p8-supply = <&vreg_s6c_1p8>;
286
287		clocks = <&rpmhcc RPMH_RF_CLK1>;
288
289		regulators {
290			vreg_pmu_rfa_cmn: ldo0 {
291				regulator-name = "vreg_pmu_rfa_cmn";
292			};
293
294			vreg_pmu_aon_0p59: ldo1 {
295				regulator-name = "vreg_pmu_aon_0p59";
296			};
297
298			vreg_pmu_wlcx_0p8: ldo2 {
299				regulator-name = "vreg_pmu_wlcx_0p8";
300			};
301
302			vreg_pmu_wlmx_0p85: ldo3 {
303				regulator-name = "vreg_pmu_wlmx_0p85";
304			};
305
306			vreg_pmu_btcmx_0p85: ldo4 {
307				regulator-name = "vreg_pmu_btcmx_0p85";
308			};
309
310			vreg_pmu_rfa_0p8: ldo5 {
311				regulator-name = "vreg_pmu_rfa_0p8";
312			};
313
314			vreg_pmu_rfa_1p2: ldo6 {
315				regulator-name = "vreg_pmu_rfa_1p2";
316			};
317
318			vreg_pmu_rfa_1p8: ldo7 {
319				regulator-name = "vreg_pmu_rfa_1p8";
320			};
321
322			vreg_pmu_pcie_0p9: ldo8 {
323				regulator-name = "vreg_pmu_pcie_0p9";
324			};
325
326			vreg_pmu_pcie_1p8: ldo9 {
327				regulator-name = "vreg_pmu_pcie_1p8";
328			};
329		};
330	};
331};
332
333&apps_rsc {
334	regulators-0 {
335		compatible = "qcom,pm8550-rpmh-regulators";
336
337		vdd-bob1-supply = <&vph_pwr>;
338		vdd-bob2-supply = <&vph_pwr>;
339		vdd-l2-l13-l14-supply = <&vreg_bob1>;
340		vdd-l3-supply = <&vreg_s1c_1p2>;
341		vdd-l5-l16-supply = <&vreg_bob1>;
342		vdd-l6-l7-supply = <&vreg_bob1>;
343		vdd-l8-l9-supply = <&vreg_bob1>;
344		vdd-l11-supply = <&vreg_s1c_1p2>;
345		vdd-l12-supply = <&vreg_s6c_1p8>;
346		vdd-l15-supply = <&vreg_s6c_1p8>;
347		vdd-l17-supply = <&vreg_bob2>;
348
349		qcom,pmic-id = "b";
350
351		vreg_bob1: bob1 {
352			regulator-name = "vreg_bob1";
353			regulator-min-microvolt = <3296000>;
354			regulator-max-microvolt = <3960000>;
355			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
356		};
357
358		vreg_bob2: bob2 {
359			regulator-name = "vreg_bob2";
360			regulator-min-microvolt = <2720000>;
361			regulator-max-microvolt = <3008000>;
362			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
363		};
364
365		vreg_l2b_3p0: ldo2 {
366			regulator-name = "vreg_l2b_3p0";
367			regulator-min-microvolt = <3008000>;
368			regulator-max-microvolt = <3008000>;
369			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
370			regulator-allow-set-load;
371			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
372						   RPMH_REGULATOR_MODE_HPM>;
373		};
374
375		vreg_l5b_3p1: ldo5 {
376			regulator-name = "vreg_l5b_3p1";
377			regulator-min-microvolt = <3104000>;
378			regulator-max-microvolt = <3104000>;
379			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
380			regulator-allow-set-load;
381			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
382						   RPMH_REGULATOR_MODE_HPM>;
383		};
384
385		vreg_l6b_1p8: ldo6 {
386			regulator-name = "vreg_l6b_1p8";
387			regulator-min-microvolt = <1800000>;
388			regulator-max-microvolt = <3008000>;
389			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
390			regulator-allow-set-load;
391			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
392						   RPMH_REGULATOR_MODE_HPM>;
393		};
394
395		vreg_l7b_1p8: ldo7 {
396			regulator-name = "vreg_l7b_1p8";
397			regulator-min-microvolt = <1800000>;
398			regulator-max-microvolt = <3008000>;
399			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
400		};
401
402		vreg_l8b_1p8: ldo8 {
403			regulator-name = "vreg_l8b_1p8";
404			regulator-min-microvolt = <1800000>;
405			regulator-max-microvolt = <3008000>;
406			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
407			regulator-allow-set-load;
408			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
409						   RPMH_REGULATOR_MODE_HPM>;
410		};
411
412		vreg_l9b_2p9: ldo9 {
413			regulator-name = "vreg_l9b_2p9";
414			regulator-min-microvolt = <2960000>;
415			regulator-max-microvolt = <3008000>;
416			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
417			regulator-allow-set-load;
418			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
419						   RPMH_REGULATOR_MODE_HPM>;
420		};
421
422		vreg_l11b_1p2: ldo11 {
423			regulator-name = "vreg_l11b_1p2";
424			regulator-min-microvolt = <1200000>;
425			regulator-max-microvolt = <1504000>;
426			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
427			regulator-allow-set-load;
428			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
429						   RPMH_REGULATOR_MODE_HPM>;
430		};
431
432		vreg_l12b_1p8: ldo12 {
433			regulator-name = "vreg_l12b_1p8";
434			regulator-min-microvolt = <1800000>;
435			regulator-max-microvolt = <1800000>;
436			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
437			regulator-allow-set-load;
438			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
439						   RPMH_REGULATOR_MODE_HPM>;
440		};
441
442		vreg_l13b_3p0: ldo13 {
443			regulator-name = "vreg_l13b_3p0";
444			regulator-min-microvolt = <3000000>;
445			regulator-max-microvolt = <3000000>;
446			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
447			regulator-allow-set-load;
448			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
449						   RPMH_REGULATOR_MODE_HPM>;
450		};
451
452		vreg_l14b_3p2: ldo14 {
453			regulator-name = "vreg_l14b_3p2";
454			regulator-min-microvolt = <3200000>;
455			regulator-max-microvolt = <3200000>;
456			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
457			regulator-allow-set-load;
458			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
459						   RPMH_REGULATOR_MODE_HPM>;
460		};
461
462		vreg_l15b_1p8: ldo15 {
463			regulator-name = "vreg_l15b_1p8";
464			regulator-min-microvolt = <1800000>;
465			regulator-max-microvolt = <1800000>;
466			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
467			regulator-allow-set-load;
468			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
469						   RPMH_REGULATOR_MODE_HPM>;
470		};
471
472		vreg_l16b_2p8: ldo16 {
473			regulator-name = "vreg_l16b_2p8";
474			regulator-min-microvolt = <2800000>;
475			regulator-max-microvolt = <2800000>;
476			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
477			regulator-allow-set-load;
478			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
479						   RPMH_REGULATOR_MODE_HPM>;
480		};
481
482		vreg_l17b_2p5: ldo17 {
483			regulator-name = "vreg_l17b_2p5";
484			regulator-min-microvolt = <2504000>;
485			regulator-max-microvolt = <2504000>;
486			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
487			regulator-allow-set-load;
488			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
489						   RPMH_REGULATOR_MODE_HPM>;
490		};
491	};
492
493	regulators-1 {
494		compatible = "qcom,pm8550vs-rpmh-regulators";
495
496		vdd-l1-supply = <&vreg_s1c_1p2>;
497		vdd-l2-supply = <&vreg_s1c_1p2>;
498		vdd-l3-supply = <&vreg_s1c_1p2>;
499		vdd-s1-supply = <&vph_pwr>;
500		vdd-s2-supply = <&vph_pwr>;
501		vdd-s3-supply = <&vph_pwr>;
502		vdd-s4-supply = <&vph_pwr>;
503		vdd-s5-supply = <&vph_pwr>;
504		vdd-s6-supply = <&vph_pwr>;
505
506		qcom,pmic-id = "c";
507
508		vreg_s1c_1p2: smps1 {
509			regulator-name = "vreg_s1c_1p2";
510			regulator-min-microvolt = <1256000>;
511			regulator-max-microvolt = <1348000>;
512			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
513		};
514
515		vreg_s2c_0p8: smps2 {
516			regulator-name = "vreg_s2c_0p8";
517			regulator-min-microvolt = <852000>;
518			regulator-max-microvolt = <1036000>;
519			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
520		};
521
522		vreg_s3c_0p9: smps3 {
523			regulator-name = "vreg_s3c_0p9";
524			regulator-min-microvolt = <976000>;
525			regulator-max-microvolt = <1064000>;
526			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
527		};
528
529		vreg_s4c_1p2: smps4 {
530			regulator-name = "vreg_s4c_1p2";
531			regulator-min-microvolt = <1224000>;
532			regulator-max-microvolt = <1280000>;
533			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
534		};
535
536		vreg_s5c_0p7: smps5 {
537			regulator-name = "vreg_s5c_0p7";
538			regulator-min-microvolt = <752000>;
539			regulator-max-microvolt = <900000>;
540			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
541		};
542
543		vreg_s6c_1p8: smps6 {
544			regulator-name = "vreg_s6c_1p8";
545			regulator-min-microvolt = <1856000>;
546			regulator-max-microvolt = <2000000>;
547			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
548		};
549
550		vreg_l1c_1p2: ldo1 {
551			regulator-name = "vreg_l1c_1p2";
552			regulator-min-microvolt = <1200000>;
553			regulator-max-microvolt = <1200000>;
554			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
555			regulator-allow-set-load;
556			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
557						   RPMH_REGULATOR_MODE_HPM>;
558		};
559
560		vreg_l3c_1p2: ldo3 {
561			regulator-name = "vreg_l3c_1p2";
562			regulator-min-microvolt = <1200000>;
563			regulator-max-microvolt = <1200000>;
564			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
565			regulator-allow-set-load;
566			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
567						   RPMH_REGULATOR_MODE_HPM>;
568		};
569	};
570
571	regulators-2 {
572		compatible = "qcom,pm8550vs-rpmh-regulators";
573
574		vdd-l1-supply = <&vreg_s3c_0p9>;
575
576		qcom,pmic-id = "d";
577
578		vreg_l1d_0p88: ldo1 {
579			regulator-name = "vreg_l1d_0p88";
580			regulator-min-microvolt = <912000>;
581			regulator-max-microvolt = <920000>;
582			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
583			regulator-allow-set-load;
584			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
585						   RPMH_REGULATOR_MODE_HPM>;
586		};
587	};
588
589	regulators-3 {
590		compatible = "qcom,pm8550vs-rpmh-regulators";
591
592		vdd-l3-supply = <&vreg_s3c_0p9>;
593
594		qcom,pmic-id = "e";
595
596		vreg_l3e_0p9: ldo3 {
597			regulator-name = "vreg_l3e_0p9";
598			regulator-min-microvolt = <880000>;
599			regulator-max-microvolt = <920000>;
600			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
601			regulator-allow-set-load;
602			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
603						   RPMH_REGULATOR_MODE_HPM>;
604		};
605	};
606
607	regulators-4 {
608		compatible = "qcom,pm8550vs-rpmh-regulators";
609
610		vdd-l1-supply = <&vreg_s3c_0p9>;
611		vdd-l3-supply = <&vreg_s3c_0p9>;
612
613		qcom,pmic-id = "g";
614
615		vreg_l1g_0p91: ldo1 {
616			regulator-name = "vreg_l1g_0p91";
617			regulator-min-microvolt = <912000>;
618			regulator-max-microvolt = <920000>;
619			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
620			regulator-allow-set-load;
621			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
622						   RPMH_REGULATOR_MODE_HPM>;
623		};
624
625		vreg_l3g_0p91: ldo3 {
626			regulator-name = "vreg_l3g_0p91";
627			regulator-min-microvolt = <880000>;
628			regulator-max-microvolt = <912000>;
629			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
630			regulator-allow-set-load;
631			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
632						   RPMH_REGULATOR_MODE_HPM>;
633		};
634	};
635
636	regulators-5 {
637		compatible = "qcom,pm8550ve-rpmh-regulators";
638
639		vdd-l1-supply = <&vreg_s3c_0p9>;
640		vdd-l2-supply = <&vreg_s3c_0p9>;
641		vdd-l3-supply = <&vreg_s1c_1p2>;
642		vdd-s4-supply = <&vph_pwr>;
643
644		qcom,pmic-id = "i";
645
646		vreg_s4i_0p85: smps4 {
647			regulator-name = "vreg_s4i_0p85";
648			regulator-min-microvolt = <852000>;
649			regulator-max-microvolt = <1004000>;
650			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
651		};
652
653		vreg_l1i_0p88: ldo1 {
654			regulator-name = "vreg_l1i_0p88";
655			regulator-min-microvolt = <880000>;
656			regulator-max-microvolt = <912000>;
657			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
658			regulator-allow-set-load;
659			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
660						   RPMH_REGULATOR_MODE_HPM>;
661		};
662
663		vreg_l2i_0p88: ldo2 {
664			regulator-name = "vreg_l2i_0p88";
665			regulator-min-microvolt = <880000>;
666			regulator-max-microvolt = <912000>;
667			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
668			regulator-allow-set-load;
669			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
670						   RPMH_REGULATOR_MODE_HPM>;
671		};
672
673		vreg_l3i_1p2: ldo3 {
674			regulator-name = "vreg_l3i_0p91";
675			regulator-min-microvolt = <1200000>;
676			regulator-max-microvolt = <1200000>;
677			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
678			regulator-allow-set-load;
679			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
680						   RPMH_REGULATOR_MODE_HPM>;
681		};
682	};
683
684	regulators-6 {
685		compatible = "qcom,pm8010-rpmh-regulators";
686		qcom,pmic-id = "m";
687
688		vdd-l1-l2-supply = <&vreg_s1c_1p2>;
689		vdd-l3-l4-supply = <&vreg_bob2>;
690		vdd-l5-supply = <&vreg_s6c_1p8>;
691		vdd-l6-supply = <&vreg_bob1>;
692		vdd-l7-supply = <&vreg_bob1>;
693
694		vreg_l1m_1p1: ldo1 {
695			regulator-name = "vreg_l1m_1p1";
696			regulator-min-microvolt = <1104000>;
697			regulator-max-microvolt = <1104000>;
698			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
699			regulator-allow-set-load;
700			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
701						   RPMH_REGULATOR_MODE_HPM>;
702		};
703
704		vreg_l2m_1p056: ldo2 {
705			regulator-name = "vreg_l2m_1p056";
706			regulator-min-microvolt = <1056000>;
707			regulator-max-microvolt = <1056000>;
708			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
709			regulator-allow-set-load;
710			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
711						   RPMH_REGULATOR_MODE_HPM>;
712		};
713
714		vreg_l3m_2p8: ldo3 {
715			regulator-name = "vreg_l3m_2p8";
716			regulator-min-microvolt = <2800000>;
717			regulator-max-microvolt = <2800000>;
718			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
719		};
720
721		vreg_l4m_2p8: ldo4 {
722			regulator-name = "vreg_l4m_2p8";
723			regulator-min-microvolt = <2800000>;
724			regulator-max-microvolt = <2800000>;
725			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
726		};
727
728		vreg_l5m_1p8: ldo5 {
729			regulator-name = "vreg_l5m_1p8";
730			regulator-min-microvolt = <1800000>;
731			regulator-max-microvolt = <1800000>;
732			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
733		};
734
735		vreg_l6m_2p8: ldo6 {
736			regulator-name = "vreg_l6m_2p8";
737			regulator-min-microvolt = <2800000>;
738			regulator-max-microvolt = <2800000>;
739			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
740		};
741
742		vreg_l7m_2p96: ldo7 {
743			regulator-name = "vreg_l7m_2p96";
744			regulator-min-microvolt = <2960000>;
745			regulator-max-microvolt = <2960000>;
746			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
747		};
748	};
749
750	regulators-7 {
751		compatible = "qcom,pm8010-rpmh-regulators";
752		qcom,pmic-id = "n";
753
754		vdd-l1-l2-supply = <&vreg_s1c_1p2>;
755		vdd-l3-l4-supply = <&vreg_s6c_1p8>;
756		vdd-l5-supply = <&vreg_bob2>;
757		vdd-l6-supply = <&vreg_bob2>;
758		vdd-l7-supply = <&vreg_bob1>;
759
760		vreg_l1n_1p1: ldo1 {
761			regulator-name = "vreg_l1n_1p1";
762			regulator-min-microvolt = <1104000>;
763			regulator-max-microvolt = <1104000>;
764			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
765			regulator-allow-set-load;
766			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
767						   RPMH_REGULATOR_MODE_HPM>;
768		};
769
770		vreg_l2n_1p056: ldo2 {
771			regulator-name = "vreg_l2n_1p056";
772			regulator-min-microvolt = <1056000>;
773			regulator-max-microvolt = <1056000>;
774			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
775			regulator-allow-set-load;
776			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
777						   RPMH_REGULATOR_MODE_HPM>;
778		};
779
780		vreg_l3n_1p8: ldo3 {
781			regulator-name = "vreg_l3n_1p8";
782			regulator-min-microvolt = <1800000>;
783			regulator-max-microvolt = <1800000>;
784			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
785		};
786
787		vreg_l4n_1p8: ldo4 {
788			regulator-name = "vreg_l4n_1p8";
789			regulator-min-microvolt = <1800000>;
790			regulator-max-microvolt = <1800000>;
791			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
792		};
793
794		vreg_l5n_2p8: ldo5 {
795			regulator-name = "vreg_l5n_2p8";
796			regulator-min-microvolt = <2800000>;
797			regulator-max-microvolt = <2800000>;
798			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
799		};
800
801		vreg_l6n_2p8: ldo6 {
802			regulator-name = "vreg_l6n_2p8";
803			regulator-min-microvolt = <2800000>;
804			regulator-max-microvolt = <2800000>;
805			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
806		};
807
808		vreg_l7n_3p3: ldo7 {
809			regulator-name = "vreg_l7n_3p3";
810			regulator-min-microvolt = <3304000>;
811			regulator-max-microvolt = <3304000>;
812			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
813		};
814	};
815};
816
817&gpi_dma1 {
818	status = "okay";
819};
820
821&i2c3 {
822       status = "okay";
823
824       wcd_usbss: typec-mux@e {
825		compatible = "qcom,wcd9395-usbss", "qcom,wcd9390-usbss";
826		reg = <0xe>;
827
828		vdd-supply = <&vreg_l15b_1p8>;
829		reset-gpios = <&tlmm 152 GPIO_ACTIVE_HIGH>;
830
831		mode-switch;
832		orientation-switch;
833
834		ports {
835			#address-cells = <1>;
836			#size-cells = <0>;
837
838			port@0 {
839				reg = <0>;
840
841				wcd_usbss_sbu_mux: endpoint {
842					remote-endpoint = <&pmic_glink_sbu>;
843				};
844			};
845		};
846       };
847};
848
849&i2c6 {
850	clock-frequency = <400000>;
851	status = "okay";
852
853	lt9611_codec: hdmi-bridge@2b {
854		compatible = "lontium,lt9611uxc";
855		reg = <0x2b>;
856
857		interrupts-extended = <&tlmm 85 IRQ_TYPE_EDGE_FALLING>;
858
859		reset-gpios = <&tlmm 28 GPIO_ACTIVE_HIGH>;
860
861		vdd-supply = <&lt9611_1v2>;
862		vcc-supply = <&lt9611_3v3>;
863
864		pinctrl-0 = <&lt9611_irq_pin>, <&lt9611_rst_pin>;
865		pinctrl-names = "default";
866
867		ports {
868			#address-cells = <1>;
869			#size-cells = <0>;
870
871			port@0 {
872				reg = <0>;
873
874				lt9611_a: endpoint {
875					remote-endpoint = <&mdss_dsi0_out>;
876				};
877			};
878
879			port@2 {
880				reg = <2>;
881
882				lt9611_out: endpoint {
883					remote-endpoint = <&hdmi_connector_out>;
884				};
885			};
886		};
887	};
888};
889
890&ipa {
891	qcom,gsi-loader = "self";
892	memory-region = <&ipa_fw_mem>;
893	firmware-name = "qcom/sm8650/ipa_fws.mbn";
894	status = "okay";
895};
896
897&gpu {
898	status = "okay";
899
900	zap-shader {
901		firmware-name = "qcom/sm8650/gen70900_zap.mbn";
902	};
903};
904
905&lpass_tlmm {
906	spkr_1_sd_n_active: spkr-1-sd-n-active-state {
907		pins = "gpio21";
908		function = "gpio";
909		drive-strength = <16>;
910		bias-disable;
911		output-low;
912	};
913};
914
915&mdss {
916	status = "okay";
917};
918
919&mdss_dsi0 {
920	vdda-supply = <&vreg_l3i_1p2>;
921
922	status = "okay";
923};
924
925&mdss_dsi0_out {
926	remote-endpoint = <&lt9611_a>;
927	data-lanes = <0 1 2 3>;
928};
929
930&mdss_dsi0_phy {
931	vdds-supply = <&vreg_l1i_0p88>;
932
933	status = "okay";
934};
935
936&mdss_dp0 {
937	status = "okay";
938};
939
940&mdss_dp0_out {
941	data-lanes = <0 1>;
942};
943
944&pcie0 {
945	wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;
946	perst-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>;
947
948	pinctrl-0 = <&pcie0_default_state>;
949	pinctrl-names = "default";
950
951	status = "okay";
952};
953
954&pcieport0 {
955	wifi@0 {
956		compatible = "pci17cb,1107";
957		reg = <0x10000 0x0 0x0 0x0 0x0>;
958
959		vddrfacmn-supply = <&vreg_pmu_rfa_cmn>;
960		vddaon-supply = <&vreg_pmu_aon_0p59>;
961		vddwlcx-supply = <&vreg_pmu_wlcx_0p8>;
962		vddwlmx-supply = <&vreg_pmu_wlmx_0p85>;
963		vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>;
964		vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>;
965		vddrfa1p8-supply = <&vreg_pmu_rfa_1p8>;
966		vddpcie0p9-supply = <&vreg_pmu_pcie_0p9>;
967		vddpcie1p8-supply = <&vreg_pmu_pcie_1p8>;
968	};
969};
970
971&pcie0_phy {
972	vdda-phy-supply = <&vreg_l1i_0p88>;
973	vdda-pll-supply = <&vreg_l3i_1p2>;
974
975	status = "okay";
976};
977
978&pcie1 {
979	wake-gpios = <&tlmm 99 GPIO_ACTIVE_HIGH>;
980	perst-gpios = <&tlmm 97 GPIO_ACTIVE_LOW>;
981
982	pinctrl-0 = <&pcie1_default_state>;
983	pinctrl-names = "default";
984
985	status = "okay";
986};
987
988&pcie1_phy {
989	vdda-phy-supply = <&vreg_l3e_0p9>;
990	vdda-pll-supply = <&vreg_l3i_1p2>;
991	vdda-qref-supply = <&vreg_l1i_0p88>;
992
993	status = "okay";
994};
995
996&pm8550_gpios {
997	sdc2_card_det_n: sdc2-card-det-state {
998		pins = "gpio12";
999		function = "normal";
1000		bias-pull-up;
1001		input-enable;
1002		output-disable;
1003		power-source = <1>; /* 1.8 V */
1004	};
1005
1006	volume_up_n: volume-up-n-state {
1007		pins = "gpio6";
1008		function = "normal";
1009		bias-pull-up;
1010		input-enable;
1011		power-source = <1>;
1012	};
1013};
1014
1015/* The RGB signals are routed to 3 separate LEDs on the HDK8650 */
1016&pm8550_pwm {
1017	#address-cells = <1>;
1018	#size-cells = <0>;
1019
1020	status = "okay";
1021
1022	led@1 {
1023		reg = <1>;
1024		function = LED_FUNCTION_STATUS;
1025		color = <LED_COLOR_ID_RED>;
1026		default-state = "off";
1027	};
1028
1029	led@2 {
1030		reg = <2>;
1031		function = LED_FUNCTION_STATUS;
1032		color = <LED_COLOR_ID_GREEN>;
1033		default-state = "off";
1034	};
1035
1036	led@3 {
1037		reg = <3>;
1038		function = LED_FUNCTION_STATUS;
1039		color = <LED_COLOR_ID_BLUE>;
1040		default-state = "off";
1041	};
1042};
1043
1044&pm8550b_eusb2_repeater {
1045	vdd18-supply = <&vreg_l15b_1p8>;
1046	vdd3-supply = <&vreg_l5b_3p1>;
1047};
1048
1049&pmk8550_rtc {
1050	status = "okay";
1051};
1052
1053&pon_pwrkey {
1054	status = "okay";
1055};
1056
1057&pon_resin {
1058	linux,code = <KEY_VOLUMEDOWN>;
1059
1060	status = "okay";
1061};
1062
1063&qup_i2c3_data_clk {
1064	/* Use internal I2C pull-up */
1065	bias-pull-up = <2200>;
1066};
1067
1068&qupv3_id_0 {
1069	iommus = <&apps_smmu 0xa3 0x3>;
1070
1071	status = "okay";
1072};
1073
1074&qupv3_id_1 {
1075	status = "okay";
1076};
1077
1078&remoteproc_adsp {
1079	firmware-name = "qcom/sm8650/adsp.mbn",
1080			"qcom/sm8650/adsp_dtb.mbn";
1081
1082	status = "okay";
1083};
1084
1085&remoteproc_cdsp {
1086	firmware-name = "qcom/sm8650/cdsp.mbn",
1087			"qcom/sm8650/cdsp_dtb.mbn";
1088
1089	status = "okay";
1090};
1091
1092&remoteproc_mpss {
1093	firmware-name = "qcom/sm8650/modem.mbn",
1094			"qcom/sm8650/modem_dtb.mbn";
1095
1096	status = "okay";
1097};
1098
1099&sdhc_2 {
1100	cd-gpios = <&pm8550_gpios 12 GPIO_ACTIVE_HIGH>;
1101
1102	vmmc-supply = <&vreg_l9b_2p9>;
1103	vqmmc-supply = <&vreg_l8b_1p8>;
1104	bus-width = <4>;
1105	no-sdio;
1106	no-mmc;
1107
1108	pinctrl-0 = <&sdc2_default>, <&sdc2_card_det_n>;
1109	pinctrl-1 = <&sdc2_sleep>, <&sdc2_card_det_n>;
1110	pinctrl-names = "default", "sleep";
1111
1112	status = "okay";
1113};
1114
1115&sleep_clk {
1116	clock-frequency = <32000>;
1117};
1118
1119&swr0 {
1120	status = "okay";
1121
1122	/* WSA8845, Speaker North */
1123	north_spkr: speaker@0,0 {
1124		compatible = "sdw20217020400";
1125		reg = <0 0>;
1126		pinctrl-0 = <&spkr_1_sd_n_active>;
1127		pinctrl-names = "default";
1128		powerdown-gpios = <&lpass_tlmm 21 GPIO_ACTIVE_LOW>;
1129		#sound-dai-cells = <0>;
1130		sound-name-prefix = "SpkrLeft";
1131		vdd-1p8-supply = <&vreg_l15b_1p8>;
1132		vdd-io-supply = <&vreg_l3c_1p2>;
1133
1134		/*
1135		 * WSA8845 Port 1 (DAC)     <=> SWR0 Port 1 (SPKR_L)
1136		 * WSA8845 Port 2 (COMP)    <=> SWR0 Port 2 (SPKR_L_COMP)
1137		 * WSA8845 Port 3 (BOOST)   <=> SWR0 Port 3 (SPKR_L_BOOST)
1138		 * WSA8845 Port 4 (PBR)     <=> SWR0 Port 7 (PBR)
1139		 * WSA8845 Port 5 (VISENSE) <=> SWR0 Port 10 (SPKR_L_VI)
1140		 * WSA8845 Port 6 (CPS)     <=> SWR0 Port 13 (CPS)
1141		 */
1142		qcom,port-mapping = <1 2 3 7 10 13>;
1143	};
1144
1145	/* WSA8845, Speaker South */
1146	south_spkr: speaker@0,1 {
1147		compatible = "sdw20217020400";
1148		reg = <0 1>;
1149		pinctrl-0 = <&spkr_2_sd_n_active>;
1150		pinctrl-names = "default";
1151		powerdown-gpios = <&tlmm 77 GPIO_ACTIVE_LOW>;
1152		#sound-dai-cells = <0>;
1153		sound-name-prefix = "SpkrRight";
1154		vdd-1p8-supply = <&vreg_l15b_1p8>;
1155		vdd-io-supply = <&vreg_l3c_1p2>;
1156
1157		/*
1158		 * WSA8845 Port 1 (DAC)     <=> SWR0 Port 4 (SPKR_R)
1159		 * WSA8845 Port 2 (COMP)    <=> SWR0 Port 5 (SPKR_R_COMP)
1160		 * WSA8845 Port 3 (BOOST)   <=> SWR0 Port 6 (SPKR_R_BOOST)
1161		 * WSA8845 Port 4 (PBR)     <=> SWR0 Port 7 (PBR)
1162		 * WSA8845 Port 5 (VISENSE) <=> SWR0 Port 11 (SPKR_R_VI)
1163		 * WSA8845 Port 6 (CPS)     <=> SWR0 Port 13 (CPS)
1164		 */
1165		qcom,port-mapping = <4 5 6 7 11 13>;
1166	};
1167};
1168
1169&swr1 {
1170	status = "okay";
1171
1172	/* WCD9395 RX */
1173	wcd_rx: codec@0,4 {
1174		compatible = "sdw20217010e00";
1175		reg = <0 4>;
1176
1177		/*
1178		 * WCD9395 RX Port 1 (HPH_L/R)      <=> SWR1 Port 1 (HPH_L/R)
1179		 * WCD9395 RX Port 2 (CLSH)         <=> SWR1 Port 2 (CLSH)
1180		 * WCD9395 RX Port 3 (COMP_L/R)     <=> SWR1 Port 3 (COMP_L/R)
1181		 * WCD9395 RX Port 4 (LO)           <=> SWR1 Port 4 (LO)
1182		 * WCD9395 RX Port 5 (DSD_L/R)      <=> SWR1 Port 5 (DSD_L/R)
1183		 * WCD9395 RX Port 6 (HIFI_PCM_L/R) <=> SWR1 Port 9 (HIFI_PCM_L/R)
1184		 */
1185		qcom,rx-port-mapping = <1 2 3 4 5 9>;
1186	};
1187};
1188
1189&swr2 {
1190	status = "okay";
1191
1192	/* WCD9395 TX */
1193	wcd_tx: codec@0,3 {
1194		compatible = "sdw20217010e00";
1195		reg = <0 3>;
1196
1197		/*
1198		 * WCD9395 TX Port 1 (ADC1,2,3,4)         <=> SWR2 Port 2 (TX SWR_INPUT 0,1,2,3)
1199		 * WCD9395 TX Port 2 (ADC3,4 & DMIC0,1)   <=> SWR2 Port 2 (TX SWR_INPUT 0,1,2,3)
1200		 * WCD9395 TX Port 3 (DMIC0,1,2,3 & MBHC) <=> SWR2 Port 3 (TX SWR_INPUT 4,5,6,7)
1201		 * WCD9395 TX Port 4 (DMIC4,5,6,7)        <=> SWR2 Port 4 (TX SWR_INPUT 8,9,10,11)
1202		 */
1203		qcom,tx-port-mapping = <2 2 3 4>;
1204	};
1205};
1206
1207&tlmm {
1208	/* Reserved I/Os for NFC */
1209	gpio-reserved-ranges = <32 8>, <74 1>;
1210
1211	bt_default: bt-default-state {
1212		bt-en-pins {
1213			pins = "gpio17";
1214			function = "gpio";
1215			drive-strength = <16>;
1216			bias-disable;
1217		};
1218
1219		sw-ctrl-pins {
1220			pins = "gpio18";
1221			function = "gpio";
1222			bias-pull-down;
1223		};
1224	};
1225
1226	lt9611_irq_pin: lt9611-irq-state {
1227		pins = "gpio85";
1228		function = "gpio";
1229		bias-disable;
1230	};
1231
1232	lt9611_rst_pin: lt9611-rst-state {
1233		pins = "gpio28";
1234		function = "gpio";
1235		output-high;
1236	};
1237
1238	spkr_2_sd_n_active: spkr-2-sd-n-active-state {
1239		pins = "gpio77";
1240		function = "gpio";
1241		drive-strength = <16>;
1242		bias-disable;
1243		output-low;
1244	};
1245
1246	wcd_default: wcd-reset-n-active-state {
1247		pins = "gpio107";
1248		function = "gpio";
1249		drive-strength = <16>;
1250		bias-disable;
1251		output-low;
1252	};
1253
1254	wlan_en: wlan-en-state {
1255		pins = "gpio16";
1256		function = "gpio";
1257		drive-strength = <8>;
1258		bias-pull-down;
1259	};
1260};
1261
1262&uart14 {
1263	status = "okay";
1264
1265	bluetooth {
1266		compatible = "qcom,wcn7850-bt";
1267
1268		vddrfacmn-supply = <&vreg_pmu_rfa_cmn>;
1269		vddaon-supply = <&vreg_pmu_aon_0p59>;
1270		vddwlcx-supply = <&vreg_pmu_wlcx_0p8>;
1271		vddwlmx-supply = <&vreg_pmu_wlmx_0p85>;
1272		vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>;
1273		vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>;
1274		vddrfa1p8-supply = <&vreg_pmu_rfa_1p8>;
1275
1276		max-speed = <3200000>;
1277	};
1278};
1279
1280&uart15 {
1281	status = "okay";
1282};
1283
1284&ufs_mem_hc {
1285	reset-gpios = <&tlmm 210 GPIO_ACTIVE_LOW>;
1286
1287	vcc-supply = <&vreg_l17b_2p5>;
1288	vcc-max-microamp = <1300000>;
1289	vccq-supply = <&vreg_l1c_1p2>;
1290	vccq-max-microamp = <1200000>;
1291
1292	status = "okay";
1293};
1294
1295&ufs_mem_phy {
1296	vdda-phy-supply = <&vreg_l1d_0p88>;
1297	vdda-pll-supply = <&vreg_l3i_1p2>;
1298
1299	status = "okay";
1300};
1301
1302/*
1303 * DPAUX -> WCD9395 -> USB_SBU -> USB-C
1304 * eUSB2 DP/DM -> PM85550HS -> eUSB2 DP/DM -> WCD9395 -> USB-C
1305 * USB SS -> USB-C
1306 */
1307
1308&usb_1 {
1309	status = "okay";
1310};
1311
1312&usb_1_dwc3 {
1313	dr_mode = "otg";
1314	usb-role-switch;
1315};
1316
1317&usb_1_dwc3_hs {
1318	remote-endpoint = <&pmic_glink_hs_in>;
1319};
1320
1321&usb_1_hsphy {
1322	vdd-supply = <&vreg_l1i_0p88>;
1323	vdda12-supply = <&vreg_l3i_1p2>;
1324
1325	phys = <&pm8550b_eusb2_repeater>;
1326
1327	status = "okay";
1328};
1329
1330&usb_dp_qmpphy {
1331	vdda-phy-supply = <&vreg_l3i_1p2>;
1332	vdda-pll-supply = <&vreg_l3g_0p91>;
1333
1334	status = "okay";
1335};
1336
1337&usb_dp_qmpphy_out {
1338	remote-endpoint = <&pmic_glink_ss_in>;
1339};
1340
1341&xo_board {
1342	clock-frequency = <76800000>;
1343};
1344