1// SPDX-License-Identifier: BSD-3-Clause 2/* 3 * Copyright (c) 2020-2021, Linaro Limited 4 */ 5 6/dts-v1/; 7 8#include <dt-bindings/regulator/qcom,rpmh-regulator.h> 9#include "sm8350.dtsi" 10#include "pm8350.dtsi" 11#include "pm8350b.dtsi" 12#include "pm8350c.dtsi" 13#include "pmk8350.dtsi" 14#include "pmr735a.dtsi" 15#include "pmr735b.dtsi" 16 17/ { 18 model = "Qualcomm Technologies, Inc. SM8350 HDK"; 19 compatible = "qcom,sm8350-hdk", "qcom,sm8350"; 20 chassis-type = "embedded"; 21 22 aliases { 23 serial0 = &uart2; 24 }; 25 26 chosen { 27 stdout-path = "serial0:115200n8"; 28 }; 29 30 hdmi-connector { 31 compatible = "hdmi-connector"; 32 type = "a"; 33 34 port { 35 hdmi_con: endpoint { 36 remote-endpoint = <<9611_out>; 37 }; 38 }; 39 }; 40 41 pmic-glink { 42 compatible = "qcom,sm8350-pmic-glink", "qcom,pmic-glink"; 43 #address-cells = <1>; 44 #size-cells = <0>; 45 orientation-gpios = <&tlmm 81 GPIO_ACTIVE_HIGH>; 46 47 connector@0 { 48 compatible = "usb-c-connector"; 49 reg = <0>; 50 power-role = "dual"; 51 data-role = "dual"; 52 53 ports { 54 #address-cells = <1>; 55 #size-cells = <0>; 56 57 port@0 { 58 reg = <0>; 59 60 pmic_glink_hs_in: endpoint { 61 remote-endpoint = <&usb_1_dwc3_hs>; 62 }; 63 }; 64 65 port@1 { 66 reg = <1>; 67 68 pmic_glink_ss_in: endpoint { 69 remote-endpoint = <&usb_1_qmpphy_out>; 70 }; 71 }; 72 73 port@2 { 74 reg = <2>; 75 76 pmic_glink_sbu: endpoint { 77 remote-endpoint = <&fsa4480_sbu_mux>; 78 }; 79 }; 80 }; 81 }; 82 }; 83 84 vph_pwr: vph-pwr-regulator { 85 compatible = "regulator-fixed"; 86 regulator-name = "vph_pwr"; 87 regulator-min-microvolt = <3700000>; 88 regulator-max-microvolt = <3700000>; 89 90 regulator-always-on; 91 regulator-boot-on; 92 }; 93 94 lt9611_1v2: lt9611-1v2-regulator { 95 compatible = "regulator-fixed"; 96 regulator-name = "LT9611_1V2"; 97 98 vin-supply = <&vph_pwr>; 99 regulator-min-microvolt = <1200000>; 100 regulator-max-microvolt = <1200000>; 101 gpio = <&tlmm 49 GPIO_ACTIVE_HIGH>; 102 enable-active-high; 103 regulator-boot-on; 104 }; 105 106 lt9611_3v3: lt9611-3v3-regulator { 107 compatible = "regulator-fixed"; 108 regulator-name = "LT9611_3V3"; 109 110 vin-supply = <&vreg_bob>; 111 gpio = <&tlmm 47 GPIO_ACTIVE_HIGH>; 112 regulator-min-microvolt = <3300000>; 113 regulator-max-microvolt = <3300000>; 114 enable-active-high; 115 regulator-boot-on; 116 regulator-always-on; 117 }; 118}; 119 120&adsp { 121 status = "okay"; 122 firmware-name = "qcom/sm8350/adsp.mbn"; 123}; 124 125&apps_rsc { 126 regulators-0 { 127 compatible = "qcom,pm8350-rpmh-regulators"; 128 qcom,pmic-id = "b"; 129 130 vdd-s1-supply = <&vph_pwr>; 131 vdd-s2-supply = <&vph_pwr>; 132 vdd-s3-supply = <&vph_pwr>; 133 vdd-s4-supply = <&vph_pwr>; 134 vdd-s5-supply = <&vph_pwr>; 135 vdd-s6-supply = <&vph_pwr>; 136 vdd-s7-supply = <&vph_pwr>; 137 vdd-s8-supply = <&vph_pwr>; 138 vdd-s9-supply = <&vph_pwr>; 139 vdd-s10-supply = <&vph_pwr>; 140 vdd-s11-supply = <&vph_pwr>; 141 vdd-s12-supply = <&vph_pwr>; 142 143 vdd-l1-l4-supply = <&vreg_s11b_0p95>; 144 vdd-l2-l7-supply = <&vreg_bob>; 145 vdd-l3-l5-supply = <&vreg_bob>; 146 vdd-l6-l9-l10-supply = <&vreg_s11b_0p95>; 147 148 vreg_s10b_1p8: smps10 { 149 regulator-name = "vreg_s10b_1p8"; 150 regulator-min-microvolt = <1800000>; 151 regulator-max-microvolt = <1800000>; 152 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 153 }; 154 155 vreg_s11b_0p95: smps11 { 156 regulator-name = "vreg_s11b_0p95"; 157 regulator-min-microvolt = <952000>; 158 regulator-max-microvolt = <952000>; 159 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 160 }; 161 162 vreg_s12b_1p25: smps12 { 163 regulator-name = "vreg_s12b_1p25"; 164 regulator-min-microvolt = <1256000>; 165 regulator-max-microvolt = <1256000>; 166 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 167 }; 168 169 vreg_l1b_0p88: ldo1 { 170 regulator-name = "vreg_l1b_0p88"; 171 regulator-min-microvolt = <912000>; 172 regulator-max-microvolt = <920000>; 173 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 174 }; 175 176 vreg_l2b_3p07: ldo2 { 177 regulator-name = "vreg_l2b_3p07"; 178 regulator-min-microvolt = <3072000>; 179 regulator-max-microvolt = <3072000>; 180 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 181 }; 182 183 vreg_l3b_0p9: ldo3 { 184 regulator-name = "vreg_l3b_0p9"; 185 regulator-min-microvolt = <904000>; 186 regulator-max-microvolt = <904000>; 187 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 188 }; 189 190 vreg_l5b_0p88: ldo5 { 191 regulator-name = "vreg_l5b_0p88"; 192 regulator-min-microvolt = <880000>; 193 regulator-max-microvolt = <888000>; 194 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 195 regulator-allow-set-load; 196 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 197 RPMH_REGULATOR_MODE_HPM>; 198 }; 199 200 vreg_l6b_1p2: ldo6 { 201 regulator-name = "vreg_l6b_1p2"; 202 regulator-min-microvolt = <1200000>; 203 regulator-max-microvolt = <1208000>; 204 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 205 regulator-allow-set-load; 206 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 207 RPMH_REGULATOR_MODE_HPM>; 208 }; 209 210 vreg_l7b_2p96: ldo7 { 211 regulator-name = "vreg_l7b_2p96"; 212 regulator-min-microvolt = <2504000>; 213 regulator-max-microvolt = <2504000>; 214 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 215 regulator-allow-set-load; 216 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 217 RPMH_REGULATOR_MODE_HPM>; 218 }; 219 220 vreg_l9b_1p2: ldo9 { 221 regulator-name = "vreg_l9b_1p2"; 222 regulator-min-microvolt = <1200000>; 223 regulator-max-microvolt = <1200000>; 224 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 225 regulator-allow-set-load; 226 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 227 RPMH_REGULATOR_MODE_HPM>; 228 }; 229 }; 230 231 regulators-1 { 232 compatible = "qcom,pm8350c-rpmh-regulators"; 233 qcom,pmic-id = "c"; 234 235 vdd-s1-supply = <&vph_pwr>; 236 vdd-s2-supply = <&vph_pwr>; 237 vdd-s3-supply = <&vph_pwr>; 238 vdd-s4-supply = <&vph_pwr>; 239 vdd-s5-supply = <&vph_pwr>; 240 vdd-s6-supply = <&vph_pwr>; 241 vdd-s7-supply = <&vph_pwr>; 242 vdd-s8-supply = <&vph_pwr>; 243 vdd-s9-supply = <&vph_pwr>; 244 vdd-s10-supply = <&vph_pwr>; 245 246 vdd-l1-l12-supply = <&vreg_s1c_1p86>; 247 vdd-l2-l8-supply = <&vreg_s1c_1p86>; 248 vdd-l3-l4-l5-l7-l13-supply = <&vreg_bob>; 249 vdd-l6-l9-l11-supply = <&vreg_bob>; 250 vdd-l10-supply = <&vreg_s12b_1p25>; 251 252 vdd-bob-supply = <&vph_pwr>; 253 254 vreg_s1c_1p86: smps1 { 255 regulator-name = "vreg_s1c_1p86"; 256 regulator-min-microvolt = <1856000>; 257 regulator-max-microvolt = <1880000>; 258 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 259 }; 260 261 vreg_bob: bob { 262 regulator-name = "vreg_bob"; 263 regulator-min-microvolt = <3008000>; 264 regulator-max-microvolt = <3960000>; 265 regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>; 266 }; 267 268 vreg_l1c_1p8: ldo1 { 269 regulator-name = "vreg_l1c_1p8"; 270 regulator-min-microvolt = <1800000>; 271 regulator-max-microvolt = <1800000>; 272 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 273 }; 274 275 vreg_l2c_1p8: ldo2 { 276 regulator-name = "vreg_l2c_1p8"; 277 regulator-min-microvolt = <1800000>; 278 regulator-max-microvolt = <1800000>; 279 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 280 }; 281 282 vreg_l6c_1p8: ldo6 { 283 regulator-name = "vreg_l6c_1p8"; 284 regulator-min-microvolt = <1800000>; 285 regulator-max-microvolt = <2960000>; 286 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 287 }; 288 289 vreg_l9c_2p96: ldo9 { 290 regulator-name = "vreg_l9c_2p96"; 291 regulator-min-microvolt = <2960000>; 292 regulator-max-microvolt = <3008000>; 293 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 294 }; 295 296 vreg_l10c_1p2: ldo10 { 297 regulator-name = "vreg_l10c_1p2"; 298 regulator-min-microvolt = <1200000>; 299 regulator-max-microvolt = <1200000>; 300 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 301 }; 302 }; 303 304 regulators-2 { 305 compatible = "qcom,pmr735a-rpmh-regulators"; 306 qcom,pmic-id = "e"; 307 308 vdd-s1-supply = <&vph_pwr>; 309 vdd-s2-supply = <&vph_pwr>; 310 vdd-s3-supply = <&vph_pwr>; 311 312 vdd-l1-l2-supply = <&vreg_s2e_0p85>; 313 vdd-l3-supply = <&vreg_s1e_1p25>; 314 vdd-l4-supply = <&vreg_s1c_1p86>; 315 vdd-l5-l6-supply = <&vreg_s1c_1p86>; 316 vdd-l7-bob-supply = <&vreg_bob>; 317 318 vreg_s1e_1p25: smps1 { 319 regulator-name = "vreg_s1e_1p25"; 320 regulator-min-microvolt = <1200000>; 321 regulator-max-microvolt = <1280000>; 322 }; 323 324 vreg_s2e_0p85: smps2 { 325 regulator-name = "vreg_s2e_0p85"; 326 regulator-min-microvolt = <950000>; 327 regulator-max-microvolt = <976000>; 328 }; 329 330 vreg_s3e_2p20: smps3 { 331 regulator-name = "vreg_s3e_2p20"; 332 regulator-min-microvolt = <2200000>; 333 regulator-max-microvolt = <2352000>; 334 }; 335 336 vreg_l1e_0p9: ldo1 { 337 regulator-name = "vreg_l1e_0p9"; 338 regulator-min-microvolt = <912000>; 339 regulator-max-microvolt = <912000>; 340 }; 341 342 vreg_l2e_1p2: ldo2 { 343 regulator-name = "vreg_l2e_0p8"; 344 regulator-min-microvolt = <1200000>; 345 regulator-max-microvolt = <1200000>; 346 }; 347 348 vreg_l3e_1p2: ldo3 { 349 regulator-name = "vreg_l3e_1p2"; 350 regulator-min-microvolt = <1200000>; 351 regulator-max-microvolt = <1200000>; 352 }; 353 354 vreg_l4e_1p7: ldo4 { 355 regulator-name = "vreg_l4e_1p7"; 356 regulator-min-microvolt = <1776000>; 357 regulator-max-microvolt = <1872000>; 358 }; 359 360 vreg_l5e_0p8: ldo5 { 361 regulator-name = "vreg_l5e_0p8"; 362 regulator-min-microvolt = <800000>; 363 regulator-max-microvolt = <800000>; 364 }; 365 366 vreg_l6e_0p8: ldo6 { 367 regulator-name = "vreg_l6e_0p8"; 368 regulator-min-microvolt = <480000>; 369 regulator-max-microvolt = <904000>; 370 }; 371 372 vreg_l7e_2p8: ldo7 { 373 regulator-name = "vreg_l7e_2p8"; 374 regulator-min-microvolt = <2800000>; 375 regulator-max-microvolt = <2800000>; 376 }; 377 }; 378}; 379 380&cdsp { 381 status = "okay"; 382 firmware-name = "qcom/sm8350/cdsp.mbn"; 383}; 384 385&mdss_dsi0 { 386 vdda-supply = <&vreg_l6b_1p2>; 387 status = "okay"; 388}; 389 390&mdss_dsi0_out { 391 remote-endpoint = <<9611_a>; 392 data-lanes = <0 1 2 3>; 393}; 394 395&mdss_dsi0_phy { 396 vdds-supply = <&vreg_l5b_0p88>; 397 status = "okay"; 398}; 399 400&gpi_dma1 { 401 status = "okay"; 402}; 403 404&gpu { 405 status = "okay"; 406 407 zap-shader { 408 firmware-name = "qcom/sm8350/a660_zap.mbn"; 409 }; 410}; 411 412&i2c13 { 413 clock-frequency = <100000>; 414 415 status = "okay"; 416 417 typec-mux@42 { 418 compatible = "fcs,fsa4480"; 419 reg = <0x42>; 420 421 interrupts-extended = <&tlmm 2 IRQ_TYPE_LEVEL_LOW>; 422 423 vcc-supply = <&vreg_bob>; 424 mode-switch; 425 orientation-switch; 426 427 port { 428 fsa4480_sbu_mux: endpoint { 429 remote-endpoint = <&pmic_glink_sbu>; 430 }; 431 }; 432 }; 433}; 434 435&i2c15 { 436 clock-frequency = <400000>; 437 status = "okay"; 438 439 lt9611_codec: hdmi-bridge@2b { 440 compatible = "lontium,lt9611uxc"; 441 reg = <0x2b>; 442 443 interrupts-extended = <&tlmm 50 IRQ_TYPE_EDGE_FALLING>; 444 reset-gpios = <&tlmm 48 GPIO_ACTIVE_HIGH>; 445 446 vdd-supply = <<9611_1v2>; 447 vcc-supply = <<9611_3v3>; 448 449 pinctrl-names = "default"; 450 pinctrl-0 = <<9611_state>; 451 452 ports { 453 #address-cells = <1>; 454 #size-cells = <0>; 455 456 port@0 { 457 reg = <0>; 458 459 lt9611_a: endpoint { 460 remote-endpoint = <&mdss_dsi0_out>; 461 }; 462 }; 463 464 port@2 { 465 reg = <2>; 466 467 lt9611_out: endpoint { 468 remote-endpoint = <&hdmi_con>; 469 }; 470 }; 471 }; 472 }; 473}; 474 475&mdss { 476 status = "okay"; 477}; 478 479&mdss_dp { 480 status = "okay"; 481}; 482 483&mdss_dp_out { 484 data-lanes = <0 1>; 485}; 486 487&mpss { 488 status = "okay"; 489 firmware-name = "qcom/sm8350/modem.mbn"; 490}; 491 492&pcie0 { 493 pinctrl-names = "default"; 494 pinctrl-0 = <&pcie0_default_state>; 495 496 perst-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>; 497 wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>; 498 499 status = "okay"; 500}; 501 502&pcie0_phy { 503 vdda-phy-supply = <&vreg_l5b_0p88>; 504 vdda-pll-supply = <&vreg_l6b_1p2>; 505 506 status = "okay"; 507}; 508 509&pcie1 { 510 perst-gpios = <&tlmm 97 GPIO_ACTIVE_LOW>; 511 wake-gpios = <&tlmm 99 GPIO_ACTIVE_HIGH>; 512 513 pinctrl-names = "default"; 514 pinctrl-0 = <&pcie1_default_state>; 515 516 status = "okay"; 517}; 518 519&pcie1_phy { 520 status = "okay"; 521 vdda-phy-supply = <&vreg_l5b_0p88>; 522 vdda-pll-supply = <&vreg_l6b_1p2>; 523}; 524 525&qupv3_id_0 { 526 status = "okay"; 527}; 528 529&qupv3_id_1 { 530 status = "okay"; 531}; 532 533&qupv3_id_2 { 534 status = "okay"; 535}; 536 537&sdhc_2 { 538 cd-gpios = <&tlmm 92 GPIO_ACTIVE_HIGH>; 539 pinctrl-names = "default", "sleep"; 540 pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>; 541 pinctrl-1 = <&sdc2_sleep_state &sdc2_card_det_n>; 542 vmmc-supply = <&vreg_l9c_2p96>; 543 vqmmc-supply = <&vreg_l6c_1p8>; 544 no-sdio; 545 no-mmc; 546 status = "okay"; 547}; 548 549&slpi { 550 status = "okay"; 551 firmware-name = "qcom/sm8350/slpi.mbn"; 552}; 553 554&tlmm { 555 gpio-reserved-ranges = <52 8>; 556 557 gpio-line-names = 558 "APPS_I2C_SDA", /* GPIO_0 */ 559 "APPS_I2C_SCL", 560 "FSA_INT_N", 561 "USER_LED3_EN", 562 "SMBUS_SDA_1P8", 563 "SMBUS_SCL_1P8", 564 "2M2_3P3_EN", 565 "ALERT_DUAL_M2_N", 566 "EXP_UART_CTS", 567 "EXP_UART_RFR", 568 "EXP_UART_TX", /* GPIO_10 */ 569 "EXP_UART_RX", 570 "NC", 571 "NC", 572 "RCM_MARKER1", 573 "WSA0_EN", 574 "CAM1_RESET_N", 575 "CAM0_RESET_N", 576 "DEBUG_UART_TX", 577 "DEBUG_UART_RX", 578 "TS_I2C_SDA", /* GPIO_20 */ 579 "TS_I2C_SCL", 580 "TS_RESET_N", 581 "TS_INT_N", 582 "DISP0_RESET_N", 583 "DISP1_RESET_N", 584 "ETH_RESET", 585 "RCM_MARKER2", 586 "CAM_DC_MIPI_MUX_EN", 587 "CAM_DC_MIPI_MUX_SEL", 588 "AFC_PHY_TA_D_PLUS", /* GPIO_30 */ 589 "AFC_PHY_TA_D_MINUS", 590 "PM8008_1_IRQ", 591 "PM8008_1_RESET_N", 592 "PM8008_2_IRQ", 593 "PM8008_2_RESET_N", 594 "CAM_DC_I3C_SDA", 595 "CAM_DC_I3C_SCL", 596 "FP_INT_N", 597 "FP_WUHB_INT_N", 598 "SMB_SPMI_DATA", /* GPIO_40 */ 599 "SMB_SPMI_CLK", 600 "USB_HUB_RESET", 601 "FORCE_USB_BOOT", 602 "LRF_IRQ", 603 "NC", 604 "IMU2_INT", 605 "HDMI_3P3_EN", 606 "HDMI_RSTN", 607 "HDMI_1P2_EN", 608 "HDMI_INT", /* GPIO_50 */ 609 "USB1_ID", 610 "FP_SPI_MISO", 611 "FP_SPI_MOSI", 612 "FP_SPI_CLK", 613 "FP_SPI_CS_N", 614 "NFC_ESE_SPI_MISO", 615 "NFC_ESE_SPI_MOSI", 616 "NFC_ESE_SPI_CLK", 617 "NFC_ESE_SPI_CS", 618 "NFC_I2C_SDA", /* GPIO_60 */ 619 "NFC_I2C_SCLC", 620 "NFC_EN", 621 "NFC_CLK_REQ", 622 "HST_WLAN_EN", 623 "HST_BT_EN", 624 "HST_SW_CTRL", 625 "NC", 626 "HST_BT_UART_CTS", 627 "HST_BT_UART_RFR", 628 "HST_BT_UART_TX", /* GPIO_70 */ 629 "HST_BT_UART_RX", 630 "CAM_DC_SPI0_MISO", 631 "CAM_DC_SPI0_MOSI", 632 "CAM_DC_SPI0_CLK", 633 "CAM_DC_SPI0_CS_N", 634 "CAM_DC_SPI1_MISO", 635 "CAM_DC_SPI1_MOSI", 636 "CAM_DC_SPI1_CLK", 637 "CAM_DC_SPI1_CS_N", 638 "HALL_INT_N", /* GPIO_80 */ 639 "USB_PHY_PS", 640 "MDP_VSYNC_P", 641 "MDP_VSYNC_S", 642 "ETH_3P3_EN", 643 "RADAR_INT", 644 "NFC_DWL_REQ", 645 "SM_GPIO_87", 646 "WCD_RESET_N", 647 "ALSP_INT_N", 648 "PRESS_INT", /* GPIO_90 */ 649 "SAR_INT_N", 650 "SD_CARD_DET_N", 651 "NC", 652 "PCIE0_RESET_N", 653 "PCIE0_CLK_REQ_N", 654 "PCIE0_WAKE_N", 655 "PCIE1_RESET_N", 656 "PCIE1_CLK_REQ_N", 657 "PCIE1_WAKE_N", 658 "CAM_MCLK0", /* GPIO_100 */ 659 "CAM_MCLK1", 660 "CAM_MCLK2", 661 "CAM_MCLK3", 662 "CAM_MCLK4", 663 "CAM_MCLK5", 664 "CAM2_RESET_N", 665 "CCI_I2C0_SDA", 666 "CCI_I2C0_SCL", 667 "CCI_I2C1_SDA", 668 "CCI_I2C1_SCL", /* GPIO_110 */ 669 "CCI_I2C2_SDA", 670 "CCI_I2C2_SCL", 671 "CCI_I2C3_SDA", 672 "CCI_I2C3_SCL", 673 "CAM5_RESET_N", 674 "CAM4_RESET_N", 675 "CAM3_RESET_N", 676 "IMU1_INT", 677 "MAG_INT_N", 678 "MI2S2_I2S_SCK", /* GPIO_120 */ 679 "MI2S2_I2S_DAT0", 680 "MI2S2_I2S_WS", 681 "HIFI_DAC_I2S_MCLK", 682 "MI2S2_I2S_DAT1", 683 "HIFI_DAC_I2S_SCK", 684 "HIFI_DAC_I2S_DAT0", 685 "NC", 686 "HIFI_DAC_I2S_WS", 687 "HST_BT_WLAN_SLIMBUS_CLK", 688 "HST_BT_WLAN_SLIMBUS_DAT0", /* GPIO_130 */ 689 "BT_LED_EN", 690 "WLAN_LED_EN", 691 "NC", 692 "NC", 693 "NC", 694 "UIM2_PRESENT", 695 "NC", 696 "NC", 697 "NC", 698 "UIM1_PRESENT", /* GPIO_140 */ 699 "NC", 700 "SM_RFFE0_DATA", 701 "NC", 702 "SM_RFFE1_DATA", 703 "SM_MSS_GRFC4", 704 "SM_MSS_GRFC5", 705 "SM_MSS_GRFC6", 706 "SM_MSS_GRFC7", 707 "SM_RFFE4_CLK", 708 "SM_RFFE4_DATA", /* GPIO_150 */ 709 "WLAN_COEX_UART1_RX", 710 "WLAN_COEX_UART1_TX", 711 "HST_SW_CTRL", 712 "DSI0_STATUS", 713 "DSI1_STATUS", 714 "APPS_PBL_BOOT_SPEED_1", 715 "APPS_BOOT_FROM_ROM", 716 "APPS_PBL_BOOT_SPEED_0", 717 "QLINK0_REQ", 718 "QLINK0_EN", /* GPIO_160 */ 719 "QLINK0_WMSS_RESET_N", 720 "NC", 721 "NC", 722 "NC", 723 "NC", 724 "NC", 725 "NC", 726 "WCD_SWR_TX_CLK", 727 "WCD_SWR_TX_DATA0", 728 "WCD_SWR_TX_DATA1", /* GPIO_170 */ 729 "WCD_SWR_RX_CLK", 730 "WCD_SWR_RX_DATA0", 731 "WCD_SWR_RX_DATA1", 732 "DMIC01_CLK", 733 "DMIC01_DATA", 734 "DMIC23_CLK", 735 "DMIC23_DATA", 736 "WSA_SWR_CLK", 737 "WSA_SWR_DATA", 738 "DMIC45_CLK", /* GPIO_180 */ 739 "DMIC45_DATA", 740 "WCD_SWR_TX_DATA2", 741 "SENSOR_I3C_SDA", 742 "SENSOR_I3C_SCL", 743 "CAM_OIS0_I3C_SDA", 744 "CAM_OIS0_I3C_SCL", 745 "IMU_SPI_MISO", 746 "IMU_SPI_MOSI", 747 "IMU_SPI_CLK", 748 "IMU_SPI_CS_N", /* GPIO_190 */ 749 "MAG_I2C_SDA", 750 "MAG_I2C_SCL", 751 "SENSOR_I2C_SDA", 752 "SENSOR_I2C_SCL", 753 "RADAR_SPI_MISO", 754 "RADAR_SPI_MOSI", 755 "RADAR_SPI_CLK", 756 "RADAR_SPI_CS_N", 757 "HST_BLE_UART_TX", 758 "HST_BLE_UART_RX", /* GPIO_200 */ 759 "HST_WLAN_UART_TX", 760 "HST_WLAN_UART_RX"; 761 762 pcie0_default_state: pcie0-default-state { 763 perst-pins { 764 pins = "gpio94"; 765 function = "gpio"; 766 drive-strength = <2>; 767 bias-pull-down; 768 }; 769 770 clkreq-pins { 771 pins = "gpio95"; 772 function = "pcie0_clkreqn"; 773 drive-strength = <2>; 774 bias-pull-up; 775 }; 776 777 wake-pins { 778 pins = "gpio96"; 779 function = "gpio"; 780 drive-strength = <2>; 781 bias-pull-up; 782 }; 783 }; 784 785 pcie1_default_state: pcie1-default-state { 786 perst-pins { 787 pins = "gpio97"; 788 function = "gpio"; 789 drive-strength = <2>; 790 bias-pull-down; 791 }; 792 793 clkreq-pins { 794 pins = "gpio98"; 795 function = "pcie1_clkreqn"; 796 drive-strength = <2>; 797 bias-pull-up; 798 }; 799 800 wake-pins { 801 pins = "gpio99"; 802 function = "gpio"; 803 drive-strength = <2>; 804 bias-pull-up; 805 }; 806 }; 807 808 sdc2_card_det_n: sd-card-det-n-state { 809 pins = "gpio92"; 810 function = "gpio"; 811 drive-strength = <2>; 812 bias-pull-up; 813 }; 814}; 815 816&uart2 { 817 status = "okay"; 818}; 819 820&ufs_mem_hc { 821 status = "okay"; 822 823 reset-gpios = <&tlmm 203 GPIO_ACTIVE_LOW>; 824 825 vcc-supply = <&vreg_l7b_2p96>; 826 vcc-max-microamp = <800000>; 827 vccq-supply = <&vreg_l9b_1p2>; 828 vccq-max-microamp = <900000>; 829 vdd-hba-supply = <&vreg_l9b_1p2>; 830}; 831 832&ufs_mem_phy { 833 status = "okay"; 834 835 vdda-phy-supply = <&vreg_l5b_0p88>; 836 vdda-pll-supply = <&vreg_l6b_1p2>; 837}; 838 839&usb_1 { 840 status = "okay"; 841}; 842 843&usb_1_dwc3 { 844 dr_mode = "otg"; 845 usb-role-switch; 846}; 847 848&usb_1_dwc3_hs { 849 remote-endpoint = <&pmic_glink_hs_in>; 850}; 851 852&usb_1_hsphy { 853 status = "okay"; 854 855 vdda-pll-supply = <&vreg_l5b_0p88>; 856 vdda18-supply = <&vreg_l1c_1p8>; 857 vdda33-supply = <&vreg_l2b_3p07>; 858}; 859 860&usb_1_qmpphy { 861 status = "okay"; 862 863 vdda-phy-supply = <&vreg_l6b_1p2>; 864 vdda-pll-supply = <&vreg_l1b_0p88>; 865}; 866 867&usb_1_qmpphy_out { 868 remote-endpoint = <&pmic_glink_ss_in>; 869}; 870 871&usb_2 { 872 status = "okay"; 873}; 874 875&usb_2_dwc3 { 876 dr_mode = "host"; 877 878 pinctrl-names = "default"; 879 pinctrl-0 = <&usb_hub_enabled_state>; 880}; 881 882&usb_2_hsphy { 883 status = "okay"; 884 885 vdda-pll-supply = <&vreg_l5b_0p88>; 886 vdda18-supply = <&vreg_l1c_1p8>; 887 vdda33-supply = <&vreg_l2b_3p07>; 888}; 889 890&usb_2_qmpphy { 891 status = "okay"; 892 893 vdda-phy-supply = <&vreg_l6b_1p2>; 894 vdda-pll-supply = <&vreg_l5b_0p88>; 895}; 896 897/* PINCTRL - additions to nodes defined in sm8350.dtsi */ 898 899&tlmm { 900 usb_hub_enabled_state: usb-hub-enabled-state { 901 pins = "gpio42"; 902 function = "gpio"; 903 904 drive-strength = <2>; 905 output-low; 906 }; 907 908 lt9611_state: lt9611-state { 909 rst-pins { 910 pins = "gpio48"; 911 function = "gpio"; 912 913 output-high; 914 input-disable; 915 }; 916 917 irq-pins { 918 pins = "gpio50"; 919 function = "gpio"; 920 bias-disable; 921 }; 922 }; 923}; 924 925&ipa { 926 qcom,gsi-loader = "self"; 927 memory-region = <&pil_ipa_fw_mem>; 928 status = "okay"; 929 firmware-name = "qcom/sm8350/ipa_fws.mbn"; 930}; 931