1// SPDX-License-Identifier: BSD-3-Clause 2/* 3 * Copyright (c) 2020-2021, Linaro Limited 4 */ 5 6/dts-v1/; 7 8#include <dt-bindings/regulator/qcom,rpmh-regulator.h> 9#include "sm8350.dtsi" 10#include "pm8350.dtsi" 11#include "pm8350b.dtsi" 12#include "pm8350c.dtsi" 13#include "pmk8350.dtsi" 14#include "pmr735a.dtsi" 15#include "pmr735b.dtsi" 16 17/ { 18 model = "Qualcomm Technologies, Inc. SM8350 HDK"; 19 compatible = "qcom,sm8350-hdk", "qcom,sm8350"; 20 chassis-type = "embedded"; 21 22 aliases { 23 serial0 = &uart2; 24 }; 25 26 chosen { 27 stdout-path = "serial0:115200n8"; 28 }; 29 30 hdmi-connector { 31 compatible = "hdmi-connector"; 32 type = "a"; 33 34 port { 35 hdmi_con: endpoint { 36 remote-endpoint = <<9611_out>; 37 }; 38 }; 39 }; 40 41 pmic-glink { 42 compatible = "qcom,sm8350-pmic-glink", "qcom,pmic-glink"; 43 #address-cells = <1>; 44 #size-cells = <0>; 45 orientation-gpios = <&tlmm 81 GPIO_ACTIVE_HIGH>; 46 47 connector@0 { 48 compatible = "usb-c-connector"; 49 reg = <0>; 50 power-role = "dual"; 51 data-role = "dual"; 52 53 ports { 54 #address-cells = <1>; 55 #size-cells = <0>; 56 57 port@0 { 58 reg = <0>; 59 60 pmic_glink_hs_in: endpoint { 61 remote-endpoint = <&usb_1_dwc3_hs>; 62 }; 63 }; 64 65 port@1 { 66 reg = <1>; 67 68 pmic_glink_ss_in: endpoint { 69 remote-endpoint = <&usb_1_qmpphy_out>; 70 }; 71 }; 72 73 port@2 { 74 reg = <2>; 75 76 pmic_glink_sbu: endpoint { 77 remote-endpoint = <&fsa4480_sbu_mux>; 78 }; 79 }; 80 }; 81 }; 82 }; 83 84 vph_pwr: vph-pwr-regulator { 85 compatible = "regulator-fixed"; 86 regulator-name = "vph_pwr"; 87 regulator-min-microvolt = <3700000>; 88 regulator-max-microvolt = <3700000>; 89 90 regulator-always-on; 91 regulator-boot-on; 92 }; 93 94 lt9611_1v2: lt9611-1v2-regulator { 95 compatible = "regulator-fixed"; 96 regulator-name = "LT9611_1V2"; 97 98 vin-supply = <&vph_pwr>; 99 regulator-min-microvolt = <1200000>; 100 regulator-max-microvolt = <1200000>; 101 gpio = <&tlmm 49 GPIO_ACTIVE_HIGH>; 102 enable-active-high; 103 regulator-boot-on; 104 }; 105 106 lt9611_3v3: lt9611-3v3-regulator { 107 compatible = "regulator-fixed"; 108 regulator-name = "LT9611_3V3"; 109 110 vin-supply = <&vreg_bob>; 111 gpio = <&tlmm 47 GPIO_ACTIVE_HIGH>; 112 regulator-min-microvolt = <3300000>; 113 regulator-max-microvolt = <3300000>; 114 enable-active-high; 115 regulator-boot-on; 116 regulator-always-on; 117 }; 118}; 119 120&adsp { 121 status = "okay"; 122 firmware-name = "qcom/sm8350/adsp.mbn"; 123}; 124 125&apps_rsc { 126 regulators-0 { 127 compatible = "qcom,pm8350-rpmh-regulators"; 128 qcom,pmic-id = "b"; 129 130 vdd-s1-supply = <&vph_pwr>; 131 vdd-s2-supply = <&vph_pwr>; 132 vdd-s3-supply = <&vph_pwr>; 133 vdd-s4-supply = <&vph_pwr>; 134 vdd-s5-supply = <&vph_pwr>; 135 vdd-s6-supply = <&vph_pwr>; 136 vdd-s7-supply = <&vph_pwr>; 137 vdd-s8-supply = <&vph_pwr>; 138 vdd-s9-supply = <&vph_pwr>; 139 vdd-s10-supply = <&vph_pwr>; 140 vdd-s11-supply = <&vph_pwr>; 141 vdd-s12-supply = <&vph_pwr>; 142 143 vdd-l1-l4-supply = <&vreg_s11b_0p95>; 144 vdd-l2-l7-supply = <&vreg_bob>; 145 vdd-l3-l5-supply = <&vreg_bob>; 146 vdd-l6-l9-l10-supply = <&vreg_s11b_0p95>; 147 148 vreg_s10b_1p8: smps10 { 149 regulator-name = "vreg_s10b_1p8"; 150 regulator-min-microvolt = <1800000>; 151 regulator-max-microvolt = <1800000>; 152 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 153 }; 154 155 vreg_s11b_0p95: smps11 { 156 regulator-name = "vreg_s11b_0p95"; 157 regulator-min-microvolt = <952000>; 158 regulator-max-microvolt = <952000>; 159 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 160 }; 161 162 vreg_s12b_1p25: smps12 { 163 regulator-name = "vreg_s12b_1p25"; 164 regulator-min-microvolt = <1256000>; 165 regulator-max-microvolt = <1256000>; 166 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 167 }; 168 169 vreg_l1b_0p88: ldo1 { 170 regulator-name = "vreg_l1b_0p88"; 171 regulator-min-microvolt = <912000>; 172 regulator-max-microvolt = <920000>; 173 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 174 }; 175 176 vreg_l2b_3p07: ldo2 { 177 regulator-name = "vreg_l2b_3p07"; 178 regulator-min-microvolt = <3072000>; 179 regulator-max-microvolt = <3072000>; 180 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 181 }; 182 183 vreg_l3b_0p9: ldo3 { 184 regulator-name = "vreg_l3b_0p9"; 185 regulator-min-microvolt = <904000>; 186 regulator-max-microvolt = <904000>; 187 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 188 }; 189 190 vreg_l5b_0p88: ldo5 { 191 regulator-name = "vreg_l5b_0p88"; 192 regulator-min-microvolt = <880000>; 193 regulator-max-microvolt = <888000>; 194 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 195 regulator-allow-set-load; 196 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 197 RPMH_REGULATOR_MODE_HPM>; 198 }; 199 200 vreg_l6b_1p2: ldo6 { 201 regulator-name = "vreg_l6b_1p2"; 202 regulator-min-microvolt = <1200000>; 203 regulator-max-microvolt = <1208000>; 204 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 205 regulator-allow-set-load; 206 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 207 RPMH_REGULATOR_MODE_HPM>; 208 }; 209 210 vreg_l7b_2p96: ldo7 { 211 regulator-name = "vreg_l7b_2p96"; 212 regulator-min-microvolt = <2504000>; 213 regulator-max-microvolt = <2504000>; 214 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 215 regulator-allow-set-load; 216 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 217 RPMH_REGULATOR_MODE_HPM>; 218 }; 219 220 vreg_l9b_1p2: ldo9 { 221 regulator-name = "vreg_l9b_1p2"; 222 regulator-min-microvolt = <1200000>; 223 regulator-max-microvolt = <1200000>; 224 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 225 regulator-allow-set-load; 226 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 227 RPMH_REGULATOR_MODE_HPM>; 228 }; 229 }; 230 231 regulators-1 { 232 compatible = "qcom,pm8350c-rpmh-regulators"; 233 qcom,pmic-id = "c"; 234 235 vdd-s1-supply = <&vph_pwr>; 236 vdd-s2-supply = <&vph_pwr>; 237 vdd-s3-supply = <&vph_pwr>; 238 vdd-s4-supply = <&vph_pwr>; 239 vdd-s5-supply = <&vph_pwr>; 240 vdd-s6-supply = <&vph_pwr>; 241 vdd-s7-supply = <&vph_pwr>; 242 vdd-s8-supply = <&vph_pwr>; 243 vdd-s9-supply = <&vph_pwr>; 244 vdd-s10-supply = <&vph_pwr>; 245 246 vdd-l1-l12-supply = <&vreg_s1c_1p86>; 247 vdd-l2-l8-supply = <&vreg_s1c_1p86>; 248 vdd-l3-l4-l5-l7-l13-supply = <&vreg_bob>; 249 vdd-l6-l9-l11-supply = <&vreg_bob>; 250 vdd-l10-supply = <&vreg_s12b_1p25>; 251 252 vdd-bob-supply = <&vph_pwr>; 253 254 vreg_s1c_1p86: smps1 { 255 regulator-name = "vreg_s1c_1p86"; 256 regulator-min-microvolt = <1856000>; 257 regulator-max-microvolt = <1880000>; 258 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 259 }; 260 261 vreg_bob: bob { 262 regulator-name = "vreg_bob"; 263 regulator-min-microvolt = <3008000>; 264 regulator-max-microvolt = <3960000>; 265 regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>; 266 }; 267 268 vreg_l1c_1p8: ldo1 { 269 regulator-name = "vreg_l1c_1p8"; 270 regulator-min-microvolt = <1800000>; 271 regulator-max-microvolt = <1800000>; 272 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 273 }; 274 275 vreg_l2c_1p8: ldo2 { 276 regulator-name = "vreg_l2c_1p8"; 277 regulator-min-microvolt = <1800000>; 278 regulator-max-microvolt = <1800000>; 279 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 280 }; 281 282 vreg_l6c_1p8: ldo6 { 283 regulator-name = "vreg_l6c_1p8"; 284 regulator-min-microvolt = <1800000>; 285 regulator-max-microvolt = <2960000>; 286 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 287 }; 288 289 vreg_l9c_2p96: ldo9 { 290 regulator-name = "vreg_l9c_2p96"; 291 regulator-min-microvolt = <2960000>; 292 regulator-max-microvolt = <3008000>; 293 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 294 }; 295 296 vreg_l10c_1p2: ldo10 { 297 regulator-name = "vreg_l10c_1p2"; 298 regulator-min-microvolt = <1200000>; 299 regulator-max-microvolt = <1200000>; 300 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 301 }; 302 }; 303 304 regulators-2 { 305 compatible = "qcom,pmr735a-rpmh-regulators"; 306 qcom,pmic-id = "e"; 307 308 vdd-s1-supply = <&vph_pwr>; 309 vdd-s2-supply = <&vph_pwr>; 310 vdd-s3-supply = <&vph_pwr>; 311 312 vdd-l1-l2-supply = <&vreg_s2e_0p85>; 313 vdd-l3-supply = <&vreg_s1e_1p25>; 314 vdd-l4-supply = <&vreg_s1c_1p86>; 315 vdd-l5-l6-supply = <&vreg_s1c_1p86>; 316 vdd-l7-bob-supply = <&vreg_bob>; 317 318 vreg_s1e_1p25: smps1 { 319 regulator-name = "vreg_s1e_1p25"; 320 regulator-min-microvolt = <1200000>; 321 regulator-max-microvolt = <1280000>; 322 }; 323 324 vreg_s2e_0p85: smps2 { 325 regulator-name = "vreg_s2e_0p85"; 326 regulator-min-microvolt = <950000>; 327 regulator-max-microvolt = <976000>; 328 }; 329 330 vreg_s3e_2p20: smps3 { 331 regulator-name = "vreg_s3e_2p20"; 332 regulator-min-microvolt = <2200000>; 333 regulator-max-microvolt = <2352000>; 334 }; 335 336 vreg_l1e_0p9: ldo1 { 337 regulator-name = "vreg_l1e_0p9"; 338 regulator-min-microvolt = <912000>; 339 regulator-max-microvolt = <912000>; 340 }; 341 342 vreg_l2e_1p2: ldo2 { 343 regulator-name = "vreg_l2e_0p8"; 344 regulator-min-microvolt = <1200000>; 345 regulator-max-microvolt = <1200000>; 346 }; 347 348 vreg_l3e_1p2: ldo3 { 349 regulator-name = "vreg_l3e_1p2"; 350 regulator-min-microvolt = <1200000>; 351 regulator-max-microvolt = <1200000>; 352 }; 353 354 vreg_l4e_1p7: ldo4 { 355 regulator-name = "vreg_l4e_1p7"; 356 regulator-min-microvolt = <1776000>; 357 regulator-max-microvolt = <1872000>; 358 }; 359 360 vreg_l5e_0p8: ldo5 { 361 regulator-name = "vreg_l5e_0p8"; 362 regulator-min-microvolt = <800000>; 363 regulator-max-microvolt = <800000>; 364 }; 365 366 vreg_l6e_0p8: ldo6 { 367 regulator-name = "vreg_l6e_0p8"; 368 regulator-min-microvolt = <480000>; 369 regulator-max-microvolt = <904000>; 370 }; 371 372 vreg_l7e_2p8: ldo7 { 373 regulator-name = "vreg_l7e_2p8"; 374 regulator-min-microvolt = <2800000>; 375 regulator-max-microvolt = <2800000>; 376 }; 377 }; 378}; 379 380&cdsp { 381 status = "okay"; 382 firmware-name = "qcom/sm8350/cdsp.mbn"; 383}; 384 385&mdss_dsi0 { 386 vdda-supply = <&vreg_l6b_1p2>; 387 status = "okay"; 388 389 ports { 390 port@1 { 391 endpoint { 392 remote-endpoint = <<9611_a>; 393 data-lanes = <0 1 2 3>; 394 }; 395 }; 396 }; 397}; 398 399&mdss_dsi0_phy { 400 vdds-supply = <&vreg_l5b_0p88>; 401 status = "okay"; 402}; 403 404&gpi_dma1 { 405 status = "okay"; 406}; 407 408&gpu { 409 status = "okay"; 410 411 zap-shader { 412 firmware-name = "qcom/sm8350/a660_zap.mbn"; 413 }; 414}; 415 416&i2c13 { 417 clock-frequency = <100000>; 418 419 status = "okay"; 420 421 typec-mux@42 { 422 compatible = "fcs,fsa4480"; 423 reg = <0x42>; 424 425 interrupts-extended = <&tlmm 2 IRQ_TYPE_LEVEL_LOW>; 426 427 vcc-supply = <&vreg_bob>; 428 mode-switch; 429 orientation-switch; 430 431 port { 432 fsa4480_sbu_mux: endpoint { 433 remote-endpoint = <&pmic_glink_sbu>; 434 }; 435 }; 436 }; 437}; 438 439&i2c15 { 440 clock-frequency = <400000>; 441 status = "okay"; 442 443 lt9611_codec: hdmi-bridge@2b { 444 compatible = "lontium,lt9611uxc"; 445 reg = <0x2b>; 446 447 interrupts-extended = <&tlmm 50 IRQ_TYPE_EDGE_FALLING>; 448 reset-gpios = <&tlmm 48 GPIO_ACTIVE_HIGH>; 449 450 vdd-supply = <<9611_1v2>; 451 vcc-supply = <<9611_3v3>; 452 453 pinctrl-names = "default"; 454 pinctrl-0 = <<9611_state>; 455 456 ports { 457 #address-cells = <1>; 458 #size-cells = <0>; 459 460 port@0 { 461 reg = <0>; 462 463 lt9611_a: endpoint { 464 remote-endpoint = <&mdss_dsi0_out>; 465 }; 466 }; 467 468 port@2 { 469 reg = <2>; 470 471 lt9611_out: endpoint { 472 remote-endpoint = <&hdmi_con>; 473 }; 474 }; 475 }; 476 }; 477}; 478 479&mdss { 480 status = "okay"; 481}; 482 483&mdss_dp { 484 status = "okay"; 485}; 486 487&mdss_dp_out { 488 data-lanes = <0 1>; 489}; 490 491&mpss { 492 status = "okay"; 493 firmware-name = "qcom/sm8350/modem.mbn"; 494}; 495 496&pcie0 { 497 pinctrl-names = "default"; 498 pinctrl-0 = <&pcie0_default_state>; 499 500 perst-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>; 501 wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>; 502 503 status = "okay"; 504}; 505 506&pcie0_phy { 507 vdda-phy-supply = <&vreg_l5b_0p88>; 508 vdda-pll-supply = <&vreg_l6b_1p2>; 509 510 status = "okay"; 511}; 512 513&pcie1 { 514 perst-gpios = <&tlmm 97 GPIO_ACTIVE_LOW>; 515 wake-gpios = <&tlmm 99 GPIO_ACTIVE_HIGH>; 516 517 pinctrl-names = "default"; 518 pinctrl-0 = <&pcie1_default_state>; 519 520 status = "okay"; 521}; 522 523&pcie1_phy { 524 status = "okay"; 525 vdda-phy-supply = <&vreg_l5b_0p88>; 526 vdda-pll-supply = <&vreg_l6b_1p2>; 527}; 528 529&qupv3_id_0 { 530 status = "okay"; 531}; 532 533&qupv3_id_1 { 534 status = "okay"; 535}; 536 537&qupv3_id_2 { 538 status = "okay"; 539}; 540 541&sdhc_2 { 542 cd-gpios = <&tlmm 92 GPIO_ACTIVE_HIGH>; 543 pinctrl-names = "default", "sleep"; 544 pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>; 545 pinctrl-1 = <&sdc2_sleep_state &sdc2_card_det_n>; 546 vmmc-supply = <&vreg_l9c_2p96>; 547 vqmmc-supply = <&vreg_l6c_1p8>; 548 no-sdio; 549 no-mmc; 550 status = "okay"; 551}; 552 553&slpi { 554 status = "okay"; 555 firmware-name = "qcom/sm8350/slpi.mbn"; 556}; 557 558&tlmm { 559 gpio-reserved-ranges = <52 8>; 560 561 gpio-line-names = 562 "APPS_I2C_SDA", /* GPIO_0 */ 563 "APPS_I2C_SCL", 564 "FSA_INT_N", 565 "USER_LED3_EN", 566 "SMBUS_SDA_1P8", 567 "SMBUS_SCL_1P8", 568 "2M2_3P3_EN", 569 "ALERT_DUAL_M2_N", 570 "EXP_UART_CTS", 571 "EXP_UART_RFR", 572 "EXP_UART_TX", /* GPIO_10 */ 573 "EXP_UART_RX", 574 "NC", 575 "NC", 576 "RCM_MARKER1", 577 "WSA0_EN", 578 "CAM1_RESET_N", 579 "CAM0_RESET_N", 580 "DEBUG_UART_TX", 581 "DEBUG_UART_RX", 582 "TS_I2C_SDA", /* GPIO_20 */ 583 "TS_I2C_SCL", 584 "TS_RESET_N", 585 "TS_INT_N", 586 "DISP0_RESET_N", 587 "DISP1_RESET_N", 588 "ETH_RESET", 589 "RCM_MARKER2", 590 "CAM_DC_MIPI_MUX_EN", 591 "CAM_DC_MIPI_MUX_SEL", 592 "AFC_PHY_TA_D_PLUS", /* GPIO_30 */ 593 "AFC_PHY_TA_D_MINUS", 594 "PM8008_1_IRQ", 595 "PM8008_1_RESET_N", 596 "PM8008_2_IRQ", 597 "PM8008_2_RESET_N", 598 "CAM_DC_I3C_SDA", 599 "CAM_DC_I3C_SCL", 600 "FP_INT_N", 601 "FP_WUHB_INT_N", 602 "SMB_SPMI_DATA", /* GPIO_40 */ 603 "SMB_SPMI_CLK", 604 "USB_HUB_RESET", 605 "FORCE_USB_BOOT", 606 "LRF_IRQ", 607 "NC", 608 "IMU2_INT", 609 "HDMI_3P3_EN", 610 "HDMI_RSTN", 611 "HDMI_1P2_EN", 612 "HDMI_INT", /* GPIO_50 */ 613 "USB1_ID", 614 "FP_SPI_MISO", 615 "FP_SPI_MOSI", 616 "FP_SPI_CLK", 617 "FP_SPI_CS_N", 618 "NFC_ESE_SPI_MISO", 619 "NFC_ESE_SPI_MOSI", 620 "NFC_ESE_SPI_CLK", 621 "NFC_ESE_SPI_CS", 622 "NFC_I2C_SDA", /* GPIO_60 */ 623 "NFC_I2C_SCLC", 624 "NFC_EN", 625 "NFC_CLK_REQ", 626 "HST_WLAN_EN", 627 "HST_BT_EN", 628 "HST_SW_CTRL", 629 "NC", 630 "HST_BT_UART_CTS", 631 "HST_BT_UART_RFR", 632 "HST_BT_UART_TX", /* GPIO_70 */ 633 "HST_BT_UART_RX", 634 "CAM_DC_SPI0_MISO", 635 "CAM_DC_SPI0_MOSI", 636 "CAM_DC_SPI0_CLK", 637 "CAM_DC_SPI0_CS_N", 638 "CAM_DC_SPI1_MISO", 639 "CAM_DC_SPI1_MOSI", 640 "CAM_DC_SPI1_CLK", 641 "CAM_DC_SPI1_CS_N", 642 "HALL_INT_N", /* GPIO_80 */ 643 "USB_PHY_PS", 644 "MDP_VSYNC_P", 645 "MDP_VSYNC_S", 646 "ETH_3P3_EN", 647 "RADAR_INT", 648 "NFC_DWL_REQ", 649 "SM_GPIO_87", 650 "WCD_RESET_N", 651 "ALSP_INT_N", 652 "PRESS_INT", /* GPIO_90 */ 653 "SAR_INT_N", 654 "SD_CARD_DET_N", 655 "NC", 656 "PCIE0_RESET_N", 657 "PCIE0_CLK_REQ_N", 658 "PCIE0_WAKE_N", 659 "PCIE1_RESET_N", 660 "PCIE1_CLK_REQ_N", 661 "PCIE1_WAKE_N", 662 "CAM_MCLK0", /* GPIO_100 */ 663 "CAM_MCLK1", 664 "CAM_MCLK2", 665 "CAM_MCLK3", 666 "CAM_MCLK4", 667 "CAM_MCLK5", 668 "CAM2_RESET_N", 669 "CCI_I2C0_SDA", 670 "CCI_I2C0_SCL", 671 "CCI_I2C1_SDA", 672 "CCI_I2C1_SCL", /* GPIO_110 */ 673 "CCI_I2C2_SDA", 674 "CCI_I2C2_SCL", 675 "CCI_I2C3_SDA", 676 "CCI_I2C3_SCL", 677 "CAM5_RESET_N", 678 "CAM4_RESET_N", 679 "CAM3_RESET_N", 680 "IMU1_INT", 681 "MAG_INT_N", 682 "MI2S2_I2S_SCK", /* GPIO_120 */ 683 "MI2S2_I2S_DAT0", 684 "MI2S2_I2S_WS", 685 "HIFI_DAC_I2S_MCLK", 686 "MI2S2_I2S_DAT1", 687 "HIFI_DAC_I2S_SCK", 688 "HIFI_DAC_I2S_DAT0", 689 "NC", 690 "HIFI_DAC_I2S_WS", 691 "HST_BT_WLAN_SLIMBUS_CLK", 692 "HST_BT_WLAN_SLIMBUS_DAT0", /* GPIO_130 */ 693 "BT_LED_EN", 694 "WLAN_LED_EN", 695 "NC", 696 "NC", 697 "NC", 698 "UIM2_PRESENT", 699 "NC", 700 "NC", 701 "NC", 702 "UIM1_PRESENT", /* GPIO_140 */ 703 "NC", 704 "SM_RFFE0_DATA", 705 "NC", 706 "SM_RFFE1_DATA", 707 "SM_MSS_GRFC4", 708 "SM_MSS_GRFC5", 709 "SM_MSS_GRFC6", 710 "SM_MSS_GRFC7", 711 "SM_RFFE4_CLK", 712 "SM_RFFE4_DATA", /* GPIO_150 */ 713 "WLAN_COEX_UART1_RX", 714 "WLAN_COEX_UART1_TX", 715 "HST_SW_CTRL", 716 "DSI0_STATUS", 717 "DSI1_STATUS", 718 "APPS_PBL_BOOT_SPEED_1", 719 "APPS_BOOT_FROM_ROM", 720 "APPS_PBL_BOOT_SPEED_0", 721 "QLINK0_REQ", 722 "QLINK0_EN", /* GPIO_160 */ 723 "QLINK0_WMSS_RESET_N", 724 "NC", 725 "NC", 726 "NC", 727 "NC", 728 "NC", 729 "NC", 730 "WCD_SWR_TX_CLK", 731 "WCD_SWR_TX_DATA0", 732 "WCD_SWR_TX_DATA1", /* GPIO_170 */ 733 "WCD_SWR_RX_CLK", 734 "WCD_SWR_RX_DATA0", 735 "WCD_SWR_RX_DATA1", 736 "DMIC01_CLK", 737 "DMIC01_DATA", 738 "DMIC23_CLK", 739 "DMIC23_DATA", 740 "WSA_SWR_CLK", 741 "WSA_SWR_DATA", 742 "DMIC45_CLK", /* GPIO_180 */ 743 "DMIC45_DATA", 744 "WCD_SWR_TX_DATA2", 745 "SENSOR_I3C_SDA", 746 "SENSOR_I3C_SCL", 747 "CAM_OIS0_I3C_SDA", 748 "CAM_OIS0_I3C_SCL", 749 "IMU_SPI_MISO", 750 "IMU_SPI_MOSI", 751 "IMU_SPI_CLK", 752 "IMU_SPI_CS_N", /* GPIO_190 */ 753 "MAG_I2C_SDA", 754 "MAG_I2C_SCL", 755 "SENSOR_I2C_SDA", 756 "SENSOR_I2C_SCL", 757 "RADAR_SPI_MISO", 758 "RADAR_SPI_MOSI", 759 "RADAR_SPI_CLK", 760 "RADAR_SPI_CS_N", 761 "HST_BLE_UART_TX", 762 "HST_BLE_UART_RX", /* GPIO_200 */ 763 "HST_WLAN_UART_TX", 764 "HST_WLAN_UART_RX"; 765 766 pcie0_default_state: pcie0-default-state { 767 perst-pins { 768 pins = "gpio94"; 769 function = "gpio"; 770 drive-strength = <2>; 771 bias-pull-down; 772 }; 773 774 clkreq-pins { 775 pins = "gpio95"; 776 function = "pcie0_clkreqn"; 777 drive-strength = <2>; 778 bias-pull-up; 779 }; 780 781 wake-pins { 782 pins = "gpio96"; 783 function = "gpio"; 784 drive-strength = <2>; 785 bias-pull-up; 786 }; 787 }; 788 789 pcie1_default_state: pcie1-default-state { 790 perst-pins { 791 pins = "gpio97"; 792 function = "gpio"; 793 drive-strength = <2>; 794 bias-pull-down; 795 }; 796 797 clkreq-pins { 798 pins = "gpio98"; 799 function = "pcie1_clkreqn"; 800 drive-strength = <2>; 801 bias-pull-up; 802 }; 803 804 wake-pins { 805 pins = "gpio99"; 806 function = "gpio"; 807 drive-strength = <2>; 808 bias-pull-up; 809 }; 810 }; 811 812 sdc2_card_det_n: sd-card-det-n-state { 813 pins = "gpio92"; 814 function = "gpio"; 815 drive-strength = <2>; 816 bias-pull-up; 817 }; 818}; 819 820&uart2 { 821 status = "okay"; 822}; 823 824&ufs_mem_hc { 825 status = "okay"; 826 827 reset-gpios = <&tlmm 203 GPIO_ACTIVE_LOW>; 828 829 vcc-supply = <&vreg_l7b_2p96>; 830 vcc-max-microamp = <800000>; 831 vccq-supply = <&vreg_l9b_1p2>; 832 vccq-max-microamp = <900000>; 833 vdd-hba-supply = <&vreg_l9b_1p2>; 834}; 835 836&ufs_mem_phy { 837 status = "okay"; 838 839 vdda-phy-supply = <&vreg_l5b_0p88>; 840 vdda-pll-supply = <&vreg_l6b_1p2>; 841}; 842 843&usb_1 { 844 status = "okay"; 845}; 846 847&usb_1_dwc3 { 848 dr_mode = "otg"; 849 usb-role-switch; 850}; 851 852&usb_1_dwc3_hs { 853 remote-endpoint = <&pmic_glink_hs_in>; 854}; 855 856&usb_1_hsphy { 857 status = "okay"; 858 859 vdda-pll-supply = <&vreg_l5b_0p88>; 860 vdda18-supply = <&vreg_l1c_1p8>; 861 vdda33-supply = <&vreg_l2b_3p07>; 862}; 863 864&usb_1_qmpphy { 865 status = "okay"; 866 867 vdda-phy-supply = <&vreg_l6b_1p2>; 868 vdda-pll-supply = <&vreg_l1b_0p88>; 869}; 870 871&usb_1_qmpphy_out { 872 remote-endpoint = <&pmic_glink_ss_in>; 873}; 874 875&usb_2 { 876 status = "okay"; 877}; 878 879&usb_2_dwc3 { 880 dr_mode = "host"; 881 882 pinctrl-names = "default"; 883 pinctrl-0 = <&usb_hub_enabled_state>; 884}; 885 886&usb_2_hsphy { 887 status = "okay"; 888 889 vdda-pll-supply = <&vreg_l5b_0p88>; 890 vdda18-supply = <&vreg_l1c_1p8>; 891 vdda33-supply = <&vreg_l2b_3p07>; 892}; 893 894&usb_2_qmpphy { 895 status = "okay"; 896 897 vdda-phy-supply = <&vreg_l6b_1p2>; 898 vdda-pll-supply = <&vreg_l5b_0p88>; 899}; 900 901/* PINCTRL - additions to nodes defined in sm8350.dtsi */ 902 903&tlmm { 904 usb_hub_enabled_state: usb-hub-enabled-state { 905 pins = "gpio42"; 906 function = "gpio"; 907 908 drive-strength = <2>; 909 output-low; 910 }; 911 912 lt9611_state: lt9611-state { 913 rst-pins { 914 pins = "gpio48"; 915 function = "gpio"; 916 917 output-high; 918 input-disable; 919 }; 920 921 irq-pins { 922 pins = "gpio50"; 923 function = "gpio"; 924 bias-disable; 925 }; 926 }; 927}; 928