1// SPDX-License-Identifier: BSD-3-Clause 2/* 3 * Copyright (c) 2020-2021, Linaro Limited 4 */ 5 6/dts-v1/; 7 8#include <dt-bindings/regulator/qcom,rpmh-regulator.h> 9#include "sm8350.dtsi" 10 11/ { 12 model = "Qualcomm Technologies, Inc. SM8350 HDK"; 13 compatible = "qcom,sm8350-hdk", "qcom,sm8350"; 14 15 aliases { 16 serial0 = &uart2; 17 }; 18 19 chosen { 20 stdout-path = "serial0:115200n8"; 21 }; 22 23 hdmi-connector { 24 compatible = "hdmi-connector"; 25 type = "a"; 26 27 port { 28 hdmi_con: endpoint { 29 remote-endpoint = <<9611_out>; 30 }; 31 }; 32 }; 33 34 pmic-glink { 35 compatible = "qcom,sm8350-pmic-glink", "qcom,pmic-glink"; 36 #address-cells = <1>; 37 #size-cells = <0>; 38 39 connector@0 { 40 compatible = "usb-c-connector"; 41 reg = <0>; 42 power-role = "dual"; 43 data-role = "dual"; 44 45 ports { 46 #address-cells = <1>; 47 #size-cells = <0>; 48 49 port@0 { 50 reg = <0>; 51 52 pmic_glink_hs_in: endpoint { 53 remote-endpoint = <&usb_1_dwc3_hs>; 54 }; 55 }; 56 57 port@1 { 58 reg = <1>; 59 60 pmic_glink_ss_in: endpoint { 61 remote-endpoint = <&usb_1_dwc3_ss>; 62 }; 63 }; 64 }; 65 }; 66 }; 67 68 vph_pwr: vph-pwr-regulator { 69 compatible = "regulator-fixed"; 70 regulator-name = "vph_pwr"; 71 regulator-min-microvolt = <3700000>; 72 regulator-max-microvolt = <3700000>; 73 74 regulator-always-on; 75 regulator-boot-on; 76 }; 77 78 lt9611_1v2: lt9611-1v2-regulator { 79 compatible = "regulator-fixed"; 80 regulator-name = "LT9611_1V2"; 81 82 vin-supply = <&vph_pwr>; 83 regulator-min-microvolt = <1200000>; 84 regulator-max-microvolt = <1200000>; 85 gpio = <&tlmm 49 GPIO_ACTIVE_HIGH>; 86 enable-active-high; 87 regulator-boot-on; 88 }; 89 90 lt9611_3v3: lt9611-3v3-regulator { 91 compatible = "regulator-fixed"; 92 regulator-name = "LT9611_3V3"; 93 94 vin-supply = <&vreg_bob>; 95 gpio = <&tlmm 47 GPIO_ACTIVE_HIGH>; 96 regulator-min-microvolt = <3300000>; 97 regulator-max-microvolt = <3300000>; 98 enable-active-high; 99 regulator-boot-on; 100 regulator-always-on; 101 }; 102}; 103 104&adsp { 105 status = "okay"; 106 firmware-name = "qcom/sm8350/adsp.mbn"; 107}; 108 109&apps_rsc { 110 regulators-0 { 111 compatible = "qcom,pm8350-rpmh-regulators"; 112 qcom,pmic-id = "b"; 113 114 vdd-s1-supply = <&vph_pwr>; 115 vdd-s2-supply = <&vph_pwr>; 116 vdd-s3-supply = <&vph_pwr>; 117 vdd-s4-supply = <&vph_pwr>; 118 vdd-s5-supply = <&vph_pwr>; 119 vdd-s6-supply = <&vph_pwr>; 120 vdd-s7-supply = <&vph_pwr>; 121 vdd-s8-supply = <&vph_pwr>; 122 vdd-s9-supply = <&vph_pwr>; 123 vdd-s10-supply = <&vph_pwr>; 124 vdd-s11-supply = <&vph_pwr>; 125 vdd-s12-supply = <&vph_pwr>; 126 127 vdd-l1-l4-supply = <&vreg_s11b_0p95>; 128 vdd-l2-l7-supply = <&vreg_bob>; 129 vdd-l3-l5-supply = <&vreg_bob>; 130 vdd-l6-l9-l10-supply = <&vreg_s11b_0p95>; 131 132 vreg_s10b_1p8: smps10 { 133 regulator-name = "vreg_s10b_1p8"; 134 regulator-min-microvolt = <1800000>; 135 regulator-max-microvolt = <1800000>; 136 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 137 }; 138 139 vreg_s11b_0p95: smps11 { 140 regulator-name = "vreg_s11b_0p95"; 141 regulator-min-microvolt = <952000>; 142 regulator-max-microvolt = <952000>; 143 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 144 }; 145 146 vreg_s12b_1p25: smps12 { 147 regulator-name = "vreg_s12b_1p25"; 148 regulator-min-microvolt = <1256000>; 149 regulator-max-microvolt = <1256000>; 150 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 151 }; 152 153 vreg_l1b_0p88: ldo1 { 154 regulator-name = "vreg_l1b_0p88"; 155 regulator-min-microvolt = <912000>; 156 regulator-max-microvolt = <920000>; 157 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 158 }; 159 160 vreg_l2b_3p07: ldo2 { 161 regulator-name = "vreg_l2b_3p07"; 162 regulator-min-microvolt = <3072000>; 163 regulator-max-microvolt = <3072000>; 164 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 165 }; 166 167 vreg_l3b_0p9: ldo3 { 168 regulator-name = "vreg_l3b_0p9"; 169 regulator-min-microvolt = <904000>; 170 regulator-max-microvolt = <904000>; 171 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 172 }; 173 174 vreg_l5b_0p88: ldo5 { 175 regulator-name = "vreg_l5b_0p88"; 176 regulator-min-microvolt = <880000>; 177 regulator-max-microvolt = <888000>; 178 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 179 regulator-allow-set-load; 180 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 181 RPMH_REGULATOR_MODE_HPM>; 182 }; 183 184 vreg_l6b_1p2: ldo6 { 185 regulator-name = "vreg_l6b_1p2"; 186 regulator-min-microvolt = <1200000>; 187 regulator-max-microvolt = <1208000>; 188 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 189 regulator-allow-set-load; 190 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 191 RPMH_REGULATOR_MODE_HPM>; 192 }; 193 194 vreg_l7b_2p96: ldo7 { 195 regulator-name = "vreg_l7b_2p96"; 196 regulator-min-microvolt = <2504000>; 197 regulator-max-microvolt = <2504000>; 198 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 199 regulator-allow-set-load; 200 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 201 RPMH_REGULATOR_MODE_HPM>; 202 }; 203 204 vreg_l9b_1p2: ldo9 { 205 regulator-name = "vreg_l9b_1p2"; 206 regulator-min-microvolt = <1200000>; 207 regulator-max-microvolt = <1200000>; 208 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 209 regulator-allow-set-load; 210 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 211 RPMH_REGULATOR_MODE_HPM>; 212 }; 213 }; 214 215 regulators-1 { 216 compatible = "qcom,pm8350c-rpmh-regulators"; 217 qcom,pmic-id = "c"; 218 219 vdd-s1-supply = <&vph_pwr>; 220 vdd-s2-supply = <&vph_pwr>; 221 vdd-s3-supply = <&vph_pwr>; 222 vdd-s4-supply = <&vph_pwr>; 223 vdd-s5-supply = <&vph_pwr>; 224 vdd-s6-supply = <&vph_pwr>; 225 vdd-s7-supply = <&vph_pwr>; 226 vdd-s8-supply = <&vph_pwr>; 227 vdd-s9-supply = <&vph_pwr>; 228 vdd-s10-supply = <&vph_pwr>; 229 230 vdd-l1-l12-supply = <&vreg_s1c_1p86>; 231 vdd-l2-l8-supply = <&vreg_s1c_1p86>; 232 vdd-l3-l4-l5-l7-l13-supply = <&vreg_bob>; 233 vdd-l6-l9-l11-supply = <&vreg_bob>; 234 vdd-l10-supply = <&vreg_s12b_1p25>; 235 236 vdd-bob-supply = <&vph_pwr>; 237 238 vreg_s1c_1p86: smps1 { 239 regulator-name = "vreg_s1c_1p86"; 240 regulator-min-microvolt = <1856000>; 241 regulator-max-microvolt = <1880000>; 242 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 243 }; 244 245 vreg_bob: bob { 246 regulator-name = "vreg_bob"; 247 regulator-min-microvolt = <3008000>; 248 regulator-max-microvolt = <3960000>; 249 regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>; 250 }; 251 252 vreg_l1c_1p8: ldo1 { 253 regulator-name = "vreg_l1c_1p8"; 254 regulator-min-microvolt = <1800000>; 255 regulator-max-microvolt = <1800000>; 256 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 257 }; 258 259 vreg_l2c_1p8: ldo2 { 260 regulator-name = "vreg_l2c_1p8"; 261 regulator-min-microvolt = <1800000>; 262 regulator-max-microvolt = <1800000>; 263 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 264 }; 265 266 vreg_l6c_1p8: ldo6 { 267 regulator-name = "vreg_l6c_1p8"; 268 regulator-min-microvolt = <1800000>; 269 regulator-max-microvolt = <2960000>; 270 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 271 }; 272 273 vreg_l9c_2p96: ldo9 { 274 regulator-name = "vreg_l9c_2p96"; 275 regulator-min-microvolt = <2960000>; 276 regulator-max-microvolt = <3008000>; 277 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 278 }; 279 280 vreg_l10c_1p2: ldo10 { 281 regulator-name = "vreg_l10c_1p2"; 282 regulator-min-microvolt = <1200000>; 283 regulator-max-microvolt = <1200000>; 284 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 285 }; 286 }; 287}; 288 289&cdsp { 290 status = "okay"; 291 firmware-name = "qcom/sm8350/cdsp.mbn"; 292}; 293 294&dispcc { 295 status = "okay"; 296}; 297 298&mdss_dsi0 { 299 vdda-supply = <&vreg_l6b_1p2>; 300 status = "okay"; 301 302 ports { 303 port@1 { 304 endpoint { 305 remote-endpoint = <<9611_a>; 306 data-lanes = <0 1 2 3>; 307 }; 308 }; 309 }; 310}; 311 312&mdss_dsi0_phy { 313 vdds-supply = <&vreg_l5b_0p88>; 314 status = "okay"; 315}; 316 317&gpi_dma1 { 318 status = "okay"; 319}; 320 321&gpu { 322 status = "okay"; 323 324 zap-shader { 325 firmware-name = "qcom/sm8350/a660_zap.mbn"; 326 }; 327}; 328 329&i2c15 { 330 clock-frequency = <400000>; 331 status = "okay"; 332 333 lt9611_codec: hdmi-bridge@2b { 334 compatible = "lontium,lt9611uxc"; 335 reg = <0x2b>; 336 337 interrupts-extended = <&tlmm 50 IRQ_TYPE_EDGE_FALLING>; 338 reset-gpios = <&tlmm 48 GPIO_ACTIVE_HIGH>; 339 340 vdd-supply = <<9611_1v2>; 341 vcc-supply = <<9611_3v3>; 342 343 pinctrl-names = "default"; 344 pinctrl-0 = <<9611_state>; 345 346 ports { 347 #address-cells = <1>; 348 #size-cells = <0>; 349 350 port@0 { 351 reg = <0>; 352 353 lt9611_a: endpoint { 354 remote-endpoint = <&mdss_dsi0_out>; 355 }; 356 }; 357 358 port@2 { 359 reg = <2>; 360 361 lt9611_out: endpoint { 362 remote-endpoint = <&hdmi_con>; 363 }; 364 }; 365 }; 366 }; 367}; 368 369&mdss { 370 status = "okay"; 371}; 372 373&mdss_mdp { 374 status = "okay"; 375}; 376 377&mpss { 378 status = "okay"; 379 firmware-name = "qcom/sm8350/modem.mbn"; 380}; 381 382&pcie0 { 383 pinctrl-names = "default"; 384 pinctrl-0 = <&pcie0_default_state>; 385 386 perst-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>; 387 wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>; 388 389 status = "okay"; 390}; 391 392&pcie0_phy { 393 vdda-phy-supply = <&vreg_l5b_0p88>; 394 vdda-pll-supply = <&vreg_l6b_1p2>; 395 396 status = "okay"; 397}; 398 399&pcie1 { 400 perst-gpios = <&tlmm 97 GPIO_ACTIVE_LOW>; 401 wake-gpios = <&tlmm 99 GPIO_ACTIVE_HIGH>; 402 403 pinctrl-names = "default"; 404 pinctrl-0 = <&pcie1_default_state>; 405 406 status = "okay"; 407}; 408 409&pcie1_phy { 410 status = "okay"; 411 vdda-phy-supply = <&vreg_l5b_0p88>; 412 vdda-pll-supply = <&vreg_l6b_1p2>; 413}; 414 415&qupv3_id_0 { 416 status = "okay"; 417}; 418 419&qupv3_id_2 { 420 status = "okay"; 421}; 422 423&slpi { 424 status = "okay"; 425 firmware-name = "qcom/sm8350/slpi.mbn"; 426}; 427 428&tlmm { 429 gpio-reserved-ranges = <52 8>; 430 431 gpio-line-names = 432 "APPS_I2C_SDA", /* GPIO_0 */ 433 "APPS_I2C_SCL", 434 "FSA_INT_N", 435 "USER_LED3_EN", 436 "SMBUS_SDA_1P8", 437 "SMBUS_SCL_1P8", 438 "2M2_3P3_EN", 439 "ALERT_DUAL_M2_N", 440 "EXP_UART_CTS", 441 "EXP_UART_RFR", 442 "EXP_UART_TX", /* GPIO_10 */ 443 "EXP_UART_RX", 444 "NC", 445 "NC", 446 "RCM_MARKER1", 447 "WSA0_EN", 448 "CAM1_RESET_N", 449 "CAM0_RESET_N", 450 "DEBUG_UART_TX", 451 "DEBUG_UART_RX", 452 "TS_I2C_SDA", /* GPIO_20 */ 453 "TS_I2C_SCL", 454 "TS_RESET_N", 455 "TS_INT_N", 456 "DISP0_RESET_N", 457 "DISP1_RESET_N", 458 "ETH_RESET", 459 "RCM_MARKER2", 460 "CAM_DC_MIPI_MUX_EN", 461 "CAM_DC_MIPI_MUX_SEL", 462 "AFC_PHY_TA_D_PLUS", /* GPIO_30 */ 463 "AFC_PHY_TA_D_MINUS", 464 "PM8008_1_IRQ", 465 "PM8008_1_RESET_N", 466 "PM8008_2_IRQ", 467 "PM8008_2_RESET_N", 468 "CAM_DC_I3C_SDA", 469 "CAM_DC_I3C_SCL", 470 "FP_INT_N", 471 "FP_WUHB_INT_N", 472 "SMB_SPMI_DATA", /* GPIO_40 */ 473 "SMB_SPMI_CLK", 474 "USB_HUB_RESET", 475 "FORCE_USB_BOOT", 476 "LRF_IRQ", 477 "NC", 478 "IMU2_INT", 479 "HDMI_3P3_EN", 480 "HDMI_RSTN", 481 "HDMI_1P2_EN", 482 "HDMI_INT", /* GPIO_50 */ 483 "USB1_ID", 484 "FP_SPI_MISO", 485 "FP_SPI_MOSI", 486 "FP_SPI_CLK", 487 "FP_SPI_CS_N", 488 "NFC_ESE_SPI_MISO", 489 "NFC_ESE_SPI_MOSI", 490 "NFC_ESE_SPI_CLK", 491 "NFC_ESE_SPI_CS", 492 "NFC_I2C_SDA", /* GPIO_60 */ 493 "NFC_I2C_SCLC", 494 "NFC_EN", 495 "NFC_CLK_REQ", 496 "HST_WLAN_EN", 497 "HST_BT_EN", 498 "HST_SW_CTRL", 499 "NC", 500 "HST_BT_UART_CTS", 501 "HST_BT_UART_RFR", 502 "HST_BT_UART_TX", /* GPIO_70 */ 503 "HST_BT_UART_RX", 504 "CAM_DC_SPI0_MISO", 505 "CAM_DC_SPI0_MOSI", 506 "CAM_DC_SPI0_CLK", 507 "CAM_DC_SPI0_CS_N", 508 "CAM_DC_SPI1_MISO", 509 "CAM_DC_SPI1_MOSI", 510 "CAM_DC_SPI1_CLK", 511 "CAM_DC_SPI1_CS_N", 512 "HALL_INT_N", /* GPIO_80 */ 513 "USB_PHY_PS", 514 "MDP_VSYNC_P", 515 "MDP_VSYNC_S", 516 "ETH_3P3_EN", 517 "RADAR_INT", 518 "NFC_DWL_REQ", 519 "SM_GPIO_87", 520 "WCD_RESET_N", 521 "ALSP_INT_N", 522 "PRESS_INT", /* GPIO_90 */ 523 "SAR_INT_N", 524 "SD_CARD_DET_N", 525 "NC", 526 "PCIE0_RESET_N", 527 "PCIE0_CLK_REQ_N", 528 "PCIE0_WAKE_N", 529 "PCIE1_RESET_N", 530 "PCIE1_CLK_REQ_N", 531 "PCIE1_WAKE_N", 532 "CAM_MCLK0", /* GPIO_100 */ 533 "CAM_MCLK1", 534 "CAM_MCLK2", 535 "CAM_MCLK3", 536 "CAM_MCLK4", 537 "CAM_MCLK5", 538 "CAM2_RESET_N", 539 "CCI_I2C0_SDA", 540 "CCI_I2C0_SCL", 541 "CCI_I2C1_SDA", 542 "CCI_I2C1_SCL", /* GPIO_110 */ 543 "CCI_I2C2_SDA", 544 "CCI_I2C2_SCL", 545 "CCI_I2C3_SDA", 546 "CCI_I2C3_SCL", 547 "CAM5_RESET_N", 548 "CAM4_RESET_N", 549 "CAM3_RESET_N", 550 "IMU1_INT", 551 "MAG_INT_N", 552 "MI2S2_I2S_SCK", /* GPIO_120 */ 553 "MI2S2_I2S_DAT0", 554 "MI2S2_I2S_WS", 555 "HIFI_DAC_I2S_MCLK", 556 "MI2S2_I2S_DAT1", 557 "HIFI_DAC_I2S_SCK", 558 "HIFI_DAC_I2S_DAT0", 559 "NC", 560 "HIFI_DAC_I2S_WS", 561 "HST_BT_WLAN_SLIMBUS_CLK", 562 "HST_BT_WLAN_SLIMBUS_DAT0", /* GPIO_130 */ 563 "BT_LED_EN", 564 "WLAN_LED_EN", 565 "NC", 566 "NC", 567 "NC", 568 "UIM2_PRESENT", 569 "NC", 570 "NC", 571 "NC", 572 "UIM1_PRESENT", /* GPIO_140 */ 573 "NC", 574 "SM_RFFE0_DATA", 575 "NC", 576 "SM_RFFE1_DATA", 577 "SM_MSS_GRFC4", 578 "SM_MSS_GRFC5", 579 "SM_MSS_GRFC6", 580 "SM_MSS_GRFC7", 581 "SM_RFFE4_CLK", 582 "SM_RFFE4_DATA", /* GPIO_150 */ 583 "WLAN_COEX_UART1_RX", 584 "WLAN_COEX_UART1_TX", 585 "HST_SW_CTRL", 586 "DSI0_STATUS", 587 "DSI1_STATUS", 588 "APPS_PBL_BOOT_SPEED_1", 589 "APPS_BOOT_FROM_ROM", 590 "APPS_PBL_BOOT_SPEED_0", 591 "QLINK0_REQ", 592 "QLINK0_EN", /* GPIO_160 */ 593 "QLINK0_WMSS_RESET_N", 594 "NC", 595 "NC", 596 "NC", 597 "NC", 598 "NC", 599 "NC", 600 "WCD_SWR_TX_CLK", 601 "WCD_SWR_TX_DATA0", 602 "WCD_SWR_TX_DATA1", /* GPIO_170 */ 603 "WCD_SWR_RX_CLK", 604 "WCD_SWR_RX_DATA0", 605 "WCD_SWR_RX_DATA1", 606 "DMIC01_CLK", 607 "DMIC01_DATA", 608 "DMIC23_CLK", 609 "DMIC23_DATA", 610 "WSA_SWR_CLK", 611 "WSA_SWR_DATA", 612 "DMIC45_CLK", /* GPIO_180 */ 613 "DMIC45_DATA", 614 "WCD_SWR_TX_DATA2", 615 "SENSOR_I3C_SDA", 616 "SENSOR_I3C_SCL", 617 "CAM_OIS0_I3C_SDA", 618 "CAM_OIS0_I3C_SCL", 619 "IMU_SPI_MISO", 620 "IMU_SPI_MOSI", 621 "IMU_SPI_CLK", 622 "IMU_SPI_CS_N", /* GPIO_190 */ 623 "MAG_I2C_SDA", 624 "MAG_I2C_SCL", 625 "SENSOR_I2C_SDA", 626 "SENSOR_I2C_SCL", 627 "RADAR_SPI_MISO", 628 "RADAR_SPI_MOSI", 629 "RADAR_SPI_CLK", 630 "RADAR_SPI_CS_N", 631 "HST_BLE_UART_TX", 632 "HST_BLE_UART_RX", /* GPIO_200 */ 633 "HST_WLAN_UART_TX", 634 "HST_WLAN_UART_RX"; 635 636 pcie0_default_state: pcie0-default-state { 637 perst-pins { 638 pins = "gpio94"; 639 function = "gpio"; 640 drive-strength = <2>; 641 bias-pull-down; 642 }; 643 644 clkreq-pins { 645 pins = "gpio95"; 646 function = "pcie0_clkreqn"; 647 drive-strength = <2>; 648 bias-pull-up; 649 }; 650 651 wake-pins { 652 pins = "gpio96"; 653 function = "gpio"; 654 drive-strength = <2>; 655 bias-pull-up; 656 }; 657 }; 658 659 pcie1_default_state: pcie1-default-state { 660 perst-pins { 661 pins = "gpio97"; 662 function = "gpio"; 663 drive-strength = <2>; 664 bias-pull-down; 665 }; 666 667 clkreq-pins { 668 pins = "gpio98"; 669 function = "pcie1_clkreqn"; 670 drive-strength = <2>; 671 bias-pull-up; 672 }; 673 674 wake-pins { 675 pins = "gpio99"; 676 function = "gpio"; 677 drive-strength = <2>; 678 bias-pull-up; 679 }; 680 }; 681}; 682 683&uart2 { 684 status = "okay"; 685}; 686 687&ufs_mem_hc { 688 status = "okay"; 689 690 reset-gpios = <&tlmm 203 GPIO_ACTIVE_LOW>; 691 692 vcc-supply = <&vreg_l7b_2p96>; 693 vcc-max-microamp = <800000>; 694 vccq-supply = <&vreg_l9b_1p2>; 695 vccq-max-microamp = <900000>; 696}; 697 698&ufs_mem_phy { 699 status = "okay"; 700 701 vdda-phy-supply = <&vreg_l5b_0p88>; 702 vdda-pll-supply = <&vreg_l6b_1p2>; 703}; 704 705&usb_1 { 706 status = "okay"; 707}; 708 709&usb_1_dwc3 { 710 dr_mode = "otg"; 711 usb-role-switch; 712}; 713 714&usb_1_dwc3_hs { 715 remote-endpoint = <&pmic_glink_hs_in>; 716}; 717 718&usb_1_dwc3_ss { 719 remote-endpoint = <&pmic_glink_ss_in>; 720}; 721 722&usb_1_hsphy { 723 status = "okay"; 724 725 vdda-pll-supply = <&vreg_l5b_0p88>; 726 vdda18-supply = <&vreg_l1c_1p8>; 727 vdda33-supply = <&vreg_l2b_3p07>; 728}; 729 730&usb_1_qmpphy { 731 status = "okay"; 732 733 vdda-phy-supply = <&vreg_l6b_1p2>; 734 vdda-pll-supply = <&vreg_l1b_0p88>; 735}; 736 737&usb_2 { 738 status = "okay"; 739}; 740 741&usb_2_dwc3 { 742 dr_mode = "host"; 743 744 pinctrl-names = "default"; 745 pinctrl-0 = <&usb_hub_enabled_state>; 746}; 747 748&usb_2_hsphy { 749 status = "okay"; 750 751 vdda-pll-supply = <&vreg_l5b_0p88>; 752 vdda18-supply = <&vreg_l1c_1p8>; 753 vdda33-supply = <&vreg_l2b_3p07>; 754}; 755 756&usb_2_qmpphy { 757 status = "okay"; 758 759 vdda-phy-supply = <&vreg_l6b_1p2>; 760 vdda-pll-supply = <&vreg_l5b_0p88>; 761}; 762 763/* PINCTRL - additions to nodes defined in sm8350.dtsi */ 764 765&tlmm { 766 usb_hub_enabled_state: usb-hub-enabled-state { 767 pins = "gpio42"; 768 function = "gpio"; 769 770 drive-strength = <2>; 771 output-low; 772 }; 773 774 lt9611_state: lt9611-state { 775 rst-pins { 776 pins = "gpio48"; 777 function = "gpio"; 778 779 output-high; 780 input-disable; 781 }; 782 783 irq-pins { 784 pins = "gpio50"; 785 function = "gpio"; 786 bias-disable; 787 }; 788 }; 789}; 790