xref: /linux/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts (revision 17cfcb68af3bc7d5e8ae08779b1853310a2949f3)
1// SPDX-License-Identifier: BSD-3-Clause
2/*
3 * Lenovo Yoga C630
4 *
5 * Copyright (c) 2019, Linaro Ltd.
6 */
7
8/dts-v1/;
9
10#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11#include "sdm845.dtsi"
12#include "pm8998.dtsi"
13
14/ {
15	model = "Lenovo Yoga C630";
16	compatible = "lenovo,yoga-c630", "qcom,sdm845";
17
18	aliases {
19		hsuart0 = &uart6;
20	};
21};
22
23&apps_rsc {
24	pm8998-rpmh-regulators {
25		compatible = "qcom,pm8998-rpmh-regulators";
26		qcom,pmic-id = "a";
27
28		vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>;
29		vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
30
31		vreg_s2a_1p125: smps2 {
32		};
33
34		vreg_s3a_1p35: smps3 {
35			regulator-min-microvolt = <1352000>;
36			regulator-max-microvolt = <1352000>;
37			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
38		};
39
40		vreg_s4a_1p8: smps4 {
41			regulator-min-microvolt = <1800000>;
42			regulator-max-microvolt = <1800000>;
43			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
44		};
45
46		vreg_s5a_2p04: smps5 {
47			regulator-min-microvolt = <2040000>;
48			regulator-max-microvolt = <2040000>;
49			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
50		};
51
52		vreg_s7a_1p025: smps7 {
53		};
54
55		vdd_qusb_hs0:
56		vdda_hp_pcie_core:
57		vdda_mipi_csi0_0p9:
58		vdda_mipi_csi1_0p9:
59		vdda_mipi_csi2_0p9:
60		vdda_mipi_dsi0_pll:
61		vdda_mipi_dsi1_pll:
62		vdda_qlink_lv:
63		vdda_qlink_lv_ck:
64		vdda_qrefs_0p875:
65		vdda_pcie_core:
66		vdda_pll_cc_ebi01:
67		vdda_pll_cc_ebi23:
68		vdda_sp_sensor:
69		vdda_ufs1_core:
70		vdda_ufs2_core:
71		vdda_usb1_ss_core:
72		vdda_usb2_ss_core:
73		vreg_l1a_0p875: ldo1 {
74			regulator-min-microvolt = <880000>;
75			regulator-max-microvolt = <880000>;
76			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
77		};
78
79		vddpx_10:
80		vreg_l2a_1p2: ldo2 {
81			regulator-min-microvolt = <1200000>;
82			regulator-max-microvolt = <1200000>;
83			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
84			regulator-always-on;
85		};
86
87		vreg_l3a_1p0: ldo3 {
88		};
89
90		vdd_wcss_cx:
91		vdd_wcss_mx:
92		vdda_wcss_pll:
93		vreg_l5a_0p8: ldo5 {
94			regulator-min-microvolt = <800000>;
95			regulator-max-microvolt = <800000>;
96			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
97		};
98
99		vddpx_13:
100		vreg_l6a_1p8: ldo6 {
101			regulator-min-microvolt = <1800000>;
102			regulator-max-microvolt = <1800000>;
103			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
104		};
105
106		vreg_l7a_1p8: ldo7 {
107			regulator-min-microvolt = <1800000>;
108			regulator-max-microvolt = <1800000>;
109			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
110		};
111
112		vreg_l8a_1p2: ldo8 {
113		};
114
115		vreg_l9a_1p8: ldo9 {
116		};
117
118		vreg_l10a_1p8: ldo10 {
119		};
120
121		vreg_l11a_1p0: ldo11 {
122		};
123
124		vdd_qfprom:
125		vdd_qfprom_sp:
126		vdda_apc1_cs_1p8:
127		vdda_gfx_cs_1p8:
128		vdda_qrefs_1p8:
129		vdda_qusb_hs0_1p8:
130		vddpx_11:
131		vreg_l12a_1p8: ldo12 {
132			regulator-min-microvolt = <1800000>;
133			regulator-max-microvolt = <1800000>;
134			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
135		};
136
137		vddpx_2:
138		vreg_l13a_2p95: ldo13 {
139		};
140
141		vreg_l14a_1p88: ldo14 {
142			regulator-min-microvolt = <1880000>;
143			regulator-max-microvolt = <1880000>;
144			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
145			regulator-always-on;
146		};
147
148		vreg_l15a_1p8: ldo15 {
149		};
150
151		vreg_l16a_2p7: ldo16 {
152		};
153
154		vreg_l17a_1p3: ldo17 {
155			regulator-min-microvolt = <1304000>;
156			regulator-max-microvolt = <1304000>;
157			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
158		};
159
160		vreg_l18a_2p7: ldo18 {
161		};
162
163		vreg_l19a_3p0: ldo19 {
164			regulator-min-microvolt = <3100000>;
165			regulator-max-microvolt = <3108000>;
166			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
167		};
168
169		vreg_l20a_2p95: ldo20 {
170			regulator-min-microvolt = <2960000>;
171			regulator-max-microvolt = <2960000>;
172			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
173		};
174
175		vreg_l21a_2p95: ldo21 {
176		};
177
178		vreg_l22a_2p85: ldo22 {
179		};
180
181		vreg_l23a_3p3: ldo23 {
182		};
183
184		vdda_qusb_hs0_3p1:
185		vreg_l24a_3p075: ldo24 {
186			regulator-min-microvolt = <3075000>;
187			regulator-max-microvolt = <3083000>;
188			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
189		};
190
191		vreg_l25a_3p3: ldo25 {
192			regulator-min-microvolt = <3104000>;
193			regulator-max-microvolt = <3112000>;
194			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
195		};
196
197		vdda_hp_pcie_1p2:
198		vdda_hv_ebi0:
199		vdda_hv_ebi1:
200		vdda_hv_ebi2:
201		vdda_hv_ebi3:
202		vdda_mipi_csi_1p25:
203		vdda_mipi_dsi0_1p2:
204		vdda_mipi_dsi1_1p2:
205		vdda_pcie_1p2:
206		vdda_ufs1_1p2:
207		vdda_ufs2_1p2:
208		vdda_usb1_ss_1p2:
209		vdda_usb2_ss_1p2:
210		vreg_l26a_1p2: ldo26 {
211			regulator-min-microvolt = <1200000>;
212			regulator-max-microvolt = <1208000>;
213			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
214		};
215
216		vreg_l28a_3p0: ldo28 {
217		};
218
219		vreg_lvs1a_1p8: lvs1 {
220		};
221
222		vreg_lvs2a_1p8: lvs2 {
223		};
224	};
225};
226
227&apps_smmu {
228	/* TODO: Figure out how to survive booting with this enabled */
229	status = "disabled";
230};
231
232&gcc {
233	protected-clocks = <GCC_QSPI_CORE_CLK>,
234			   <GCC_QSPI_CORE_CLK_SRC>,
235			   <GCC_QSPI_CNOC_PERIPH_AHB_CLK>;
236};
237
238&i2c1 {
239	status = "okay";
240	clock-frequency = <400000>;
241};
242
243&i2c3 {
244	status = "okay";
245	clock-frequency = <400000>;
246
247	hid@15 {
248		compatible = "hid-over-i2c";
249		reg = <0x15>;
250		hid-descr-addr = <0x1>;
251
252		interrupts-extended = <&tlmm 37 IRQ_TYPE_EDGE_RISING>;
253	};
254
255	hid@2c {
256		compatible = "hid-over-i2c";
257		reg = <0x2c>;
258		hid-descr-addr = <0x20>;
259
260		interrupts-extended = <&tlmm 37 IRQ_TYPE_EDGE_RISING>;
261
262		pinctrl-names = "default";
263		pinctrl-0 = <&i2c2_hid_active>;
264	};
265};
266
267&i2c5 {
268	status = "okay";
269	clock-frequency = <400000>;
270
271	hid@10 {
272		compatible = "hid-over-i2c";
273		reg = <0x10>;
274		hid-descr-addr = <0x1>;
275
276		interrupts-extended = <&tlmm 125 IRQ_TYPE_EDGE_FALLING>;
277
278		pinctrl-names = "default";
279		pinctrl-0 = <&i2c6_hid_active>;
280	};
281};
282
283&i2c11 {
284	status = "okay";
285	clock-frequency = <400000>;
286
287	hid@5c {
288		compatible = "hid-over-i2c";
289		reg = <0x5c>;
290		hid-descr-addr = <0x1>;
291
292		interrupts-extended = <&tlmm 92 IRQ_TYPE_LEVEL_LOW>;
293
294		pinctrl-names = "default";
295		pinctrl-0 = <&i2c12_hid_active>;
296	};
297};
298
299&qup_i2c12_default {
300	drive-strength = <2>;
301	bias-disable;
302};
303
304&qup_uart6_default {
305	pinmux {
306		 pins = "gpio45", "gpio46", "gpio47", "gpio48";
307		 function = "qup6";
308	};
309
310	cts {
311		pins = "gpio45";
312		bias-pull-down;
313	};
314
315	rts-tx {
316		pins = "gpio46", "gpio47";
317		drive-strength = <2>;
318		bias-disable;
319	};
320
321	rx {
322		pins = "gpio48";
323		bias-pull-up;
324	};
325};
326
327&qupv3_id_0 {
328	status = "okay";
329};
330
331&qupv3_id_1 {
332	status = "okay";
333};
334
335&tlmm {
336	gpio-reserved-ranges = <0 4>, <81 4>;
337
338	i2c2_hid_active: i2c2-hid-active {
339		pins = <37>;
340		function = "gpio";
341
342		input-enable;
343		bias-pull-up;
344		drive-strength = <2>;
345	};
346
347	i2c6_hid_active: i2c6-hid-active {
348		pins = <125>;
349		function = "gpio";
350
351		input-enable;
352		bias-pull-up;
353		drive-strength = <2>;
354	};
355
356	i2c12_hid_active: i2c12-hid-active {
357		pins = <92>;
358		function = "gpio";
359
360		input-enable;
361		bias-pull-up;
362		drive-strength = <2>;
363	};
364};
365
366&uart6 {
367	status = "okay";
368
369	bluetooth {
370		compatible = "qcom,wcn3990-bt";
371
372		vddio-supply = <&vreg_s4a_1p8>;
373		vddxo-supply = <&vreg_l7a_1p8>;
374		vddrf-supply = <&vreg_l17a_1p3>;
375		vddch0-supply = <&vreg_l25a_3p3>;
376		max-speed = <3200000>;
377	};
378};
379
380&ufs_mem_hc {
381	status = "okay";
382
383	vcc-supply = <&vreg_l20a_2p95>;
384	vcc-max-microamp = <600000>;
385};
386
387&ufs_mem_phy {
388	status = "okay";
389
390	vdda-phy-supply = <&vdda_ufs1_core>;
391	vdda-pll-supply = <&vdda_ufs1_1p2>;
392};
393
394&usb_1 {
395	status = "okay";
396};
397
398&usb_1_dwc3 {
399	dr_mode = "host";
400};
401
402&usb_1_hsphy {
403	status = "okay";
404
405	vdd-supply = <&vdda_usb1_ss_core>;
406	vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
407	vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
408
409	qcom,imp-res-offset-value = <8>;
410	qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
411	qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
412	qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
413};
414
415&usb_1_qmpphy {
416	status = "okay";
417
418	vdda-phy-supply = <&vdda_usb1_ss_1p2>;
419	vdda-pll-supply = <&vdda_usb1_ss_core>;
420};
421
422&usb_2 {
423	status = "okay";
424};
425
426&usb_2_dwc3 {
427	dr_mode = "host";
428};
429
430&usb_2_hsphy {
431	status = "okay";
432
433	vdd-supply = <&vdda_usb2_ss_core>;
434	vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
435	vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
436
437	qcom,imp-res-offset-value = <8>;
438	qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
439};
440
441&usb_2_qmpphy {
442	status = "okay";
443
444	vdda-phy-supply = <&vdda_usb2_ss_1p2>;
445	vdda-pll-supply = <&vdda_usb2_ss_core>;
446};
447