xref: /linux/arch/arm64/boot/dts/qcom/sdm845-mtp.dts (revision 0ad53fe3ae82443c74ff8cfd7bd13377cc1134a3)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * SDM845 MTP board device tree source
4 *
5 * Copyright (c) 2018, The Linux Foundation. All rights reserved.
6 */
7
8/dts-v1/;
9
10#include <dt-bindings/gpio/gpio.h>
11#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
12#include "sdm845.dtsi"
13
14/ {
15	model = "Qualcomm Technologies, Inc. SDM845 MTP";
16	compatible = "qcom,sdm845-mtp", "qcom,sdm845";
17
18	aliases {
19		serial0 = &uart9;
20	};
21
22	chosen {
23		stdout-path = "serial0:115200n8";
24	};
25
26	vph_pwr: vph-pwr-regulator {
27		compatible = "regulator-fixed";
28		regulator-name = "vph_pwr";
29		regulator-min-microvolt = <3700000>;
30		regulator-max-microvolt = <3700000>;
31	};
32
33	/*
34	 * Apparently RPMh does not provide support for PM8998 S4 because it
35	 * is always-on; model it as a fixed regulator.
36	 */
37	vreg_s4a_1p8: pm8998-smps4 {
38		compatible = "regulator-fixed";
39		regulator-name = "vreg_s4a_1p8";
40
41		regulator-min-microvolt = <1800000>;
42		regulator-max-microvolt = <1800000>;
43
44		regulator-always-on;
45		regulator-boot-on;
46
47		vin-supply = <&vph_pwr>;
48	};
49};
50
51&adsp_pas {
52	status = "okay";
53	firmware-name = "qcom/sdm845/adsp.mdt";
54};
55
56&apps_rsc {
57	pm8998-rpmh-regulators {
58		compatible = "qcom,pm8998-rpmh-regulators";
59		qcom,pmic-id = "a";
60
61		vdd-s1-supply = <&vph_pwr>;
62		vdd-s2-supply = <&vph_pwr>;
63		vdd-s3-supply = <&vph_pwr>;
64		vdd-s4-supply = <&vph_pwr>;
65		vdd-s5-supply = <&vph_pwr>;
66		vdd-s6-supply = <&vph_pwr>;
67		vdd-s7-supply = <&vph_pwr>;
68		vdd-s8-supply = <&vph_pwr>;
69		vdd-s9-supply = <&vph_pwr>;
70		vdd-s10-supply = <&vph_pwr>;
71		vdd-s11-supply = <&vph_pwr>;
72		vdd-s12-supply = <&vph_pwr>;
73		vdd-s13-supply = <&vph_pwr>;
74		vdd-l1-l27-supply = <&vreg_s7a_1p025>;
75		vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>;
76		vdd-l3-l11-supply = <&vreg_s7a_1p025>;
77		vdd-l4-l5-supply = <&vreg_s7a_1p025>;
78		vdd-l6-supply = <&vph_pwr>;
79		vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
80		vdd-l9-supply = <&vreg_bob>;
81		vdd-l10-l23-l25-supply = <&vreg_bob>;
82		vdd-l13-l19-l21-supply = <&vreg_bob>;
83		vdd-l16-l28-supply = <&vreg_bob>;
84		vdd-l18-l22-supply = <&vreg_bob>;
85		vdd-l20-l24-supply = <&vreg_bob>;
86		vdd-l26-supply = <&vreg_s3a_1p35>;
87		vin-lvs-1-2-supply = <&vreg_s4a_1p8>;
88
89		vreg_s2a_1p125: smps2 {
90			regulator-min-microvolt = <1100000>;
91			regulator-max-microvolt = <1100000>;
92		};
93
94		vreg_s3a_1p35: smps3 {
95			regulator-min-microvolt = <1352000>;
96			regulator-max-microvolt = <1352000>;
97		};
98
99		vreg_s5a_2p04: smps5 {
100			regulator-min-microvolt = <1904000>;
101			regulator-max-microvolt = <2040000>;
102		};
103
104		vreg_s7a_1p025: smps7 {
105			regulator-min-microvolt = <900000>;
106			regulator-max-microvolt = <1028000>;
107		};
108
109		vdd_qusb_hs0:
110		vdda_hp_pcie_core:
111		vdda_mipi_csi0_0p9:
112		vdda_mipi_csi1_0p9:
113		vdda_mipi_csi2_0p9:
114		vdda_mipi_dsi0_pll:
115		vdda_mipi_dsi1_pll:
116		vdda_qlink_lv:
117		vdda_qlink_lv_ck:
118		vdda_qrefs_0p875:
119		vdda_pcie_core:
120		vdda_pll_cc_ebi01:
121		vdda_pll_cc_ebi23:
122		vdda_sp_sensor:
123		vdda_ufs1_core:
124		vdda_ufs2_core:
125		vdda_usb1_ss_core:
126		vdda_usb2_ss_core:
127		vreg_l1a_0p875: ldo1 {
128			regulator-min-microvolt = <880000>;
129			regulator-max-microvolt = <880000>;
130			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
131		};
132
133		vddpx_10:
134		vreg_l2a_1p2: ldo2 {
135			regulator-min-microvolt = <1200000>;
136			regulator-max-microvolt = <1200000>;
137			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
138			regulator-always-on;
139		};
140
141		vreg_l3a_1p0: ldo3 {
142			regulator-min-microvolt = <1000000>;
143			regulator-max-microvolt = <1000000>;
144			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
145		};
146
147		vdd_wcss_cx:
148		vdd_wcss_mx:
149		vdda_wcss_pll:
150		vreg_l5a_0p8: ldo5 {
151			regulator-min-microvolt = <800000>;
152			regulator-max-microvolt = <800000>;
153			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
154		};
155
156		vddpx_13:
157		vreg_l6a_1p8: ldo6 {
158			regulator-min-microvolt = <1856000>;
159			regulator-max-microvolt = <1856000>;
160			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
161		};
162
163		vreg_l7a_1p8: ldo7 {
164			regulator-min-microvolt = <1800000>;
165			regulator-max-microvolt = <1800000>;
166			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
167		};
168
169		vreg_l8a_1p2: ldo8 {
170			regulator-min-microvolt = <1200000>;
171			regulator-max-microvolt = <1248000>;
172			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
173		};
174
175		vreg_l9a_1p8: ldo9 {
176			regulator-min-microvolt = <1704000>;
177			regulator-max-microvolt = <2928000>;
178			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
179		};
180
181		vreg_l10a_1p8: ldo10 {
182			regulator-min-microvolt = <1704000>;
183			regulator-max-microvolt = <2928000>;
184			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
185		};
186
187		vreg_l11a_1p0: ldo11 {
188			regulator-min-microvolt = <1000000>;
189			regulator-max-microvolt = <1048000>;
190			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
191		};
192
193		vdd_qfprom:
194		vdd_qfprom_sp:
195		vdda_apc1_cs_1p8:
196		vdda_gfx_cs_1p8:
197		vdda_qrefs_1p8:
198		vdda_qusb_hs0_1p8:
199		vddpx_11:
200		vreg_l12a_1p8: ldo12 {
201			regulator-min-microvolt = <1800000>;
202			regulator-max-microvolt = <1800000>;
203			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
204		};
205
206		vddpx_2:
207		vreg_l13a_2p95: ldo13 {
208			regulator-min-microvolt = <1800000>;
209			regulator-max-microvolt = <2960000>;
210			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
211		};
212
213		vreg_l14a_1p88: ldo14 {
214			regulator-min-microvolt = <1800000>;
215			regulator-max-microvolt = <1800000>;
216			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
217		};
218
219		vreg_l15a_1p8: ldo15 {
220			regulator-min-microvolt = <1800000>;
221			regulator-max-microvolt = <1800000>;
222			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
223		};
224
225		vreg_l16a_2p7: ldo16 {
226			regulator-min-microvolt = <2704000>;
227			regulator-max-microvolt = <2704000>;
228			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
229		};
230
231		vreg_l17a_1p3: ldo17 {
232			regulator-min-microvolt = <1304000>;
233			regulator-max-microvolt = <1304000>;
234			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
235		};
236
237		vreg_l18a_2p7: ldo18 {
238			regulator-min-microvolt = <2704000>;
239			regulator-max-microvolt = <2960000>;
240			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
241		};
242
243		vreg_l19a_3p0: ldo19 {
244			regulator-min-microvolt = <2856000>;
245			regulator-max-microvolt = <3104000>;
246			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
247		};
248
249		vreg_l20a_2p95: ldo20 {
250			regulator-min-microvolt = <2704000>;
251			regulator-max-microvolt = <2960000>;
252			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
253		};
254
255		vreg_l21a_2p95: ldo21 {
256			regulator-min-microvolt = <2704000>;
257			regulator-max-microvolt = <2960000>;
258			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
259		};
260
261		vreg_l22a_2p85: ldo22 {
262			regulator-min-microvolt = <2864000>;
263			regulator-max-microvolt = <3312000>;
264			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
265		};
266
267		vreg_l23a_3p3: ldo23 {
268			regulator-min-microvolt = <3000000>;
269			regulator-max-microvolt = <3312000>;
270			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
271		};
272
273		vdda_qusb_hs0_3p1:
274		vreg_l24a_3p075: ldo24 {
275			regulator-min-microvolt = <3088000>;
276			regulator-max-microvolt = <3088000>;
277			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
278		};
279
280		vreg_l25a_3p3: ldo25 {
281			regulator-min-microvolt = <3300000>;
282			regulator-max-microvolt = <3312000>;
283			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
284		};
285
286		vdda_hp_pcie_1p2:
287		vdda_hv_ebi0:
288		vdda_hv_ebi1:
289		vdda_hv_ebi2:
290		vdda_hv_ebi3:
291		vdda_mipi_csi_1p25:
292		vdda_mipi_dsi0_1p2:
293		vdda_mipi_dsi1_1p2:
294		vdda_pcie_1p2:
295		vdda_ufs1_1p2:
296		vdda_ufs2_1p2:
297		vdda_usb1_ss_1p2:
298		vdda_usb2_ss_1p2:
299		vreg_l26a_1p2: ldo26 {
300			regulator-min-microvolt = <1200000>;
301			regulator-max-microvolt = <1200000>;
302			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
303		};
304
305		vreg_l28a_3p0: ldo28 {
306			regulator-min-microvolt = <2856000>;
307			regulator-max-microvolt = <3008000>;
308			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
309		};
310
311		vreg_lvs1a_1p8: lvs1 {
312			regulator-min-microvolt = <1800000>;
313			regulator-max-microvolt = <1800000>;
314		};
315
316		vreg_lvs2a_1p8: lvs2 {
317			regulator-min-microvolt = <1800000>;
318			regulator-max-microvolt = <1800000>;
319		};
320	};
321
322	pmi8998-rpmh-regulators {
323		compatible = "qcom,pmi8998-rpmh-regulators";
324		qcom,pmic-id = "b";
325
326		vdd-bob-supply = <&vph_pwr>;
327
328		vreg_bob: bob {
329			regulator-min-microvolt = <3312000>;
330			regulator-max-microvolt = <3600000>;
331			regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
332			regulator-allow-bypass;
333		};
334	};
335
336	pm8005-rpmh-regulators {
337		compatible = "qcom,pm8005-rpmh-regulators";
338		qcom,pmic-id = "c";
339
340		vdd-s1-supply = <&vph_pwr>;
341		vdd-s2-supply = <&vph_pwr>;
342		vdd-s3-supply = <&vph_pwr>;
343		vdd-s4-supply = <&vph_pwr>;
344
345		vreg_s3c_0p6: smps3 {
346			regulator-min-microvolt = <600000>;
347			regulator-max-microvolt = <600000>;
348		};
349	};
350};
351
352&cdsp_pas {
353	status = "okay";
354	firmware-name = "qcom/sdm845/cdsp.mdt";
355};
356
357&dsi0 {
358	status = "okay";
359	vdda-supply = <&vdda_mipi_dsi0_1p2>;
360
361	qcom,dual-dsi-mode;
362	qcom,master-dsi;
363
364	#address-cells = <1>;
365	#size-cells = <0>;
366
367	ports {
368		port@1 {
369			endpoint {
370				remote-endpoint = <&truly_in_0>;
371				data-lanes = <0 1 2 3>;
372			};
373		};
374	};
375
376	panel@0 {
377		compatible = "truly,nt35597-2K-display";
378		reg = <0>;
379		vdda-supply = <&vreg_l14a_1p88>;
380
381		reset-gpios = <&tlmm 6 GPIO_ACTIVE_LOW>;
382		mode-gpios = <&tlmm 52 GPIO_ACTIVE_HIGH>;
383
384		ports {
385			#address-cells = <1>;
386			#size-cells = <0>;
387
388			port@0 {
389				reg = <0>;
390				truly_in_0: endpoint {
391					remote-endpoint = <&dsi0_out>;
392				};
393			};
394
395			port@1 {
396				reg = <1>;
397				truly_in_1: endpoint {
398					remote-endpoint = <&dsi1_out>;
399				};
400			};
401		};
402	};
403};
404
405&dsi0_phy {
406	status = "okay";
407	vdds-supply = <&vdda_mipi_dsi0_pll>;
408};
409
410&dsi1 {
411	status = "okay";
412	vdda-supply = <&vdda_mipi_dsi1_1p2>;
413
414	qcom,dual-dsi-mode;
415
416	/* DSI1 is slave, so use DSI0 clocks */
417	assigned-clock-parents = <&dsi0_phy 0>, <&dsi0_phy 1>;
418
419	ports {
420		port@1 {
421			endpoint {
422				remote-endpoint = <&truly_in_1>;
423				data-lanes = <0 1 2 3>;
424			};
425		};
426	};
427};
428
429&dsi1_phy {
430	status = "okay";
431	vdds-supply = <&vdda_mipi_dsi1_pll>;
432};
433
434&gcc {
435	protected-clocks = <GCC_QSPI_CORE_CLK>,
436			   <GCC_QSPI_CORE_CLK_SRC>,
437			   <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
438			   <GCC_LPASS_Q6_AXI_CLK>,
439			   <GCC_LPASS_SWAY_CLK>;
440};
441
442&gpu {
443	zap-shader {
444		memory-region = <&gpu_mem>;
445		firmware-name = "qcom/sdm845/a630_zap.mbn";
446	};
447};
448
449&i2c10 {
450	status = "okay";
451	clock-frequency = <400000>;
452};
453
454&ipa {
455	status = "okay";
456	memory-region = <&ipa_fw_mem>;
457};
458
459&mdss {
460	status = "okay";
461};
462
463&mdss_mdp {
464	status = "okay";
465};
466
467&mss_pil {
468	status = "okay";
469	firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mbn";
470};
471
472&qupv3_id_1 {
473	status = "okay";
474};
475
476&sdhc_2 {
477	status = "okay";
478
479	pinctrl-names = "default";
480	pinctrl-0 = <&sdc2_clk &sdc2_cmd &sdc2_data &sd_card_det_n>;
481
482	vmmc-supply = <&vreg_l21a_2p95>;
483	vqmmc-supply = <&vddpx_2>;
484
485	cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW>;
486};
487
488&uart9 {
489	status = "okay";
490};
491
492&ufs_mem_hc {
493	status = "okay";
494
495	reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
496
497	vcc-supply = <&vreg_l20a_2p95>;
498	vcc-max-microamp = <600000>;
499};
500
501&ufs_mem_phy {
502	status = "okay";
503
504	vdda-phy-supply = <&vdda_ufs1_core>;
505	vdda-pll-supply = <&vdda_ufs1_1p2>;
506};
507
508&usb_1 {
509	status = "okay";
510};
511
512&usb_1_dwc3 {
513	/* Until we have Type C hooked up we'll force this as peripheral. */
514	dr_mode = "peripheral";
515};
516
517&usb_1_hsphy {
518	status = "okay";
519
520	vdd-supply = <&vdda_usb1_ss_core>;
521	vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
522	vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
523
524	qcom,imp-res-offset-value = <8>;
525	qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
526	qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
527	qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
528};
529
530&usb_1_qmpphy {
531	status = "okay";
532
533	vdda-phy-supply = <&vdda_usb1_ss_1p2>;
534	vdda-pll-supply = <&vdda_usb1_ss_core>;
535};
536
537&usb_2 {
538	status = "okay";
539};
540
541&usb_2_dwc3 {
542	/*
543	 * Though the USB block on SDM845 can support host, there's no vbus
544	 * signal for this port on MTP.  Thus (unless you have a non-compliant
545	 * hub that works without vbus) the only sensible thing is to force
546	 * peripheral mode.
547	 */
548	dr_mode = "peripheral";
549};
550
551&usb_2_hsphy {
552	status = "okay";
553
554	vdd-supply = <&vdda_usb2_ss_core>;
555	vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
556	vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
557
558	qcom,imp-res-offset-value = <8>;
559	qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
560};
561
562&usb_2_qmpphy {
563	status = "okay";
564
565	vdda-phy-supply = <&vdda_usb2_ss_1p2>;
566	vdda-pll-supply = <&vdda_usb2_ss_core>;
567};
568
569&wifi {
570	status = "okay";
571	vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
572	vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
573	vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
574	vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
575};
576
577/* PINCTRL - additions to nodes defined in sdm845.dtsi */
578
579&qup_i2c10_default {
580	pinconf {
581		pins = "gpio55", "gpio56";
582		drive-strength = <2>;
583		bias-disable;
584	};
585};
586
587&qup_uart9_default {
588	pinconf-tx {
589		pins = "gpio4";
590		drive-strength = <2>;
591		bias-disable;
592	};
593
594	pinconf-rx {
595		pins = "gpio5";
596		drive-strength = <2>;
597		bias-pull-up;
598	};
599};
600
601&tlmm {
602	gpio-reserved-ranges = <0 4>, <81 4>;
603
604	sdc2_clk: sdc2-clk {
605		pinconf {
606			pins = "sdc2_clk";
607			bias-disable;
608
609			/*
610			 * It seems that mmc_test reports errors if drive
611			 * strength is not 16 on clk, cmd, and data pins.
612			 */
613			drive-strength = <16>;
614		};
615	};
616
617	sdc2_cmd: sdc2-cmd {
618		pinconf {
619			pins = "sdc2_cmd";
620			bias-pull-up;
621			drive-strength = <16>;
622		};
623	};
624
625	sdc2_data: sdc2-data {
626		pinconf {
627			pins = "sdc2_data";
628			bias-pull-up;
629			drive-strength = <16>;
630		};
631	};
632
633	sd_card_det_n: sd-card-det-n {
634		pinmux {
635			pins = "gpio126";
636			function = "gpio";
637		};
638
639		pinconf {
640			pins = "gpio126";
641			bias-pull-up;
642		};
643	};
644};
645