xref: /linux/arch/arm64/boot/dts/qcom/sdm845-mtp.dts (revision 0678df8271820bcf8fb4f877129f05d68a237de4)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * SDM845 MTP board device tree source
4 *
5 * Copyright (c) 2018, The Linux Foundation. All rights reserved.
6 */
7
8/dts-v1/;
9
10#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11#include "sdm845.dtsi"
12#include "pm8998.dtsi"
13#include "pmi8998.dtsi"
14
15/ {
16	model = "Qualcomm Technologies, Inc. SDM845 MTP";
17	compatible = "qcom,sdm845-mtp", "qcom,sdm845";
18	chassis-type = "handset";
19
20	aliases {
21		serial0 = &uart9;
22	};
23
24	chosen {
25		stdout-path = "serial0:115200n8";
26	};
27
28	vph_pwr: vph-pwr-regulator {
29		compatible = "regulator-fixed";
30		regulator-name = "vph_pwr";
31		regulator-min-microvolt = <3700000>;
32		regulator-max-microvolt = <3700000>;
33	};
34
35	/*
36	 * Apparently RPMh does not provide support for PM8998 S4 because it
37	 * is always-on; model it as a fixed regulator.
38	 */
39	vreg_s4a_1p8: pm8998-smps4 {
40		compatible = "regulator-fixed";
41		regulator-name = "vreg_s4a_1p8";
42
43		regulator-min-microvolt = <1800000>;
44		regulator-max-microvolt = <1800000>;
45
46		regulator-always-on;
47		regulator-boot-on;
48
49		vin-supply = <&vph_pwr>;
50	};
51
52	thermal-zones {
53		xo_thermal: xo-thermal {
54			polling-delay-passive = <0>;
55			polling-delay = <0>;
56
57			thermal-sensors = <&pm8998_adc_tm 1>;
58
59			trips {
60				trip-point {
61					temperature = <125000>;
62					hysteresis = <10000>;
63					type = "passive";
64				};
65			};
66		};
67
68		msm_thermal: msm-thermal {
69			polling-delay-passive = <0>;
70			polling-delay = <0>;
71
72			thermal-sensors = <&pm8998_adc_tm 2>;
73
74			trips {
75				trip-point {
76					temperature = <125000>;
77					hysteresis = <10000>;
78					type = "passive";
79				};
80			};
81		};
82
83		pa_thermal: pa-thermal {
84			polling-delay-passive = <0>;
85			polling-delay = <0>;
86
87			thermal-sensors = <&pm8998_adc_tm 3>;
88
89			trips {
90				trip-point {
91					temperature = <125000>;
92					hysteresis = <10000>;
93					type = "passive";
94				};
95			};
96		};
97
98		quiet_thermal: quiet-thermal {
99			polling-delay-passive = <0>;
100			polling-delay = <0>;
101
102			thermal-sensors = <&pm8998_adc_tm 4>;
103
104			trips {
105				trip-point {
106					temperature = <125000>;
107					hysteresis = <10000>;
108					type = "passive";
109				};
110			};
111		};
112	};
113};
114
115&adsp_pas {
116	status = "okay";
117	firmware-name = "qcom/sdm845/adsp.mbn";
118};
119
120&apps_rsc {
121	regulators-0 {
122		compatible = "qcom,pm8998-rpmh-regulators";
123		qcom,pmic-id = "a";
124
125		vdd-s1-supply = <&vph_pwr>;
126		vdd-s2-supply = <&vph_pwr>;
127		vdd-s3-supply = <&vph_pwr>;
128		vdd-s4-supply = <&vph_pwr>;
129		vdd-s5-supply = <&vph_pwr>;
130		vdd-s6-supply = <&vph_pwr>;
131		vdd-s7-supply = <&vph_pwr>;
132		vdd-s8-supply = <&vph_pwr>;
133		vdd-s9-supply = <&vph_pwr>;
134		vdd-s10-supply = <&vph_pwr>;
135		vdd-s11-supply = <&vph_pwr>;
136		vdd-s12-supply = <&vph_pwr>;
137		vdd-s13-supply = <&vph_pwr>;
138		vdd-l1-l27-supply = <&vreg_s7a_1p025>;
139		vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>;
140		vdd-l3-l11-supply = <&vreg_s7a_1p025>;
141		vdd-l4-l5-supply = <&vreg_s7a_1p025>;
142		vdd-l6-supply = <&vph_pwr>;
143		vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
144		vdd-l9-supply = <&vreg_bob>;
145		vdd-l10-l23-l25-supply = <&vreg_bob>;
146		vdd-l13-l19-l21-supply = <&vreg_bob>;
147		vdd-l16-l28-supply = <&vreg_bob>;
148		vdd-l18-l22-supply = <&vreg_bob>;
149		vdd-l20-l24-supply = <&vreg_bob>;
150		vdd-l26-supply = <&vreg_s3a_1p35>;
151		vin-lvs-1-2-supply = <&vreg_s4a_1p8>;
152
153		vreg_s2a_1p125: smps2 {
154			regulator-min-microvolt = <1100000>;
155			regulator-max-microvolt = <1100000>;
156		};
157
158		vreg_s3a_1p35: smps3 {
159			regulator-min-microvolt = <1352000>;
160			regulator-max-microvolt = <1352000>;
161		};
162
163		vreg_s5a_2p04: smps5 {
164			regulator-min-microvolt = <1904000>;
165			regulator-max-microvolt = <2040000>;
166		};
167
168		vreg_s7a_1p025: smps7 {
169			regulator-min-microvolt = <900000>;
170			regulator-max-microvolt = <1028000>;
171		};
172
173		vdd_qusb_hs0:
174		vdda_hp_pcie_core:
175		vdda_mipi_csi0_0p9:
176		vdda_mipi_csi1_0p9:
177		vdda_mipi_csi2_0p9:
178		vdda_mipi_dsi0_pll:
179		vdda_mipi_dsi1_pll:
180		vdda_qlink_lv:
181		vdda_qlink_lv_ck:
182		vdda_qrefs_0p875:
183		vdda_pcie_core:
184		vdda_pll_cc_ebi01:
185		vdda_pll_cc_ebi23:
186		vdda_sp_sensor:
187		vdda_ufs1_core:
188		vdda_ufs2_core:
189		vdda_usb1_ss_core:
190		vdda_usb2_ss_core:
191		vreg_l1a_0p875: ldo1 {
192			regulator-min-microvolt = <880000>;
193			regulator-max-microvolt = <880000>;
194			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
195		};
196
197		vddpx_10:
198		vreg_l2a_1p2: ldo2 {
199			regulator-min-microvolt = <1200000>;
200			regulator-max-microvolt = <1200000>;
201			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
202			regulator-always-on;
203		};
204
205		vreg_l3a_1p0: ldo3 {
206			regulator-min-microvolt = <1000000>;
207			regulator-max-microvolt = <1000000>;
208			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
209		};
210
211		vdd_wcss_cx:
212		vdd_wcss_mx:
213		vdda_wcss_pll:
214		vreg_l5a_0p8: ldo5 {
215			regulator-min-microvolt = <800000>;
216			regulator-max-microvolt = <800000>;
217			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
218		};
219
220		vddpx_13:
221		vreg_l6a_1p8: ldo6 {
222			regulator-min-microvolt = <1856000>;
223			regulator-max-microvolt = <1856000>;
224			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
225		};
226
227		vreg_l7a_1p8: ldo7 {
228			regulator-min-microvolt = <1800000>;
229			regulator-max-microvolt = <1800000>;
230			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
231		};
232
233		vreg_l8a_1p2: ldo8 {
234			regulator-min-microvolt = <1200000>;
235			regulator-max-microvolt = <1248000>;
236			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
237		};
238
239		vreg_l9a_1p8: ldo9 {
240			regulator-min-microvolt = <1704000>;
241			regulator-max-microvolt = <2928000>;
242			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
243		};
244
245		vreg_l10a_1p8: ldo10 {
246			regulator-min-microvolt = <1704000>;
247			regulator-max-microvolt = <2928000>;
248			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
249		};
250
251		vreg_l11a_1p0: ldo11 {
252			regulator-min-microvolt = <1000000>;
253			regulator-max-microvolt = <1048000>;
254			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
255		};
256
257		vdd_qfprom:
258		vdd_qfprom_sp:
259		vdda_apc1_cs_1p8:
260		vdda_gfx_cs_1p8:
261		vdda_qrefs_1p8:
262		vdda_qusb_hs0_1p8:
263		vddpx_11:
264		vreg_l12a_1p8: ldo12 {
265			regulator-min-microvolt = <1800000>;
266			regulator-max-microvolt = <1800000>;
267			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
268		};
269
270		vddpx_2:
271		vreg_l13a_2p95: ldo13 {
272			regulator-min-microvolt = <1800000>;
273			regulator-max-microvolt = <2960000>;
274			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
275		};
276
277		vreg_l14a_1p88: ldo14 {
278			regulator-min-microvolt = <1800000>;
279			regulator-max-microvolt = <1800000>;
280			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
281		};
282
283		vreg_l15a_1p8: ldo15 {
284			regulator-min-microvolt = <1800000>;
285			regulator-max-microvolt = <1800000>;
286			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
287		};
288
289		vreg_l16a_2p7: ldo16 {
290			regulator-min-microvolt = <2704000>;
291			regulator-max-microvolt = <2704000>;
292			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
293		};
294
295		vreg_l17a_1p3: ldo17 {
296			regulator-min-microvolt = <1304000>;
297			regulator-max-microvolt = <1304000>;
298			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
299		};
300
301		vreg_l18a_2p7: ldo18 {
302			regulator-min-microvolt = <2704000>;
303			regulator-max-microvolt = <2960000>;
304			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
305		};
306
307		vreg_l19a_3p0: ldo19 {
308			regulator-min-microvolt = <2856000>;
309			regulator-max-microvolt = <3104000>;
310			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
311		};
312
313		vreg_l20a_2p95: ldo20 {
314			regulator-min-microvolt = <2704000>;
315			regulator-max-microvolt = <2960000>;
316			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
317		};
318
319		vreg_l21a_2p95: ldo21 {
320			regulator-min-microvolt = <2704000>;
321			regulator-max-microvolt = <2960000>;
322			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
323		};
324
325		vreg_l22a_2p85: ldo22 {
326			regulator-min-microvolt = <2864000>;
327			regulator-max-microvolt = <3312000>;
328			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
329		};
330
331		vreg_l23a_3p3: ldo23 {
332			regulator-min-microvolt = <3000000>;
333			regulator-max-microvolt = <3312000>;
334			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
335		};
336
337		vdda_qusb_hs0_3p1:
338		vreg_l24a_3p075: ldo24 {
339			regulator-min-microvolt = <3088000>;
340			regulator-max-microvolt = <3088000>;
341			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
342		};
343
344		vreg_l25a_3p3: ldo25 {
345			regulator-min-microvolt = <3300000>;
346			regulator-max-microvolt = <3312000>;
347			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
348		};
349
350		vdda_hp_pcie_1p2:
351		vdda_hv_ebi0:
352		vdda_hv_ebi1:
353		vdda_hv_ebi2:
354		vdda_hv_ebi3:
355		vdda_mipi_csi_1p25:
356		vdda_mipi_dsi0_1p2:
357		vdda_mipi_dsi1_1p2:
358		vdda_pcie_1p2:
359		vdda_ufs1_1p2:
360		vdda_ufs2_1p2:
361		vdda_usb1_ss_1p2:
362		vdda_usb2_ss_1p2:
363		vreg_l26a_1p2: ldo26 {
364			regulator-min-microvolt = <1200000>;
365			regulator-max-microvolt = <1200000>;
366			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
367		};
368
369		vreg_l28a_3p0: ldo28 {
370			regulator-min-microvolt = <2856000>;
371			regulator-max-microvolt = <3008000>;
372			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
373		};
374
375		vreg_lvs1a_1p8: lvs1 {
376			regulator-min-microvolt = <1800000>;
377			regulator-max-microvolt = <1800000>;
378		};
379
380		vreg_lvs2a_1p8: lvs2 {
381			regulator-min-microvolt = <1800000>;
382			regulator-max-microvolt = <1800000>;
383		};
384	};
385
386	regulators-1 {
387		compatible = "qcom,pmi8998-rpmh-regulators";
388		qcom,pmic-id = "b";
389
390		vdd-bob-supply = <&vph_pwr>;
391
392		vreg_bob: bob {
393			regulator-min-microvolt = <3312000>;
394			regulator-max-microvolt = <3600000>;
395			regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
396			regulator-allow-bypass;
397		};
398	};
399
400	regulators-2 {
401		compatible = "qcom,pm8005-rpmh-regulators";
402		qcom,pmic-id = "c";
403
404		vdd-s1-supply = <&vph_pwr>;
405		vdd-s2-supply = <&vph_pwr>;
406		vdd-s3-supply = <&vph_pwr>;
407		vdd-s4-supply = <&vph_pwr>;
408
409		vreg_s3c_0p6: smps3 {
410			regulator-min-microvolt = <600000>;
411			regulator-max-microvolt = <600000>;
412		};
413	};
414};
415
416&cdsp_pas {
417	status = "okay";
418	firmware-name = "qcom/sdm845/cdsp.mbn";
419};
420
421&gcc {
422	protected-clocks = <GCC_QSPI_CORE_CLK>,
423			   <GCC_QSPI_CORE_CLK_SRC>,
424			   <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
425			   <GCC_LPASS_Q6_AXI_CLK>,
426			   <GCC_LPASS_SWAY_CLK>;
427};
428
429&gmu {
430	status = "okay";
431};
432
433&gpu {
434	status = "okay";
435
436	zap-shader {
437		memory-region = <&gpu_mem>;
438		firmware-name = "qcom/sdm845/a630_zap.mbn";
439	};
440};
441
442&i2c10 {
443	status = "okay";
444	clock-frequency = <400000>;
445};
446
447&ipa {
448	qcom,gsi-loader = "self";
449	memory-region = <&ipa_fw_mem>;
450	status = "okay";
451};
452
453&mdss {
454	status = "okay";
455};
456
457&mdss_dsi0 {
458	status = "okay";
459	vdda-supply = <&vdda_mipi_dsi0_1p2>;
460
461	qcom,dual-dsi-mode;
462	qcom,master-dsi;
463
464	ports {
465		port@1 {
466			endpoint {
467				remote-endpoint = <&truly_in_0>;
468				data-lanes = <0 1 2 3>;
469			};
470		};
471	};
472
473	panel@0 {
474		compatible = "truly,nt35597-2K-display";
475		reg = <0>;
476		vdda-supply = <&vreg_l14a_1p88>;
477
478		reset-gpios = <&tlmm 6 GPIO_ACTIVE_LOW>;
479		mode-gpios = <&tlmm 52 GPIO_ACTIVE_HIGH>;
480
481		ports {
482			#address-cells = <1>;
483			#size-cells = <0>;
484
485			port@0 {
486				reg = <0>;
487				truly_in_0: endpoint {
488					remote-endpoint = <&mdss_dsi0_out>;
489				};
490			};
491
492			port@1 {
493				reg = <1>;
494				truly_in_1: endpoint {
495					remote-endpoint = <&mdss_dsi1_out>;
496				};
497			};
498		};
499	};
500};
501
502&mdss_dsi0_phy {
503	status = "okay";
504	vdds-supply = <&vdda_mipi_dsi0_pll>;
505};
506
507&mdss_dsi1 {
508	status = "okay";
509	vdda-supply = <&vdda_mipi_dsi1_1p2>;
510
511	qcom,dual-dsi-mode;
512
513	/* DSI1 is slave, so use DSI0 clocks */
514	assigned-clock-parents = <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>;
515
516	ports {
517		port@1 {
518			endpoint {
519				remote-endpoint = <&truly_in_1>;
520				data-lanes = <0 1 2 3>;
521			};
522		};
523	};
524};
525
526&mdss_dsi1_phy {
527	status = "okay";
528	vdds-supply = <&vdda_mipi_dsi1_pll>;
529};
530
531&mss_pil {
532	status = "okay";
533	firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mbn";
534};
535
536&pcie0 {
537	perst-gpios = <&tlmm 35 GPIO_ACTIVE_LOW>;
538
539	pinctrl-0 = <&pcie0_default_state>;
540	pinctrl-names = "default";
541
542	status = "okay";
543};
544
545&pcie0_phy {
546	vdda-phy-supply = <&vreg_l1a_0p875>;
547	vdda-pll-supply = <&vreg_l26a_1p2>;
548
549	status = "okay";
550};
551
552&pcie1 {
553	perst-gpios = <&tlmm 102 GPIO_ACTIVE_LOW>;
554
555	pinctrl-names = "default";
556	pinctrl-0 = <&pcie1_default_state>;
557
558	status = "okay";
559};
560
561&pcie1_phy {
562	status = "okay";
563
564	vdda-phy-supply = <&vreg_l1a_0p875>;
565	vdda-pll-supply = <&vreg_l26a_1p2>;
566};
567
568&pm8998_adc {
569	channel@4c {
570		reg = <ADC5_XO_THERM_100K_PU>;
571		label = "xo_therm";
572		qcom,ratiometric;
573		qcom,hw-settle-time = <200>;
574	};
575
576	channel@4d {
577		reg = <ADC5_AMUX_THM1_100K_PU>;
578		label = "msm_therm";
579		qcom,ratiometric;
580		qcom,hw-settle-time = <200>;
581	};
582
583	channel@4f {
584		reg = <ADC5_AMUX_THM3_100K_PU>;
585		label = "pa_therm1";
586		qcom,ratiometric;
587		qcom,hw-settle-time = <200>;
588	};
589
590	channel@51 {
591		reg = <ADC5_AMUX_THM5_100K_PU>;
592		label = "quiet_therm";
593		qcom,ratiometric;
594		qcom,hw-settle-time = <200>;
595	};
596
597	channel@83 {
598		reg = <ADC5_VPH_PWR>;
599		label = "vph_pwr";
600		qcom,ratiometric;
601		qcom,hw-settle-time = <200>;
602	};
603
604	channel@85 {
605		reg = <ADC5_VCOIN>;
606		label = "vcoin";
607		qcom,ratiometric;
608		qcom,hw-settle-time = <200>;
609	};
610};
611
612&pm8998_adc_tm {
613	status = "okay";
614
615	xo-thermistor@1 {
616		reg = <1>;
617		io-channels = <&pm8998_adc ADC5_XO_THERM_100K_PU>;
618		qcom,ratiometric;
619		qcom,hw-settle-time-us = <200>;
620	};
621
622	msm-thermistor@2 {
623		reg = <2>;
624		io-channels = <&pm8998_adc ADC5_AMUX_THM1_100K_PU>;
625		qcom,ratiometric;
626		qcom,hw-settle-time-us = <200>;
627	};
628
629	pa-thermistor@3 {
630		reg = <3>;
631		io-channels = <&pm8998_adc ADC5_AMUX_THM3_100K_PU>;
632		qcom,ratiometric;
633		qcom,hw-settle-time-us = <200>;
634	};
635
636	quiet-thermistor@4 {
637		reg = <4>;
638		io-channels = <&pm8998_adc ADC5_AMUX_THM5_100K_PU>;
639		qcom,ratiometric;
640		qcom,hw-settle-time-us = <200>;
641	};
642};
643
644&pm8998_resin {
645	linux,code = <KEY_VOLUMEDOWN>;
646	status = "okay";
647};
648
649&qupv3_id_1 {
650	status = "okay";
651};
652
653&sdhc_2 {
654	status = "okay";
655
656	pinctrl-names = "default";
657	pinctrl-0 = <&sdc2_clk &sdc2_cmd &sdc2_data &sd_card_det_n>;
658
659	vmmc-supply = <&vreg_l21a_2p95>;
660	vqmmc-supply = <&vddpx_2>;
661
662	cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW>;
663};
664
665&tlmm {
666	pcie0_default_state: pcie0-default-state {
667		clkreq-pins {
668			pins = "gpio36";
669			function = "pci_e0";
670			bias-pull-up;
671		};
672
673		perst-n-pins {
674			pins = "gpio35";
675			function = "gpio";
676			drive-strength = <2>;
677			bias-pull-down;
678		};
679
680		wake-n-pins {
681			pins = "gpio37";
682			function = "gpio";
683			drive-strength = <2>;
684			bias-pull-up;
685		};
686	};
687
688	pcie1_default_state: pcie1-default-state {
689		clkreq-pins {
690			pins = "gpio103";
691			function = "pci_e1";
692			bias-pull-up;
693		};
694
695		perst-n-pins {
696			pins = "gpio102";
697			function = "gpio";
698			drive-strength = <16>;
699			bias-pull-down;
700		};
701
702		wake-n-pins {
703			pins = "gpio104";
704			function = "gpio";
705			drive-strength = <2>;
706			bias-pull-up;
707		};
708	};
709};
710
711&uart9 {
712	status = "okay";
713};
714
715&ufs_mem_hc {
716	status = "okay";
717
718	reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
719
720	vcc-supply = <&vreg_l20a_2p95>;
721	vcc-max-microamp = <600000>;
722};
723
724&ufs_mem_phy {
725	status = "okay";
726
727	vdda-phy-supply = <&vdda_ufs1_core>;
728	vdda-pll-supply = <&vdda_ufs1_1p2>;
729};
730
731&usb_1 {
732	status = "okay";
733};
734
735&usb_1_dwc3 {
736	/* Until we have Type C hooked up we'll force this as peripheral. */
737	dr_mode = "peripheral";
738};
739
740&usb_1_hsphy {
741	status = "okay";
742
743	vdd-supply = <&vdda_usb1_ss_core>;
744	vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
745	vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
746
747	qcom,imp-res-offset-value = <8>;
748	qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
749	qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
750	qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
751};
752
753&usb_1_qmpphy {
754	status = "okay";
755
756	vdda-phy-supply = <&vdda_usb1_ss_1p2>;
757	vdda-pll-supply = <&vdda_usb1_ss_core>;
758};
759
760&usb_2 {
761	status = "okay";
762};
763
764&usb_2_dwc3 {
765	/*
766	 * Though the USB block on SDM845 can support host, there's no vbus
767	 * signal for this port on MTP.  Thus (unless you have a non-compliant
768	 * hub that works without vbus) the only sensible thing is to force
769	 * peripheral mode.
770	 */
771	dr_mode = "peripheral";
772};
773
774&usb_2_hsphy {
775	status = "okay";
776
777	vdd-supply = <&vdda_usb2_ss_core>;
778	vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
779	vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
780
781	qcom,imp-res-offset-value = <8>;
782	qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
783};
784
785&usb_2_qmpphy {
786	status = "okay";
787
788	vdda-phy-supply = <&vdda_usb2_ss_1p2>;
789	vdda-pll-supply = <&vdda_usb2_ss_core>;
790};
791
792&venus {
793	status = "okay";
794};
795
796&wifi {
797	status = "okay";
798	vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
799	vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
800	vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
801	vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
802
803	qcom,snoc-host-cap-8bit-quirk;
804	qcom,ath10k-calibration-variant = "Qualcomm_sdm845mtp";
805};
806
807/* PINCTRL - additions to nodes defined in sdm845.dtsi */
808
809&qup_i2c10_default {
810	drive-strength = <2>;
811	bias-disable;
812};
813
814&qup_uart9_rx {
815	drive-strength = <2>;
816	bias-pull-up;
817};
818
819&qup_uart9_tx {
820	drive-strength = <2>;
821	bias-disable;
822};
823
824&tlmm {
825	gpio-reserved-ranges = <0 4>, <81 4>;
826
827	sdc2_clk: sdc2-clk-state {
828		pins = "sdc2_clk";
829		bias-disable;
830
831		/*
832		 * It seems that mmc_test reports errors if drive
833		 * strength is not 16 on clk, cmd, and data pins.
834		 */
835		drive-strength = <16>;
836	};
837
838	sdc2_cmd: sdc2-cmd-state {
839		pins = "sdc2_cmd";
840		bias-pull-up;
841		drive-strength = <16>;
842	};
843
844	sdc2_data: sdc2-data-state {
845		pins = "sdc2_data";
846		bias-pull-up;
847		drive-strength = <16>;
848	};
849
850	sd_card_det_n: sd-card-det-n-state {
851		pins = "gpio126";
852		function = "gpio";
853		bias-pull-up;
854	};
855};
856