1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Copyright (c) 2019, Linaro Ltd. 4 */ 5 6/dts-v1/; 7 8#include <dt-bindings/arm/qcom,ids.h> 9#include <dt-bindings/leds/common.h> 10#include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 11#include <dt-bindings/regulator/qcom,rpmh-regulator.h> 12#include <dt-bindings/sound/qcom,q6afe.h> 13#include <dt-bindings/sound/qcom,q6asm.h> 14#include "sdm845.dtsi" 15#include "sdm845-wcd9340.dtsi" 16#include "pm8998.dtsi" 17#include "pmi8998.dtsi" 18 19/ { 20 model = "Thundercomm Dragonboard 845c"; 21 compatible = "thundercomm,db845c", "qcom,sdm845"; 22 qcom,msm-id = <QCOM_ID_SDA845 0x20001>; 23 qcom,board-id = <8 0>; 24 25 aliases { 26 serial0 = &uart9; 27 serial1 = &uart6; 28 }; 29 30 chosen { 31 stdout-path = "serial0:115200n8"; 32 }; 33 34 /* Fixed crystal oscillator dedicated to MCP2517FD */ 35 clk40m: can-clock { 36 compatible = "fixed-clock"; 37 #clock-cells = <0>; 38 clock-frequency = <40000000>; 39 }; 40 41 dc12v: dc12v-regulator { 42 compatible = "regulator-fixed"; 43 regulator-name = "DC12V"; 44 regulator-min-microvolt = <12000000>; 45 regulator-max-microvolt = <12000000>; 46 regulator-always-on; 47 }; 48 49 gpio-keys { 50 compatible = "gpio-keys"; 51 autorepeat; 52 53 pinctrl-names = "default"; 54 pinctrl-0 = <&vol_up_pin_a>; 55 56 key-vol-up { 57 label = "Volume Up"; 58 linux,code = <KEY_VOLUMEUP>; 59 gpios = <&pm8998_gpios 6 GPIO_ACTIVE_LOW>; 60 }; 61 }; 62 63 leds { 64 compatible = "gpio-leds"; 65 66 led-0 { 67 label = "green:user4"; 68 function = LED_FUNCTION_INDICATOR; 69 color = <LED_COLOR_ID_GREEN>; 70 gpios = <&pm8998_gpios 13 GPIO_ACTIVE_HIGH>; 71 default-state = "off"; 72 panic-indicator; 73 }; 74 75 led-1 { 76 label = "yellow:wlan"; 77 function = LED_FUNCTION_WLAN; 78 color = <LED_COLOR_ID_YELLOW>; 79 gpios = <&pm8998_gpios 9 GPIO_ACTIVE_HIGH>; 80 linux,default-trigger = "phy0tx"; 81 default-state = "off"; 82 }; 83 84 led-2 { 85 label = "blue:bt"; 86 function = LED_FUNCTION_BLUETOOTH; 87 color = <LED_COLOR_ID_BLUE>; 88 gpios = <&pm8998_gpios 5 GPIO_ACTIVE_HIGH>; 89 linux,default-trigger = "bluetooth-power"; 90 default-state = "off"; 91 }; 92 }; 93 94 hdmi-out { 95 compatible = "hdmi-connector"; 96 type = "a"; 97 98 port { 99 hdmi_con: endpoint { 100 remote-endpoint = <<9611_out>; 101 }; 102 }; 103 }; 104 105 reserved-memory { 106 /* Cont splash region set up by the bootloader */ 107 cont_splash_mem: framebuffer@9d400000 { 108 reg = <0x0 0x9d400000 0x0 0x2400000>; 109 no-map; 110 }; 111 }; 112 113 lt9611_1v8: lt9611-vdd18-regulator { 114 compatible = "regulator-fixed"; 115 regulator-name = "LT9611_1V8"; 116 117 vin-supply = <&vdc_5v>; 118 regulator-min-microvolt = <1800000>; 119 regulator-max-microvolt = <1800000>; 120 121 gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>; 122 enable-active-high; 123 }; 124 125 lt9611_3v3: lt9611-3v3 { 126 compatible = "regulator-fixed"; 127 regulator-name = "LT9611_3V3"; 128 129 vin-supply = <&vdc_3v3>; 130 regulator-min-microvolt = <3300000>; 131 regulator-max-microvolt = <3300000>; 132 133 /* 134 * TODO: make it possible to drive same GPIO from two clients 135 * gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>; 136 * enable-active-high; 137 */ 138 }; 139 140 pcie0_1p05v: pcie-0-1p05v-regulator { 141 compatible = "regulator-fixed"; 142 regulator-name = "PCIE0_1.05V"; 143 144 vin-supply = <&vbat>; 145 regulator-min-microvolt = <1050000>; 146 regulator-max-microvolt = <1050000>; 147 148 /* 149 * TODO: make it possible to drive same GPIO from two clients 150 * gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>; 151 * enable-active-high; 152 */ 153 }; 154 155 cam0_dvdd_1v2: cam0-dvdd-1v2-regulator { 156 compatible = "regulator-fixed"; 157 regulator-name = "CAM0_DVDD_1V2"; 158 regulator-min-microvolt = <1200000>; 159 regulator-max-microvolt = <1200000>; 160 enable-active-high; 161 gpio = <&pm8998_gpios 12 GPIO_ACTIVE_HIGH>; 162 pinctrl-names = "default"; 163 pinctrl-0 = <&cam0_dvdd_1v2_en_default>; 164 vin-supply = <&vbat>; 165 }; 166 167 cam0_avdd_2v8: cam0-avdd-2v8-regulator { 168 compatible = "regulator-fixed"; 169 regulator-name = "CAM0_AVDD_2V8"; 170 regulator-min-microvolt = <2800000>; 171 regulator-max-microvolt = <2800000>; 172 enable-active-high; 173 gpio = <&pm8998_gpios 10 GPIO_ACTIVE_HIGH>; 174 pinctrl-names = "default"; 175 pinctrl-0 = <&cam0_avdd_2v8_en_default>; 176 vin-supply = <&vbat>; 177 }; 178 179 /* This regulator is enabled when the VREG_LVS1A_1P8 trace is enabled */ 180 cam3_avdd_2v8: cam3-avdd-2v8-regulator { 181 compatible = "regulator-fixed"; 182 regulator-name = "CAM3_AVDD_2V8"; 183 regulator-min-microvolt = <2800000>; 184 regulator-max-microvolt = <2800000>; 185 regulator-always-on; 186 vin-supply = <&vbat>; 187 }; 188 189 pcie0_3p3v_dual: vldo-3v3-regulator { 190 compatible = "regulator-fixed"; 191 regulator-name = "VLDO_3V3"; 192 193 vin-supply = <&vbat>; 194 regulator-min-microvolt = <3300000>; 195 regulator-max-microvolt = <3300000>; 196 197 gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>; 198 enable-active-high; 199 /* 200 * FIXME: this regulator is responsible for VBUS on the left USB 201 * port. Keep it always on until we can correctly model this 202 * relationship. 203 */ 204 regulator-always-on; 205 206 pinctrl-names = "default"; 207 pinctrl-0 = <&pcie0_pwren_state>; 208 }; 209 210 v5p0_hdmiout: v5p0-hdmiout-regulator { 211 compatible = "regulator-fixed"; 212 regulator-name = "V5P0_HDMIOUT"; 213 214 vin-supply = <&vdc_5v>; 215 regulator-min-microvolt = <500000>; 216 regulator-max-microvolt = <500000>; 217 218 /* 219 * TODO: make it possible to drive same GPIO from two clients 220 * gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>; 221 * enable-active-high; 222 */ 223 }; 224 225 vbat: vbat-regulator { 226 compatible = "regulator-fixed"; 227 regulator-name = "VBAT"; 228 229 vin-supply = <&dc12v>; 230 regulator-min-microvolt = <4200000>; 231 regulator-max-microvolt = <4200000>; 232 regulator-always-on; 233 }; 234 235 vbat_som: vbat-som-regulator { 236 compatible = "regulator-fixed"; 237 regulator-name = "VBAT_SOM"; 238 239 vin-supply = <&dc12v>; 240 regulator-min-microvolt = <4200000>; 241 regulator-max-microvolt = <4200000>; 242 regulator-always-on; 243 }; 244 245 vdc_3v3: vdc-3v3-regulator { 246 compatible = "regulator-fixed"; 247 regulator-name = "VDC_3V3"; 248 vin-supply = <&dc12v>; 249 regulator-min-microvolt = <3300000>; 250 regulator-max-microvolt = <3300000>; 251 regulator-always-on; 252 }; 253 254 vdc_5v: vdc-5v-regulator { 255 compatible = "regulator-fixed"; 256 regulator-name = "VDC_5V"; 257 258 vin-supply = <&dc12v>; 259 regulator-min-microvolt = <500000>; 260 regulator-max-microvolt = <500000>; 261 regulator-always-on; 262 }; 263 264 vreg_s4a_1p8: vreg-s4a-1p8 { 265 compatible = "regulator-fixed"; 266 regulator-name = "vreg_s4a_1p8"; 267 268 regulator-min-microvolt = <1800000>; 269 regulator-max-microvolt = <1800000>; 270 regulator-always-on; 271 }; 272 273 vph_pwr: vph-pwr-regulator { 274 compatible = "regulator-fixed"; 275 regulator-name = "vph_pwr"; 276 277 vin-supply = <&vbat_som>; 278 }; 279 280 wcn3990-pmu { 281 compatible = "qcom,wcn3990-pmu"; 282 283 pinctrl-0 = <&sw_ctrl_default>; 284 pinctrl-names = "default"; 285 286 vddio-supply = <&vreg_s4a_1p8>; 287 vddxo-supply = <&vreg_l7a_1p8>; 288 vddrf-supply = <&vreg_l17a_1p3>; 289 vddch0-supply = <&vreg_l25a_3p3>; 290 vddch1-supply = <&vreg_l23a_3p3>; 291 292 swctrl-gpios = <&pm8998_gpios 3 GPIO_ACTIVE_HIGH>; 293 294 regulators { 295 vreg_pmu_io: ldo0 { 296 regulator-name = "vreg_pmu_io"; 297 }; 298 299 vreg_pmu_xo: ldo1 { 300 regulator-name = "vreg_pmu_xo"; 301 }; 302 303 vreg_pmu_rf: ldo2 { 304 regulator-name = "vreg_pmu_rf"; 305 }; 306 307 vreg_pmu_ch0: ldo3 { 308 regulator-name = "vreg_pmu_ch0"; 309 }; 310 311 vreg_pmu_ch1: ldo4 { 312 regulator-name = "vreg_pmu_ch1"; 313 }; 314 }; 315 }; 316}; 317 318&adsp_pas { 319 status = "okay"; 320 321 firmware-name = "qcom/sdm845/adsp.mbn"; 322}; 323 324&apps_rsc { 325 regulators-0 { 326 compatible = "qcom,pm8998-rpmh-regulators"; 327 qcom,pmic-id = "a"; 328 vdd-s1-supply = <&vph_pwr>; 329 vdd-s2-supply = <&vph_pwr>; 330 vdd-s3-supply = <&vph_pwr>; 331 vdd-s4-supply = <&vph_pwr>; 332 vdd-s5-supply = <&vph_pwr>; 333 vdd-s6-supply = <&vph_pwr>; 334 vdd-s7-supply = <&vph_pwr>; 335 vdd-s8-supply = <&vph_pwr>; 336 vdd-s9-supply = <&vph_pwr>; 337 vdd-s10-supply = <&vph_pwr>; 338 vdd-s11-supply = <&vph_pwr>; 339 vdd-s12-supply = <&vph_pwr>; 340 vdd-s13-supply = <&vph_pwr>; 341 vdd-l1-l27-supply = <&vreg_s7a_1p025>; 342 vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>; 343 vdd-l3-l11-supply = <&vreg_s7a_1p025>; 344 vdd-l4-l5-supply = <&vreg_s7a_1p025>; 345 vdd-l6-supply = <&vph_pwr>; 346 vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>; 347 vdd-l9-supply = <&vreg_bob>; 348 vdd-l10-l23-l25-supply = <&vreg_bob>; 349 vdd-l13-l19-l21-supply = <&vreg_bob>; 350 vdd-l16-l28-supply = <&vreg_bob>; 351 vdd-l18-l22-supply = <&vreg_bob>; 352 vdd-l20-l24-supply = <&vreg_bob>; 353 vdd-l26-supply = <&vreg_s3a_1p35>; 354 vin-lvs-1-2-supply = <&vreg_s4a_1p8>; 355 356 vreg_s3a_1p35: smps3 { 357 regulator-min-microvolt = <1352000>; 358 regulator-max-microvolt = <1352000>; 359 }; 360 361 vreg_s5a_2p04: smps5 { 362 regulator-min-microvolt = <1904000>; 363 regulator-max-microvolt = <2040000>; 364 }; 365 366 vreg_s7a_1p025: smps7 { 367 regulator-min-microvolt = <900000>; 368 regulator-max-microvolt = <1028000>; 369 }; 370 371 vreg_l1a_0p875: ldo1 { 372 regulator-min-microvolt = <880000>; 373 regulator-max-microvolt = <880000>; 374 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 375 }; 376 377 vreg_l5a_0p8: ldo5 { 378 regulator-min-microvolt = <800000>; 379 regulator-max-microvolt = <800000>; 380 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 381 }; 382 383 vreg_l12a_1p8: ldo12 { 384 regulator-min-microvolt = <1800000>; 385 regulator-max-microvolt = <1800000>; 386 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 387 }; 388 389 vreg_l7a_1p8: ldo7 { 390 regulator-min-microvolt = <1800000>; 391 regulator-max-microvolt = <1800000>; 392 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 393 }; 394 395 vreg_l13a_2p95: ldo13 { 396 regulator-min-microvolt = <1800000>; 397 regulator-max-microvolt = <2960000>; 398 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 399 }; 400 401 vreg_l17a_1p3: ldo17 { 402 regulator-min-microvolt = <1304000>; 403 regulator-max-microvolt = <1304000>; 404 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 405 }; 406 407 vreg_l20a_2p95: ldo20 { 408 regulator-min-microvolt = <2960000>; 409 regulator-max-microvolt = <2968000>; 410 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 411 }; 412 413 vreg_l21a_2p95: ldo21 { 414 regulator-min-microvolt = <2960000>; 415 regulator-max-microvolt = <2968000>; 416 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 417 }; 418 419 vreg_l23a_3p3: ldo23 { 420 regulator-min-microvolt = <3300000>; 421 regulator-max-microvolt = <3312000>; 422 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 423 }; 424 425 vreg_l24a_3p075: ldo24 { 426 regulator-min-microvolt = <3088000>; 427 regulator-max-microvolt = <3088000>; 428 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 429 }; 430 431 vreg_l25a_3p3: ldo25 { 432 regulator-min-microvolt = <3300000>; 433 regulator-max-microvolt = <3312000>; 434 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 435 }; 436 437 vreg_l26a_1p2: ldo26 { 438 regulator-min-microvolt = <1200000>; 439 regulator-max-microvolt = <1200000>; 440 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 441 }; 442 443 vreg_lvs1a_1p8: lvs1 { 444 regulator-min-microvolt = <1800000>; 445 regulator-max-microvolt = <1800000>; 446 regulator-always-on; 447 }; 448 449 vreg_lvs2a_1p8: lvs2 { 450 regulator-min-microvolt = <1800000>; 451 regulator-max-microvolt = <1800000>; 452 regulator-always-on; 453 }; 454 }; 455 456 regulators-1 { 457 compatible = "qcom,pmi8998-rpmh-regulators"; 458 qcom,pmic-id = "b"; 459 460 vdd-bob-supply = <&vph_pwr>; 461 462 vreg_bob: bob { 463 regulator-min-microvolt = <3312000>; 464 regulator-max-microvolt = <3600000>; 465 regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>; 466 regulator-allow-bypass; 467 }; 468 }; 469}; 470 471&camss { 472 status = "okay"; 473 474 vdda-phy-supply = <&vreg_l1a_0p875>; 475 vdda-pll-supply = <&vreg_l26a_1p2>; 476}; 477 478&cdsp_pas { 479 status = "okay"; 480 firmware-name = "qcom/sdm845/cdsp.mbn"; 481}; 482 483&gcc { 484 protected-clocks = <GCC_QSPI_CORE_CLK>, 485 <GCC_QSPI_CORE_CLK_SRC>, 486 <GCC_QSPI_CNOC_PERIPH_AHB_CLK>, 487 <GCC_LPASS_Q6_AXI_CLK>, 488 <GCC_LPASS_SWAY_CLK>; 489}; 490 491&gpi_dma0 { 492 status = "okay"; 493}; 494 495&gpi_dma1 { 496 status = "okay"; 497}; 498 499&gpu { 500 status = "okay"; 501}; 502 503&gpu_zap_shader { 504 firmware-name = "qcom/sdm845/a630_zap.mbn"; 505}; 506 507&i2c10 { 508 status = "okay"; 509 clock-frequency = <400000>; 510 511 lt9611_codec: hdmi-bridge@3b { 512 compatible = "lontium,lt9611"; 513 reg = <0x3b>; 514 #sound-dai-cells = <1>; 515 516 interrupts-extended = <&tlmm 84 IRQ_TYPE_EDGE_FALLING>; 517 518 reset-gpios = <&tlmm 128 GPIO_ACTIVE_HIGH>; 519 520 vdd-supply = <<9611_1v8>; 521 vcc-supply = <<9611_3v3>; 522 523 pinctrl-names = "default"; 524 pinctrl-0 = <<9611_irq_pin>, <&dsi_sw_sel>; 525 526 ports { 527 #address-cells = <1>; 528 #size-cells = <0>; 529 530 port@0 { 531 reg = <0>; 532 533 lt9611_a: endpoint { 534 remote-endpoint = <&mdss_dsi0_out>; 535 }; 536 }; 537 538 port@1 { 539 reg = <1>; 540 541 lt9611_b: endpoint { 542 remote-endpoint = <&mdss_dsi1_out>; 543 }; 544 }; 545 546 port@2 { 547 reg = <2>; 548 549 lt9611_out: endpoint { 550 remote-endpoint = <&hdmi_con>; 551 }; 552 }; 553 }; 554 }; 555}; 556 557&i2c11 { 558 /* On Low speed expansion */ 559 clock-frequency = <100000>; 560 status = "okay"; 561}; 562 563&i2c14 { 564 /* On Low speed expansion */ 565 clock-frequency = <100000>; 566 status = "okay"; 567}; 568 569&mdss { 570 memory-region = <&cont_splash_mem>; 571 status = "okay"; 572}; 573 574&mdss_dsi0 { 575 status = "okay"; 576 vdda-supply = <&vreg_l26a_1p2>; 577 578 qcom,dual-dsi-mode; 579 qcom,master-dsi; 580}; 581 582&mdss_dsi0_out { 583 remote-endpoint = <<9611_a>; 584 data-lanes = <0 1 2 3>; 585}; 586 587&mdss_dsi0_phy { 588 status = "okay"; 589 vdds-supply = <&vreg_l1a_0p875>; 590}; 591 592&mdss_dsi1 { 593 vdda-supply = <&vreg_l26a_1p2>; 594 595 qcom,dual-dsi-mode; 596 597 /* DSI1 is slave, so use DSI0 clocks */ 598 assigned-clock-parents = <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>, 599 <&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>; 600 601 status = "okay"; 602}; 603 604&mdss_dsi1_out { 605 remote-endpoint = <<9611_b>; 606 data-lanes = <0 1 2 3>; 607}; 608 609&mdss_dsi1_phy { 610 vdds-supply = <&vreg_l1a_0p875>; 611 status = "okay"; 612}; 613 614&mss_pil { 615 status = "okay"; 616 firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mbn"; 617}; 618 619&pcie0 { 620 status = "okay"; 621 perst-gpios = <&tlmm 35 GPIO_ACTIVE_LOW>; 622 wake-gpios = <&tlmm 134 GPIO_ACTIVE_HIGH>; 623 624 vddpe-3v3-supply = <&pcie0_3p3v_dual>; 625 626 pinctrl-names = "default"; 627 pinctrl-0 = <&pcie0_default_state>; 628}; 629 630&pcie0_phy { 631 status = "okay"; 632 633 vdda-phy-supply = <&vreg_l1a_0p875>; 634 vdda-pll-supply = <&vreg_l26a_1p2>; 635}; 636 637&pcie1 { 638 status = "okay"; 639 perst-gpios = <&tlmm 102 GPIO_ACTIVE_LOW>; 640 641 pinctrl-names = "default"; 642 pinctrl-0 = <&pcie1_default_state>; 643}; 644 645&pcie1_phy { 646 status = "okay"; 647 648 vdda-phy-supply = <&vreg_l1a_0p875>; 649 vdda-pll-supply = <&vreg_l26a_1p2>; 650}; 651 652&pm8998_gpios { 653 gpio-line-names = 654 "NC", 655 "NC", 656 "WLAN_SW_CTRL", 657 "NC", 658 "PM_GPIO5_BLUE_BT_LED", 659 "VOL_UP_N", 660 "NC", 661 "ADC_IN1", 662 "PM_GPIO9_YEL_WIFI_LED", 663 "CAM0_AVDD_EN", 664 "NC", 665 "CAM0_DVDD_EN", 666 "PM_GPIO13_GREEN_U4_LED", 667 "DIV_CLK2", 668 "NC", 669 "NC", 670 "NC", 671 "SMB_STAT", 672 "NC", 673 "NC", 674 "ADC_IN2", 675 "OPTION1", 676 "WCSS_PWR_REQ", 677 "PM845_GPIO24", 678 "OPTION2", 679 "PM845_SLB"; 680 681 cam0_dvdd_1v2_en_default: cam0-dvdd-1v2-en-state { 682 pins = "gpio12"; 683 function = "normal"; 684 685 bias-pull-up; 686 drive-push-pull; 687 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>; 688 }; 689 690 cam0_avdd_2v8_en_default: cam0-avdd-2v8-en-state { 691 pins = "gpio10"; 692 function = "normal"; 693 694 bias-pull-up; 695 drive-push-pull; 696 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>; 697 }; 698 699 sw_ctrl_default: sw-ctrl-default-state { 700 pins = "gpio3"; 701 function = "normal"; 702 703 input-enable; 704 bias-pull-down; 705 }; 706 707 vol_up_pin_a: vol-up-active-state { 708 pins = "gpio6"; 709 function = "normal"; 710 input-enable; 711 bias-pull-up; 712 qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>; 713 }; 714}; 715 716&pm8998_resin { 717 linux,code = <KEY_VOLUMEDOWN>; 718 status = "okay"; 719}; 720 721&pmi8998_lpg { 722 status = "okay"; 723 724 qcom,power-source = <1>; 725 726 led@3 { 727 reg = <3>; 728 color = <LED_COLOR_ID_GREEN>; 729 function = LED_FUNCTION_HEARTBEAT; 730 function-enumerator = <3>; 731 732 linux,default-trigger = "heartbeat"; 733 default-state = "on"; 734 }; 735 736 led@4 { 737 reg = <4>; 738 color = <LED_COLOR_ID_GREEN>; 739 function = LED_FUNCTION_INDICATOR; 740 function-enumerator = <2>; 741 }; 742 743 led@5 { 744 reg = <5>; 745 color = <LED_COLOR_ID_GREEN>; 746 function = LED_FUNCTION_INDICATOR; 747 function-enumerator = <1>; 748 }; 749}; 750 751/* QUAT I2S Uses 4 I2S SD Lines for audio on LT9611 HDMI Bridge */ 752&q6afedai { 753 dai@22 { 754 reg = <QUATERNARY_MI2S_RX>; 755 qcom,sd-lines = <0 1 2 3>; 756 }; 757}; 758 759&q6asmdai { 760 dai@0 { 761 reg = <MSM_FRONTEND_DAI_MULTIMEDIA1>; 762 }; 763 764 dai@1 { 765 reg = <MSM_FRONTEND_DAI_MULTIMEDIA2>; 766 }; 767 768 dai@2 { 769 reg = <MSM_FRONTEND_DAI_MULTIMEDIA3>; 770 }; 771 772 dai@3 { 773 reg = <MSM_FRONTEND_DAI_MULTIMEDIA4>; 774 direction = <2>; 775 is-compress-dai; 776 }; 777}; 778 779&qupv3_id_0 { 780 status = "okay"; 781}; 782 783&qupv3_id_1 { 784 status = "okay"; 785}; 786 787&sdhc_2 { 788 status = "okay"; 789 790 pinctrl-names = "default"; 791 pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>; 792 793 vmmc-supply = <&vreg_l21a_2p95>; 794 vqmmc-supply = <&vreg_l13a_2p95>; 795 796 bus-width = <4>; 797 cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW>; 798}; 799 800&slpi_pas { 801 firmware-name = "qcom/sdm845/Thundercomm/db845c/slpi.mbn"; 802 803 status = "okay"; 804}; 805 806&sound { 807 compatible = "qcom,db845c-sndcard", "qcom,sdm845-sndcard"; 808 pinctrl-0 = <&quat_mi2s_active 809 &quat_mi2s_sd0_active 810 &quat_mi2s_sd1_active 811 &quat_mi2s_sd2_active 812 &quat_mi2s_sd3_active>; 813 pinctrl-names = "default"; 814 model = "DB845c"; 815 audio-routing = 816 "RX_BIAS", "MCLK", 817 "AMIC1", "MIC BIAS1", 818 "AMIC2", "MIC BIAS2", 819 "DMIC0", "MIC BIAS1", 820 "DMIC1", "MIC BIAS1", 821 "DMIC2", "MIC BIAS3", 822 "DMIC3", "MIC BIAS3", 823 "SpkrLeft IN", "SPK1 OUT", 824 "SpkrRight IN", "SPK2 OUT"; 825 826 mm1-dai-link { 827 link-name = "MultiMedia1"; 828 cpu { 829 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA1>; 830 }; 831 }; 832 833 mm2-dai-link { 834 link-name = "MultiMedia2"; 835 cpu { 836 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA2>; 837 }; 838 }; 839 840 mm3-dai-link { 841 link-name = "MultiMedia3"; 842 cpu { 843 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA3>; 844 }; 845 }; 846 847 mm4-dai-link { 848 link-name = "MultiMedia4"; 849 cpu { 850 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA4>; 851 }; 852 }; 853 854 hdmi-dai-link { 855 link-name = "HDMI Playback"; 856 cpu { 857 sound-dai = <&q6afedai QUATERNARY_MI2S_RX>; 858 }; 859 860 platform { 861 sound-dai = <&q6routing>; 862 }; 863 864 codec { 865 sound-dai = <<9611_codec 0>; 866 }; 867 }; 868 869 slim-dai-link { 870 link-name = "SLIM Playback"; 871 cpu { 872 sound-dai = <&q6afedai SLIMBUS_0_RX>; 873 }; 874 875 platform { 876 sound-dai = <&q6routing>; 877 }; 878 879 codec { 880 sound-dai = <&left_spkr>, <&right_spkr>, <&swm 0>, <&wcd9340 0>; 881 }; 882 }; 883 884 slimcap-dai-link { 885 link-name = "SLIM Capture"; 886 cpu { 887 sound-dai = <&q6afedai SLIMBUS_0_TX>; 888 }; 889 890 platform { 891 sound-dai = <&q6routing>; 892 }; 893 894 codec { 895 sound-dai = <&wcd9340 1>; 896 }; 897 }; 898}; 899 900&spi0 { 901 status = "okay"; 902 pinctrl-names = "default"; 903 pinctrl-0 = <&qup_spi0_default>; 904 905 can@0 { 906 compatible = "microchip,mcp2517fd"; 907 reg = <0>; 908 clocks = <&clk40m>; 909 interrupts-extended = <&tlmm 104 IRQ_TYPE_LEVEL_LOW>; 910 spi-max-frequency = <10000000>; 911 vdd-supply = <&vdc_5v>; 912 xceiver-supply = <&vdc_5v>; 913 }; 914}; 915 916&spi2 { 917 /* On Low speed expansion */ 918 status = "okay"; 919}; 920 921&tlmm { 922 cam0_default: cam0-default-state { 923 rst-pins { 924 pins = "gpio9"; 925 function = "gpio"; 926 927 drive-strength = <16>; 928 bias-disable; 929 }; 930 931 mclk0-pins { 932 pins = "gpio13"; 933 function = "cam_mclk"; 934 935 drive-strength = <16>; 936 bias-disable; 937 }; 938 }; 939 940 cam3_default: cam3-default-state { 941 rst-pins { 942 function = "gpio"; 943 pins = "gpio21"; 944 945 drive-strength = <16>; 946 bias-disable; 947 }; 948 949 mclk3-pins { 950 function = "cam_mclk"; 951 pins = "gpio16"; 952 953 drive-strength = <16>; 954 bias-disable; 955 }; 956 }; 957 958 dsi_sw_sel: dsi-sw-sel-state { 959 pins = "gpio120"; 960 function = "gpio"; 961 962 drive-strength = <2>; 963 bias-disable; 964 output-high; 965 }; 966 967 lt9611_irq_pin: lt9611-irq-state { 968 pins = "gpio84"; 969 function = "gpio"; 970 bias-disable; 971 }; 972 973 pcie0_default_state: pcie0-default-state { 974 clkreq-pins { 975 pins = "gpio36"; 976 function = "pci_e0"; 977 bias-pull-up; 978 }; 979 980 reset-n-pins { 981 pins = "gpio35"; 982 function = "gpio"; 983 984 drive-strength = <2>; 985 output-low; 986 bias-pull-down; 987 }; 988 989 wake-n-pins { 990 pins = "gpio37"; 991 function = "gpio"; 992 993 drive-strength = <2>; 994 bias-pull-up; 995 }; 996 }; 997 998 pcie0_pwren_state: pcie0-pwren-state { 999 pins = "gpio90"; 1000 function = "gpio"; 1001 1002 drive-strength = <2>; 1003 bias-disable; 1004 }; 1005 1006 pcie1_default_state: pcie1-default-state { 1007 perst-n-pins { 1008 pins = "gpio102"; 1009 function = "gpio"; 1010 1011 drive-strength = <16>; 1012 bias-disable; 1013 }; 1014 1015 clkreq-pins { 1016 pins = "gpio103"; 1017 function = "pci_e1"; 1018 bias-pull-up; 1019 }; 1020 1021 wake-n-pins { 1022 pins = "gpio11"; 1023 function = "gpio"; 1024 1025 drive-strength = <2>; 1026 bias-pull-up; 1027 }; 1028 1029 reset-n-pins { 1030 pins = "gpio75"; 1031 function = "gpio"; 1032 1033 drive-strength = <16>; 1034 bias-pull-up; 1035 output-high; 1036 }; 1037 }; 1038 1039 sdc2_default_state: sdc2-default-state { 1040 clk-pins { 1041 pins = "sdc2_clk"; 1042 bias-disable; 1043 1044 /* 1045 * It seems that mmc_test reports errors if drive 1046 * strength is not 16 on clk, cmd, and data pins. 1047 */ 1048 drive-strength = <16>; 1049 }; 1050 1051 cmd-pins { 1052 pins = "sdc2_cmd"; 1053 bias-pull-up; 1054 drive-strength = <10>; 1055 }; 1056 1057 data-pins { 1058 pins = "sdc2_data"; 1059 bias-pull-up; 1060 drive-strength = <10>; 1061 }; 1062 }; 1063 1064 sdc2_card_det_n: sd-card-det-n-state { 1065 pins = "gpio126"; 1066 function = "gpio"; 1067 bias-pull-up; 1068 }; 1069}; 1070 1071&uart3 { 1072 label = "LS-UART0"; 1073 pinctrl-0 = <&qup_uart3_4pin>; 1074 1075 status = "disabled"; 1076}; 1077 1078&uart6 { 1079 status = "okay"; 1080 1081 pinctrl-0 = <&qup_uart6_4pin>; 1082 1083 bluetooth { 1084 compatible = "qcom,wcn3990-bt"; 1085 1086 vddio-supply = <&vreg_pmu_io>; 1087 vddxo-supply = <&vreg_pmu_xo>; 1088 vddrf-supply = <&vreg_pmu_rf>; 1089 vddch0-supply = <&vreg_pmu_ch0>; 1090 1091 max-speed = <3200000>; 1092 }; 1093}; 1094 1095&uart9 { 1096 label = "LS-UART1"; 1097 status = "okay"; 1098}; 1099 1100&usb_1 { 1101 status = "okay"; 1102}; 1103 1104&usb_1_dwc3 { 1105 dr_mode = "peripheral"; 1106}; 1107 1108&usb_1_hsphy { 1109 status = "okay"; 1110 1111 vdd-supply = <&vreg_l1a_0p875>; 1112 vdda-pll-supply = <&vreg_l12a_1p8>; 1113 vdda-phy-dpdm-supply = <&vreg_l24a_3p075>; 1114 1115 qcom,imp-res-offset-value = <8>; 1116 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>; 1117 qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>; 1118 qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>; 1119}; 1120 1121&usb_1_qmpphy { 1122 status = "okay"; 1123 1124 vdda-phy-supply = <&vreg_l26a_1p2>; 1125 vdda-pll-supply = <&vreg_l1a_0p875>; 1126}; 1127 1128&usb_2 { 1129 status = "okay"; 1130}; 1131 1132&usb_2_dwc3 { 1133 dr_mode = "host"; 1134}; 1135 1136&usb_2_hsphy { 1137 status = "okay"; 1138 1139 vdd-supply = <&vreg_l1a_0p875>; 1140 vdda-pll-supply = <&vreg_l12a_1p8>; 1141 vdda-phy-dpdm-supply = <&vreg_l24a_3p075>; 1142 1143 qcom,imp-res-offset-value = <8>; 1144 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>; 1145}; 1146 1147&usb_2_qmpphy { 1148 status = "okay"; 1149 1150 vdda-phy-supply = <&vreg_l26a_1p2>; 1151 vdda-pll-supply = <&vreg_l1a_0p875>; 1152}; 1153 1154&ufs_mem_hc { 1155 status = "okay"; 1156 1157 reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>; 1158 1159 vcc-supply = <&vreg_l20a_2p95>; 1160 vcc-max-microamp = <800000>; 1161}; 1162 1163&ufs_mem_phy { 1164 status = "okay"; 1165 1166 vdda-phy-supply = <&vreg_l1a_0p875>; 1167 vdda-pll-supply = <&vreg_l26a_1p2>; 1168}; 1169 1170&venus { 1171 status = "okay"; 1172}; 1173 1174&wcd9340 { 1175 reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>; 1176 vdd-buck-supply = <&vreg_s4a_1p8>; 1177 vdd-buck-sido-supply = <&vreg_s4a_1p8>; 1178 vdd-tx-supply = <&vreg_s4a_1p8>; 1179 vdd-rx-supply = <&vreg_s4a_1p8>; 1180 vdd-io-supply = <&vreg_s4a_1p8>; 1181 1182 swm: soundwire@c85 { 1183 left_spkr: speaker@0,1 { 1184 compatible = "sdw10217201000"; 1185 reg = <0 1>; 1186 powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>; 1187 #thermal-sensor-cells = <0>; 1188 sound-name-prefix = "SpkrLeft"; 1189 #sound-dai-cells = <0>; 1190 }; 1191 1192 right_spkr: speaker@0,2 { 1193 compatible = "sdw10217201000"; 1194 powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>; 1195 reg = <0 2>; 1196 #thermal-sensor-cells = <0>; 1197 sound-name-prefix = "SpkrRight"; 1198 #sound-dai-cells = <0>; 1199 }; 1200 }; 1201}; 1202 1203&wifi { 1204 /* SoC */ 1205 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>; 1206 1207 /* WiFi / BT PMU */ 1208 vdd-1.8-xo-supply = <&vreg_pmu_xo>; 1209 vdd-1.3-rfa-supply = <&vreg_pmu_rf>; 1210 vdd-3.3-ch0-supply = <&vreg_pmu_ch0>; 1211 vdd-3.3-ch1-supply = <&vreg_pmu_ch1>; 1212 1213 qcom,snoc-host-cap-8bit-quirk; 1214 qcom,calibration-variant = "Thundercomm_DB845C"; 1215 1216 status = "okay"; 1217}; 1218 1219/* PINCTRL - additions to nodes defined in sdm845.dtsi */ 1220&qup_spi2_default { 1221 drive-strength = <16>; 1222}; 1223 1224&qup_i2c10_default { 1225 drive-strength = <2>; 1226 bias-disable; 1227}; 1228 1229&qup_uart9_rx { 1230 drive-strength = <2>; 1231 bias-pull-up; 1232}; 1233 1234&qup_uart9_tx { 1235 drive-strength = <2>; 1236 bias-disable; 1237}; 1238 1239/* PINCTRL - additions to nodes defined in sdm845.dtsi */ 1240&qup_spi0_default { 1241 drive-strength = <6>; 1242 bias-disable; 1243}; 1244