1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Copyright (c) 2019, Linaro Ltd. 4 */ 5 6/dts-v1/; 7 8#include <dt-bindings/gpio/gpio.h> 9#include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 10#include <dt-bindings/regulator/qcom,rpmh-regulator.h> 11#include <dt-bindings/sound/qcom,q6afe.h> 12#include <dt-bindings/sound/qcom,q6asm.h> 13#include "sdm845.dtsi" 14#include "pm8998.dtsi" 15#include "pmi8998.dtsi" 16 17/ { 18 model = "Thundercomm Dragonboard 845c"; 19 compatible = "thundercomm,db845c", "qcom,sdm845"; 20 21 aliases { 22 serial0 = &uart9; 23 hsuart0 = &uart6; 24 }; 25 26 chosen { 27 stdout-path = "serial0:115200n8"; 28 }; 29 30 dc12v: dc12v-regulator { 31 compatible = "regulator-fixed"; 32 regulator-name = "DC12V"; 33 regulator-min-microvolt = <12000000>; 34 regulator-max-microvolt = <12000000>; 35 regulator-always-on; 36 }; 37 38 gpio_keys { 39 compatible = "gpio-keys"; 40 autorepeat; 41 42 pinctrl-names = "default"; 43 pinctrl-0 = <&vol_up_pin_a>; 44 45 vol-up { 46 label = "Volume Up"; 47 linux,code = <KEY_VOLUMEUP>; 48 gpios = <&pm8998_gpio 6 GPIO_ACTIVE_LOW>; 49 }; 50 }; 51 52 leds { 53 compatible = "gpio-leds"; 54 55 user4 { 56 label = "green:user4"; 57 gpios = <&pm8998_gpio 13 GPIO_ACTIVE_HIGH>; 58 linux,default-trigger = "panic-indicator"; 59 default-state = "off"; 60 }; 61 62 wlan { 63 label = "yellow:wlan"; 64 gpios = <&pm8998_gpio 9 GPIO_ACTIVE_HIGH>; 65 linux,default-trigger = "phy0tx"; 66 default-state = "off"; 67 }; 68 69 bt { 70 label = "blue:bt"; 71 gpios = <&pm8998_gpio 5 GPIO_ACTIVE_HIGH>; 72 linux,default-trigger = "bluetooth-power"; 73 default-state = "off"; 74 }; 75 }; 76 77 lt9611_1v8: lt9611-vdd18-regulator { 78 compatible = "regulator-fixed"; 79 regulator-name = "LT9611_1V8"; 80 81 vin-supply = <&vdc_5v>; 82 regulator-min-microvolt = <1800000>; 83 regulator-max-microvolt = <1800000>; 84 85 gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>; 86 enable-active-high; 87 }; 88 89 lt9611_3v3: lt9611-3v3 { 90 compatible = "regulator-fixed"; 91 regulator-name = "LT9611_3V3"; 92 93 vin-supply = <&vdc_3v3>; 94 regulator-min-microvolt = <3300000>; 95 regulator-max-microvolt = <3300000>; 96 97 // TODO: make it possible to drive same GPIO from two clients 98 // gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>; 99 // enable-active-high; 100 }; 101 102 pcie0_1p05v: pcie-0-1p05v-regulator { 103 compatible = "regulator-fixed"; 104 regulator-name = "PCIE0_1.05V"; 105 106 vin-supply = <&vbat>; 107 regulator-min-microvolt = <1050000>; 108 regulator-max-microvolt = <1050000>; 109 110 // TODO: make it possible to drive same GPIO from two clients 111 // gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>; 112 // enable-active-high; 113 }; 114 115 cam0_dvdd_1v2: reg_cam0_dvdd_1v2 { 116 compatible = "regulator-fixed"; 117 regulator-name = "CAM0_DVDD_1V2"; 118 regulator-min-microvolt = <1200000>; 119 regulator-max-microvolt = <1200000>; 120 enable-active-high; 121 gpio = <&pm8998_gpio 12 GPIO_ACTIVE_HIGH>; 122 pinctrl-names = "default"; 123 pinctrl-0 = <&cam0_dvdd_1v2_en_default>; 124 vin-supply = <&vbat>; 125 }; 126 127 cam0_avdd_2v8: reg_cam0_avdd_2v8 { 128 compatible = "regulator-fixed"; 129 regulator-name = "CAM0_AVDD_2V8"; 130 regulator-min-microvolt = <2800000>; 131 regulator-max-microvolt = <2800000>; 132 enable-active-high; 133 gpio = <&pm8998_gpio 10 GPIO_ACTIVE_HIGH>; 134 pinctrl-names = "default"; 135 pinctrl-0 = <&cam0_avdd_2v8_en_default>; 136 vin-supply = <&vbat>; 137 }; 138 139 /* This regulator is enabled when the VREG_LVS1A_1P8 trace is enabled */ 140 cam3_avdd_2v8: reg_cam3_avdd_2v8 { 141 compatible = "regulator-fixed"; 142 regulator-name = "CAM3_AVDD_2V8"; 143 regulator-min-microvolt = <2800000>; 144 regulator-max-microvolt = <2800000>; 145 regulator-always-on; 146 vin-supply = <&vbat>; 147 }; 148 149 pcie0_3p3v_dual: vldo-3v3-regulator { 150 compatible = "regulator-fixed"; 151 regulator-name = "VLDO_3V3"; 152 153 vin-supply = <&vbat>; 154 regulator-min-microvolt = <3300000>; 155 regulator-max-microvolt = <3300000>; 156 157 gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>; 158 enable-active-high; 159 160 pinctrl-names = "default"; 161 pinctrl-0 = <&pcie0_pwren_state>; 162 }; 163 164 v5p0_hdmiout: v5p0-hdmiout-regulator { 165 compatible = "regulator-fixed"; 166 regulator-name = "V5P0_HDMIOUT"; 167 168 vin-supply = <&vdc_5v>; 169 regulator-min-microvolt = <500000>; 170 regulator-max-microvolt = <500000>; 171 172 // TODO: make it possible to drive same GPIO from two clients 173 // gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>; 174 // enable-active-high; 175 }; 176 177 vbat: vbat-regulator { 178 compatible = "regulator-fixed"; 179 regulator-name = "VBAT"; 180 181 vin-supply = <&dc12v>; 182 regulator-min-microvolt = <4200000>; 183 regulator-max-microvolt = <4200000>; 184 regulator-always-on; 185 }; 186 187 vbat_som: vbat-som-regulator { 188 compatible = "regulator-fixed"; 189 regulator-name = "VBAT_SOM"; 190 191 vin-supply = <&dc12v>; 192 regulator-min-microvolt = <4200000>; 193 regulator-max-microvolt = <4200000>; 194 regulator-always-on; 195 }; 196 197 vdc_3v3: vdc-3v3-regulator { 198 compatible = "regulator-fixed"; 199 regulator-name = "VDC_3V3"; 200 vin-supply = <&dc12v>; 201 regulator-min-microvolt = <3300000>; 202 regulator-max-microvolt = <3300000>; 203 regulator-always-on; 204 }; 205 206 vdc_5v: vdc-5v-regulator { 207 compatible = "regulator-fixed"; 208 regulator-name = "VDC_5V"; 209 210 vin-supply = <&dc12v>; 211 regulator-min-microvolt = <500000>; 212 regulator-max-microvolt = <500000>; 213 regulator-always-on; 214 }; 215 216 vreg_s4a_1p8: vreg-s4a-1p8 { 217 compatible = "regulator-fixed"; 218 regulator-name = "vreg_s4a_1p8"; 219 220 regulator-min-microvolt = <1800000>; 221 regulator-max-microvolt = <1800000>; 222 regulator-always-on; 223 }; 224 225 vph_pwr: vph-pwr-regulator { 226 compatible = "regulator-fixed"; 227 regulator-name = "vph_pwr"; 228 229 vin-supply = <&vbat_som>; 230 }; 231}; 232 233&adsp_pas { 234 status = "okay"; 235 236 firmware-name = "qcom/sdm845/adsp.mdt"; 237}; 238 239&apps_rsc { 240 pm8998-rpmh-regulators { 241 compatible = "qcom,pm8998-rpmh-regulators"; 242 qcom,pmic-id = "a"; 243 vdd-s1-supply = <&vph_pwr>; 244 vdd-s2-supply = <&vph_pwr>; 245 vdd-s3-supply = <&vph_pwr>; 246 vdd-s4-supply = <&vph_pwr>; 247 vdd-s5-supply = <&vph_pwr>; 248 vdd-s6-supply = <&vph_pwr>; 249 vdd-s7-supply = <&vph_pwr>; 250 vdd-s8-supply = <&vph_pwr>; 251 vdd-s9-supply = <&vph_pwr>; 252 vdd-s10-supply = <&vph_pwr>; 253 vdd-s11-supply = <&vph_pwr>; 254 vdd-s12-supply = <&vph_pwr>; 255 vdd-s13-supply = <&vph_pwr>; 256 vdd-l1-l27-supply = <&vreg_s7a_1p025>; 257 vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>; 258 vdd-l3-l11-supply = <&vreg_s7a_1p025>; 259 vdd-l4-l5-supply = <&vreg_s7a_1p025>; 260 vdd-l6-supply = <&vph_pwr>; 261 vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>; 262 vdd-l9-supply = <&vreg_bob>; 263 vdd-l10-l23-l25-supply = <&vreg_bob>; 264 vdd-l13-l19-l21-supply = <&vreg_bob>; 265 vdd-l16-l28-supply = <&vreg_bob>; 266 vdd-l18-l22-supply = <&vreg_bob>; 267 vdd-l20-l24-supply = <&vreg_bob>; 268 vdd-l26-supply = <&vreg_s3a_1p35>; 269 vin-lvs-1-2-supply = <&vreg_s4a_1p8>; 270 271 vreg_s3a_1p35: smps3 { 272 regulator-min-microvolt = <1352000>; 273 regulator-max-microvolt = <1352000>; 274 }; 275 276 vreg_s5a_2p04: smps5 { 277 regulator-min-microvolt = <1904000>; 278 regulator-max-microvolt = <2040000>; 279 }; 280 281 vreg_s7a_1p025: smps7 { 282 regulator-min-microvolt = <900000>; 283 regulator-max-microvolt = <1028000>; 284 }; 285 286 vreg_l1a_0p875: ldo1 { 287 regulator-min-microvolt = <880000>; 288 regulator-max-microvolt = <880000>; 289 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 290 }; 291 292 vreg_l5a_0p8: ldo5 { 293 regulator-min-microvolt = <800000>; 294 regulator-max-microvolt = <800000>; 295 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 296 }; 297 298 vreg_l12a_1p8: ldo12 { 299 regulator-min-microvolt = <1800000>; 300 regulator-max-microvolt = <1800000>; 301 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 302 }; 303 304 vreg_l7a_1p8: ldo7 { 305 regulator-min-microvolt = <1800000>; 306 regulator-max-microvolt = <1800000>; 307 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 308 }; 309 310 vreg_l13a_2p95: ldo13 { 311 regulator-min-microvolt = <1800000>; 312 regulator-max-microvolt = <2960000>; 313 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 314 }; 315 316 vreg_l17a_1p3: ldo17 { 317 regulator-min-microvolt = <1304000>; 318 regulator-max-microvolt = <1304000>; 319 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 320 }; 321 322 vreg_l20a_2p95: ldo20 { 323 regulator-min-microvolt = <2960000>; 324 regulator-max-microvolt = <2968000>; 325 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 326 }; 327 328 vreg_l21a_2p95: ldo21 { 329 regulator-min-microvolt = <2960000>; 330 regulator-max-microvolt = <2968000>; 331 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 332 }; 333 334 vreg_l24a_3p075: ldo24 { 335 regulator-min-microvolt = <3088000>; 336 regulator-max-microvolt = <3088000>; 337 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 338 }; 339 340 vreg_l25a_3p3: ldo25 { 341 regulator-min-microvolt = <3300000>; 342 regulator-max-microvolt = <3312000>; 343 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 344 }; 345 346 vreg_l26a_1p2: ldo26 { 347 regulator-min-microvolt = <1200000>; 348 regulator-max-microvolt = <1200000>; 349 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 350 }; 351 352 vreg_lvs1a_1p8: lvs1 { 353 regulator-min-microvolt = <1800000>; 354 regulator-max-microvolt = <1800000>; 355 regulator-always-on; 356 }; 357 358 vreg_lvs2a_1p8: lvs2 { 359 regulator-min-microvolt = <1800000>; 360 regulator-max-microvolt = <1800000>; 361 regulator-always-on; 362 }; 363 }; 364 365 pmi8998-rpmh-regulators { 366 compatible = "qcom,pmi8998-rpmh-regulators"; 367 qcom,pmic-id = "b"; 368 369 vdd-bob-supply = <&vph_pwr>; 370 371 vreg_bob: bob { 372 regulator-min-microvolt = <3312000>; 373 regulator-max-microvolt = <3600000>; 374 regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>; 375 regulator-allow-bypass; 376 }; 377 }; 378}; 379 380&cdsp_pas { 381 status = "okay"; 382 firmware-name = "qcom/sdm845/cdsp.mdt"; 383}; 384 385&gcc { 386 protected-clocks = <GCC_QSPI_CORE_CLK>, 387 <GCC_QSPI_CORE_CLK_SRC>, 388 <GCC_QSPI_CNOC_PERIPH_AHB_CLK>; 389}; 390 391&gpu { 392 zap-shader { 393 memory-region = <&gpu_mem>; 394 firmware-name = "qcom/sdm845/a630_zap.mbn"; 395 }; 396}; 397 398&i2c11 { 399 /* On Low speed expansion */ 400 label = "LS-I2C1"; 401 status = "okay"; 402}; 403 404&i2c14 { 405 /* On Low speed expansion */ 406 label = "LS-I2C0"; 407 status = "okay"; 408}; 409 410&mss_pil { 411 status = "okay"; 412 firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mbn"; 413}; 414 415&pcie0 { 416 status = "okay"; 417 perst-gpio = <&tlmm 35 GPIO_ACTIVE_LOW>; 418 enable-gpio = <&tlmm 134 GPIO_ACTIVE_HIGH>; 419 420 vddpe-3v3-supply = <&pcie0_3p3v_dual>; 421 422 pinctrl-names = "default"; 423 pinctrl-0 = <&pcie0_default_state>; 424}; 425 426&pcie0_phy { 427 status = "okay"; 428 429 vdda-phy-supply = <&vreg_l1a_0p875>; 430 vdda-pll-supply = <&vreg_l26a_1p2>; 431}; 432 433&pcie1 { 434 status = "okay"; 435 perst-gpio = <&tlmm 102 GPIO_ACTIVE_LOW>; 436 437 pinctrl-names = "default"; 438 pinctrl-0 = <&pcie1_default_state>; 439}; 440 441&pcie1_phy { 442 status = "okay"; 443 444 vdda-phy-supply = <&vreg_l1a_0p875>; 445 vdda-pll-supply = <&vreg_l26a_1p2>; 446}; 447 448&pm8998_gpio { 449 gpio-line-names = 450 "NC", 451 "NC", 452 "WLAN_SW_CTRL", 453 "NC", 454 "PM_GPIO5_BLUE_BT_LED", 455 "VOL_UP_N", 456 "NC", 457 "ADC_IN1", 458 "PM_GPIO9_YEL_WIFI_LED", 459 "CAM0_AVDD_EN", 460 "NC", 461 "CAM0_DVDD_EN", 462 "PM_GPIO13_GREEN_U4_LED", 463 "DIV_CLK2", 464 "NC", 465 "NC", 466 "NC", 467 "SMB_STAT", 468 "NC", 469 "NC", 470 "ADC_IN2", 471 "OPTION1", 472 "WCSS_PWR_REQ", 473 "PM845_GPIO24", 474 "OPTION2", 475 "PM845_SLB"; 476 477 cam0_dvdd_1v2_en_default: cam0-dvdd-1v2-en { 478 pins = "gpio12"; 479 function = "normal"; 480 481 bias-pull-up; 482 drive-push-pull; 483 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>; 484 }; 485 486 cam0_avdd_2v8_en_default: cam0-avdd-2v8-en { 487 pins = "gpio10"; 488 function = "normal"; 489 490 bias-pull-up; 491 drive-push-pull; 492 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>; 493 }; 494 495 vol_up_pin_a: vol-up-active { 496 pins = "gpio6"; 497 function = "normal"; 498 input-enable; 499 bias-pull-up; 500 qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>; 501 }; 502}; 503 504&pm8998_pon { 505 resin { 506 compatible = "qcom,pm8941-resin"; 507 interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>; 508 debounce = <15625>; 509 bias-pull-up; 510 linux,code = <KEY_VOLUMEDOWN>; 511 }; 512}; 513 514/* QUAT I2S Uses 4 I2S SD Lines for audio on LT9611 HDMI Bridge */ 515&q6afedai { 516 qi2s@22 { 517 reg = <22>; 518 qcom,sd-lines = <0 1 2 3>; 519 }; 520}; 521 522&q6asmdai { 523 dai@0 { 524 reg = <0>; 525 }; 526 527 dai@1 { 528 reg = <1>; 529 }; 530 531 dai@2 { 532 reg = <2>; 533 }; 534 535 dai@3 { 536 reg = <3>; 537 direction = <2>; 538 is-compress-dai; 539 }; 540}; 541 542&qupv3_id_0 { 543 status = "okay"; 544}; 545 546&qupv3_id_1 { 547 status = "okay"; 548}; 549 550&sdhc_2 { 551 status = "okay"; 552 553 pinctrl-names = "default"; 554 pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>; 555 556 vmmc-supply = <&vreg_l21a_2p95>; 557 vqmmc-supply = <&vreg_l13a_2p95>; 558 559 bus-width = <4>; 560 cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW>; 561}; 562 563&sound { 564 compatible = "qcom,db845c-sndcard"; 565 pinctrl-0 = <&quat_mi2s_active 566 &quat_mi2s_sd0_active 567 &quat_mi2s_sd1_active 568 &quat_mi2s_sd2_active 569 &quat_mi2s_sd3_active>; 570 pinctrl-names = "default"; 571 model = "DB845c"; 572 audio-routing = 573 "RX_BIAS", "MCLK", 574 "AMIC1", "MIC BIAS1", 575 "AMIC2", "MIC BIAS2", 576 "DMIC0", "MIC BIAS1", 577 "DMIC1", "MIC BIAS1", 578 "DMIC2", "MIC BIAS3", 579 "DMIC3", "MIC BIAS3", 580 "SpkrLeft IN", "SPK1 OUT", 581 "SpkrRight IN", "SPK2 OUT", 582 "MM_DL1", "MultiMedia1 Playback", 583 "MM_DL2", "MultiMedia2 Playback", 584 "MM_DL4", "MultiMedia4 Playback", 585 "MultiMedia3 Capture", "MM_UL3"; 586 587 mm1-dai-link { 588 link-name = "MultiMedia1"; 589 cpu { 590 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA1>; 591 }; 592 }; 593 594 mm2-dai-link { 595 link-name = "MultiMedia2"; 596 cpu { 597 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA2>; 598 }; 599 }; 600 601 mm3-dai-link { 602 link-name = "MultiMedia3"; 603 cpu { 604 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA3>; 605 }; 606 }; 607 608 mm4-dai-link { 609 link-name = "MultiMedia4"; 610 cpu { 611 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA4>; 612 }; 613 }; 614 615 slim-dai-link { 616 link-name = "SLIM Playback"; 617 cpu { 618 sound-dai = <&q6afedai SLIMBUS_0_RX>; 619 }; 620 621 platform { 622 sound-dai = <&q6routing>; 623 }; 624 625 codec { 626 sound-dai = <&left_spkr>, <&right_spkr>, <&swm 0>, <&wcd9340 0>; 627 }; 628 }; 629 630 slimcap-dai-link { 631 link-name = "SLIM Capture"; 632 cpu { 633 sound-dai = <&q6afedai SLIMBUS_0_TX>; 634 }; 635 636 platform { 637 sound-dai = <&q6routing>; 638 }; 639 640 codec { 641 sound-dai = <&wcd9340 1>; 642 }; 643 }; 644}; 645 646&spi2 { 647 /* On Low speed expansion */ 648 label = "LS-SPI0"; 649 status = "okay"; 650}; 651 652&tlmm { 653 cam0_default: cam0_default { 654 rst { 655 pins = "gpio9"; 656 function = "gpio"; 657 658 drive-strength = <16>; 659 bias-disable; 660 }; 661 662 mclk0 { 663 pins = "gpio13"; 664 function = "cam_mclk"; 665 666 drive-strength = <16>; 667 bias-disable; 668 }; 669 }; 670 671 cam3_default: cam3_default { 672 rst { 673 function = "gpio"; 674 pins = "gpio21"; 675 676 drive-strength = <16>; 677 bias-disable; 678 }; 679 680 mclk3 { 681 function = "cam_mclk"; 682 pins = "gpio16"; 683 684 drive-strength = <16>; 685 bias-disable; 686 }; 687 }; 688 689 pcie0_default_state: pcie0-default { 690 clkreq { 691 pins = "gpio36"; 692 function = "pci_e0"; 693 bias-pull-up; 694 }; 695 696 reset-n { 697 pins = "gpio35"; 698 function = "gpio"; 699 700 drive-strength = <2>; 701 output-low; 702 bias-pull-down; 703 }; 704 705 wake-n { 706 pins = "gpio37"; 707 function = "gpio"; 708 709 drive-strength = <2>; 710 bias-pull-up; 711 }; 712 }; 713 714 pcie0_pwren_state: pcie0-pwren { 715 pins = "gpio90"; 716 function = "gpio"; 717 718 drive-strength = <2>; 719 bias-disable; 720 }; 721 722 pcie1_default_state: pcie1-default { 723 perst-n { 724 pins = "gpio102"; 725 function = "gpio"; 726 727 drive-strength = <16>; 728 bias-disable; 729 }; 730 731 clkreq { 732 pins = "gpio103"; 733 function = "pci_e1"; 734 bias-pull-up; 735 }; 736 737 wake-n { 738 pins = "gpio11"; 739 function = "gpio"; 740 741 drive-strength = <2>; 742 bias-pull-up; 743 }; 744 745 reset-n { 746 pins = "gpio75"; 747 function = "gpio"; 748 749 drive-strength = <16>; 750 bias-pull-up; 751 output-high; 752 }; 753 }; 754 755 sdc2_default_state: sdc2-default { 756 clk { 757 pins = "sdc2_clk"; 758 bias-disable; 759 760 /* 761 * It seems that mmc_test reports errors if drive 762 * strength is not 16 on clk, cmd, and data pins. 763 */ 764 drive-strength = <16>; 765 }; 766 767 cmd { 768 pins = "sdc2_cmd"; 769 bias-pull-up; 770 drive-strength = <10>; 771 }; 772 773 data { 774 pins = "sdc2_data"; 775 bias-pull-up; 776 drive-strength = <10>; 777 }; 778 }; 779 780 sdc2_card_det_n: sd-card-det-n { 781 pins = "gpio126"; 782 function = "gpio"; 783 bias-pull-up; 784 }; 785 786 wcd_intr_default: wcd_intr_default { 787 pins = <54>; 788 function = "gpio"; 789 790 input-enable; 791 bias-pull-down; 792 drive-strength = <2>; 793 }; 794}; 795 796&uart3 { 797 label = "LS-UART0"; 798 status = "disabled"; 799}; 800 801&uart6 { 802 status = "okay"; 803 804 bluetooth { 805 compatible = "qcom,wcn3990-bt"; 806 807 vddio-supply = <&vreg_s4a_1p8>; 808 vddxo-supply = <&vreg_l7a_1p8>; 809 vddrf-supply = <&vreg_l17a_1p3>; 810 vddch0-supply = <&vreg_l25a_3p3>; 811 max-speed = <3200000>; 812 }; 813}; 814 815&uart9 { 816 label = "LS-UART1"; 817 status = "okay"; 818}; 819 820&usb_1 { 821 status = "okay"; 822}; 823 824&usb_1_dwc3 { 825 dr_mode = "peripheral"; 826}; 827 828&usb_1_hsphy { 829 status = "okay"; 830 831 vdd-supply = <&vreg_l1a_0p875>; 832 vdda-pll-supply = <&vreg_l12a_1p8>; 833 vdda-phy-dpdm-supply = <&vreg_l24a_3p075>; 834 835 qcom,imp-res-offset-value = <8>; 836 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>; 837 qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>; 838 qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>; 839}; 840 841&usb_1_qmpphy { 842 status = "okay"; 843 844 vdda-phy-supply = <&vreg_l26a_1p2>; 845 vdda-pll-supply = <&vreg_l1a_0p875>; 846}; 847 848&usb_2 { 849 status = "okay"; 850}; 851 852&usb_2_dwc3 { 853 dr_mode = "host"; 854}; 855 856&usb_2_hsphy { 857 status = "okay"; 858 859 vdd-supply = <&vreg_l1a_0p875>; 860 vdda-pll-supply = <&vreg_l12a_1p8>; 861 vdda-phy-dpdm-supply = <&vreg_l24a_3p075>; 862 863 qcom,imp-res-offset-value = <8>; 864 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>; 865}; 866 867&usb_2_qmpphy { 868 status = "okay"; 869 870 vdda-phy-supply = <&vreg_l26a_1p2>; 871 vdda-pll-supply = <&vreg_l1a_0p875>; 872}; 873 874&ufs_mem_hc { 875 status = "okay"; 876 877 reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>; 878 879 vcc-supply = <&vreg_l20a_2p95>; 880 vcc-max-microamp = <800000>; 881}; 882 883&ufs_mem_phy { 884 status = "okay"; 885 886 vdda-phy-supply = <&vreg_l1a_0p875>; 887 vdda-pll-supply = <&vreg_l26a_1p2>; 888}; 889 890&wcd9340{ 891 pinctrl-0 = <&wcd_intr_default>; 892 pinctrl-names = "default"; 893 clock-names = "extclk"; 894 clocks = <&rpmhcc RPMH_LN_BB_CLK2>; 895 reset-gpios = <&tlmm 64 0>; 896 vdd-buck-supply = <&vreg_s4a_1p8>; 897 vdd-buck-sido-supply = <&vreg_s4a_1p8>; 898 vdd-tx-supply = <&vreg_s4a_1p8>; 899 vdd-rx-supply = <&vreg_s4a_1p8>; 900 vdd-io-supply = <&vreg_s4a_1p8>; 901 902 swm: swm@c85 { 903 left_spkr: wsa8810-left{ 904 compatible = "sdw10217201000"; 905 reg = <0 1>; 906 powerdown-gpios = <&wcdgpio 2 GPIO_ACTIVE_HIGH>; 907 #thermal-sensor-cells = <0>; 908 sound-name-prefix = "SpkrLeft"; 909 #sound-dai-cells = <0>; 910 }; 911 912 right_spkr: wsa8810-right{ 913 compatible = "sdw10217201000"; 914 powerdown-gpios = <&wcdgpio 2 GPIO_ACTIVE_HIGH>; 915 reg = <0 2>; 916 #thermal-sensor-cells = <0>; 917 sound-name-prefix = "SpkrRight"; 918 #sound-dai-cells = <0>; 919 }; 920 }; 921}; 922 923&wifi { 924 status = "okay"; 925 926 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>; 927 vdd-1.8-xo-supply = <&vreg_l7a_1p8>; 928 vdd-1.3-rfa-supply = <&vreg_l17a_1p3>; 929 vdd-3.3-ch0-supply = <&vreg_l25a_3p3>; 930 931 qcom,snoc-host-cap-8bit-quirk; 932}; 933 934/* PINCTRL - additions to nodes defined in sdm845.dtsi */ 935&qup_spi2_default { 936 drive-strength = <16>; 937}; 938 939&qup_uart3_default{ 940 pinmux { 941 pins = "gpio41", "gpio42", "gpio43", "gpio44"; 942 function = "qup3"; 943 }; 944}; 945 946&qup_uart6_default { 947 pinmux { 948 pins = "gpio45", "gpio46", "gpio47", "gpio48"; 949 function = "qup6"; 950 }; 951 952 cts { 953 pins = "gpio45"; 954 bias-disable; 955 }; 956 957 rts-tx { 958 pins = "gpio46", "gpio47"; 959 drive-strength = <2>; 960 bias-disable; 961 }; 962 963 rx { 964 pins = "gpio48"; 965 bias-pull-up; 966 }; 967}; 968 969&qup_uart9_default { 970 pinconf-tx { 971 pins = "gpio4"; 972 drive-strength = <2>; 973 bias-disable; 974 }; 975 976 pinconf-rx { 977 pins = "gpio5"; 978 drive-strength = <2>; 979 bias-pull-up; 980 }; 981}; 982 983&pm8998_gpio { 984 985}; 986 987&cci { 988 status = "ok"; 989}; 990 991&cci_i2c0 { 992 camera@10 { 993 compatible = "ovti,ov8856"; 994 reg = <0x10>; 995 996 // CAM0_RST_N 997 reset-gpios = <&tlmm 9 0>; 998 pinctrl-names = "default"; 999 pinctrl-0 = <&cam0_default>; 1000 gpios = <&tlmm 13 0>, 1001 <&tlmm 9 0>; 1002 1003 clocks = <&clock_camcc CAM_CC_MCLK0_CLK>; 1004 clock-names = "xvclk"; 1005 clock-frequency = <19200000>; 1006 1007 /* The &vreg_s4a_1p8 trace is powered on as a, 1008 * so it is represented by a fixed regulator. 1009 * 1010 * The 2.8V vdda-supply and 1.2V vddd-supply regulators 1011 * both have to be enabled through the power management 1012 * gpios. 1013 */ 1014 power-domains = <&clock_camcc TITAN_TOP_GDSC>; 1015 1016 dovdd-supply = <&vreg_lvs1a_1p8>; 1017 avdd-supply = <&cam0_avdd_2v8>; 1018 dvdd-supply = <&cam0_dvdd_1v2>; 1019 1020 status = "disable"; 1021 1022 port { 1023 ov8856_ep: endpoint { 1024 clock-lanes = <1>; 1025 link-frequencies = /bits/ 64 1026 <360000000 180000000>; 1027 data-lanes = <1 2 3 4>; 1028// remote-endpoint = <&csiphy0_ep>; 1029 }; 1030 }; 1031 }; 1032}; 1033 1034&cci_i2c1 { 1035 camera@60 { 1036 compatible = "ovti,ov7251"; 1037 1038 // I2C address as per ov7251.txt linux documentation 1039 reg = <0x60>; 1040 1041 // CAM3_RST_N 1042 enable-gpios = <&tlmm 21 0>; 1043 pinctrl-names = "default"; 1044 pinctrl-0 = <&cam3_default>; 1045 gpios = <&tlmm 16 0>, 1046 <&tlmm 21 0>; 1047 1048 clocks = <&clock_camcc CAM_CC_MCLK3_CLK>; 1049 clock-names = "xclk"; 1050 clock-frequency = <24000000>; 1051 1052 /* The &vreg_s4a_1p8 trace always powered on. 1053 * 1054 * The 2.8V vdda-supply regulator is enabled when the 1055 * vreg_s4a_1p8 trace is pulled high. 1056 * It too is represented by a fixed regulator. 1057 * 1058 * No 1.2V vddd-supply regulator is used. 1059 */ 1060 power-domains = <&clock_camcc TITAN_TOP_GDSC>; 1061 1062 vdddo-supply = <&vreg_lvs1a_1p8>; 1063 vdda-supply = <&cam3_avdd_2v8>; 1064 1065 status = "disable"; 1066 1067 port { 1068 ov7251_ep: endpoint { 1069 clock-lanes = <1>; 1070 data-lanes = <0 1>; 1071// remote-endpoint = <&csiphy3_ep>; 1072 }; 1073 }; 1074 }; 1075}; 1076