1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Copyright (c) 2019, Linaro Ltd. 4 */ 5 6/dts-v1/; 7 8#include <dt-bindings/leds/common.h> 9#include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 10#include <dt-bindings/regulator/qcom,rpmh-regulator.h> 11#include <dt-bindings/sound/qcom,q6afe.h> 12#include <dt-bindings/sound/qcom,q6asm.h> 13#include "sdm845.dtsi" 14#include "sdm845-wcd9340.dtsi" 15#include "pm8998.dtsi" 16#include "pmi8998.dtsi" 17 18/ { 19 model = "Thundercomm Dragonboard 845c"; 20 compatible = "thundercomm,db845c", "qcom,sdm845"; 21 qcom,msm-id = <341 0x20001>; 22 qcom,board-id = <8 0>; 23 24 aliases { 25 serial0 = &uart9; 26 serial1 = &uart6; 27 }; 28 29 chosen { 30 stdout-path = "serial0:115200n8"; 31 }; 32 33 /* Fixed crystal oscillator dedicated to MCP2517FD */ 34 clk40m: can-clock { 35 compatible = "fixed-clock"; 36 #clock-cells = <0>; 37 clock-frequency = <40000000>; 38 }; 39 40 dc12v: dc12v-regulator { 41 compatible = "regulator-fixed"; 42 regulator-name = "DC12V"; 43 regulator-min-microvolt = <12000000>; 44 regulator-max-microvolt = <12000000>; 45 regulator-always-on; 46 }; 47 48 gpio-keys { 49 compatible = "gpio-keys"; 50 autorepeat; 51 52 pinctrl-names = "default"; 53 pinctrl-0 = <&vol_up_pin_a>; 54 55 key-vol-up { 56 label = "Volume Up"; 57 linux,code = <KEY_VOLUMEUP>; 58 gpios = <&pm8998_gpios 6 GPIO_ACTIVE_LOW>; 59 }; 60 }; 61 62 leds { 63 compatible = "gpio-leds"; 64 65 led-0 { 66 label = "green:user4"; 67 function = LED_FUNCTION_INDICATOR; 68 color = <LED_COLOR_ID_GREEN>; 69 gpios = <&pm8998_gpios 13 GPIO_ACTIVE_HIGH>; 70 default-state = "off"; 71 panic-indicator; 72 }; 73 74 led-1 { 75 label = "yellow:wlan"; 76 function = LED_FUNCTION_WLAN; 77 color = <LED_COLOR_ID_YELLOW>; 78 gpios = <&pm8998_gpios 9 GPIO_ACTIVE_HIGH>; 79 linux,default-trigger = "phy0tx"; 80 default-state = "off"; 81 }; 82 83 led-2 { 84 label = "blue:bt"; 85 function = LED_FUNCTION_BLUETOOTH; 86 color = <LED_COLOR_ID_BLUE>; 87 gpios = <&pm8998_gpios 5 GPIO_ACTIVE_HIGH>; 88 linux,default-trigger = "bluetooth-power"; 89 default-state = "off"; 90 }; 91 }; 92 93 hdmi-out { 94 compatible = "hdmi-connector"; 95 type = "a"; 96 97 port { 98 hdmi_con: endpoint { 99 remote-endpoint = <<9611_out>; 100 }; 101 }; 102 }; 103 104 reserved-memory { 105 /* Cont splash region set up by the bootloader */ 106 cont_splash_mem: framebuffer@9d400000 { 107 reg = <0x0 0x9d400000 0x0 0x2400000>; 108 no-map; 109 }; 110 }; 111 112 lt9611_1v8: lt9611-vdd18-regulator { 113 compatible = "regulator-fixed"; 114 regulator-name = "LT9611_1V8"; 115 116 vin-supply = <&vdc_5v>; 117 regulator-min-microvolt = <1800000>; 118 regulator-max-microvolt = <1800000>; 119 120 gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>; 121 enable-active-high; 122 }; 123 124 lt9611_3v3: lt9611-3v3 { 125 compatible = "regulator-fixed"; 126 regulator-name = "LT9611_3V3"; 127 128 vin-supply = <&vdc_3v3>; 129 regulator-min-microvolt = <3300000>; 130 regulator-max-microvolt = <3300000>; 131 132 /* 133 * TODO: make it possible to drive same GPIO from two clients 134 * gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>; 135 * enable-active-high; 136 */ 137 }; 138 139 pcie0_1p05v: pcie-0-1p05v-regulator { 140 compatible = "regulator-fixed"; 141 regulator-name = "PCIE0_1.05V"; 142 143 vin-supply = <&vbat>; 144 regulator-min-microvolt = <1050000>; 145 regulator-max-microvolt = <1050000>; 146 147 /* 148 * TODO: make it possible to drive same GPIO from two clients 149 * gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>; 150 * enable-active-high; 151 */ 152 }; 153 154 cam0_dvdd_1v2: cam0-dvdd-1v2-regulator { 155 compatible = "regulator-fixed"; 156 regulator-name = "CAM0_DVDD_1V2"; 157 regulator-min-microvolt = <1200000>; 158 regulator-max-microvolt = <1200000>; 159 enable-active-high; 160 gpio = <&pm8998_gpios 12 GPIO_ACTIVE_HIGH>; 161 pinctrl-names = "default"; 162 pinctrl-0 = <&cam0_dvdd_1v2_en_default>; 163 vin-supply = <&vbat>; 164 }; 165 166 cam0_avdd_2v8: cam0-avdd-2v8-regulator { 167 compatible = "regulator-fixed"; 168 regulator-name = "CAM0_AVDD_2V8"; 169 regulator-min-microvolt = <2800000>; 170 regulator-max-microvolt = <2800000>; 171 enable-active-high; 172 gpio = <&pm8998_gpios 10 GPIO_ACTIVE_HIGH>; 173 pinctrl-names = "default"; 174 pinctrl-0 = <&cam0_avdd_2v8_en_default>; 175 vin-supply = <&vbat>; 176 }; 177 178 /* This regulator is enabled when the VREG_LVS1A_1P8 trace is enabled */ 179 cam3_avdd_2v8: cam3-avdd-2v8-regulator { 180 compatible = "regulator-fixed"; 181 regulator-name = "CAM3_AVDD_2V8"; 182 regulator-min-microvolt = <2800000>; 183 regulator-max-microvolt = <2800000>; 184 regulator-always-on; 185 vin-supply = <&vbat>; 186 }; 187 188 pcie0_3p3v_dual: vldo-3v3-regulator { 189 compatible = "regulator-fixed"; 190 regulator-name = "VLDO_3V3"; 191 192 vin-supply = <&vbat>; 193 regulator-min-microvolt = <3300000>; 194 regulator-max-microvolt = <3300000>; 195 196 gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>; 197 enable-active-high; 198 /* 199 * FIXME: this regulator is responsible for VBUS on the left USB 200 * port. Keep it always on until we can correctly model this 201 * relationship. 202 */ 203 regulator-always-on; 204 205 pinctrl-names = "default"; 206 pinctrl-0 = <&pcie0_pwren_state>; 207 }; 208 209 v5p0_hdmiout: v5p0-hdmiout-regulator { 210 compatible = "regulator-fixed"; 211 regulator-name = "V5P0_HDMIOUT"; 212 213 vin-supply = <&vdc_5v>; 214 regulator-min-microvolt = <500000>; 215 regulator-max-microvolt = <500000>; 216 217 /* 218 * TODO: make it possible to drive same GPIO from two clients 219 * gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>; 220 * enable-active-high; 221 */ 222 }; 223 224 vbat: vbat-regulator { 225 compatible = "regulator-fixed"; 226 regulator-name = "VBAT"; 227 228 vin-supply = <&dc12v>; 229 regulator-min-microvolt = <4200000>; 230 regulator-max-microvolt = <4200000>; 231 regulator-always-on; 232 }; 233 234 vbat_som: vbat-som-regulator { 235 compatible = "regulator-fixed"; 236 regulator-name = "VBAT_SOM"; 237 238 vin-supply = <&dc12v>; 239 regulator-min-microvolt = <4200000>; 240 regulator-max-microvolt = <4200000>; 241 regulator-always-on; 242 }; 243 244 vdc_3v3: vdc-3v3-regulator { 245 compatible = "regulator-fixed"; 246 regulator-name = "VDC_3V3"; 247 vin-supply = <&dc12v>; 248 regulator-min-microvolt = <3300000>; 249 regulator-max-microvolt = <3300000>; 250 regulator-always-on; 251 }; 252 253 vdc_5v: vdc-5v-regulator { 254 compatible = "regulator-fixed"; 255 regulator-name = "VDC_5V"; 256 257 vin-supply = <&dc12v>; 258 regulator-min-microvolt = <500000>; 259 regulator-max-microvolt = <500000>; 260 regulator-always-on; 261 }; 262 263 vreg_s4a_1p8: vreg-s4a-1p8 { 264 compatible = "regulator-fixed"; 265 regulator-name = "vreg_s4a_1p8"; 266 267 regulator-min-microvolt = <1800000>; 268 regulator-max-microvolt = <1800000>; 269 regulator-always-on; 270 }; 271 272 vph_pwr: vph-pwr-regulator { 273 compatible = "regulator-fixed"; 274 regulator-name = "vph_pwr"; 275 276 vin-supply = <&vbat_som>; 277 }; 278}; 279 280&adsp_pas { 281 status = "okay"; 282 283 firmware-name = "qcom/sdm845/adsp.mbn"; 284}; 285 286&apps_rsc { 287 regulators-0 { 288 compatible = "qcom,pm8998-rpmh-regulators"; 289 qcom,pmic-id = "a"; 290 vdd-s1-supply = <&vph_pwr>; 291 vdd-s2-supply = <&vph_pwr>; 292 vdd-s3-supply = <&vph_pwr>; 293 vdd-s4-supply = <&vph_pwr>; 294 vdd-s5-supply = <&vph_pwr>; 295 vdd-s6-supply = <&vph_pwr>; 296 vdd-s7-supply = <&vph_pwr>; 297 vdd-s8-supply = <&vph_pwr>; 298 vdd-s9-supply = <&vph_pwr>; 299 vdd-s10-supply = <&vph_pwr>; 300 vdd-s11-supply = <&vph_pwr>; 301 vdd-s12-supply = <&vph_pwr>; 302 vdd-s13-supply = <&vph_pwr>; 303 vdd-l1-l27-supply = <&vreg_s7a_1p025>; 304 vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>; 305 vdd-l3-l11-supply = <&vreg_s7a_1p025>; 306 vdd-l4-l5-supply = <&vreg_s7a_1p025>; 307 vdd-l6-supply = <&vph_pwr>; 308 vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>; 309 vdd-l9-supply = <&vreg_bob>; 310 vdd-l10-l23-l25-supply = <&vreg_bob>; 311 vdd-l13-l19-l21-supply = <&vreg_bob>; 312 vdd-l16-l28-supply = <&vreg_bob>; 313 vdd-l18-l22-supply = <&vreg_bob>; 314 vdd-l20-l24-supply = <&vreg_bob>; 315 vdd-l26-supply = <&vreg_s3a_1p35>; 316 vin-lvs-1-2-supply = <&vreg_s4a_1p8>; 317 318 vreg_s3a_1p35: smps3 { 319 regulator-min-microvolt = <1352000>; 320 regulator-max-microvolt = <1352000>; 321 }; 322 323 vreg_s5a_2p04: smps5 { 324 regulator-min-microvolt = <1904000>; 325 regulator-max-microvolt = <2040000>; 326 }; 327 328 vreg_s7a_1p025: smps7 { 329 regulator-min-microvolt = <900000>; 330 regulator-max-microvolt = <1028000>; 331 }; 332 333 vreg_l1a_0p875: ldo1 { 334 regulator-min-microvolt = <880000>; 335 regulator-max-microvolt = <880000>; 336 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 337 }; 338 339 vreg_l5a_0p8: ldo5 { 340 regulator-min-microvolt = <800000>; 341 regulator-max-microvolt = <800000>; 342 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 343 }; 344 345 vreg_l12a_1p8: ldo12 { 346 regulator-min-microvolt = <1800000>; 347 regulator-max-microvolt = <1800000>; 348 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 349 }; 350 351 vreg_l7a_1p8: ldo7 { 352 regulator-min-microvolt = <1800000>; 353 regulator-max-microvolt = <1800000>; 354 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 355 }; 356 357 vreg_l13a_2p95: ldo13 { 358 regulator-min-microvolt = <1800000>; 359 regulator-max-microvolt = <2960000>; 360 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 361 }; 362 363 vreg_l17a_1p3: ldo17 { 364 regulator-min-microvolt = <1304000>; 365 regulator-max-microvolt = <1304000>; 366 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 367 }; 368 369 vreg_l20a_2p95: ldo20 { 370 regulator-min-microvolt = <2960000>; 371 regulator-max-microvolt = <2968000>; 372 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 373 }; 374 375 vreg_l21a_2p95: ldo21 { 376 regulator-min-microvolt = <2960000>; 377 regulator-max-microvolt = <2968000>; 378 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 379 }; 380 381 vreg_l24a_3p075: ldo24 { 382 regulator-min-microvolt = <3088000>; 383 regulator-max-microvolt = <3088000>; 384 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 385 }; 386 387 vreg_l25a_3p3: ldo25 { 388 regulator-min-microvolt = <3300000>; 389 regulator-max-microvolt = <3312000>; 390 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 391 }; 392 393 vreg_l26a_1p2: ldo26 { 394 regulator-min-microvolt = <1200000>; 395 regulator-max-microvolt = <1200000>; 396 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 397 }; 398 399 vreg_lvs1a_1p8: lvs1 { 400 regulator-min-microvolt = <1800000>; 401 regulator-max-microvolt = <1800000>; 402 regulator-always-on; 403 }; 404 405 vreg_lvs2a_1p8: lvs2 { 406 regulator-min-microvolt = <1800000>; 407 regulator-max-microvolt = <1800000>; 408 regulator-always-on; 409 }; 410 }; 411 412 regulators-1 { 413 compatible = "qcom,pmi8998-rpmh-regulators"; 414 qcom,pmic-id = "b"; 415 416 vdd-bob-supply = <&vph_pwr>; 417 418 vreg_bob: bob { 419 regulator-min-microvolt = <3312000>; 420 regulator-max-microvolt = <3600000>; 421 regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>; 422 regulator-allow-bypass; 423 }; 424 }; 425}; 426 427&camss { 428 status = "okay"; 429 430 vdda-phy-supply = <&vreg_l1a_0p875>; 431 vdda-pll-supply = <&vreg_l26a_1p2>; 432}; 433 434&cdsp_pas { 435 status = "okay"; 436 firmware-name = "qcom/sdm845/cdsp.mbn"; 437}; 438 439&gcc { 440 protected-clocks = <GCC_QSPI_CORE_CLK>, 441 <GCC_QSPI_CORE_CLK_SRC>, 442 <GCC_QSPI_CNOC_PERIPH_AHB_CLK>, 443 <GCC_LPASS_Q6_AXI_CLK>, 444 <GCC_LPASS_SWAY_CLK>; 445}; 446 447&gmu { 448 status = "okay"; 449}; 450 451&gpi_dma0 { 452 status = "okay"; 453}; 454 455&gpi_dma1 { 456 status = "okay"; 457}; 458 459&gpu { 460 status = "okay"; 461 zap-shader { 462 memory-region = <&gpu_mem>; 463 firmware-name = "qcom/sdm845/a630_zap.mbn"; 464 }; 465}; 466 467&i2c10 { 468 status = "okay"; 469 clock-frequency = <400000>; 470 471 lt9611_codec: hdmi-bridge@3b { 472 compatible = "lontium,lt9611"; 473 reg = <0x3b>; 474 #sound-dai-cells = <1>; 475 476 interrupts-extended = <&tlmm 84 IRQ_TYPE_EDGE_FALLING>; 477 478 reset-gpios = <&tlmm 128 GPIO_ACTIVE_HIGH>; 479 480 vdd-supply = <<9611_1v8>; 481 vcc-supply = <<9611_3v3>; 482 483 pinctrl-names = "default"; 484 pinctrl-0 = <<9611_irq_pin>, <&dsi_sw_sel>; 485 486 ports { 487 #address-cells = <1>; 488 #size-cells = <0>; 489 490 port@0 { 491 reg = <0>; 492 493 lt9611_a: endpoint { 494 remote-endpoint = <&mdss_dsi0_out>; 495 }; 496 }; 497 498 port@1 { 499 reg = <1>; 500 501 lt9611_b: endpoint { 502 remote-endpoint = <&mdss_dsi1_out>; 503 }; 504 }; 505 506 port@2 { 507 reg = <2>; 508 509 lt9611_out: endpoint { 510 remote-endpoint = <&hdmi_con>; 511 }; 512 }; 513 }; 514 }; 515}; 516 517&i2c11 { 518 /* On Low speed expansion */ 519 clock-frequency = <100000>; 520 status = "okay"; 521}; 522 523&i2c14 { 524 /* On Low speed expansion */ 525 clock-frequency = <100000>; 526 status = "okay"; 527}; 528 529&mdss { 530 memory-region = <&cont_splash_mem>; 531 status = "okay"; 532}; 533 534&mdss_dsi0 { 535 status = "okay"; 536 vdda-supply = <&vreg_l26a_1p2>; 537 538 qcom,dual-dsi-mode; 539 qcom,master-dsi; 540 541 ports { 542 port@1 { 543 endpoint { 544 remote-endpoint = <<9611_a>; 545 data-lanes = <0 1 2 3>; 546 }; 547 }; 548 }; 549}; 550 551&mdss_dsi0_phy { 552 status = "okay"; 553 vdds-supply = <&vreg_l1a_0p875>; 554}; 555 556&mdss_dsi1 { 557 vdda-supply = <&vreg_l26a_1p2>; 558 559 qcom,dual-dsi-mode; 560 561 /* DSI1 is slave, so use DSI0 clocks */ 562 assigned-clock-parents = <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>; 563 564 status = "okay"; 565 566 ports { 567 port@1 { 568 endpoint { 569 remote-endpoint = <<9611_b>; 570 data-lanes = <0 1 2 3>; 571 }; 572 }; 573 }; 574}; 575 576&mdss_dsi1_phy { 577 vdds-supply = <&vreg_l1a_0p875>; 578 status = "okay"; 579}; 580 581&mss_pil { 582 status = "okay"; 583 firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mbn"; 584}; 585 586&pcie0 { 587 status = "okay"; 588 perst-gpios = <&tlmm 35 GPIO_ACTIVE_LOW>; 589 wake-gpios = <&tlmm 134 GPIO_ACTIVE_HIGH>; 590 591 vddpe-3v3-supply = <&pcie0_3p3v_dual>; 592 593 pinctrl-names = "default"; 594 pinctrl-0 = <&pcie0_default_state>; 595}; 596 597&pcie0_phy { 598 status = "okay"; 599 600 vdda-phy-supply = <&vreg_l1a_0p875>; 601 vdda-pll-supply = <&vreg_l26a_1p2>; 602}; 603 604&pcie1 { 605 status = "okay"; 606 perst-gpios = <&tlmm 102 GPIO_ACTIVE_LOW>; 607 608 pinctrl-names = "default"; 609 pinctrl-0 = <&pcie1_default_state>; 610}; 611 612&pcie1_phy { 613 status = "okay"; 614 615 vdda-phy-supply = <&vreg_l1a_0p875>; 616 vdda-pll-supply = <&vreg_l26a_1p2>; 617}; 618 619&pm8998_gpios { 620 gpio-line-names = 621 "NC", 622 "NC", 623 "WLAN_SW_CTRL", 624 "NC", 625 "PM_GPIO5_BLUE_BT_LED", 626 "VOL_UP_N", 627 "NC", 628 "ADC_IN1", 629 "PM_GPIO9_YEL_WIFI_LED", 630 "CAM0_AVDD_EN", 631 "NC", 632 "CAM0_DVDD_EN", 633 "PM_GPIO13_GREEN_U4_LED", 634 "DIV_CLK2", 635 "NC", 636 "NC", 637 "NC", 638 "SMB_STAT", 639 "NC", 640 "NC", 641 "ADC_IN2", 642 "OPTION1", 643 "WCSS_PWR_REQ", 644 "PM845_GPIO24", 645 "OPTION2", 646 "PM845_SLB"; 647 648 cam0_dvdd_1v2_en_default: cam0-dvdd-1v2-en-state { 649 pins = "gpio12"; 650 function = "normal"; 651 652 bias-pull-up; 653 drive-push-pull; 654 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>; 655 }; 656 657 cam0_avdd_2v8_en_default: cam0-avdd-2v8-en-state { 658 pins = "gpio10"; 659 function = "normal"; 660 661 bias-pull-up; 662 drive-push-pull; 663 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>; 664 }; 665 666 vol_up_pin_a: vol-up-active-state { 667 pins = "gpio6"; 668 function = "normal"; 669 input-enable; 670 bias-pull-up; 671 qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>; 672 }; 673}; 674 675&pm8998_resin { 676 linux,code = <KEY_VOLUMEDOWN>; 677 status = "okay"; 678}; 679 680&pmi8998_lpg { 681 status = "okay"; 682 683 qcom,power-source = <1>; 684 685 led@3 { 686 reg = <3>; 687 color = <LED_COLOR_ID_GREEN>; 688 function = LED_FUNCTION_HEARTBEAT; 689 function-enumerator = <3>; 690 691 linux,default-trigger = "heartbeat"; 692 default-state = "on"; 693 }; 694 695 led@4 { 696 reg = <4>; 697 color = <LED_COLOR_ID_GREEN>; 698 function = LED_FUNCTION_INDICATOR; 699 function-enumerator = <2>; 700 }; 701 702 led@5 { 703 reg = <5>; 704 color = <LED_COLOR_ID_GREEN>; 705 function = LED_FUNCTION_INDICATOR; 706 function-enumerator = <1>; 707 }; 708}; 709 710/* QUAT I2S Uses 4 I2S SD Lines for audio on LT9611 HDMI Bridge */ 711&q6afedai { 712 dai@22 { 713 reg = <QUATERNARY_MI2S_RX>; 714 qcom,sd-lines = <0 1 2 3>; 715 }; 716}; 717 718&q6asmdai { 719 dai@0 { 720 reg = <0>; 721 }; 722 723 dai@1 { 724 reg = <1>; 725 }; 726 727 dai@2 { 728 reg = <2>; 729 }; 730 731 dai@3 { 732 reg = <3>; 733 direction = <2>; 734 is-compress-dai; 735 }; 736}; 737 738&qupv3_id_0 { 739 status = "okay"; 740}; 741 742&qupv3_id_1 { 743 status = "okay"; 744}; 745 746&sdhc_2 { 747 status = "okay"; 748 749 pinctrl-names = "default"; 750 pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>; 751 752 vmmc-supply = <&vreg_l21a_2p95>; 753 vqmmc-supply = <&vreg_l13a_2p95>; 754 755 bus-width = <4>; 756 cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW>; 757}; 758 759&sound { 760 compatible = "qcom,db845c-sndcard", "qcom,sdm845-sndcard"; 761 pinctrl-0 = <&quat_mi2s_active 762 &quat_mi2s_sd0_active 763 &quat_mi2s_sd1_active 764 &quat_mi2s_sd2_active 765 &quat_mi2s_sd3_active>; 766 pinctrl-names = "default"; 767 model = "DB845c"; 768 audio-routing = 769 "RX_BIAS", "MCLK", 770 "AMIC1", "MIC BIAS1", 771 "AMIC2", "MIC BIAS2", 772 "DMIC0", "MIC BIAS1", 773 "DMIC1", "MIC BIAS1", 774 "DMIC2", "MIC BIAS3", 775 "DMIC3", "MIC BIAS3", 776 "SpkrLeft IN", "SPK1 OUT", 777 "SpkrRight IN", "SPK2 OUT", 778 "MM_DL1", "MultiMedia1 Playback", 779 "MM_DL2", "MultiMedia2 Playback", 780 "MM_DL4", "MultiMedia4 Playback", 781 "MultiMedia3 Capture", "MM_UL3"; 782 783 mm1-dai-link { 784 link-name = "MultiMedia1"; 785 cpu { 786 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA1>; 787 }; 788 }; 789 790 mm2-dai-link { 791 link-name = "MultiMedia2"; 792 cpu { 793 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA2>; 794 }; 795 }; 796 797 mm3-dai-link { 798 link-name = "MultiMedia3"; 799 cpu { 800 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA3>; 801 }; 802 }; 803 804 mm4-dai-link { 805 link-name = "MultiMedia4"; 806 cpu { 807 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA4>; 808 }; 809 }; 810 811 hdmi-dai-link { 812 link-name = "HDMI Playback"; 813 cpu { 814 sound-dai = <&q6afedai QUATERNARY_MI2S_RX>; 815 }; 816 817 platform { 818 sound-dai = <&q6routing>; 819 }; 820 821 codec { 822 sound-dai = <<9611_codec 0>; 823 }; 824 }; 825 826 slim-dai-link { 827 link-name = "SLIM Playback"; 828 cpu { 829 sound-dai = <&q6afedai SLIMBUS_0_RX>; 830 }; 831 832 platform { 833 sound-dai = <&q6routing>; 834 }; 835 836 codec { 837 sound-dai = <&left_spkr>, <&right_spkr>, <&swm 0>, <&wcd9340 0>; 838 }; 839 }; 840 841 slimcap-dai-link { 842 link-name = "SLIM Capture"; 843 cpu { 844 sound-dai = <&q6afedai SLIMBUS_0_TX>; 845 }; 846 847 platform { 848 sound-dai = <&q6routing>; 849 }; 850 851 codec { 852 sound-dai = <&wcd9340 1>; 853 }; 854 }; 855}; 856 857&spi0 { 858 status = "okay"; 859 pinctrl-names = "default"; 860 pinctrl-0 = <&qup_spi0_default>; 861 cs-gpios = <&tlmm 3 GPIO_ACTIVE_LOW>; 862 863 can@0 { 864 compatible = "microchip,mcp2517fd"; 865 reg = <0>; 866 clocks = <&clk40m>; 867 interrupts-extended = <&tlmm 104 IRQ_TYPE_LEVEL_LOW>; 868 spi-max-frequency = <10000000>; 869 vdd-supply = <&vdc_5v>; 870 xceiver-supply = <&vdc_5v>; 871 }; 872}; 873 874&spi2 { 875 /* On Low speed expansion */ 876 status = "okay"; 877}; 878 879&tlmm { 880 cam0_default: cam0-default-state { 881 rst-pins { 882 pins = "gpio9"; 883 function = "gpio"; 884 885 drive-strength = <16>; 886 bias-disable; 887 }; 888 889 mclk0-pins { 890 pins = "gpio13"; 891 function = "cam_mclk"; 892 893 drive-strength = <16>; 894 bias-disable; 895 }; 896 }; 897 898 cam3_default: cam3-default-state { 899 rst-pins { 900 function = "gpio"; 901 pins = "gpio21"; 902 903 drive-strength = <16>; 904 bias-disable; 905 }; 906 907 mclk3-pins { 908 function = "cam_mclk"; 909 pins = "gpio16"; 910 911 drive-strength = <16>; 912 bias-disable; 913 }; 914 }; 915 916 dsi_sw_sel: dsi-sw-sel-state { 917 pins = "gpio120"; 918 function = "gpio"; 919 920 drive-strength = <2>; 921 bias-disable; 922 output-high; 923 }; 924 925 lt9611_irq_pin: lt9611-irq-state { 926 pins = "gpio84"; 927 function = "gpio"; 928 bias-disable; 929 }; 930 931 pcie0_default_state: pcie0-default-state { 932 clkreq-pins { 933 pins = "gpio36"; 934 function = "pci_e0"; 935 bias-pull-up; 936 }; 937 938 reset-n-pins { 939 pins = "gpio35"; 940 function = "gpio"; 941 942 drive-strength = <2>; 943 output-low; 944 bias-pull-down; 945 }; 946 947 wake-n-pins { 948 pins = "gpio37"; 949 function = "gpio"; 950 951 drive-strength = <2>; 952 bias-pull-up; 953 }; 954 }; 955 956 pcie0_pwren_state: pcie0-pwren-state { 957 pins = "gpio90"; 958 function = "gpio"; 959 960 drive-strength = <2>; 961 bias-disable; 962 }; 963 964 pcie1_default_state: pcie1-default-state { 965 perst-n-pins { 966 pins = "gpio102"; 967 function = "gpio"; 968 969 drive-strength = <16>; 970 bias-disable; 971 }; 972 973 clkreq-pins { 974 pins = "gpio103"; 975 function = "pci_e1"; 976 bias-pull-up; 977 }; 978 979 wake-n-pins { 980 pins = "gpio11"; 981 function = "gpio"; 982 983 drive-strength = <2>; 984 bias-pull-up; 985 }; 986 987 reset-n-pins { 988 pins = "gpio75"; 989 function = "gpio"; 990 991 drive-strength = <16>; 992 bias-pull-up; 993 output-high; 994 }; 995 }; 996 997 sdc2_default_state: sdc2-default-state { 998 clk-pins { 999 pins = "sdc2_clk"; 1000 bias-disable; 1001 1002 /* 1003 * It seems that mmc_test reports errors if drive 1004 * strength is not 16 on clk, cmd, and data pins. 1005 */ 1006 drive-strength = <16>; 1007 }; 1008 1009 cmd-pins { 1010 pins = "sdc2_cmd"; 1011 bias-pull-up; 1012 drive-strength = <10>; 1013 }; 1014 1015 data-pins { 1016 pins = "sdc2_data"; 1017 bias-pull-up; 1018 drive-strength = <10>; 1019 }; 1020 }; 1021 1022 sdc2_card_det_n: sd-card-det-n-state { 1023 pins = "gpio126"; 1024 function = "gpio"; 1025 bias-pull-up; 1026 }; 1027}; 1028 1029&uart3 { 1030 label = "LS-UART0"; 1031 pinctrl-0 = <&qup_uart3_4pin>; 1032 1033 status = "disabled"; 1034}; 1035 1036&uart6 { 1037 status = "okay"; 1038 1039 pinctrl-0 = <&qup_uart6_4pin>; 1040 1041 bluetooth { 1042 compatible = "qcom,wcn3990-bt"; 1043 1044 vddio-supply = <&vreg_s4a_1p8>; 1045 vddxo-supply = <&vreg_l7a_1p8>; 1046 vddrf-supply = <&vreg_l17a_1p3>; 1047 vddch0-supply = <&vreg_l25a_3p3>; 1048 max-speed = <3200000>; 1049 }; 1050}; 1051 1052&uart9 { 1053 label = "LS-UART1"; 1054 status = "okay"; 1055}; 1056 1057&usb_1 { 1058 status = "okay"; 1059}; 1060 1061&usb_1_dwc3 { 1062 dr_mode = "peripheral"; 1063}; 1064 1065&usb_1_hsphy { 1066 status = "okay"; 1067 1068 vdd-supply = <&vreg_l1a_0p875>; 1069 vdda-pll-supply = <&vreg_l12a_1p8>; 1070 vdda-phy-dpdm-supply = <&vreg_l24a_3p075>; 1071 1072 qcom,imp-res-offset-value = <8>; 1073 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>; 1074 qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>; 1075 qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>; 1076}; 1077 1078&usb_1_qmpphy { 1079 status = "okay"; 1080 1081 vdda-phy-supply = <&vreg_l26a_1p2>; 1082 vdda-pll-supply = <&vreg_l1a_0p875>; 1083}; 1084 1085&usb_2 { 1086 status = "okay"; 1087}; 1088 1089&usb_2_dwc3 { 1090 dr_mode = "host"; 1091}; 1092 1093&usb_2_hsphy { 1094 status = "okay"; 1095 1096 vdd-supply = <&vreg_l1a_0p875>; 1097 vdda-pll-supply = <&vreg_l12a_1p8>; 1098 vdda-phy-dpdm-supply = <&vreg_l24a_3p075>; 1099 1100 qcom,imp-res-offset-value = <8>; 1101 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>; 1102}; 1103 1104&usb_2_qmpphy { 1105 status = "okay"; 1106 1107 vdda-phy-supply = <&vreg_l26a_1p2>; 1108 vdda-pll-supply = <&vreg_l1a_0p875>; 1109}; 1110 1111&ufs_mem_hc { 1112 status = "okay"; 1113 1114 reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>; 1115 1116 vcc-supply = <&vreg_l20a_2p95>; 1117 vcc-max-microamp = <800000>; 1118}; 1119 1120&ufs_mem_phy { 1121 status = "okay"; 1122 1123 vdda-phy-supply = <&vreg_l1a_0p875>; 1124 vdda-pll-supply = <&vreg_l26a_1p2>; 1125}; 1126 1127&venus { 1128 status = "okay"; 1129}; 1130 1131&wcd9340 { 1132 reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>; 1133 vdd-buck-supply = <&vreg_s4a_1p8>; 1134 vdd-buck-sido-supply = <&vreg_s4a_1p8>; 1135 vdd-tx-supply = <&vreg_s4a_1p8>; 1136 vdd-rx-supply = <&vreg_s4a_1p8>; 1137 vdd-io-supply = <&vreg_s4a_1p8>; 1138 1139 swm: soundwire@c85 { 1140 left_spkr: speaker@0,1 { 1141 compatible = "sdw10217201000"; 1142 reg = <0 1>; 1143 powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>; 1144 #thermal-sensor-cells = <0>; 1145 sound-name-prefix = "SpkrLeft"; 1146 #sound-dai-cells = <0>; 1147 }; 1148 1149 right_spkr: speaker@0,2 { 1150 compatible = "sdw10217201000"; 1151 powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>; 1152 reg = <0 2>; 1153 #thermal-sensor-cells = <0>; 1154 sound-name-prefix = "SpkrRight"; 1155 #sound-dai-cells = <0>; 1156 }; 1157 }; 1158}; 1159 1160&wifi { 1161 status = "okay"; 1162 1163 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>; 1164 vdd-1.8-xo-supply = <&vreg_l7a_1p8>; 1165 vdd-1.3-rfa-supply = <&vreg_l17a_1p3>; 1166 vdd-3.3-ch0-supply = <&vreg_l25a_3p3>; 1167 1168 qcom,snoc-host-cap-8bit-quirk; 1169 qcom,ath10k-calibration-variant = "Thundercomm_DB845C"; 1170}; 1171 1172/* PINCTRL - additions to nodes defined in sdm845.dtsi */ 1173&qup_spi2_default { 1174 drive-strength = <16>; 1175}; 1176 1177&qup_i2c10_default { 1178 drive-strength = <2>; 1179 bias-disable; 1180}; 1181 1182&qup_uart9_rx { 1183 drive-strength = <2>; 1184 bias-pull-up; 1185}; 1186 1187&qup_uart9_tx { 1188 drive-strength = <2>; 1189 bias-disable; 1190}; 1191 1192/* PINCTRL - additions to nodes defined in sdm845.dtsi */ 1193&qup_spi0_default { 1194 drive-strength = <6>; 1195 bias-disable; 1196}; 1197