1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Copyright (c) 2019, Linaro Ltd. 4 */ 5 6/dts-v1/; 7 8#include <dt-bindings/arm/qcom,ids.h> 9#include <dt-bindings/leds/common.h> 10#include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 11#include <dt-bindings/regulator/qcom,rpmh-regulator.h> 12#include <dt-bindings/sound/qcom,q6afe.h> 13#include <dt-bindings/sound/qcom,q6asm.h> 14#include "sdm845.dtsi" 15#include "sdm845-wcd9340.dtsi" 16#include "pm8998.dtsi" 17#include "pmi8998.dtsi" 18 19/ { 20 model = "Thundercomm Dragonboard 845c"; 21 compatible = "thundercomm,db845c", "qcom,sdm845"; 22 qcom,msm-id = <QCOM_ID_SDA845 0x20001>; 23 qcom,board-id = <8 0>; 24 25 aliases { 26 serial0 = &uart9; 27 serial1 = &uart6; 28 }; 29 30 chosen { 31 stdout-path = "serial0:115200n8"; 32 }; 33 34 /* Fixed crystal oscillator dedicated to MCP2517FD */ 35 clk40m: can-clock { 36 compatible = "fixed-clock"; 37 #clock-cells = <0>; 38 clock-frequency = <40000000>; 39 }; 40 41 dc12v: dc12v-regulator { 42 compatible = "regulator-fixed"; 43 regulator-name = "DC12V"; 44 regulator-min-microvolt = <12000000>; 45 regulator-max-microvolt = <12000000>; 46 regulator-always-on; 47 }; 48 49 gpio-keys { 50 compatible = "gpio-keys"; 51 autorepeat; 52 53 pinctrl-names = "default"; 54 pinctrl-0 = <&vol_up_pin_a>; 55 56 key-vol-up { 57 label = "Volume Up"; 58 linux,code = <KEY_VOLUMEUP>; 59 gpios = <&pm8998_gpios 6 GPIO_ACTIVE_LOW>; 60 }; 61 }; 62 63 leds { 64 compatible = "gpio-leds"; 65 66 led-0 { 67 label = "green:user4"; 68 function = LED_FUNCTION_INDICATOR; 69 color = <LED_COLOR_ID_GREEN>; 70 gpios = <&pm8998_gpios 13 GPIO_ACTIVE_HIGH>; 71 default-state = "off"; 72 panic-indicator; 73 }; 74 75 led-1 { 76 label = "yellow:wlan"; 77 function = LED_FUNCTION_WLAN; 78 color = <LED_COLOR_ID_YELLOW>; 79 gpios = <&pm8998_gpios 9 GPIO_ACTIVE_HIGH>; 80 linux,default-trigger = "phy0tx"; 81 default-state = "off"; 82 }; 83 84 led-2 { 85 label = "blue:bt"; 86 function = LED_FUNCTION_BLUETOOTH; 87 color = <LED_COLOR_ID_BLUE>; 88 gpios = <&pm8998_gpios 5 GPIO_ACTIVE_HIGH>; 89 linux,default-trigger = "bluetooth-power"; 90 default-state = "off"; 91 }; 92 }; 93 94 hdmi-out { 95 compatible = "hdmi-connector"; 96 type = "a"; 97 98 port { 99 hdmi_con: endpoint { 100 remote-endpoint = <<9611_out>; 101 }; 102 }; 103 }; 104 105 reserved-memory { 106 /* Cont splash region set up by the bootloader */ 107 cont_splash_mem: framebuffer@9d400000 { 108 reg = <0x0 0x9d400000 0x0 0x2400000>; 109 no-map; 110 }; 111 }; 112 113 lt9611_1v8: lt9611-vdd18-regulator { 114 compatible = "regulator-fixed"; 115 regulator-name = "LT9611_1V8"; 116 117 vin-supply = <&vdc_5v>; 118 regulator-min-microvolt = <1800000>; 119 regulator-max-microvolt = <1800000>; 120 121 gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>; 122 enable-active-high; 123 }; 124 125 lt9611_3v3: lt9611-3v3 { 126 compatible = "regulator-fixed"; 127 regulator-name = "LT9611_3V3"; 128 129 vin-supply = <&vdc_3v3>; 130 regulator-min-microvolt = <3300000>; 131 regulator-max-microvolt = <3300000>; 132 133 /* 134 * TODO: make it possible to drive same GPIO from two clients 135 * gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>; 136 * enable-active-high; 137 */ 138 }; 139 140 pcie0_1p05v: pcie-0-1p05v-regulator { 141 compatible = "regulator-fixed"; 142 regulator-name = "PCIE0_1.05V"; 143 144 vin-supply = <&vbat>; 145 regulator-min-microvolt = <1050000>; 146 regulator-max-microvolt = <1050000>; 147 148 /* 149 * TODO: make it possible to drive same GPIO from two clients 150 * gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>; 151 * enable-active-high; 152 */ 153 }; 154 155 cam0_dvdd_1v2: cam0-dvdd-1v2-regulator { 156 compatible = "regulator-fixed"; 157 regulator-name = "CAM0_DVDD_1V2"; 158 regulator-min-microvolt = <1200000>; 159 regulator-max-microvolt = <1200000>; 160 enable-active-high; 161 gpio = <&pm8998_gpios 12 GPIO_ACTIVE_HIGH>; 162 pinctrl-names = "default"; 163 pinctrl-0 = <&cam0_dvdd_1v2_en_default>; 164 vin-supply = <&vbat>; 165 }; 166 167 cam0_avdd_2v8: cam0-avdd-2v8-regulator { 168 compatible = "regulator-fixed"; 169 regulator-name = "CAM0_AVDD_2V8"; 170 regulator-min-microvolt = <2800000>; 171 regulator-max-microvolt = <2800000>; 172 enable-active-high; 173 gpio = <&pm8998_gpios 10 GPIO_ACTIVE_HIGH>; 174 pinctrl-names = "default"; 175 pinctrl-0 = <&cam0_avdd_2v8_en_default>; 176 vin-supply = <&vbat>; 177 }; 178 179 /* This regulator is enabled when the VREG_LVS1A_1P8 trace is enabled */ 180 cam3_avdd_2v8: cam3-avdd-2v8-regulator { 181 compatible = "regulator-fixed"; 182 regulator-name = "CAM3_AVDD_2V8"; 183 regulator-min-microvolt = <2800000>; 184 regulator-max-microvolt = <2800000>; 185 regulator-always-on; 186 vin-supply = <&vbat>; 187 }; 188 189 pcie0_3p3v_dual: vldo-3v3-regulator { 190 compatible = "regulator-fixed"; 191 regulator-name = "VLDO_3V3"; 192 193 vin-supply = <&vbat>; 194 regulator-min-microvolt = <3300000>; 195 regulator-max-microvolt = <3300000>; 196 197 gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>; 198 enable-active-high; 199 /* 200 * FIXME: this regulator is responsible for VBUS on the left USB 201 * port. Keep it always on until we can correctly model this 202 * relationship. 203 */ 204 regulator-always-on; 205 206 pinctrl-names = "default"; 207 pinctrl-0 = <&pcie0_pwren_state>; 208 }; 209 210 v5p0_hdmiout: v5p0-hdmiout-regulator { 211 compatible = "regulator-fixed"; 212 regulator-name = "V5P0_HDMIOUT"; 213 214 vin-supply = <&vdc_5v>; 215 regulator-min-microvolt = <500000>; 216 regulator-max-microvolt = <500000>; 217 218 /* 219 * TODO: make it possible to drive same GPIO from two clients 220 * gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>; 221 * enable-active-high; 222 */ 223 }; 224 225 vbat: vbat-regulator { 226 compatible = "regulator-fixed"; 227 regulator-name = "VBAT"; 228 229 vin-supply = <&dc12v>; 230 regulator-min-microvolt = <4200000>; 231 regulator-max-microvolt = <4200000>; 232 regulator-always-on; 233 }; 234 235 vbat_som: vbat-som-regulator { 236 compatible = "regulator-fixed"; 237 regulator-name = "VBAT_SOM"; 238 239 vin-supply = <&dc12v>; 240 regulator-min-microvolt = <4200000>; 241 regulator-max-microvolt = <4200000>; 242 regulator-always-on; 243 }; 244 245 vdc_3v3: vdc-3v3-regulator { 246 compatible = "regulator-fixed"; 247 regulator-name = "VDC_3V3"; 248 vin-supply = <&dc12v>; 249 regulator-min-microvolt = <3300000>; 250 regulator-max-microvolt = <3300000>; 251 regulator-always-on; 252 }; 253 254 vdc_5v: vdc-5v-regulator { 255 compatible = "regulator-fixed"; 256 regulator-name = "VDC_5V"; 257 258 vin-supply = <&dc12v>; 259 regulator-min-microvolt = <500000>; 260 regulator-max-microvolt = <500000>; 261 regulator-always-on; 262 }; 263 264 vreg_s4a_1p8: vreg-s4a-1p8 { 265 compatible = "regulator-fixed"; 266 regulator-name = "vreg_s4a_1p8"; 267 268 regulator-min-microvolt = <1800000>; 269 regulator-max-microvolt = <1800000>; 270 regulator-always-on; 271 }; 272 273 vph_pwr: vph-pwr-regulator { 274 compatible = "regulator-fixed"; 275 regulator-name = "vph_pwr"; 276 277 vin-supply = <&vbat_som>; 278 }; 279}; 280 281&adsp_pas { 282 status = "okay"; 283 284 firmware-name = "qcom/sdm845/adsp.mbn"; 285}; 286 287&apps_rsc { 288 regulators-0 { 289 compatible = "qcom,pm8998-rpmh-regulators"; 290 qcom,pmic-id = "a"; 291 vdd-s1-supply = <&vph_pwr>; 292 vdd-s2-supply = <&vph_pwr>; 293 vdd-s3-supply = <&vph_pwr>; 294 vdd-s4-supply = <&vph_pwr>; 295 vdd-s5-supply = <&vph_pwr>; 296 vdd-s6-supply = <&vph_pwr>; 297 vdd-s7-supply = <&vph_pwr>; 298 vdd-s8-supply = <&vph_pwr>; 299 vdd-s9-supply = <&vph_pwr>; 300 vdd-s10-supply = <&vph_pwr>; 301 vdd-s11-supply = <&vph_pwr>; 302 vdd-s12-supply = <&vph_pwr>; 303 vdd-s13-supply = <&vph_pwr>; 304 vdd-l1-l27-supply = <&vreg_s7a_1p025>; 305 vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>; 306 vdd-l3-l11-supply = <&vreg_s7a_1p025>; 307 vdd-l4-l5-supply = <&vreg_s7a_1p025>; 308 vdd-l6-supply = <&vph_pwr>; 309 vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>; 310 vdd-l9-supply = <&vreg_bob>; 311 vdd-l10-l23-l25-supply = <&vreg_bob>; 312 vdd-l13-l19-l21-supply = <&vreg_bob>; 313 vdd-l16-l28-supply = <&vreg_bob>; 314 vdd-l18-l22-supply = <&vreg_bob>; 315 vdd-l20-l24-supply = <&vreg_bob>; 316 vdd-l26-supply = <&vreg_s3a_1p35>; 317 vin-lvs-1-2-supply = <&vreg_s4a_1p8>; 318 319 vreg_s3a_1p35: smps3 { 320 regulator-min-microvolt = <1352000>; 321 regulator-max-microvolt = <1352000>; 322 }; 323 324 vreg_s5a_2p04: smps5 { 325 regulator-min-microvolt = <1904000>; 326 regulator-max-microvolt = <2040000>; 327 }; 328 329 vreg_s7a_1p025: smps7 { 330 regulator-min-microvolt = <900000>; 331 regulator-max-microvolt = <1028000>; 332 }; 333 334 vreg_l1a_0p875: ldo1 { 335 regulator-min-microvolt = <880000>; 336 regulator-max-microvolt = <880000>; 337 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 338 }; 339 340 vreg_l5a_0p8: ldo5 { 341 regulator-min-microvolt = <800000>; 342 regulator-max-microvolt = <800000>; 343 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 344 }; 345 346 vreg_l12a_1p8: ldo12 { 347 regulator-min-microvolt = <1800000>; 348 regulator-max-microvolt = <1800000>; 349 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 350 }; 351 352 vreg_l7a_1p8: ldo7 { 353 regulator-min-microvolt = <1800000>; 354 regulator-max-microvolt = <1800000>; 355 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 356 }; 357 358 vreg_l13a_2p95: ldo13 { 359 regulator-min-microvolt = <1800000>; 360 regulator-max-microvolt = <2960000>; 361 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 362 }; 363 364 vreg_l17a_1p3: ldo17 { 365 regulator-min-microvolt = <1304000>; 366 regulator-max-microvolt = <1304000>; 367 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 368 }; 369 370 vreg_l20a_2p95: ldo20 { 371 regulator-min-microvolt = <2960000>; 372 regulator-max-microvolt = <2968000>; 373 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 374 }; 375 376 vreg_l21a_2p95: ldo21 { 377 regulator-min-microvolt = <2960000>; 378 regulator-max-microvolt = <2968000>; 379 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 380 }; 381 382 vreg_l24a_3p075: ldo24 { 383 regulator-min-microvolt = <3088000>; 384 regulator-max-microvolt = <3088000>; 385 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 386 }; 387 388 vreg_l25a_3p3: ldo25 { 389 regulator-min-microvolt = <3300000>; 390 regulator-max-microvolt = <3312000>; 391 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 392 }; 393 394 vreg_l26a_1p2: ldo26 { 395 regulator-min-microvolt = <1200000>; 396 regulator-max-microvolt = <1200000>; 397 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 398 }; 399 400 vreg_lvs1a_1p8: lvs1 { 401 regulator-min-microvolt = <1800000>; 402 regulator-max-microvolt = <1800000>; 403 regulator-always-on; 404 }; 405 406 vreg_lvs2a_1p8: lvs2 { 407 regulator-min-microvolt = <1800000>; 408 regulator-max-microvolt = <1800000>; 409 regulator-always-on; 410 }; 411 }; 412 413 regulators-1 { 414 compatible = "qcom,pmi8998-rpmh-regulators"; 415 qcom,pmic-id = "b"; 416 417 vdd-bob-supply = <&vph_pwr>; 418 419 vreg_bob: bob { 420 regulator-min-microvolt = <3312000>; 421 regulator-max-microvolt = <3600000>; 422 regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>; 423 regulator-allow-bypass; 424 }; 425 }; 426}; 427 428&camss { 429 status = "okay"; 430 431 vdda-phy-supply = <&vreg_l1a_0p875>; 432 vdda-pll-supply = <&vreg_l26a_1p2>; 433}; 434 435&cdsp_pas { 436 status = "okay"; 437 firmware-name = "qcom/sdm845/cdsp.mbn"; 438}; 439 440&gcc { 441 protected-clocks = <GCC_QSPI_CORE_CLK>, 442 <GCC_QSPI_CORE_CLK_SRC>, 443 <GCC_QSPI_CNOC_PERIPH_AHB_CLK>, 444 <GCC_LPASS_Q6_AXI_CLK>, 445 <GCC_LPASS_SWAY_CLK>; 446}; 447 448&gpi_dma0 { 449 status = "okay"; 450}; 451 452&gpi_dma1 { 453 status = "okay"; 454}; 455 456&gpu { 457 status = "okay"; 458 zap-shader { 459 memory-region = <&gpu_mem>; 460 firmware-name = "qcom/sdm845/a630_zap.mbn"; 461 }; 462}; 463 464&i2c10 { 465 status = "okay"; 466 clock-frequency = <400000>; 467 468 lt9611_codec: hdmi-bridge@3b { 469 compatible = "lontium,lt9611"; 470 reg = <0x3b>; 471 #sound-dai-cells = <1>; 472 473 interrupts-extended = <&tlmm 84 IRQ_TYPE_EDGE_FALLING>; 474 475 reset-gpios = <&tlmm 128 GPIO_ACTIVE_HIGH>; 476 477 vdd-supply = <<9611_1v8>; 478 vcc-supply = <<9611_3v3>; 479 480 pinctrl-names = "default"; 481 pinctrl-0 = <<9611_irq_pin>, <&dsi_sw_sel>; 482 483 ports { 484 #address-cells = <1>; 485 #size-cells = <0>; 486 487 port@0 { 488 reg = <0>; 489 490 lt9611_a: endpoint { 491 remote-endpoint = <&mdss_dsi0_out>; 492 }; 493 }; 494 495 port@1 { 496 reg = <1>; 497 498 lt9611_b: endpoint { 499 remote-endpoint = <&mdss_dsi1_out>; 500 }; 501 }; 502 503 port@2 { 504 reg = <2>; 505 506 lt9611_out: endpoint { 507 remote-endpoint = <&hdmi_con>; 508 }; 509 }; 510 }; 511 }; 512}; 513 514&i2c11 { 515 /* On Low speed expansion */ 516 clock-frequency = <100000>; 517 status = "okay"; 518}; 519 520&i2c14 { 521 /* On Low speed expansion */ 522 clock-frequency = <100000>; 523 status = "okay"; 524}; 525 526&mdss { 527 memory-region = <&cont_splash_mem>; 528 status = "okay"; 529}; 530 531&mdss_dsi0 { 532 status = "okay"; 533 vdda-supply = <&vreg_l26a_1p2>; 534 535 qcom,dual-dsi-mode; 536 qcom,master-dsi; 537}; 538 539&mdss_dsi0_out { 540 remote-endpoint = <<9611_a>; 541 data-lanes = <0 1 2 3>; 542}; 543 544&mdss_dsi0_phy { 545 status = "okay"; 546 vdds-supply = <&vreg_l1a_0p875>; 547}; 548 549&mdss_dsi1 { 550 vdda-supply = <&vreg_l26a_1p2>; 551 552 qcom,dual-dsi-mode; 553 554 /* DSI1 is slave, so use DSI0 clocks */ 555 assigned-clock-parents = <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>, 556 <&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>; 557 558 status = "okay"; 559}; 560 561&mdss_dsi1_out { 562 remote-endpoint = <<9611_b>; 563 data-lanes = <0 1 2 3>; 564}; 565 566&mdss_dsi1_phy { 567 vdds-supply = <&vreg_l1a_0p875>; 568 status = "okay"; 569}; 570 571&mss_pil { 572 status = "okay"; 573 firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mbn"; 574}; 575 576&pcie0 { 577 status = "okay"; 578 perst-gpios = <&tlmm 35 GPIO_ACTIVE_LOW>; 579 wake-gpios = <&tlmm 134 GPIO_ACTIVE_HIGH>; 580 581 vddpe-3v3-supply = <&pcie0_3p3v_dual>; 582 583 pinctrl-names = "default"; 584 pinctrl-0 = <&pcie0_default_state>; 585}; 586 587&pcie0_phy { 588 status = "okay"; 589 590 vdda-phy-supply = <&vreg_l1a_0p875>; 591 vdda-pll-supply = <&vreg_l26a_1p2>; 592}; 593 594&pcie1 { 595 status = "okay"; 596 perst-gpios = <&tlmm 102 GPIO_ACTIVE_LOW>; 597 598 pinctrl-names = "default"; 599 pinctrl-0 = <&pcie1_default_state>; 600}; 601 602&pcie1_phy { 603 status = "okay"; 604 605 vdda-phy-supply = <&vreg_l1a_0p875>; 606 vdda-pll-supply = <&vreg_l26a_1p2>; 607}; 608 609&pm8998_gpios { 610 gpio-line-names = 611 "NC", 612 "NC", 613 "WLAN_SW_CTRL", 614 "NC", 615 "PM_GPIO5_BLUE_BT_LED", 616 "VOL_UP_N", 617 "NC", 618 "ADC_IN1", 619 "PM_GPIO9_YEL_WIFI_LED", 620 "CAM0_AVDD_EN", 621 "NC", 622 "CAM0_DVDD_EN", 623 "PM_GPIO13_GREEN_U4_LED", 624 "DIV_CLK2", 625 "NC", 626 "NC", 627 "NC", 628 "SMB_STAT", 629 "NC", 630 "NC", 631 "ADC_IN2", 632 "OPTION1", 633 "WCSS_PWR_REQ", 634 "PM845_GPIO24", 635 "OPTION2", 636 "PM845_SLB"; 637 638 cam0_dvdd_1v2_en_default: cam0-dvdd-1v2-en-state { 639 pins = "gpio12"; 640 function = "normal"; 641 642 bias-pull-up; 643 drive-push-pull; 644 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>; 645 }; 646 647 cam0_avdd_2v8_en_default: cam0-avdd-2v8-en-state { 648 pins = "gpio10"; 649 function = "normal"; 650 651 bias-pull-up; 652 drive-push-pull; 653 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>; 654 }; 655 656 vol_up_pin_a: vol-up-active-state { 657 pins = "gpio6"; 658 function = "normal"; 659 input-enable; 660 bias-pull-up; 661 qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>; 662 }; 663}; 664 665&pm8998_resin { 666 linux,code = <KEY_VOLUMEDOWN>; 667 status = "okay"; 668}; 669 670&pmi8998_lpg { 671 status = "okay"; 672 673 qcom,power-source = <1>; 674 675 led@3 { 676 reg = <3>; 677 color = <LED_COLOR_ID_GREEN>; 678 function = LED_FUNCTION_HEARTBEAT; 679 function-enumerator = <3>; 680 681 linux,default-trigger = "heartbeat"; 682 default-state = "on"; 683 }; 684 685 led@4 { 686 reg = <4>; 687 color = <LED_COLOR_ID_GREEN>; 688 function = LED_FUNCTION_INDICATOR; 689 function-enumerator = <2>; 690 }; 691 692 led@5 { 693 reg = <5>; 694 color = <LED_COLOR_ID_GREEN>; 695 function = LED_FUNCTION_INDICATOR; 696 function-enumerator = <1>; 697 }; 698}; 699 700/* QUAT I2S Uses 4 I2S SD Lines for audio on LT9611 HDMI Bridge */ 701&q6afedai { 702 dai@22 { 703 reg = <QUATERNARY_MI2S_RX>; 704 qcom,sd-lines = <0 1 2 3>; 705 }; 706}; 707 708&q6asmdai { 709 dai@0 { 710 reg = <MSM_FRONTEND_DAI_MULTIMEDIA1>; 711 }; 712 713 dai@1 { 714 reg = <MSM_FRONTEND_DAI_MULTIMEDIA2>; 715 }; 716 717 dai@2 { 718 reg = <MSM_FRONTEND_DAI_MULTIMEDIA3>; 719 }; 720 721 dai@3 { 722 reg = <MSM_FRONTEND_DAI_MULTIMEDIA4>; 723 direction = <2>; 724 is-compress-dai; 725 }; 726}; 727 728&qupv3_id_0 { 729 status = "okay"; 730}; 731 732&qupv3_id_1 { 733 status = "okay"; 734}; 735 736&sdhc_2 { 737 status = "okay"; 738 739 pinctrl-names = "default"; 740 pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>; 741 742 vmmc-supply = <&vreg_l21a_2p95>; 743 vqmmc-supply = <&vreg_l13a_2p95>; 744 745 bus-width = <4>; 746 cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW>; 747}; 748 749&slpi_pas { 750 firmware-name = "qcom/sdm845/Thundercomm/db845c/slpi.mbn"; 751 752 status = "okay"; 753}; 754 755&sound { 756 compatible = "qcom,db845c-sndcard", "qcom,sdm845-sndcard"; 757 pinctrl-0 = <&quat_mi2s_active 758 &quat_mi2s_sd0_active 759 &quat_mi2s_sd1_active 760 &quat_mi2s_sd2_active 761 &quat_mi2s_sd3_active>; 762 pinctrl-names = "default"; 763 model = "DB845c"; 764 audio-routing = 765 "RX_BIAS", "MCLK", 766 "AMIC1", "MIC BIAS1", 767 "AMIC2", "MIC BIAS2", 768 "DMIC0", "MIC BIAS1", 769 "DMIC1", "MIC BIAS1", 770 "DMIC2", "MIC BIAS3", 771 "DMIC3", "MIC BIAS3", 772 "SpkrLeft IN", "SPK1 OUT", 773 "SpkrRight IN", "SPK2 OUT"; 774 775 mm1-dai-link { 776 link-name = "MultiMedia1"; 777 cpu { 778 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA1>; 779 }; 780 }; 781 782 mm2-dai-link { 783 link-name = "MultiMedia2"; 784 cpu { 785 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA2>; 786 }; 787 }; 788 789 mm3-dai-link { 790 link-name = "MultiMedia3"; 791 cpu { 792 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA3>; 793 }; 794 }; 795 796 mm4-dai-link { 797 link-name = "MultiMedia4"; 798 cpu { 799 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA4>; 800 }; 801 }; 802 803 hdmi-dai-link { 804 link-name = "HDMI Playback"; 805 cpu { 806 sound-dai = <&q6afedai QUATERNARY_MI2S_RX>; 807 }; 808 809 platform { 810 sound-dai = <&q6routing>; 811 }; 812 813 codec { 814 sound-dai = <<9611_codec 0>; 815 }; 816 }; 817 818 slim-dai-link { 819 link-name = "SLIM Playback"; 820 cpu { 821 sound-dai = <&q6afedai SLIMBUS_0_RX>; 822 }; 823 824 platform { 825 sound-dai = <&q6routing>; 826 }; 827 828 codec { 829 sound-dai = <&left_spkr>, <&right_spkr>, <&swm 0>, <&wcd9340 0>; 830 }; 831 }; 832 833 slimcap-dai-link { 834 link-name = "SLIM Capture"; 835 cpu { 836 sound-dai = <&q6afedai SLIMBUS_0_TX>; 837 }; 838 839 platform { 840 sound-dai = <&q6routing>; 841 }; 842 843 codec { 844 sound-dai = <&wcd9340 1>; 845 }; 846 }; 847}; 848 849&spi0 { 850 status = "okay"; 851 pinctrl-names = "default"; 852 pinctrl-0 = <&qup_spi0_default>; 853 cs-gpios = <&tlmm 3 GPIO_ACTIVE_LOW>; 854 855 can@0 { 856 compatible = "microchip,mcp2517fd"; 857 reg = <0>; 858 clocks = <&clk40m>; 859 interrupts-extended = <&tlmm 104 IRQ_TYPE_LEVEL_LOW>; 860 spi-max-frequency = <10000000>; 861 vdd-supply = <&vdc_5v>; 862 xceiver-supply = <&vdc_5v>; 863 }; 864}; 865 866&spi2 { 867 /* On Low speed expansion */ 868 status = "okay"; 869}; 870 871&tlmm { 872 cam0_default: cam0-default-state { 873 rst-pins { 874 pins = "gpio9"; 875 function = "gpio"; 876 877 drive-strength = <16>; 878 bias-disable; 879 }; 880 881 mclk0-pins { 882 pins = "gpio13"; 883 function = "cam_mclk"; 884 885 drive-strength = <16>; 886 bias-disable; 887 }; 888 }; 889 890 cam3_default: cam3-default-state { 891 rst-pins { 892 function = "gpio"; 893 pins = "gpio21"; 894 895 drive-strength = <16>; 896 bias-disable; 897 }; 898 899 mclk3-pins { 900 function = "cam_mclk"; 901 pins = "gpio16"; 902 903 drive-strength = <16>; 904 bias-disable; 905 }; 906 }; 907 908 dsi_sw_sel: dsi-sw-sel-state { 909 pins = "gpio120"; 910 function = "gpio"; 911 912 drive-strength = <2>; 913 bias-disable; 914 output-high; 915 }; 916 917 lt9611_irq_pin: lt9611-irq-state { 918 pins = "gpio84"; 919 function = "gpio"; 920 bias-disable; 921 }; 922 923 pcie0_default_state: pcie0-default-state { 924 clkreq-pins { 925 pins = "gpio36"; 926 function = "pci_e0"; 927 bias-pull-up; 928 }; 929 930 reset-n-pins { 931 pins = "gpio35"; 932 function = "gpio"; 933 934 drive-strength = <2>; 935 output-low; 936 bias-pull-down; 937 }; 938 939 wake-n-pins { 940 pins = "gpio37"; 941 function = "gpio"; 942 943 drive-strength = <2>; 944 bias-pull-up; 945 }; 946 }; 947 948 pcie0_pwren_state: pcie0-pwren-state { 949 pins = "gpio90"; 950 function = "gpio"; 951 952 drive-strength = <2>; 953 bias-disable; 954 }; 955 956 pcie1_default_state: pcie1-default-state { 957 perst-n-pins { 958 pins = "gpio102"; 959 function = "gpio"; 960 961 drive-strength = <16>; 962 bias-disable; 963 }; 964 965 clkreq-pins { 966 pins = "gpio103"; 967 function = "pci_e1"; 968 bias-pull-up; 969 }; 970 971 wake-n-pins { 972 pins = "gpio11"; 973 function = "gpio"; 974 975 drive-strength = <2>; 976 bias-pull-up; 977 }; 978 979 reset-n-pins { 980 pins = "gpio75"; 981 function = "gpio"; 982 983 drive-strength = <16>; 984 bias-pull-up; 985 output-high; 986 }; 987 }; 988 989 sdc2_default_state: sdc2-default-state { 990 clk-pins { 991 pins = "sdc2_clk"; 992 bias-disable; 993 994 /* 995 * It seems that mmc_test reports errors if drive 996 * strength is not 16 on clk, cmd, and data pins. 997 */ 998 drive-strength = <16>; 999 }; 1000 1001 cmd-pins { 1002 pins = "sdc2_cmd"; 1003 bias-pull-up; 1004 drive-strength = <10>; 1005 }; 1006 1007 data-pins { 1008 pins = "sdc2_data"; 1009 bias-pull-up; 1010 drive-strength = <10>; 1011 }; 1012 }; 1013 1014 sdc2_card_det_n: sd-card-det-n-state { 1015 pins = "gpio126"; 1016 function = "gpio"; 1017 bias-pull-up; 1018 }; 1019}; 1020 1021&uart3 { 1022 label = "LS-UART0"; 1023 pinctrl-0 = <&qup_uart3_4pin>; 1024 1025 status = "disabled"; 1026}; 1027 1028&uart6 { 1029 status = "okay"; 1030 1031 pinctrl-0 = <&qup_uart6_4pin>; 1032 1033 bluetooth { 1034 compatible = "qcom,wcn3990-bt"; 1035 1036 vddio-supply = <&vreg_s4a_1p8>; 1037 vddxo-supply = <&vreg_l7a_1p8>; 1038 vddrf-supply = <&vreg_l17a_1p3>; 1039 vddch0-supply = <&vreg_l25a_3p3>; 1040 max-speed = <3200000>; 1041 }; 1042}; 1043 1044&uart9 { 1045 label = "LS-UART1"; 1046 status = "okay"; 1047}; 1048 1049&usb_1 { 1050 status = "okay"; 1051}; 1052 1053&usb_1_dwc3 { 1054 dr_mode = "peripheral"; 1055}; 1056 1057&usb_1_hsphy { 1058 status = "okay"; 1059 1060 vdd-supply = <&vreg_l1a_0p875>; 1061 vdda-pll-supply = <&vreg_l12a_1p8>; 1062 vdda-phy-dpdm-supply = <&vreg_l24a_3p075>; 1063 1064 qcom,imp-res-offset-value = <8>; 1065 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>; 1066 qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>; 1067 qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>; 1068}; 1069 1070&usb_1_qmpphy { 1071 status = "okay"; 1072 1073 vdda-phy-supply = <&vreg_l26a_1p2>; 1074 vdda-pll-supply = <&vreg_l1a_0p875>; 1075}; 1076 1077&usb_2 { 1078 status = "okay"; 1079}; 1080 1081&usb_2_dwc3 { 1082 dr_mode = "host"; 1083}; 1084 1085&usb_2_hsphy { 1086 status = "okay"; 1087 1088 vdd-supply = <&vreg_l1a_0p875>; 1089 vdda-pll-supply = <&vreg_l12a_1p8>; 1090 vdda-phy-dpdm-supply = <&vreg_l24a_3p075>; 1091 1092 qcom,imp-res-offset-value = <8>; 1093 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>; 1094}; 1095 1096&usb_2_qmpphy { 1097 status = "okay"; 1098 1099 vdda-phy-supply = <&vreg_l26a_1p2>; 1100 vdda-pll-supply = <&vreg_l1a_0p875>; 1101}; 1102 1103&ufs_mem_hc { 1104 status = "okay"; 1105 1106 reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>; 1107 1108 vcc-supply = <&vreg_l20a_2p95>; 1109 vcc-max-microamp = <800000>; 1110}; 1111 1112&ufs_mem_phy { 1113 status = "okay"; 1114 1115 vdda-phy-supply = <&vreg_l1a_0p875>; 1116 vdda-pll-supply = <&vreg_l26a_1p2>; 1117}; 1118 1119&venus { 1120 status = "okay"; 1121}; 1122 1123&wcd9340 { 1124 reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>; 1125 vdd-buck-supply = <&vreg_s4a_1p8>; 1126 vdd-buck-sido-supply = <&vreg_s4a_1p8>; 1127 vdd-tx-supply = <&vreg_s4a_1p8>; 1128 vdd-rx-supply = <&vreg_s4a_1p8>; 1129 vdd-io-supply = <&vreg_s4a_1p8>; 1130 1131 swm: soundwire@c85 { 1132 left_spkr: speaker@0,1 { 1133 compatible = "sdw10217201000"; 1134 reg = <0 1>; 1135 powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>; 1136 #thermal-sensor-cells = <0>; 1137 sound-name-prefix = "SpkrLeft"; 1138 #sound-dai-cells = <0>; 1139 }; 1140 1141 right_spkr: speaker@0,2 { 1142 compatible = "sdw10217201000"; 1143 powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>; 1144 reg = <0 2>; 1145 #thermal-sensor-cells = <0>; 1146 sound-name-prefix = "SpkrRight"; 1147 #sound-dai-cells = <0>; 1148 }; 1149 }; 1150}; 1151 1152&wifi { 1153 status = "okay"; 1154 1155 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>; 1156 vdd-1.8-xo-supply = <&vreg_l7a_1p8>; 1157 vdd-1.3-rfa-supply = <&vreg_l17a_1p3>; 1158 vdd-3.3-ch0-supply = <&vreg_l25a_3p3>; 1159 1160 qcom,snoc-host-cap-8bit-quirk; 1161 qcom,calibration-variant = "Thundercomm_DB845C"; 1162}; 1163 1164/* PINCTRL - additions to nodes defined in sdm845.dtsi */ 1165&qup_spi2_default { 1166 drive-strength = <16>; 1167}; 1168 1169&qup_i2c10_default { 1170 drive-strength = <2>; 1171 bias-disable; 1172}; 1173 1174&qup_uart9_rx { 1175 drive-strength = <2>; 1176 bias-pull-up; 1177}; 1178 1179&qup_uart9_tx { 1180 drive-strength = <2>; 1181 bias-disable; 1182}; 1183 1184/* PINCTRL - additions to nodes defined in sdm845.dtsi */ 1185&qup_spi0_default { 1186 drive-strength = <6>; 1187 bias-disable; 1188}; 1189