xref: /linux/arch/arm64/boot/dts/qcom/sdm845-db845c-navigation-mezzanine.dtso (revision cdd30ebb1b9f36159d66f088b61aee264e649d7a)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (c) 2022, Linaro Ltd.
4 */
5
6/dts-v1/;
7/plugin/;
8
9#include <dt-bindings/clock/qcom,camcc-sdm845.h>
10#include <dt-bindings/gpio/gpio.h>
11
12/ {
13	reserved-memory {
14		linux,cma {
15			compatible = "shared-dma-pool";
16			size = <0x0 0x8000000>;
17			reusable;
18			linux,cma-default;
19		};
20	};
21};
22
23&camss {
24	vdda-phy-supply = <&vreg_l1a_0p875>;
25	vdda-pll-supply = <&vreg_l26a_1p2>;
26
27	status = "okay";
28
29	ports {
30		port@0 {
31			csiphy0_ep: endpoint {
32				data-lanes = <0 1 2 3>;
33				remote-endpoint = <&ov8856_ep>;
34			};
35		};
36	};
37};
38
39&cci {
40	status = "okay";
41};
42
43&cci_i2c0 {
44	#address-cells = <1>;
45	#size-cells = <0>;
46
47	camera@10 {
48		compatible = "ovti,ov8856";
49		reg = <0x10>;
50
51		/* CAM0_RST_N */
52		reset-gpios = <&tlmm 9 GPIO_ACTIVE_LOW>;
53		pinctrl-names = "default";
54		pinctrl-0 = <&cam0_default>;
55
56		clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
57		clock-names = "xvclk";
58		clock-frequency = <19200000>;
59
60		/*
61		 * The &vreg_s4a_1p8 trace is powered on as a,
62		 * so it is represented by a fixed regulator.
63		 *
64		 * The 2.8V vdda-supply and 1.2V vddd-supply regulators
65		 * both have to be enabled through the power management
66		 * gpios.
67		 */
68		dovdd-supply = <&vreg_lvs1a_1p8>;
69		avdd-supply = <&cam0_avdd_2v8>;
70		dvdd-supply = <&cam0_dvdd_1v2>;
71
72		port {
73			ov8856_ep: endpoint {
74				link-frequencies = /bits/ 64
75					<360000000 180000000>;
76				data-lanes = <1 2 3 4>;
77				remote-endpoint = <&csiphy0_ep>;
78			};
79		};
80	};
81};
82
83&cci_i2c1 {
84	#address-cells = <1>;
85	#size-cells = <0>;
86
87	camera@60 {
88		compatible = "ovti,ov7251";
89
90		/* I2C address as per ov7251.txt linux documentation */
91		reg = <0x60>;
92
93		/* CAM3_RST_N */
94		enable-gpios = <&tlmm 21 GPIO_ACTIVE_HIGH>;
95		pinctrl-names = "default";
96		pinctrl-0 = <&cam3_default>;
97
98		clocks = <&clock_camcc CAM_CC_MCLK3_CLK>;
99		clock-names = "xclk";
100		clock-frequency = <24000000>;
101
102		/*
103		 * The &vreg_s4a_1p8 trace always powered on.
104		 *
105		 * The 2.8V vdda-supply regulator is enabled when the
106		 * vreg_s4a_1p8 trace is pulled high.
107		 * It too is represented by a fixed regulator.
108		 *
109		 * No 1.2V vddd-supply regulator is used.
110		 */
111		vdddo-supply = <&vreg_lvs1a_1p8>;
112		vdda-supply = <&cam3_avdd_2v8>;
113
114		status = "disabled";
115
116		port {
117			ov7251_ep: endpoint {
118				data-lanes = <0 1>;
119/*				remote-endpoint = <&csiphy3_ep>; */
120			};
121		};
122	};
123};
124