1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device tree for Google Pixel 3a, adapted from google-blueline device tree, 4 * xiaomi-lavender device tree, and oneplus-common device tree. 5 * 6 * Copyright (c) 2022, Richard Acayan. All rights reserved. 7 */ 8 9/dts-v1/; 10 11#include <dt-bindings/gpio/gpio.h> 12#include <dt-bindings/input/input.h> 13#include <dt-bindings/leds/common.h> 14#include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 15#include <dt-bindings/power/qcom-rpmpd.h> 16#include "sdm670.dtsi" 17#include "pm660.dtsi" 18#include "pm660l.dtsi" 19 20/delete-node/ &mpss_region; 21/delete-node/ &venus_mem; 22/delete-node/ &wlan_msa_mem; 23/delete-node/ &cdsp_mem; 24/delete-node/ &mba_region; 25/delete-node/ &adsp_mem; 26/delete-node/ &ipa_fw_mem; 27/delete-node/ &ipa_gsi_mem; 28/delete-node/ &gpu_mem; 29 30/ { 31 model = "Google Pixel 3a"; 32 compatible = "google,sargo", "qcom,sdm670"; 33 34 aliases { }; 35 36 battery: battery { 37 compatible = "simple-battery"; 38 39 voltage-min-design-microvolt = <3312000>; 40 voltage-max-design-microvolt = <4400000>; 41 charge-full-design-microamp-hours = <3000000>; 42 }; 43 44 chosen { 45 stdout-path = "serial0:115200n8"; 46 47 #address-cells = <2>; 48 #size-cells = <2>; 49 ranges; 50 51 framebuffer@9c000000 { 52 compatible = "simple-framebuffer"; 53 reg = <0 0x9c000000 0 (1080 * 2220 * 4)>; 54 width = <1080>; 55 height = <2220>; 56 stride = <(1080 * 4)>; 57 format = "a8r8g8b8"; 58 }; 59 }; 60 61 gpio-keys { 62 compatible = "gpio-keys"; 63 autorepeat; 64 65 pinctrl-names = "default"; 66 pinctrl-0 = <&vol_up_pin>; 67 68 key-vol-up { 69 label = "Volume Up"; 70 linux,code = <KEY_VOLUMEUP>; 71 gpios = <&pm660l_gpios 7 GPIO_ACTIVE_LOW>; 72 }; 73 }; 74 75 reserved-memory { 76 #address-cells = <2>; 77 #size-cells = <2>; 78 79 mpss_region: mpss@8b000000 { 80 reg = <0 0x8b000000 0 0x9800000>; 81 no-map; 82 }; 83 84 venus_mem: venus@94800000 { 85 reg = <0 0x94800000 0 0x500000>; 86 no-map; 87 }; 88 89 wlan_msa_mem: wlan-msa@94d00000 { 90 reg = <0 0x94d00000 0 0x100000>; 91 no-map; 92 }; 93 94 cdsp_mem: cdsp@94e00000 { 95 reg = <0 0x94e00000 0 0x800000>; 96 no-map; 97 }; 98 99 mba_region: mba@95600000 { 100 reg = <0 0x95600000 0 0x200000>; 101 no-map; 102 }; 103 104 adsp_mem: adsp@95800000 { 105 reg = <0 0x95800000 0 0x2200000>; 106 no-map; 107 }; 108 109 ipa_fw_mem: ipa-fw@97a00000 { 110 reg = <0 0x97a00000 0 0x10000>; 111 no-map; 112 }; 113 114 ipa_gsi_mem: ipa-gsi@97a10000 { 115 reg = <0 0x97a10000 0 0x5000>; 116 no-map; 117 }; 118 119 gpu_mem: gpu@97a15000 { 120 reg = <0 0x97a15000 0 0x2000>; 121 no-map; 122 }; 123 124 framebuffer-region@9c000000 { 125 reg = <0 0x9c000000 0 0x2400000>; 126 no-map; 127 }; 128 129 /* Also includes ramoops regions */ 130 debug_info_mem: debug-info@a1800000 { 131 reg = <0 0xa1800000 0 0x411000>; 132 no-map; 133 }; 134 }; 135 136 /* 137 * The touchscreen regulator seems to be controlled somehow by a gpio. 138 * Model it as a fixed regulator and keep it on. Without schematics we 139 * don't know how this is actually wired up... 140 */ 141 ts_1p8_supply: ts-1p8-regulator { 142 compatible = "regulator-fixed"; 143 regulator-name = "ts_1p8_supply"; 144 145 regulator-min-microvolt = <1800000>; 146 regulator-max-microvolt = <1800000>; 147 148 gpio = <&pm660_gpios 12 GPIO_ACTIVE_HIGH>; 149 enable-active-high; 150 }; 151 152 vph_pwr: vph-pwr-regulator { 153 compatible = "regulator-fixed"; 154 regulator-name = "vph_pwr"; 155 regulator-min-microvolt = <3312000>; 156 regulator-max-microvolt = <3312000>; 157 158 regulator-always-on; 159 regulator-boot-on; 160 }; 161 162 /* 163 * Supply map from xiaomi-lavender specifies this as the supply for 164 * ldob1, ldob9, ldob10, ldoa2, and ldoa3, while downstream specifies 165 * this as a power domain. Set this as a fixed regulator with the same 166 * voltage as lavender until display is needed to avoid unneccessarily 167 * using a deprecated binding (regulator-fixed-domain). 168 */ 169 vreg_s2b_1p05: vreg-s2b-regulator { 170 compatible = "regulator-fixed"; 171 regulator-name = "vreg_s2b"; 172 regulator-min-microvolt = <1050000>; 173 regulator-max-microvolt = <1050000>; 174 }; 175}; 176 177&apps_rsc { 178 regulators-0 { 179 compatible = "qcom,pm660-rpmh-regulators"; 180 qcom,pmic-id = "a"; 181 182 vdd-s1-supply = <&vph_pwr>; 183 vdd-s2-supply = <&vph_pwr>; 184 vdd-s3-supply = <&vph_pwr>; 185 vdd-s4-supply = <&vph_pwr>; 186 vdd-s5-supply = <&vph_pwr>; 187 vdd-s6-supply = <&vph_pwr>; 188 189 vdd-l1-l6-l7-supply = <&vreg_s6a_0p87>; 190 vdd-l2-l3-supply = <&vreg_s2b_1p05>; 191 vdd-l5-supply = <&vreg_s2b_1p05>; 192 vdd-l8-l9-l10-l11-l12-l13-l14-supply = <&vreg_s4a_2p04>; 193 vdd-l15-l16-l17-l18-l19-supply = <&vreg_bob>; 194 195 /* 196 * S1A (FTAPC0), S2A (FTAPC1), S3A (HFAPC1) are managed 197 * by the Core Power Reduction hardened (CPRh) and the 198 * Operating State Manager (OSM) HW automatically. 199 */ 200 201 vreg_s4a_2p04: smps4 { 202 regulator-min-microvolt = <1808000>; 203 regulator-max-microvolt = <2040000>; 204 regulator-enable-ramp-delay = <200>; 205 }; 206 207 vreg_s6a_0p87: smps6 { 208 regulator-min-microvolt = <1224000>; 209 regulator-max-microvolt = <1352000>; 210 regulator-enable-ramp-delay = <150>; 211 }; 212 213 /* LDOs */ 214 vreg_l1a_1p225: ldo1 { 215 regulator-min-microvolt = <1200000>; 216 regulator-max-microvolt = <1250000>; 217 regulator-enable-ramp-delay = <250>; 218 }; 219 220 vreg_l2a_1p0: ldo2 { 221 regulator-min-microvolt = <1000000>; 222 regulator-max-microvolt = <1000000>; 223 regulator-enable-ramp-delay = <250>; 224 }; 225 226 vreg_l3a_1p0: ldo3 { 227 regulator-min-microvolt = <1000000>; 228 regulator-max-microvolt = <1000000>; 229 regulator-enable-ramp-delay = <250>; 230 }; 231 232 vreg_l5a_0p848: ldo5 { 233 regulator-min-microvolt = <800000>; 234 regulator-max-microvolt = <800000>; 235 regulator-enable-ramp-delay = <250>; 236 }; 237 238 vreg_l6a_1p3: ldo6 { 239 regulator-min-microvolt = <1248000>; 240 regulator-max-microvolt = <1304000>; 241 regulator-enable-ramp-delay = <250>; 242 }; 243 244 vreg_l7a_1p2: ldo7 { 245 regulator-min-microvolt = <1200000>; 246 regulator-max-microvolt = <1200000>; 247 regulator-enable-ramp-delay = <250>; 248 }; 249 250 vreg_l8a_1p8: ldo8 { 251 regulator-min-microvolt = <1800000>; 252 regulator-max-microvolt = <1800000>; 253 regulator-enable-ramp-delay = <250>; 254 regulator-always-on; 255 }; 256 257 vreg_l9a_1p8: ldo9 { 258 regulator-min-microvolt = <1800000>; 259 regulator-max-microvolt = <1800000>; 260 regulator-enable-ramp-delay = <250>; 261 }; 262 263 vreg_l10a_1p8: ldo10 { 264 regulator-min-microvolt = <1800000>; 265 regulator-max-microvolt = <1800000>; 266 regulator-enable-ramp-delay = <250>; 267 }; 268 269 vreg_l11a_1p8: ldo11 { 270 regulator-min-microvolt = <1800000>; 271 regulator-max-microvolt = <1800000>; 272 regulator-enable-ramp-delay = <250>; 273 }; 274 275 vreg_l12a_1p8: ldo12 { 276 regulator-min-microvolt = <1800000>; 277 regulator-max-microvolt = <1800000>; 278 regulator-enable-ramp-delay = <250>; 279 }; 280 281 vreg_l13a_1p8: ldo13 { 282 regulator-min-microvolt = <1800000>; 283 regulator-max-microvolt = <1800000>; 284 regulator-enable-ramp-delay = <250>; 285 }; 286 287 vreg_l14a_1p8: ldo14 { 288 regulator-min-microvolt = <1800000>; 289 regulator-max-microvolt = <1800000>; 290 regulator-enable-ramp-delay = <250>; 291 }; 292 293 vreg_l15a_1p8: ldo15 { 294 regulator-min-microvolt = <1800000>; 295 regulator-max-microvolt = <2950000>; 296 regulator-enable-ramp-delay = <250>; 297 }; 298 299 vreg_l16a_2p7: ldo16 { 300 regulator-min-microvolt = <2696000>; 301 regulator-max-microvolt = <2696000>; 302 regulator-enable-ramp-delay = <250>; 303 }; 304 305 vreg_l17a_1p8: ldo17 { 306 regulator-min-microvolt = <1800000>; 307 regulator-max-microvolt = <2950000>; 308 regulator-enable-ramp-delay = <250>; 309 }; 310 311 vreg_l19a_3p3: ldo19 { 312 regulator-min-microvolt = <3000000>; 313 regulator-max-microvolt = <3312000>; 314 regulator-enable-ramp-delay = <250>; 315 }; 316 }; 317 318 regulators-1 { 319 compatible = "qcom,pm660l-rpmh-regulators"; 320 qcom,pmic-id = "b"; 321 322 vdd-s1-supply = <&vph_pwr>; 323 vdd-s2-supply = <&vph_pwr>; 324 vdd-s3-s4-supply = <&vph_pwr>; 325 vdd-s5-supply = <&vph_pwr>; 326 327 vdd-l1-l9-l10-supply = <&vreg_s2b_1p05>; 328 vdd-l2-supply = <&vreg_bob>; 329 vdd-l3-l5-l7-l8-supply = <&vreg_bob>; 330 vdd-l4-l6-supply = <&vreg_bob>; 331 vdd-bob-supply = <&vph_pwr>; 332 333 /* LDOs */ 334 vreg_l1b_0p925: ldo1 { 335 regulator-min-microvolt = <880000>; 336 regulator-max-microvolt = <900000>; 337 regulator-enable-ramp-delay = <250>; 338 }; 339 340 vreg_l2b_2p95: ldo2 { 341 regulator-min-microvolt = <1800000>; 342 regulator-max-microvolt = <2960000>; 343 regulator-enable-ramp-delay = <250>; 344 }; 345 346 vreg_l3b_3p0: ldo3 { 347 regulator-min-microvolt = <2850000>; 348 regulator-max-microvolt = <3008000>; 349 regulator-enable-ramp-delay = <250>; 350 }; 351 352 vreg_l4b_2p95: ldo4 { 353 regulator-min-microvolt = <2960000>; 354 regulator-max-microvolt = <2960000>; 355 regulator-enable-ramp-delay = <250>; 356 }; 357 358 vreg_l5b_2p95: ldo5 { 359 regulator-min-microvolt = <2960000>; 360 regulator-max-microvolt = <2960000>; 361 regulator-enable-ramp-delay = <250>; 362 }; 363 364 vreg_l6b_3p3: ldo6 { 365 regulator-min-microvolt = <3008000>; 366 regulator-max-microvolt = <3300000>; 367 regulator-enable-ramp-delay = <250>; 368 }; 369 370 vreg_l7b_3p125: ldo7 { 371 regulator-min-microvolt = <3088000>; 372 regulator-max-microvolt = <3100000>; 373 regulator-enable-ramp-delay = <250>; 374 }; 375 376 vreg_l8b_3p3: ldo8 { 377 regulator-min-microvolt = <3300000>; 378 regulator-max-microvolt = <3312000>; 379 regulator-enable-ramp-delay = <250>; 380 }; 381 382 /* 383 * Downstream specifies a fixed voltage of 3.312 V, but the 384 * PMIC4 BOB ranges don't support that. Widen the range a 385 * little to avoid adding a new BOB regulator type. 386 */ 387 vreg_bob: bob { 388 regulator-min-microvolt = <3296000>; 389 regulator-max-microvolt = <3328000>; 390 regulator-enable-ramp-delay = <500>; 391 }; 392 }; 393}; 394 395&gcc { 396 protected-clocks = <GCC_QSPI_CORE_CLK>, 397 <GCC_QSPI_CORE_CLK_SRC>, 398 <GCC_QSPI_CNOC_PERIPH_AHB_CLK>; 399}; 400 401&gpi_dma1 { 402 status = "okay"; 403}; 404 405&gpu { 406 status = "okay"; 407 408 zap-shader { 409 memory-region = <&gpu_mem>; 410 firmware-name = "qcom/sdm670/sargo/a615_zap.mbn"; 411 }; 412}; 413 414&i2c9 { 415 clock-frequency = <100000>; 416 status = "okay"; 417 418 synaptics-rmi4-i2c@20 { 419 compatible = "syna,rmi4-i2c"; 420 reg = <0x20>; 421 interrupts-extended = <&tlmm 125 IRQ_TYPE_EDGE_FALLING>; 422 423 pinctrl-names = "default"; 424 pinctrl-0 = <&touchscreen_default>; 425 426 vio-supply = <&ts_1p8_supply>; 427 428 syna,reset-delay-ms = <200>; 429 syna,startup-delay-ms = <200>; 430 431 #address-cells = <1>; 432 #size-cells = <0>; 433 434 rmi4-f01@1 { 435 reg = <0x01>; 436 syna,nosleep-mode = <1>; 437 }; 438 439 rmi4-f12@12 { 440 reg = <0x12>; 441 touchscreen-x-mm = <62>; 442 touchscreen-y-mm = <127>; 443 syna,sensor-type = <1>; 444 }; 445 }; 446}; 447 448&mdss { 449 status = "okay"; 450}; 451 452&mdss_dsi0 { 453 vdda-supply = <&vreg_l1a_1p225>; 454 status = "okay"; 455 456 panel@0 { 457 compatible = "samsung,s6e3fa7-ams559nk06"; 458 reg = <0>; 459 460 reset-gpios = <&tlmm 75 GPIO_ACTIVE_LOW>; 461 462 pinctrl-names = "default"; 463 pinctrl-0 = <&panel_default>; 464 465 power-supply = <&vreg_l6b_3p3>; 466 467 port { 468 panel_in: endpoint { 469 remote-endpoint = <&mdss_dsi0_out>; 470 }; 471 }; 472 }; 473}; 474 475&mdss_dsi0_out { 476 remote-endpoint = <&panel_in>; 477 data-lanes = <0 1 2 3>; 478}; 479 480&mdss_dsi0_phy { 481 vdds-supply = <&vreg_l1b_0p925>; 482 status = "okay"; 483}; 484 485&mdss_mdp { 486 status = "okay"; 487}; 488 489&pm660_charger { 490 monitored-battery = <&battery>; 491 status = "okay"; 492}; 493 494&pm660_rradc { 495 status = "okay"; 496}; 497 498&pm660l_flash { 499 status = "okay"; 500 501 led-0 { 502 function = LED_FUNCTION_FLASH; 503 color = <LED_COLOR_ID_WHITE>; 504 led-sources = <1>, <2>; 505 led-max-microamp = <500000>; 506 flash-max-microamp = <1500000>; 507 flash-max-timeout-us = <1280000>; 508 }; 509}; 510 511&pm660l_gpios { 512 vol_up_pin: vol-up-state { 513 pins = "gpio7"; 514 function = "normal"; 515 qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>; 516 input-enable; 517 bias-pull-up; 518 }; 519}; 520 521&pon_pwrkey { 522 status = "okay"; 523}; 524 525&pon_resin { 526 linux,code = <KEY_VOLUMEDOWN>; 527 status = "okay"; 528}; 529 530&qupv3_id_1 { 531 status = "okay"; 532}; 533 534&sdhc_1 { 535 supports-cqe; 536 mmc-hs200-1_8v; 537 mmc-hs400-1_8v; 538 mmc-ddr-1_8v; 539 540 qcom,ddr-config = <0xc3040873>; 541 542 vmmc-supply = <&vreg_l4b_2p95>; 543 vqmmc-supply = <&vreg_l8a_1p8>; 544 545 status = "okay"; 546}; 547 548&tlmm { 549 gpio-reserved-ranges = <0 4>, <81 4>; 550 551 panel_default: panel-default-state { 552 te-pins { 553 pins = "gpio10"; 554 function = "mdp_vsync"; 555 drive-strength = <2>; 556 bias-pull-down; 557 }; 558 559 reset-pins { 560 pins = "gpio75"; 561 function = "gpio"; 562 drive-strength = <8>; 563 bias-disable; 564 }; 565 566 mode-pins { 567 pins = "gpio76"; 568 function = "gpio"; 569 drive-strength = <8>; 570 bias-disable; 571 }; 572 }; 573 574 touchscreen_default: ts-default-state { 575 ts-reset-pins { 576 pins = "gpio99"; 577 function = "gpio"; 578 drive-strength = <2>; 579 bias-pull-up; 580 output-high; 581 }; 582 583 ts-irq-pins { 584 pins = "gpio125"; 585 function = "gpio"; 586 drive-strength = <2>; 587 bias-disable; 588 }; 589 590 ts-switch-pins { 591 pins = "gpio135"; 592 function = "gpio"; 593 drive-strength = <2>; 594 bias-disable; 595 output-low; 596 }; 597 }; 598}; 599 600&usb_1_hsphy { 601 vdd-supply = <&vreg_l1b_0p925>; 602 vdda-pll-supply = <&vreg_l10a_1p8>; 603 vdda-phy-dpdm-supply = <&vreg_l7b_3p125>; 604 605 status = "okay"; 606}; 607 608&usb_1 { 609 qcom,select-utmi-as-pipe-clk; 610 status = "okay"; 611}; 612 613&usb_1_dwc3 { 614 /* Only peripheral works for now */ 615 dr_mode = "peripheral"; 616 617 /* Do not assume that sdm670.dtsi will never support USB 3.0 */ 618 phys = <&usb_1_hsphy>; 619 phy-names = "usb2-phy"; 620 maximum-speed = "high-speed"; 621}; 622