xref: /linux/arch/arm64/boot/dts/qcom/sda660-inforce-ifc6560.dts (revision 55d0969c451159cff86949b38c39171cab962069)
1// SPDX-License-Identifier: BSD-3-Clause
2/*
3 * Copyright (c) 2021, Linaro Ltd.
4 * Copyright (c) 2020, Konrad Dybcio <konrad.dybcio@somainline.org>
5 * Copyright (c) 2020, AngeloGioacchino Del Regno
6 *                     <angelogioacchino.delregno@somainline.org>
7 */
8
9/dts-v1/;
10
11#include "sdm660.dtsi"
12#include "pm660.dtsi"
13#include "pm660l.dtsi"
14
15/ {
16	model = "Inforce 6560 Single Board Computer";
17	compatible = "inforce,ifc6560", "qcom,sda660";
18	chassis-type = "embedded"; /* SBC */
19
20	aliases {
21		serial0 = &blsp1_uart2;
22		serial1 = &blsp2_uart1;
23	};
24
25	chosen {
26		stdout-path = "serial0:115200n8";
27	};
28
29	gpio-keys {
30		compatible = "gpio-keys";
31
32		key-volup {
33			label = "Volume Up";
34			gpios = <&pm660l_gpios 7 GPIO_ACTIVE_LOW>;
35			linux,code = <KEY_VOLUMEUP>;
36			debounce-interval = <15>;
37		};
38	};
39
40	/*
41	 * Until we hook up type-c detection, we
42	 * have to stick with this. But it works.
43	 */
44	extcon_usb: extcon-usb {
45		compatible = "linux,extcon-usb-gpio";
46		id-gpios = <&tlmm 58 GPIO_ACTIVE_HIGH>;
47	};
48
49	hdmi-out {
50		compatible = "hdmi-connector";
51		type = "a";
52
53		port {
54			hdmi_con: endpoint {
55				remote-endpoint = <&adv7533_out>;
56			};
57		};
58	};
59
60	vph_pwr: vph-pwr-regulator {
61		compatible = "regulator-fixed";
62		regulator-name = "vph_pwr";
63		regulator-min-microvolt = <3800000>;
64		regulator-max-microvolt = <3800000>;
65
66		regulator-always-on;
67		regulator-boot-on;
68	};
69
70	v3p3_bck_bst: v3p3-bck-bst-regulator {
71		compatible = "regulator-fixed";
72		regulator-name = "v3p3_bck_bst";
73
74		regulator-min-microvolt = <3300000>;
75		regulator-max-microvolt = <3300000>;
76
77		vin-supply = <&vph_pwr>;
78	};
79
80	v1p2_ldo: v1p2-ldo-regulator {
81		compatible = "regulator-fixed";
82		regulator-name = "v1p2_ldo";
83
84		regulator-min-microvolt = <1200000>;
85		regulator-max-microvolt = <1200000>;
86
87		vin-supply = <&vph_pwr>;
88	};
89
90	v5p0_boost: v5p0-boost-regulator {
91		compatible = "regulator-fixed";
92		regulator-name = "v5p0_boost";
93
94		regulator-min-microvolt = <5000000>;
95		regulator-max-microvolt = <5000000>;
96
97		vin-supply = <&vph_pwr>;
98	};
99
100	/*
101	 * this is also used for APC1 CPU power, touching it resets the board
102	 */
103	vreg_l10a_1p8: vreg-l10a-regulator {
104		compatible = "regulator-fixed";
105		regulator-name = "vreg_l10a_1p8";
106		regulator-min-microvolt = <1804000>;
107		regulator-max-microvolt = <1804000>;
108		regulator-always-on;
109		regulator-boot-on;
110	};
111};
112
113&adreno_gpu {
114	status = "okay";
115};
116
117&adreno_gpu_zap {
118	firmware-name = "qcom/sda660/a512_zap.mbn";
119};
120
121&adsp_pil {
122	firmware-name = "qcom/sda660/adsp.mbn";
123};
124
125&blsp_i2c6 {
126	status = "okay";
127
128	adv7533: hdmi@39 {
129		compatible = "adi,adv7535";
130		reg = <0x39>, <0x66>;
131		reg-names = "main", "edid";
132
133		interrupt-parent = <&pm660l_gpios>;
134		interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
135
136		clocks = <&rpmcc RPM_SMD_BB_CLK2>;
137		clock-names = "cec";
138		/*
139		 * Limit to 3 lanes to prevent the bridge from changing amount
140		 * of lanes in the fly. MSM DSI host doesn't like that.
141		 */
142		adi,dsi-lanes = <3>;
143		avdd-supply = <&vreg_l13a_1p8>;
144		dvdd-supply = <&vreg_l13a_1p8>;
145		pvdd-supply = <&vreg_l13a_1p8>;
146		a2vdd-supply = <&vreg_l13a_1p8>;
147		v3p3-supply = <&v3p3_bck_bst>;
148
149		ports {
150			#address-cells = <1>;
151			#size-cells = <0>;
152
153			port@0 {
154				reg = <0>;
155
156				adv7533_in: endpoint {
157					remote-endpoint = <&mdss_dsi0_out>;
158				};
159			};
160
161			port@1 {
162				reg = <1>;
163
164				adv7533_out: endpoint {
165					remote-endpoint = <&hdmi_con>;
166				};
167			};
168		};
169	};
170};
171
172&blsp1_dma {
173	/*
174	 * The board will lock up if we toggle the BLSP clock, unless the
175	 * BAM DMA interconnects support is in place.
176	 */
177	/delete-property/ clocks;
178};
179
180&blsp1_uart2 {
181	status = "okay";
182};
183
184&blsp2_dma {
185	/*
186	 * The board will lock up if we toggle the BLSP clock, unless the
187	 * BAM DMA interconnects support is in place.
188	 */
189	/delete-property/ clocks;
190};
191
192&blsp2_uart1 {
193	status = "okay";
194
195	bluetooth {
196		compatible = "qcom,wcn3990-bt";
197
198		vddio-supply = <&vreg_l13a_1p8>;
199		vddxo-supply = <&vreg_l9a_1p8>;
200		vddrf-supply = <&vreg_l6a_1p3>;
201		vddch0-supply = <&vreg_l19a_3p3>;
202		max-speed = <3200000>;
203	};
204};
205
206&mdss {
207	status = "okay";
208};
209
210&mdss_dsi0 {
211	status = "okay";
212	vdda-supply = <&vreg_l1a_1p225>;
213};
214
215&mdss_dsi0_out {
216	remote-endpoint = <&adv7533_in>;
217	data-lanes = <0 1 2 3>;
218};
219
220&mdss_dsi0_phy {
221	status = "okay";
222	vcca-supply = <&vreg_l1b_0p925>;
223};
224
225&mmss_smmu {
226	status = "okay";
227};
228
229&pon_pwrkey {
230	status = "okay";
231};
232
233&pon_resin {
234	status = "okay";
235
236	linux,code = <KEY_VOLUMEUP>;
237};
238
239&qusb2phy0 {
240	status = "okay";
241
242	vdd-supply = <&vreg_l1b_0p925>;
243	vdda-pll-supply = <&vreg_l10a_1p8>;
244	vdda-phy-dpdm-supply = <&vreg_l7b_3p125>;
245};
246
247&qusb2phy1 {
248	status = "okay";
249
250	vdd-supply = <&vreg_l1b_0p925>;
251	vdda-pll-supply = <&vreg_l10a_1p8>;
252	vdda-phy-dpdm-supply = <&vreg_l7b_3p125>;
253};
254
255&remoteproc_mss {
256	firmware-name = "qcom/sda660/mba.mbn", "qcom/sda660/modem.mbn";
257	status = "okay";
258};
259
260&rpm_requests {
261	regulators-0 {
262		compatible = "qcom,rpm-pm660-regulators";
263
264		vdd_s1-supply = <&vph_pwr>;
265		vdd_s2-supply = <&vph_pwr>;
266		vdd_s3-supply = <&vph_pwr>;
267		vdd_s4-supply = <&vph_pwr>;
268		vdd_s5-supply = <&vph_pwr>;
269		vdd_s6-supply = <&vph_pwr>;
270
271		vdd_l1_l6_l7-supply = <&vreg_s5a_1p35>;
272		vdd_l2_l3-supply = <&vreg_s2b_1p05>;
273		vdd_l5-supply = <&vreg_s2b_1p05>;
274		vdd_l8_l9_l10_l11_l12_l13_l14-supply = <&vreg_s4a_2p04>;
275		vdd_l15_l16_l17_l18_l19-supply = <&vreg_bob>;
276
277		vreg_s4a_2p04: s4 {
278			regulator-min-microvolt = <1805000>;
279			regulator-max-microvolt = <2040000>;
280			regulator-enable-ramp-delay = <200>;
281			regulator-ramp-delay = <0>;
282			regulator-always-on;
283		};
284
285		vreg_s5a_1p35: s5 {
286			regulator-min-microvolt = <1224000>;
287			regulator-max-microvolt = <1350000>;
288			regulator-enable-ramp-delay = <200>;
289			regulator-ramp-delay = <0>;
290		};
291
292		vreg_l1a_1p225: l1 {
293			regulator-min-microvolt = <1150000>;
294			regulator-max-microvolt = <1250000>;
295			regulator-enable-ramp-delay = <250>;
296			regulator-allow-set-load;
297		};
298
299		vreg_l5a_0p8: l5 {
300			regulator-min-microvolt = <848000>;
301			regulator-max-microvolt = <848000>;
302		};
303
304		vreg_l6a_1p3: l6 {
305			regulator-min-microvolt = <1304000>;
306			regulator-max-microvolt = <1368000>;
307			regulator-enable-ramp-delay = <250>;
308			regulator-ramp-delay = <0>;
309			regulator-allow-set-load;
310		};
311
312		vreg_l8a_1p8: l8 {
313			regulator-min-microvolt = <1800000>;
314			regulator-max-microvolt = <1800000>;
315			regulator-enable-ramp-delay = <250>;
316			regulator-ramp-delay = <0>;
317			regulator-system-load = <325000>;
318			regulator-allow-set-load;
319		};
320
321		vreg_l9a_1p8: l9 {
322			regulator-min-microvolt = <1804000>;
323			regulator-max-microvolt = <1896000>;
324			regulator-enable-ramp-delay = <250>;
325			regulator-ramp-delay = <0>;
326			regulator-allow-set-load;
327		};
328
329		vreg_l13a_1p8: l13 {
330			/* This gives power to the LPDDR4: never turn it off! */
331			regulator-min-microvolt = <1800000>;
332			regulator-max-microvolt = <1944000>;
333			regulator-enable-ramp-delay = <250>;
334			regulator-ramp-delay = <0>;
335			regulator-always-on;
336			regulator-boot-on;
337		};
338
339		vreg_l19a_3p3: l19 {
340			regulator-min-microvolt = <3312000>;
341			regulator-max-microvolt = <3400000>;
342			regulator-enable-ramp-delay = <250>;
343			regulator-ramp-delay = <0>;
344			regulator-allow-set-load;
345		};
346	};
347
348	regulators-1 {
349		compatible = "qcom,rpm-pm660l-regulators";
350
351		vdd_s1-supply = <&vph_pwr>;
352		vdd_s2-supply = <&vph_pwr>;
353		vdd_s3_s4-supply = <&vph_pwr>;
354		vdd_s5-supply = <&vph_pwr>;
355		vdd_s6-supply = <&vph_pwr>;
356
357		vdd_l1_l9_l10-supply = <&vreg_s2b_1p05>;
358		vdd_l2-supply = <&vreg_bob>;
359		vdd_l3_l5_l7_l8-supply = <&vreg_bob>;
360		vdd_l4_l6-supply = <&vreg_bob>;
361		vdd_bob-supply = <&vph_pwr>;
362
363		vreg_s2b_1p05: s2 {
364			regulator-min-microvolt = <1050000>;
365			regulator-max-microvolt = <1050000>;
366			regulator-enable-ramp-delay = <200>;
367			regulator-ramp-delay = <0>;
368		};
369
370		vreg_l1b_0p925: l1 {
371			regulator-min-microvolt = <800000>;
372			regulator-max-microvolt = <925000>;
373			regulator-enable-ramp-delay = <250>;
374			regulator-allow-set-load;
375		};
376
377		vreg_l2b_2p95: l2 {
378			regulator-min-microvolt = <1648000>;
379			regulator-max-microvolt = <3100000>;
380			regulator-enable-ramp-delay = <250>;
381			regulator-ramp-delay = <0>;
382			regulator-allow-set-load;
383		};
384
385		vreg_l4b_2p95: l4 {
386			regulator-min-microvolt = <2944000>;
387			regulator-max-microvolt = <2952000>;
388			regulator-enable-ramp-delay = <250>;
389			regulator-ramp-delay = <0>;
390
391			regulator-min-microamp = <200>;
392			regulator-max-microamp = <600000>;
393			regulator-system-load = <570000>;
394			regulator-allow-set-load;
395		};
396
397		/*
398		 * Downstream specifies a range of 1721-3600mV,
399		 * but the only assigned consumers are SDHCI2 VMMC
400		 * and Coresight QPDI that both request pinned 2.95V.
401		 * Tighten the range to 1.8-3.328 (closest to 3.3) to
402		 * make the mmc driver happy.
403		 */
404		vreg_l5b_2p95: l5 {
405			regulator-min-microvolt = <1800000>;
406			regulator-max-microvolt = <3328000>;
407			regulator-enable-ramp-delay = <250>;
408			regulator-system-load = <800000>;
409			regulator-ramp-delay = <0>;
410			regulator-allow-set-load;
411		};
412
413		vreg_l7b_3p125: l7 {
414			regulator-min-microvolt = <2700000>;
415			regulator-max-microvolt = <3125000>;
416			regulator-enable-ramp-delay = <250>;
417		};
418
419		vreg_l8b_3p3: l8 {
420			regulator-min-microvolt = <2800000>;
421			regulator-max-microvolt = <3400000>;
422			regulator-enable-ramp-delay = <250>;
423			regulator-ramp-delay = <0>;
424		};
425
426		vreg_bob: bob {
427			regulator-min-microvolt = <3300000>;
428			regulator-max-microvolt = <3624000>;
429			regulator-enable-ramp-delay = <500>;
430			regulator-ramp-delay = <0>;
431		};
432	};
433};
434
435&sdc2_state_on {
436	sd-cd-pins {
437		pins = "gpio54";
438		function = "gpio";
439		bias-pull-up;
440		drive-strength = <2>;
441	};
442};
443
444&sdc2_state_off {
445	sd-cd-pins {
446		pins = "gpio54";
447		function = "gpio";
448		bias-disable;
449		drive-strength = <2>;
450	};
451};
452
453&sdhc_1 {
454	status = "okay";
455	supports-cqe;
456
457	vmmc-supply = <&vreg_l4b_2p95>;
458	vqmmc-supply = <&vreg_l8a_1p8>;
459
460	mmc-ddr-1_8v;
461	mmc-hs400-1_8v;
462	mmc-hs400-enhanced-strobe;
463};
464
465&sdhc_2 {
466	status = "okay";
467
468	vmmc-supply = <&vreg_l5b_2p95>;
469	vqmmc-supply = <&vreg_l2b_2p95>;
470
471	cd-gpios = <&tlmm 54 GPIO_ACTIVE_LOW>;
472	no-sdio;
473	no-mmc;
474};
475
476&tlmm {
477	gpio-reserved-ranges = <0 4>, <8 4>;
478};
479
480&usb2 {
481	status = "okay";
482};
483
484&usb2_dwc3 {
485	dr_mode = "host";
486};
487
488&usb3 {
489	status = "okay";
490};
491
492&usb3_dwc3 {
493	dr_mode = "peripheral";
494	extcon = <&extcon_usb>;
495};
496
497&usb3_qmpphy {
498	vdda-phy-supply = <&vreg_l1b_0p925>;
499	vdda-pll-supply = <&vreg_l10a_1p8>;
500	status = "okay";
501};
502
503&wifi {
504	vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
505	vdd-1.8-xo-supply = <&vreg_l9a_1p8>;
506	vdd-1.3-rfa-supply = <&vreg_l6a_1p3>;
507	vdd-3.3-ch0-supply = <&vreg_l19a_3p3>;
508	vdd-3.3-ch1-supply = <&vreg_l8b_3p3>;
509
510	qcom,ath10k-calibration-variant = "Inforce_IFC6560";
511
512	status = "okay";
513};
514