xref: /linux/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts (revision f85f5ae45ad945270a8884261de8249431e8b5a6)
1// SPDX-License-Identifier: BSD-3-Clause
2/*
3 * Copyright (c) 2021, The Linux Foundation. All rights reserved.
4 * Copyright (c) 2022, Linaro Limited
5 */
6
7/dts-v1/;
8
9#include <dt-bindings/gpio/gpio.h>
10#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11
12#include "sc8280xp.dtsi"
13#include "sc8280xp-pmics.dtsi"
14
15/ {
16	model = "Qualcomm SC8280XP CRD";
17	compatible = "qcom,sc8280xp-crd", "qcom,sc8280xp";
18
19	aliases {
20		i2c4 = &i2c4;
21		i2c21 = &i2c21;
22		serial0 = &uart17;
23	};
24
25	backlight: backlight {
26		compatible = "pwm-backlight";
27		pwms = <&pmc8280c_lpg 3 1000000>;
28		enable-gpios = <&pmc8280_1_gpios 8 GPIO_ACTIVE_HIGH>;
29		power-supply = <&vreg_edp_bl>;
30
31		pinctrl-names = "default";
32		pinctrl-0 = <&edp_bl_en>, <&edp_bl_pwm>;
33	};
34
35	chosen {
36		stdout-path = "serial0:115200n8";
37	};
38
39	pmic-glink {
40		compatible = "qcom,sc8280xp-pmic-glink", "qcom,pmic-glink";
41
42		#address-cells = <1>;
43		#size-cells = <0>;
44
45		connector@0 {
46			compatible = "usb-c-connector";
47			reg = <0>;
48			power-role = "dual";
49			data-role = "dual";
50
51			ports {
52				#address-cells = <1>;
53				#size-cells = <0>;
54
55				port@0 {
56					reg = <0>;
57
58					pmic_glink_con0_hs: endpoint {
59						remote-endpoint = <&usb_0_role_switch>;
60					};
61				};
62
63				port@1 {
64					reg = <1>;
65
66					pmic_glink_con0_ss: endpoint {
67						remote-endpoint = <&usb_0_qmpphy_out>;
68					};
69				};
70
71				port@2 {
72					reg = <2>;
73
74					pmic_glink_con0_sbu: endpoint {
75						remote-endpoint = <&usb0_sbu_mux>;
76					};
77				};
78			};
79		};
80
81		connector@1 {
82			compatible = "usb-c-connector";
83			reg = <1>;
84			power-role = "dual";
85			data-role = "dual";
86
87			ports {
88				#address-cells = <1>;
89				#size-cells = <0>;
90				port@0 {
91					reg = <0>;
92
93					pmic_glink_con1_hs: endpoint {
94						remote-endpoint = <&usb_1_role_switch>;
95					};
96				};
97
98				port@1 {
99					reg = <1>;
100
101					pmic_glink_con1_ss: endpoint {
102						remote-endpoint = <&usb_1_qmpphy_out>;
103					};
104				};
105
106				port@2 {
107					reg = <2>;
108
109					pmic_glink_con1_sbu: endpoint {
110						remote-endpoint = <&usb1_sbu_mux>;
111					};
112				};
113			};
114		};
115	};
116
117	vreg_edp_3p3: regulator-edp-3p3 {
118		compatible = "regulator-fixed";
119
120		regulator-name = "VREG_EDP_3P3";
121		regulator-min-microvolt = <3300000>;
122		regulator-max-microvolt = <3300000>;
123
124		gpio = <&tlmm 25 GPIO_ACTIVE_HIGH>;
125		enable-active-high;
126
127		pinctrl-names = "default";
128		pinctrl-0 = <&edp_reg_en>;
129
130		regulator-boot-on;
131	};
132
133	vreg_edp_bl: regulator-edp-bl {
134		compatible = "regulator-fixed";
135
136		regulator-name = "VREG_EDP_BL";
137		regulator-min-microvolt = <3600000>;
138		regulator-max-microvolt = <3600000>;
139
140		gpio = <&pmc8280_1_gpios 9 GPIO_ACTIVE_HIGH>;
141		enable-active-high;
142
143		pinctrl-names = "default";
144		pinctrl-0 = <&edp_bl_reg_en>;
145
146		regulator-boot-on;
147	};
148
149	vreg_nvme: regulator-nvme {
150		compatible = "regulator-fixed";
151
152		regulator-name = "VREG_NVME_3P3";
153		regulator-min-microvolt = <3300000>;
154		regulator-max-microvolt = <3300000>;
155
156		gpio = <&tlmm 135 GPIO_ACTIVE_HIGH>;
157		enable-active-high;
158
159		pinctrl-names = "default";
160		pinctrl-0 = <&nvme_reg_en>;
161	};
162
163	vreg_misc_3p3: regulator-misc-3p3 {
164		compatible = "regulator-fixed";
165
166		regulator-name = "VREG_MISC_3P3";
167		regulator-min-microvolt = <3300000>;
168		regulator-max-microvolt = <3300000>;
169
170		gpio = <&pmc8280_1_gpios 2 GPIO_ACTIVE_HIGH>;
171		enable-active-high;
172
173		pinctrl-names = "default";
174		pinctrl-0 = <&misc_3p3_reg_en>;
175
176		regulator-boot-on;
177		regulator-always-on;
178	};
179
180	vreg_wlan: regulator-wlan {
181		compatible = "regulator-fixed";
182
183		regulator-name = "VPH_PWR_WLAN";
184		regulator-min-microvolt = <3900000>;
185		regulator-max-microvolt = <3900000>;
186
187		gpio = <&pmr735a_gpios 1 GPIO_ACTIVE_HIGH>;
188		enable-active-high;
189
190		pinctrl-names = "default";
191		pinctrl-0 = <&hastings_reg_en>;
192
193		regulator-boot-on;
194	};
195
196	vreg_wwan: regulator-wwan {
197		compatible = "regulator-fixed";
198
199		regulator-name = "SDX_VPH_PWR";
200		regulator-min-microvolt = <3300000>;
201		regulator-max-microvolt = <3300000>;
202
203		gpio = <&pmc8280_2_gpios 1 GPIO_ACTIVE_HIGH>;
204		enable-active-high;
205
206		pinctrl-names = "default";
207		pinctrl-0 = <&wwan_sw_en>;
208
209		regulator-boot-on;
210	};
211
212	reserved-memory {
213		gpu_mem: gpu-mem@8bf00000 {
214			reg = <0 0x8bf00000 0 0x2000>;
215			no-map;
216		};
217
218		linux,cma {
219			compatible = "shared-dma-pool";
220			size = <0x0 0x8000000>;
221			reusable;
222			linux,cma-default;
223		};
224	};
225
226	usb0-sbu-mux {
227		compatible = "pericom,pi3usb102", "gpio-sbu-mux";
228
229		enable-gpios = <&tlmm 101 GPIO_ACTIVE_LOW>;
230		select-gpios = <&tlmm 164 GPIO_ACTIVE_HIGH>;
231
232		pinctrl-names = "default";
233		pinctrl-0 = <&usb0_sbu_default>;
234
235		mode-switch;
236		orientation-switch;
237
238		port {
239			usb0_sbu_mux: endpoint {
240				remote-endpoint = <&pmic_glink_con0_sbu>;
241			};
242		};
243	};
244
245	usb1-sbu-mux {
246		compatible = "pericom,pi3usb102", "gpio-sbu-mux";
247
248		enable-gpios = <&tlmm 48 GPIO_ACTIVE_LOW>;
249		select-gpios = <&tlmm 47 GPIO_ACTIVE_HIGH>;
250
251		pinctrl-names = "default";
252		pinctrl-0 = <&usb1_sbu_default>;
253
254		mode-switch;
255		orientation-switch;
256
257		port {
258			usb1_sbu_mux: endpoint {
259				remote-endpoint = <&pmic_glink_con1_sbu>;
260			};
261		};
262	};
263};
264
265&apps_rsc {
266	regulators-0 {
267		compatible = "qcom,pm8350-rpmh-regulators";
268		qcom,pmic-id = "b";
269
270		vdd-l3-l5-supply = <&vreg_s11b>;
271
272		vreg_s11b: smps11 {
273			regulator-name = "vreg_s11b";
274			regulator-min-microvolt = <1272000>;
275			regulator-max-microvolt = <1272000>;
276			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
277		};
278
279		vreg_l3b: ldo3 {
280			regulator-name = "vreg_l3b";
281			regulator-min-microvolt = <1200000>;
282			regulator-max-microvolt = <1200000>;
283			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
284			regulator-boot-on;
285		};
286
287		vreg_l4b: ldo4 {
288			regulator-name = "vreg_l4b";
289			regulator-min-microvolt = <912000>;
290			regulator-max-microvolt = <912000>;
291			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
292		};
293
294		vreg_l6b: ldo6 {
295			regulator-name = "vreg_l6b";
296			regulator-min-microvolt = <880000>;
297			regulator-max-microvolt = <880000>;
298			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
299			regulator-boot-on;
300		};
301	};
302
303	regulators-1 {
304		compatible = "qcom,pm8350c-rpmh-regulators";
305		qcom,pmic-id = "c";
306
307		vreg_l1c: ldo1 {
308			regulator-name = "vreg_l1c";
309			regulator-min-microvolt = <1800000>;
310			regulator-max-microvolt = <1800000>;
311			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
312		};
313
314		vreg_l6c: ldo6 {
315			regulator-name = "vreg_l6c";
316			regulator-min-microvolt = <1800000>;
317			regulator-max-microvolt = <2960000>;
318			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
319		};
320
321		vreg_l7c: ldo7 {
322			regulator-name = "vreg_l7c";
323			regulator-min-microvolt = <2504000>;
324			regulator-max-microvolt = <2504000>;
325			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
326			regulator-allow-set-load;
327			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
328						   RPMH_REGULATOR_MODE_HPM>;
329		};
330
331		vreg_l9c: ldo9 {
332			regulator-name = "vreg_l9c";
333			regulator-min-microvolt = <2960000>;
334			regulator-max-microvolt = <2960000>;
335			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
336		};
337
338		vreg_l13c: ldo13 {
339			regulator-name = "vreg_l13c";
340			regulator-min-microvolt = <3072000>;
341			regulator-max-microvolt = <3072000>;
342			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
343		};
344	};
345
346	regulators-2 {
347		compatible = "qcom,pm8350-rpmh-regulators";
348		qcom,pmic-id = "d";
349
350		vdd-l1-l4-supply = <&vreg_s11b>;
351
352		vreg_l3d: ldo3 {
353			regulator-name = "vreg_l3d";
354			regulator-min-microvolt = <1200000>;
355			regulator-max-microvolt = <1200000>;
356			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
357			regulator-allow-set-load;
358			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
359						   RPMH_REGULATOR_MODE_HPM>;
360		};
361
362		vreg_l4d: ldo4 {
363			regulator-name = "vreg_l4d";
364			regulator-min-microvolt = <1200000>;
365			regulator-max-microvolt = <1200000>;
366			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
367		};
368
369		vreg_l6d: ldo6 {
370			regulator-name = "vreg_l6d";
371			regulator-min-microvolt = <880000>;
372			regulator-max-microvolt = <880000>;
373			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
374		};
375
376		vreg_l7d: ldo7 {
377			regulator-name = "vreg_l7d";
378			regulator-min-microvolt = <3072000>;
379			regulator-max-microvolt = <3072000>;
380			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
381		};
382
383		vreg_l9d: ldo9 {
384			regulator-name = "vreg_l9d";
385			regulator-min-microvolt = <912000>;
386			regulator-max-microvolt = <912000>;
387			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
388		};
389	};
390};
391
392&dispcc0 {
393	status = "okay";
394};
395
396&gpu {
397	status = "okay";
398
399	zap-shader {
400		memory-region = <&gpu_mem>;
401		firmware-name = "qcom/sc8280xp/qcdxkmsuc8280.mbn";
402	};
403};
404
405&mdss0 {
406	status = "okay";
407};
408
409&mdss0_dp0 {
410	status = "okay";
411};
412
413&mdss0_dp0_out {
414	data-lanes = <0 1>;
415	remote-endpoint = <&usb_0_qmpphy_dp_in>;
416};
417
418&mdss0_dp1 {
419	status = "okay";
420};
421
422&mdss0_dp1_out {
423	data-lanes = <0 1>;
424	remote-endpoint = <&usb_1_qmpphy_dp_in>;
425};
426
427&mdss0_dp3 {
428	compatible = "qcom,sc8280xp-edp";
429	/delete-property/ #sound-dai-cells;
430
431	data-lanes = <0 1 2 3>;
432
433	status = "okay";
434
435	aux-bus {
436		panel {
437			compatible = "edp-panel";
438			power-supply = <&vreg_edp_3p3>;
439
440			backlight = <&backlight>;
441
442			port {
443				edp_panel_in: endpoint {
444					remote-endpoint = <&mdss0_dp3_out>;
445				};
446			};
447		};
448	};
449
450	ports {
451		port@1 {
452			reg = <1>;
453			mdss0_dp3_out: endpoint {
454				remote-endpoint = <&edp_panel_in>;
455			};
456		};
457	};
458};
459
460&mdss0_dp3_phy {
461	vdda-phy-supply = <&vreg_l6b>;
462	vdda-pll-supply = <&vreg_l3b>;
463
464	status = "okay";
465};
466
467&i2c4 {
468	clock-frequency = <400000>;
469
470	pinctrl-names = "default";
471	pinctrl-0 = <&i2c4_default>;
472
473	status = "okay";
474
475	touchscreen@10 {
476		compatible = "hid-over-i2c";
477		reg = <0x10>;
478
479		hid-descr-addr = <0x1>;
480		interrupts-extended = <&tlmm 175 IRQ_TYPE_LEVEL_LOW>;
481		vdd-supply = <&vreg_misc_3p3>;
482
483		pinctrl-names = "default";
484		pinctrl-0 = <&ts0_default>;
485	};
486};
487
488&i2c21 {
489	clock-frequency = <400000>;
490
491	pinctrl-names = "default";
492	pinctrl-0 = <&i2c21_default>;
493
494	status = "okay";
495
496	touchpad@15 {
497		compatible = "hid-over-i2c";
498		reg = <0x15>;
499
500		hid-descr-addr = <0x1>;
501		interrupts-extended = <&tlmm 182 IRQ_TYPE_LEVEL_LOW>;
502		vdd-supply = <&vreg_misc_3p3>;
503
504		pinctrl-names = "default";
505		pinctrl-0 = <&tpad_default>;
506
507		wakeup-source;
508	};
509
510	keyboard@68 {
511		compatible = "hid-over-i2c";
512		reg = <0x68>;
513
514		hid-descr-addr = <0x1>;
515		interrupts-extended = <&tlmm 104 IRQ_TYPE_LEVEL_LOW>;
516		vdd-supply = <&vreg_misc_3p3>;
517
518		pinctrl-names = "default";
519		pinctrl-0 = <&kybd_default>;
520
521		wakeup-source;
522	};
523};
524
525&pcie2a {
526	perst-gpios = <&tlmm 143 GPIO_ACTIVE_LOW>;
527	wake-gpios = <&tlmm 145 GPIO_ACTIVE_LOW>;
528
529	vddpe-3v3-supply = <&vreg_nvme>;
530
531	pinctrl-names = "default";
532	pinctrl-0 = <&pcie2a_default>;
533
534	status = "okay";
535};
536
537&pcie2a_phy {
538	vdda-phy-supply = <&vreg_l6d>;
539	vdda-pll-supply = <&vreg_l4d>;
540
541	status = "okay";
542};
543
544&pcie3a {
545	perst-gpios = <&tlmm 151 GPIO_ACTIVE_LOW>;
546	wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>;
547
548	vddpe-3v3-supply = <&vreg_wwan>;
549
550	pinctrl-names = "default";
551	pinctrl-0 = <&pcie3a_default>;
552
553	status = "okay";
554};
555
556&pcie3a_phy {
557	vdda-phy-supply = <&vreg_l6d>;
558	vdda-pll-supply = <&vreg_l4d>;
559
560	status = "okay";
561};
562
563&pcie4 {
564	perst-gpios = <&tlmm 141 GPIO_ACTIVE_LOW>;
565	wake-gpios = <&tlmm 139 GPIO_ACTIVE_LOW>;
566
567	vddpe-3v3-supply = <&vreg_wlan>;
568
569	pinctrl-names = "default";
570	pinctrl-0 = <&pcie4_default>;
571
572	status = "okay";
573};
574
575&pcie4_phy {
576	vdda-phy-supply = <&vreg_l6d>;
577	vdda-pll-supply = <&vreg_l4d>;
578
579	status = "okay";
580};
581
582&pmc8280c_lpg {
583	status = "okay";
584};
585
586&pmk8280_pon_pwrkey {
587	status = "okay";
588};
589
590&pmk8280_rtc {
591	nvmem-cells = <&rtc_offset>;
592	nvmem-cell-names = "offset";
593
594	status = "okay";
595};
596
597&pmk8280_sdam_6 {
598	status = "okay";
599
600	rtc_offset: rtc-offset@bc {
601		reg = <0xbc 0x4>;
602	};
603};
604
605&qup0 {
606	status = "okay";
607};
608
609&qup1 {
610	status = "okay";
611};
612
613&qup2 {
614	status = "okay";
615};
616
617&remoteproc_adsp {
618	firmware-name = "qcom/sc8280xp/qcadsp8280.mbn";
619
620	status = "okay";
621};
622
623&remoteproc_nsp0 {
624	firmware-name = "qcom/sc8280xp/qccdsp8280.mbn";
625
626	status = "okay";
627};
628
629&sdc2 {
630	pinctrl-0 = <&sdc2_default_state>;
631	pinctrl-1 = <&sdc2_sleep_state>;
632	pinctrl-names = "default", "sleep";
633
634	vmmc-supply = <&vreg_l9c>;
635	vqmmc-supply = <&vreg_l6c>;
636
637	cd-gpios = <&tlmm 131 GPIO_ACTIVE_LOW>;
638
639	status = "okay";
640};
641
642&uart17 {
643	compatible = "qcom,geni-debug-uart";
644
645	status = "okay";
646};
647
648&ufs_mem_hc {
649	reset-gpios = <&tlmm 228 GPIO_ACTIVE_LOW>;
650
651	vcc-supply = <&vreg_l7c>;
652	vcc-max-microamp = <800000>;
653	vccq-supply = <&vreg_l3d>;
654	vccq-max-microamp = <900000>;
655
656	status = "okay";
657};
658
659&ufs_mem_phy {
660	vdda-phy-supply = <&vreg_l6b>;
661	vdda-pll-supply = <&vreg_l3b>;
662
663	status = "okay";
664};
665
666&usb_0 {
667	status = "okay";
668};
669
670&usb_0_dwc3 {
671	dr_mode = "host";
672};
673
674&usb_0_hsphy {
675	vdda-pll-supply = <&vreg_l9d>;
676	vdda18-supply = <&vreg_l1c>;
677	vdda33-supply = <&vreg_l7d>;
678
679	status = "okay";
680};
681
682&usb_0_qmpphy {
683	vdda-phy-supply = <&vreg_l9d>;
684	vdda-pll-supply = <&vreg_l4d>;
685
686	orientation-switch;
687
688	status = "okay";
689};
690
691&usb_0_qmpphy_dp_in {
692	remote-endpoint = <&mdss0_dp0_out>;
693};
694
695&usb_0_qmpphy_out {
696	remote-endpoint = <&pmic_glink_con0_ss>;
697};
698
699&usb_0_role_switch {
700	remote-endpoint = <&pmic_glink_con0_hs>;
701};
702
703&usb_1 {
704	status = "okay";
705};
706
707&usb_1_dwc3 {
708	dr_mode = "host";
709};
710
711&usb_1_hsphy {
712	vdda-pll-supply = <&vreg_l4b>;
713	vdda18-supply = <&vreg_l1c>;
714	vdda33-supply = <&vreg_l13c>;
715
716	status = "okay";
717};
718
719&usb_1_qmpphy {
720	vdda-phy-supply = <&vreg_l4b>;
721	vdda-pll-supply = <&vreg_l3b>;
722
723	orientation-switch;
724
725	status = "okay";
726};
727
728&usb_1_qmpphy_dp_in {
729	remote-endpoint = <&mdss0_dp1_out>;
730};
731
732&usb_1_qmpphy_out {
733	remote-endpoint = <&pmic_glink_con1_ss>;
734};
735
736&usb_1_role_switch {
737	remote-endpoint = <&pmic_glink_con1_hs>;
738};
739
740&xo_board_clk {
741	clock-frequency = <38400000>;
742};
743
744/* PINCTRL - additions to nodes defined in sc8280xp.dtsi */
745
746&pmc8280_1_gpios {
747	edp_bl_en: edp-bl-en-state {
748		pins = "gpio8";
749		function = "normal";
750	};
751
752	edp_bl_reg_en: edp-bl-reg-en-state {
753		pins = "gpio9";
754		function = "normal";
755	};
756
757	misc_3p3_reg_en: misc-3p3-reg-en-state {
758		pins = "gpio2";
759		function = "normal";
760	};
761};
762
763&pmc8280_2_gpios {
764	wwan_sw_en: wwan-sw-en-state {
765		pins = "gpio1";
766		function = "normal";
767	};
768};
769
770&pmc8280c_gpios {
771	edp_bl_pwm: edp-bl-pwm-state {
772		pins = "gpio8";
773		function = "func1";
774	};
775};
776
777&pmr735a_gpios {
778	hastings_reg_en: hastings-reg-en-state {
779		pins = "gpio1";
780		function = "normal";
781	};
782};
783
784&tlmm {
785	gpio-reserved-ranges = <74 6>, <83 4>, <125 2>, <128 2>, <154 7>;
786
787	edp_reg_en: edp-reg-en-state {
788		pins = "gpio25";
789		function = "gpio";
790		drive-strength = <16>;
791		bias-disable;
792	};
793
794	i2c4_default: i2c4-default-state {
795		pins = "gpio171", "gpio172";
796		function = "qup4";
797		drive-strength = <16>;
798		bias-disable;
799	};
800
801	i2c21_default: i2c21-default-state {
802		pins = "gpio81", "gpio82";
803		function = "qup21";
804		drive-strength = <16>;
805		bias-disable;
806	};
807
808	kybd_default: kybd-default-state {
809		disable-pins {
810			pins = "gpio102";
811			function = "gpio";
812			output-low;
813		};
814
815		int-n-pins {
816			pins = "gpio104";
817			function = "gpio";
818			bias-disable;
819		};
820
821		reset-pins {
822			pins = "gpio105";
823			function = "gpio";
824			bias-disable;
825		};
826	};
827
828	nvme_reg_en: nvme-reg-en-state {
829		pins = "gpio135";
830		function = "gpio";
831		drive-strength = <2>;
832		bias-disable;
833	};
834
835	pcie2a_default: pcie2a-default-state {
836		clkreq-n-pins {
837			pins = "gpio142";
838			function = "pcie2a_clkreq";
839			drive-strength = <2>;
840			bias-pull-up;
841		};
842
843		perst-n-pins {
844			pins = "gpio143";
845			function = "gpio";
846			drive-strength = <2>;
847			bias-pull-down;
848		};
849
850		wake-n-pins {
851		       pins = "gpio145";
852		       function = "gpio";
853		       drive-strength = <2>;
854		       bias-pull-up;
855	       };
856	};
857
858	pcie3a_default: pcie3a-default-state {
859		clkreq-n-pins {
860			pins = "gpio150";
861			function = "pcie3a_clkreq";
862			drive-strength = <2>;
863			bias-pull-up;
864		};
865
866		perst-n-pins {
867			pins = "gpio151";
868			function = "gpio";
869			drive-strength = <2>;
870			bias-pull-down;
871		};
872
873		wake-n-pins {
874			pins = "gpio148";
875			function = "gpio";
876			drive-strength = <2>;
877			bias-pull-up;
878		};
879	};
880
881	pcie4_default: pcie4-default-state {
882		clkreq-n-pins {
883			pins = "gpio140";
884			function = "pcie4_clkreq";
885			drive-strength = <2>;
886			bias-pull-up;
887		};
888
889		perst-n-pins {
890			pins = "gpio141";
891			function = "gpio";
892			drive-strength = <2>;
893			bias-pull-down;
894		};
895
896		wake-n-pins {
897			pins = "gpio139";
898			function = "gpio";
899			drive-strength = <2>;
900			bias-pull-up;
901		};
902	};
903
904	sdc2_default_state: sdc2-default-state {
905		clk-pins {
906			pins = "sdc2_clk";
907			drive-strength = <16>;
908			bias-disable;
909		};
910
911		cmd-pins {
912			pins = "sdc2_cmd";
913			drive-strength = <16>;
914			bias-pull-up;
915		};
916
917		data-pins {
918			pins = "sdc2_data";
919			drive-strength = <16>;
920			bias-pull-up;
921		};
922
923		card-detect-pins {
924			pins = "gpio131";
925			function = "gpio";
926			drive-strength = <2>;
927			bias-disable;
928		};
929	};
930
931	sdc2_sleep_state: sdc2-sleep-state {
932		clk-pins {
933			pins = "sdc2_clk";
934			drive-strength = <2>;
935			bias-disable;
936		};
937
938		cmd-pins {
939			pins = "sdc2_cmd";
940			drive-strength = <2>;
941			bias-pull-up;
942		};
943
944		data-pins {
945			pins = "sdc2_data";
946			drive-strength = <2>;
947			bias-pull-up;
948		};
949
950		card-detect-pins {
951			pins = "gpio131";
952			function = "gpio";
953			drive-strength = <2>;
954			bias-disable;
955		};
956	};
957
958	tpad_default: tpad-default-state {
959		int-n-pins {
960			pins = "gpio182";
961			function = "gpio";
962			bias-disable;
963		};
964	};
965
966	ts0_default: ts0-default-state {
967		int-n-pins {
968			pins = "gpio175";
969			function = "gpio";
970			bias-disable;
971		};
972
973		reset-n-pins {
974			pins = "gpio99";
975			function = "gpio";
976			output-high;
977			drive-strength = <16>;
978		};
979	};
980
981	usb0_sbu_default: usb0-sbu-state {
982		oe-n-pins {
983			pins = "gpio101";
984			function = "gpio";
985			bias-disable;
986			drive-strength = <16>;
987			output-high;
988		};
989
990		sel-pins {
991			pins = "gpio164";
992			function = "gpio";
993			bias-disable;
994			drive-strength = <16>;
995		};
996
997		mode-pins {
998			pins = "gpio167";
999			function = "gpio";
1000			bias-disable;
1001			drive-strength = <16>;
1002			output-high;
1003		};
1004	};
1005
1006	usb1_sbu_default: usb1-sbu-state {
1007		oe-n-pins {
1008			pins = "gpio48";
1009			function = "gpio";
1010			bias-disable;
1011			drive-strength = <16>;
1012			output-high;
1013		};
1014
1015		sel-pins {
1016			pins = "gpio47";
1017			function = "gpio";
1018			bias-disable;
1019			drive-strength = <16>;
1020		};
1021
1022		mode-pins {
1023			pins = "gpio50";
1024			function = "gpio";
1025			bias-disable;
1026			drive-strength = <16>;
1027			output-high;
1028		};
1029	};
1030};
1031