xref: /linux/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts (revision d6053666ef2b6631ef8f265f49ff2cc0f4d45c50)
1// SPDX-License-Identifier: BSD-3-Clause
2/*
3 * Copyright (c) 2021, The Linux Foundation. All rights reserved.
4 * Copyright (c) 2022, Linaro Limited
5 */
6
7/dts-v1/;
8
9#include <dt-bindings/gpio/gpio.h>
10#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11
12#include "sc8280xp.dtsi"
13#include "sc8280xp-pmics.dtsi"
14
15/ {
16	model = "Qualcomm SC8280XP CRD";
17	compatible = "qcom,sc8280xp-crd", "qcom,sc8280xp";
18
19	aliases {
20		i2c4 = &i2c4;
21		i2c21 = &i2c21;
22		serial0 = &uart17;
23	};
24
25	backlight: backlight {
26		compatible = "pwm-backlight";
27		pwms = <&pmc8280c_lpg 3 1000000>;
28		enable-gpios = <&pmc8280_1_gpios 8 GPIO_ACTIVE_HIGH>;
29		power-supply = <&vreg_edp_bl>;
30
31		pinctrl-names = "default";
32		pinctrl-0 = <&edp_bl_en>, <&edp_bl_pwm>;
33	};
34
35	chosen {
36		stdout-path = "serial0:115200n8";
37	};
38
39	pmic-glink {
40		compatible = "qcom,sc8280xp-pmic-glink", "qcom,pmic-glink";
41
42		#address-cells = <1>;
43		#size-cells = <0>;
44
45		connector@0 {
46			compatible = "usb-c-connector";
47			reg = <0>;
48			power-role = "dual";
49			data-role = "dual";
50
51			ports {
52				#address-cells = <1>;
53				#size-cells = <0>;
54
55				port@0 {
56					reg = <0>;
57
58					pmic_glink_con0_hs: endpoint {
59						remote-endpoint = <&usb_0_role_switch>;
60					};
61				};
62
63				port@1 {
64					reg = <1>;
65
66					pmic_glink_con0_ss: endpoint {
67						remote-endpoint = <&mdss0_dp0_out>;
68					};
69				};
70
71				port@2 {
72					reg = <2>;
73
74					pmic_glink_con0_sbu: endpoint {
75						remote-endpoint = <&usb0_sbu_mux>;
76					};
77				};
78			};
79		};
80
81		connector@1 {
82			compatible = "usb-c-connector";
83			reg = <1>;
84			power-role = "dual";
85			data-role = "dual";
86
87			ports {
88				#address-cells = <1>;
89				#size-cells = <0>;
90				port@0 {
91					reg = <0>;
92
93					pmic_glink_con1_hs: endpoint {
94						remote-endpoint = <&usb_1_role_switch>;
95					};
96				};
97
98				port@1 {
99					reg = <1>;
100
101					pmic_glink_con1_ss: endpoint {
102						remote-endpoint = <&mdss0_dp1_out>;
103					};
104				};
105
106				port@2 {
107					reg = <2>;
108
109					pmic_glink_con1_sbu: endpoint {
110						remote-endpoint = <&usb1_sbu_mux>;
111					};
112				};
113			};
114		};
115	};
116
117	vreg_edp_3p3: regulator-edp-3p3 {
118		compatible = "regulator-fixed";
119
120		regulator-name = "VREG_EDP_3P3";
121		regulator-min-microvolt = <3300000>;
122		regulator-max-microvolt = <3300000>;
123
124		gpio = <&tlmm 25 GPIO_ACTIVE_HIGH>;
125		enable-active-high;
126
127		pinctrl-names = "default";
128		pinctrl-0 = <&edp_reg_en>;
129
130		regulator-boot-on;
131	};
132
133	vreg_edp_bl: regulator-edp-bl {
134		compatible = "regulator-fixed";
135
136		regulator-name = "VBL9";
137		regulator-min-microvolt = <3600000>;
138		regulator-max-microvolt = <3600000>;
139
140		gpio = <&pmc8280_1_gpios 9 GPIO_ACTIVE_HIGH>;
141		enable-active-high;
142
143		pinctrl-names = "default";
144		pinctrl-0 = <&edp_bl_reg_en>;
145
146		regulator-boot-on;
147	};
148
149	vreg_nvme: regulator-nvme {
150		compatible = "regulator-fixed";
151
152		regulator-name = "VCC3_SSD";
153		regulator-min-microvolt = <3300000>;
154		regulator-max-microvolt = <3300000>;
155
156		gpio = <&tlmm 135 GPIO_ACTIVE_HIGH>;
157		enable-active-high;
158
159		pinctrl-names = "default";
160		pinctrl-0 = <&nvme_reg_en>;
161	};
162
163	vreg_misc_3p3: regulator-misc-3p3 {
164		compatible = "regulator-fixed";
165
166		regulator-name = "VCC3B";
167		regulator-min-microvolt = <3300000>;
168		regulator-max-microvolt = <3300000>;
169
170		gpio = <&pmc8280_1_gpios 1 GPIO_ACTIVE_HIGH>;
171		enable-active-high;
172
173		pinctrl-names = "default";
174		pinctrl-0 = <&misc_3p3_reg_en>;
175
176		regulator-boot-on;
177		regulator-always-on;
178	};
179
180	vreg_wlan: regulator-wlan {
181		compatible = "regulator-fixed";
182
183		regulator-name = "VCC_WLAN_3R9";
184		regulator-min-microvolt = <3900000>;
185		regulator-max-microvolt = <3900000>;
186
187		gpio = <&pmr735a_gpios 1 GPIO_ACTIVE_HIGH>;
188		enable-active-high;
189
190		pinctrl-names = "default";
191		pinctrl-0 = <&hastings_reg_en>;
192
193		regulator-boot-on;
194	};
195
196	vreg_wwan: regulator-wwan {
197		compatible = "regulator-fixed";
198
199		regulator-name = "VCC3B_WAN";
200		regulator-min-microvolt = <3300000>;
201		regulator-max-microvolt = <3300000>;
202
203		gpio = <&pmc8280_2_gpios 1 GPIO_ACTIVE_HIGH>;
204		enable-active-high;
205
206		pinctrl-names = "default";
207		pinctrl-0 = <&wwan_sw_en>;
208
209		regulator-boot-on;
210	};
211
212	reserved-memory {
213		linux,cma {
214			compatible = "shared-dma-pool";
215			size = <0x0 0x8000000>;
216			reusable;
217			linux,cma-default;
218		};
219	};
220
221	usb0-sbu-mux {
222		compatible = "pericom,pi3usb102", "gpio-sbu-mux";
223
224		enable-gpios = <&tlmm 101 GPIO_ACTIVE_LOW>;
225		select-gpios = <&tlmm 164 GPIO_ACTIVE_HIGH>;
226
227		pinctrl-names = "default";
228		pinctrl-0 = <&usb0_sbu_default>;
229
230		mode-switch;
231		orientation-switch;
232		svid = /bits/ 16 <0xff01>;
233
234		port {
235			usb0_sbu_mux: endpoint {
236				remote-endpoint = <&pmic_glink_con0_sbu>;
237			};
238		};
239	};
240
241	usb1-sbu-mux {
242		compatible = "pericom,pi3usb102", "gpio-sbu-mux";
243
244		enable-gpios = <&tlmm 48 GPIO_ACTIVE_LOW>;
245		select-gpios = <&tlmm 47 GPIO_ACTIVE_HIGH>;
246
247		pinctrl-names = "default";
248		pinctrl-0 = <&usb1_sbu_default>;
249
250		mode-switch;
251		orientation-switch;
252		svid = /bits/ 16 <0xff01>;
253
254		port {
255			usb1_sbu_mux: endpoint {
256				remote-endpoint = <&pmic_glink_con1_sbu>;
257			};
258		};
259	};
260};
261
262&apps_rsc {
263	regulators-0 {
264		compatible = "qcom,pm8350-rpmh-regulators";
265		qcom,pmic-id = "b";
266
267		vdd-l3-l5-supply = <&vreg_s11b>;
268
269		vreg_s11b: smps11 {
270			regulator-name = "vreg_s11b";
271			regulator-min-microvolt = <1272000>;
272			regulator-max-microvolt = <1272000>;
273			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
274		};
275
276		vreg_l3b: ldo3 {
277			regulator-name = "vreg_l3b";
278			regulator-min-microvolt = <1200000>;
279			regulator-max-microvolt = <1200000>;
280			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
281			regulator-boot-on;
282		};
283
284		vreg_l4b: ldo4 {
285			regulator-name = "vreg_l4b";
286			regulator-min-microvolt = <912000>;
287			regulator-max-microvolt = <912000>;
288			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
289		};
290
291		vreg_l6b: ldo6 {
292			regulator-name = "vreg_l6b";
293			regulator-min-microvolt = <880000>;
294			regulator-max-microvolt = <880000>;
295			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
296			regulator-boot-on;
297		};
298	};
299
300	regulators-1 {
301		compatible = "qcom,pm8350c-rpmh-regulators";
302		qcom,pmic-id = "c";
303
304		vreg_l1c: ldo1 {
305			regulator-name = "vreg_l1c";
306			regulator-min-microvolt = <1800000>;
307			regulator-max-microvolt = <1800000>;
308			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
309		};
310
311		vreg_l7c: ldo7 {
312			regulator-name = "vreg_l7c";
313			regulator-min-microvolt = <2504000>;
314			regulator-max-microvolt = <2504000>;
315			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
316			regulator-allow-set-load;
317			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
318						   RPMH_REGULATOR_MODE_HPM>;
319		};
320
321		vreg_l13c: ldo13 {
322			regulator-name = "vreg_l13c";
323			regulator-min-microvolt = <3072000>;
324			regulator-max-microvolt = <3072000>;
325			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
326		};
327	};
328
329	regulators-2 {
330		compatible = "qcom,pm8350-rpmh-regulators";
331		qcom,pmic-id = "d";
332
333		vdd-l1-l4-supply = <&vreg_s11b>;
334
335		vreg_l3d: ldo3 {
336			regulator-name = "vreg_l3d";
337			regulator-min-microvolt = <1200000>;
338			regulator-max-microvolt = <1200000>;
339			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
340			regulator-allow-set-load;
341			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
342						   RPMH_REGULATOR_MODE_HPM>;
343		};
344
345		vreg_l4d: ldo4 {
346			regulator-name = "vreg_l4d";
347			regulator-min-microvolt = <1200000>;
348			regulator-max-microvolt = <1200000>;
349			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
350		};
351
352		vreg_l6d: ldo6 {
353			regulator-name = "vreg_l6d";
354			regulator-min-microvolt = <880000>;
355			regulator-max-microvolt = <880000>;
356			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
357		};
358
359		vreg_l7d: ldo7 {
360			regulator-name = "vreg_l7d";
361			regulator-min-microvolt = <3072000>;
362			regulator-max-microvolt = <3072000>;
363			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
364		};
365
366		vreg_l9d: ldo9 {
367			regulator-name = "vreg_l9d";
368			regulator-min-microvolt = <912000>;
369			regulator-max-microvolt = <912000>;
370			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
371		};
372	};
373};
374
375&dispcc0 {
376	status = "okay";
377};
378
379&mdss0 {
380	status = "okay";
381};
382
383&mdss0_dp0 {
384	status = "okay";
385};
386
387&mdss0_dp0_out {
388	data-lanes = <0 1>;
389	remote-endpoint = <&pmic_glink_con0_ss>;
390};
391
392&mdss0_dp1 {
393	status = "okay";
394};
395
396&mdss0_dp1_out {
397	data-lanes = <0 1>;
398	remote-endpoint = <&pmic_glink_con1_ss>;
399};
400
401&mdss0_dp3 {
402	compatible = "qcom,sc8280xp-edp";
403	/delete-property/ #sound-dai-cells;
404
405	data-lanes = <0 1 2 3>;
406
407	status = "okay";
408
409	aux-bus {
410		panel {
411			compatible = "edp-panel";
412			power-supply = <&vreg_edp_3p3>;
413
414			backlight = <&backlight>;
415
416			ports {
417				port {
418					edp_panel_in: endpoint {
419						remote-endpoint = <&mdss0_dp3_out>;
420					};
421				};
422			};
423		};
424	};
425
426	ports {
427		port@1 {
428			reg = <1>;
429			mdss0_dp3_out: endpoint {
430				remote-endpoint = <&edp_panel_in>;
431			};
432		};
433	};
434};
435
436&mdss0_dp3_phy {
437	vdda-phy-supply = <&vreg_l6b>;
438	vdda-pll-supply = <&vreg_l3b>;
439
440	status = "okay";
441};
442
443&i2c4 {
444	clock-frequency = <400000>;
445
446	pinctrl-names = "default";
447	pinctrl-0 = <&i2c4_default>;
448
449	status = "okay";
450
451	touchscreen@10 {
452		compatible = "hid-over-i2c";
453		reg = <0x10>;
454
455		hid-descr-addr = <0x1>;
456		interrupts-extended = <&tlmm 175 IRQ_TYPE_LEVEL_LOW>;
457		vdd-supply = <&vreg_misc_3p3>;
458
459		pinctrl-names = "default";
460		pinctrl-0 = <&ts0_default>;
461	};
462};
463
464&i2c21 {
465	clock-frequency = <400000>;
466
467	pinctrl-names = "default";
468	pinctrl-0 = <&i2c21_default>;
469
470	status = "okay";
471
472	touchpad@15 {
473		compatible = "hid-over-i2c";
474		reg = <0x15>;
475
476		hid-descr-addr = <0x1>;
477		interrupts-extended = <&tlmm 182 IRQ_TYPE_LEVEL_LOW>;
478		vdd-supply = <&vreg_misc_3p3>;
479
480		pinctrl-names = "default";
481		pinctrl-0 = <&tpad_default>;
482
483		wakeup-source;
484	};
485
486	keyboard@68 {
487		compatible = "hid-over-i2c";
488		reg = <0x68>;
489
490		hid-descr-addr = <0x1>;
491		interrupts-extended = <&tlmm 104 IRQ_TYPE_LEVEL_LOW>;
492		vdd-supply = <&vreg_misc_3p3>;
493
494		pinctrl-names = "default";
495		pinctrl-0 = <&kybd_default>;
496
497		wakeup-source;
498	};
499};
500
501&pcie2a {
502	perst-gpios = <&tlmm 143 GPIO_ACTIVE_LOW>;
503	wake-gpios = <&tlmm 145 GPIO_ACTIVE_LOW>;
504
505	vddpe-3v3-supply = <&vreg_nvme>;
506
507	pinctrl-names = "default";
508	pinctrl-0 = <&pcie2a_default>;
509
510	status = "okay";
511};
512
513&pcie2a_phy {
514	vdda-phy-supply = <&vreg_l6d>;
515	vdda-pll-supply = <&vreg_l4d>;
516
517	status = "okay";
518};
519
520&pcie3a {
521	perst-gpios = <&tlmm 151 GPIO_ACTIVE_LOW>;
522	wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>;
523
524	vddpe-3v3-supply = <&vreg_wwan>;
525
526	pinctrl-names = "default";
527	pinctrl-0 = <&pcie3a_default>;
528
529	status = "okay";
530};
531
532&pcie3a_phy {
533	vdda-phy-supply = <&vreg_l6d>;
534	vdda-pll-supply = <&vreg_l4d>;
535
536	status = "okay";
537};
538
539&pcie4 {
540	perst-gpios = <&tlmm 141 GPIO_ACTIVE_LOW>;
541	wake-gpios = <&tlmm 139 GPIO_ACTIVE_LOW>;
542
543	vddpe-3v3-supply = <&vreg_wlan>;
544
545	pinctrl-names = "default";
546	pinctrl-0 = <&pcie4_default>;
547
548	status = "okay";
549};
550
551&pcie4_phy {
552	vdda-phy-supply = <&vreg_l6d>;
553	vdda-pll-supply = <&vreg_l4d>;
554
555	status = "okay";
556};
557
558&pmc8280c_lpg {
559	status = "okay";
560};
561
562&pmk8280_pon_pwrkey {
563	status = "okay";
564};
565
566&qup0 {
567	status = "okay";
568};
569
570&qup1 {
571	status = "okay";
572};
573
574&qup2 {
575	status = "okay";
576};
577
578&remoteproc_adsp {
579	firmware-name = "qcom/sc8280xp/qcadsp8280.mbn";
580
581	status = "okay";
582};
583
584&remoteproc_nsp0 {
585	firmware-name = "qcom/sc8280xp/qccdsp8280.mbn";
586
587	status = "okay";
588};
589
590&uart17 {
591	compatible = "qcom,geni-debug-uart";
592
593	status = "okay";
594};
595
596&ufs_mem_hc {
597	reset-gpios = <&tlmm 228 GPIO_ACTIVE_LOW>;
598
599	vcc-supply = <&vreg_l7c>;
600	vcc-max-microamp = <800000>;
601	vccq-supply = <&vreg_l3d>;
602	vccq-max-microamp = <900000>;
603
604	status = "okay";
605};
606
607&ufs_mem_phy {
608	vdda-phy-supply = <&vreg_l6b>;
609	vdda-pll-supply = <&vreg_l3b>;
610
611	status = "okay";
612};
613
614&usb_0 {
615	status = "okay";
616};
617
618&usb_0_dwc3 {
619	dr_mode = "host";
620};
621
622&usb_0_hsphy {
623	vdda-pll-supply = <&vreg_l9d>;
624	vdda18-supply = <&vreg_l1c>;
625	vdda33-supply = <&vreg_l7d>;
626
627	status = "okay";
628};
629
630&usb_0_qmpphy {
631	vdda-phy-supply = <&vreg_l9d>;
632	vdda-pll-supply = <&vreg_l4d>;
633
634	status = "okay";
635};
636
637&usb_0_role_switch {
638	remote-endpoint = <&pmic_glink_con0_hs>;
639};
640
641&usb_1 {
642	status = "okay";
643};
644
645&usb_1_dwc3 {
646	dr_mode = "host";
647};
648
649&usb_1_hsphy {
650	vdda-pll-supply = <&vreg_l4b>;
651	vdda18-supply = <&vreg_l1c>;
652	vdda33-supply = <&vreg_l13c>;
653
654	status = "okay";
655};
656
657&usb_1_qmpphy {
658	vdda-phy-supply = <&vreg_l4b>;
659	vdda-pll-supply = <&vreg_l3b>;
660
661	status = "okay";
662};
663
664&usb_1_role_switch {
665	remote-endpoint = <&pmic_glink_con1_hs>;
666};
667
668&xo_board_clk {
669	clock-frequency = <38400000>;
670};
671
672/* PINCTRL - additions to nodes defined in sc8280xp.dtsi */
673
674&pmc8280_1_gpios {
675	edp_bl_en: edp-bl-en-state {
676		pins = "gpio8";
677		function = "normal";
678	};
679
680	edp_bl_reg_en: edp-bl-reg-en-state {
681		pins = "gpio9";
682		function = "normal";
683	};
684
685	misc_3p3_reg_en: misc-3p3-reg-en-state {
686		pins = "gpio1";
687		function = "normal";
688	};
689};
690
691&pmc8280_2_gpios {
692	wwan_sw_en: wwan-sw-en-state {
693		pins = "gpio1";
694		function = "normal";
695	};
696};
697
698&pmc8280c_gpios {
699	edp_bl_pwm: edp-bl-pwm-state {
700		pins = "gpio8";
701		function = "func1";
702	};
703};
704
705&pmr735a_gpios {
706	hastings_reg_en: hastings-reg-en-state {
707		pins = "gpio1";
708		function = "normal";
709	};
710};
711
712&tlmm {
713	gpio-reserved-ranges = <74 6>, <83 4>, <125 2>, <128 2>, <154 7>;
714
715	edp_reg_en: edp-reg-en-state {
716		pins = "gpio25";
717		function = "gpio";
718		drive-strength = <16>;
719		bias-disable;
720	};
721
722	i2c4_default: i2c4-default-state {
723		pins = "gpio171", "gpio172";
724		function = "qup4";
725		drive-strength = <16>;
726		bias-disable;
727	};
728
729	i2c21_default: i2c21-default-state {
730		pins = "gpio81", "gpio82";
731		function = "qup21";
732		drive-strength = <16>;
733		bias-disable;
734	};
735
736	kybd_default: kybd-default-state {
737		disable-pins {
738			pins = "gpio102";
739			function = "gpio";
740			output-low;
741		};
742
743		int-n-pins {
744			pins = "gpio104";
745			function = "gpio";
746			bias-disable;
747		};
748
749		reset-pins {
750			pins = "gpio105";
751			function = "gpio";
752			bias-disable;
753		};
754	};
755
756	nvme_reg_en: nvme-reg-en-state {
757		pins = "gpio135";
758		function = "gpio";
759		drive-strength = <2>;
760		bias-disable;
761	};
762
763	pcie2a_default: pcie2a-default-state {
764		clkreq-n-pins {
765			pins = "gpio142";
766			function = "pcie2a_clkreq";
767			drive-strength = <2>;
768			bias-pull-up;
769		};
770
771		perst-n-pins {
772			pins = "gpio143";
773			function = "gpio";
774			drive-strength = <2>;
775			bias-pull-down;
776		};
777
778		wake-n-pins {
779		       pins = "gpio145";
780		       function = "gpio";
781		       drive-strength = <2>;
782		       bias-pull-up;
783	       };
784	};
785
786	pcie3a_default: pcie3a-default-state {
787		clkreq-n-pins {
788			pins = "gpio150";
789			function = "pcie3a_clkreq";
790			drive-strength = <2>;
791			bias-pull-up;
792		};
793
794		perst-n-pins {
795			pins = "gpio151";
796			function = "gpio";
797			drive-strength = <2>;
798			bias-pull-down;
799		};
800
801		wake-n-pins {
802			pins = "gpio148";
803			function = "gpio";
804			drive-strength = <2>;
805			bias-pull-up;
806		};
807	};
808
809	pcie4_default: pcie4-default-state {
810		clkreq-n-pins {
811			pins = "gpio140";
812			function = "pcie4_clkreq";
813			drive-strength = <2>;
814			bias-pull-up;
815		};
816
817		perst-n-pins {
818			pins = "gpio141";
819			function = "gpio";
820			drive-strength = <2>;
821			bias-pull-down;
822		};
823
824		wake-n-pins {
825			pins = "gpio139";
826			function = "gpio";
827			drive-strength = <2>;
828			bias-pull-up;
829		};
830	};
831
832	tpad_default: tpad-default-state {
833		int-n-pins {
834			pins = "gpio182";
835			function = "gpio";
836			bias-disable;
837		};
838	};
839
840	ts0_default: ts0-default-state {
841		int-n-pins {
842			pins = "gpio175";
843			function = "gpio";
844			bias-disable;
845		};
846
847		reset-n-pins {
848			pins = "gpio99";
849			function = "gpio";
850			output-high;
851			drive-strength = <16>;
852		};
853	};
854
855	usb0_sbu_default: usb0-sbu-state {
856		oe-n-pins {
857			pins = "gpio101";
858			function = "gpio";
859			bias-disable;
860			drive-strengh = <16>;
861			output-high;
862		};
863
864		sel-pins {
865			pins = "gpio164";
866			function = "gpio";
867			bias-disable;
868			drive-strength = <16>;
869		};
870
871		mode-pins {
872			pins = "gpio167";
873			function = "gpio";
874			bias-disable;
875			drive-strength = <16>;
876			output-high;
877		};
878	};
879
880	usb1_sbu_default: usb1-sbu-state {
881		oe-n-pins {
882			pins = "gpio48";
883			function = "gpio";
884			bias-disable;
885			drive-strengh = <16>;
886			output-high;
887		};
888
889		sel-pins {
890			pins = "gpio47";
891			function = "gpio";
892			bias-disable;
893			drive-strength = <16>;
894		};
895
896		mode-pins {
897			pins = "gpio50";
898			function = "gpio";
899			bias-disable;
900			drive-strength = <16>;
901			output-high;
902		};
903	};
904};
905