1// SPDX-License-Identifier: BSD-3-Clause 2/* 3 * sc7280 IDP board device tree source (common between SKU1 and SKU2) 4 * 5 * Copyright (c) 2021, The Linux Foundation. All rights reserved. 6 */ 7 8#include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h> 9#include <dt-bindings/input/linux-event-codes.h> 10#include "sc7280.dtsi" 11#include "pm7325.dtsi" 12#include "pm8350c.dtsi" 13#include "pmk8350.dtsi" 14 15#include "sc7280-chrome-common.dtsi" 16#include "sc7280-herobrine-lte-sku.dtsi" 17 18/ { 19 aliases { 20 bluetooth0 = &bluetooth; 21 serial1 = &uart7; 22 }; 23 24 max98360a: audio-codec-0 { 25 compatible = "maxim,max98360a"; 26 pinctrl-names = "default"; 27 pinctrl-0 = <&_en>; 28 sdmode-gpios = <&tlmm 63 GPIO_ACTIVE_HIGH>; 29 #sound-dai-cells = <0>; 30 }; 31 32 wcd9385: audio-codec-1 { 33 compatible = "qcom,wcd9385-codec"; 34 pinctrl-names = "default", "sleep"; 35 pinctrl-0 = <&wcd_reset_n>; 36 pinctrl-1 = <&wcd_reset_n_sleep>; 37 38 reset-gpios = <&tlmm 83 GPIO_ACTIVE_LOW>; 39 40 qcom,rx-device = <&wcd_rx>; 41 qcom,tx-device = <&wcd_tx>; 42 43 vdd-rxtx-supply = <&vreg_l18b_1p8>; 44 vdd-io-supply = <&vreg_l18b_1p8>; 45 vdd-buck-supply = <&vreg_l17b_1p8>; 46 vdd-mic-bias-supply = <&vreg_bob>; 47 48 qcom,micbias1-microvolt = <1800000>; 49 qcom,micbias2-microvolt = <1800000>; 50 qcom,micbias3-microvolt = <1800000>; 51 qcom,micbias4-microvolt = <1800000>; 52 53 qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000 54 500000 500000 500000>; 55 qcom,mbhc-headset-vthreshold-microvolt = <1700000>; 56 qcom,mbhc-headphone-vthreshold-microvolt = <50000>; 57 #sound-dai-cells = <1>; 58 }; 59 60 gpio-keys { 61 compatible = "gpio-keys"; 62 label = "gpio-keys"; 63 64 pinctrl-names = "default"; 65 pinctrl-0 = <&key_vol_up_default>; 66 67 key-volume-up { 68 label = "volume_up"; 69 gpios = <&pm7325_gpios 6 GPIO_ACTIVE_LOW>; 70 linux,input-type = <1>; 71 linux,code = <KEY_VOLUMEUP>; 72 gpio-key,wakeup; 73 debounce-interval = <15>; 74 linux,can-disable; 75 }; 76 }; 77 78 nvme_3v3_regulator: nvme-3v3-regulator { 79 compatible = "regulator-fixed"; 80 regulator-name = "VLDO_3V3"; 81 82 regulator-min-microvolt = <3300000>; 83 regulator-max-microvolt = <3300000>; 84 85 enable-active-high; 86 pinctrl-names = "default"; 87 pinctrl-0 = <&nvme_pwren>; 88 }; 89 90 sound: sound { 91 compatible = "google,sc7280-herobrine"; 92 model = "sc7280-wcd938x-max98360a-1mic"; 93 94 audio-routing = 95 "IN1_HPHL", "HPHL_OUT", 96 "IN2_HPHR", "HPHR_OUT", 97 "AMIC1", "MIC BIAS1", 98 "AMIC2", "MIC BIAS2", 99 "VA DMIC0", "MIC BIAS3", 100 "VA DMIC1", "MIC BIAS3", 101 "VA DMIC2", "MIC BIAS1", 102 "VA DMIC3", "MIC BIAS1", 103 "TX SWR_ADC0", "ADC1_OUTPUT", 104 "TX SWR_ADC1", "ADC2_OUTPUT", 105 "TX SWR_ADC2", "ADC3_OUTPUT", 106 "TX SWR_DMIC0", "DMIC1_OUTPUT", 107 "TX SWR_DMIC1", "DMIC2_OUTPUT", 108 "TX SWR_DMIC2", "DMIC3_OUTPUT", 109 "TX SWR_DMIC3", "DMIC4_OUTPUT", 110 "TX SWR_DMIC4", "DMIC5_OUTPUT", 111 "TX SWR_DMIC5", "DMIC6_OUTPUT", 112 "TX SWR_DMIC6", "DMIC7_OUTPUT", 113 "TX SWR_DMIC7", "DMIC8_OUTPUT"; 114 115 qcom,msm-mbhc-hphl-swh = <1>; 116 qcom,msm-mbhc-gnd-swh = <1>; 117 118 #address-cells = <1>; 119 #size-cells = <0>; 120 #sound-dai-cells = <0>; 121 122 dai-link@0 { 123 link-name = "MAX98360A"; 124 reg = <0>; 125 126 cpu { 127 sound-dai = <&lpass_cpu MI2S_SECONDARY>; 128 }; 129 130 codec { 131 sound-dai = <&max98360a>; 132 }; 133 }; 134 135 dai-link@1 { 136 link-name = "DisplayPort"; 137 reg = <1>; 138 139 cpu { 140 sound-dai = <&lpass_cpu LPASS_DP_RX>; 141 }; 142 143 codec { 144 sound-dai = <&mdss_dp>; 145 }; 146 }; 147 148 dai-link@2 { 149 link-name = "WCD9385 Playback"; 150 reg = <2>; 151 152 cpu { 153 sound-dai = <&lpass_cpu LPASS_CDC_DMA_RX0>; 154 }; 155 156 codec { 157 sound-dai = <&wcd9385 0>, <&swr0 0>, <&lpass_rx_macro 0>; 158 }; 159 }; 160 161 dai-link@3 { 162 link-name = "WCD9385 Capture"; 163 reg = <3>; 164 165 cpu { 166 sound-dai = <&lpass_cpu LPASS_CDC_DMA_TX3>; 167 }; 168 169 codec { 170 sound-dai = <&wcd9385 1>, <&swr1 0>, <&lpass_tx_macro 0>; 171 }; 172 }; 173 174 dai-link@4 { 175 link-name = "DMIC"; 176 reg = <4>; 177 178 cpu { 179 sound-dai = <&lpass_cpu LPASS_CDC_DMA_VA_TX0>; 180 }; 181 182 codec { 183 sound-dai = <&lpass_va_macro 0>; 184 }; 185 }; 186 }; 187}; 188 189&apps_rsc { 190 pm7325-regulators { 191 compatible = "qcom,pm7325-rpmh-regulators"; 192 qcom,pmic-id = "b"; 193 194 vreg_s1b_1p8: smps1 { 195 regulator-min-microvolt = <1856000>; 196 regulator-max-microvolt = <2040000>; 197 }; 198 199 vreg_s7b_0p9: smps7 { 200 regulator-min-microvolt = <535000>; 201 regulator-max-microvolt = <1120000>; 202 }; 203 204 vreg_s8b_1p2: smps8 { 205 regulator-min-microvolt = <1256000>; 206 regulator-max-microvolt = <1500000>; 207 }; 208 209 vreg_l1b_0p8: ldo1 { 210 regulator-min-microvolt = <825000>; 211 regulator-max-microvolt = <925000>; 212 }; 213 214 vreg_l2b_3p0: ldo2 { 215 regulator-min-microvolt = <2700000>; 216 regulator-max-microvolt = <3544000>; 217 }; 218 219 vreg_l6b_1p2: ldo6 { 220 regulator-min-microvolt = <1140000>; 221 regulator-max-microvolt = <1260000>; 222 }; 223 224 vreg_l7b_2p9: ldo7 { 225 regulator-min-microvolt = <2960000>; 226 regulator-max-microvolt = <2960000>; 227 }; 228 229 vreg_l8b_0p9: ldo8 { 230 regulator-min-microvolt = <870000>; 231 regulator-max-microvolt = <970000>; 232 }; 233 234 vreg_l9b_1p2: ldo9 { 235 regulator-min-microvolt = <1080000>; 236 regulator-max-microvolt = <1304000>; 237 }; 238 239 vreg_l11b_1p7: ldo11 { 240 regulator-min-microvolt = <1504000>; 241 regulator-max-microvolt = <2000000>; 242 }; 243 244 vreg_l12b_0p8: ldo12 { 245 regulator-min-microvolt = <751000>; 246 regulator-max-microvolt = <824000>; 247 }; 248 249 vreg_l13b_0p8: ldo13 { 250 regulator-min-microvolt = <530000>; 251 regulator-max-microvolt = <824000>; 252 }; 253 254 vreg_l14b_1p2: ldo14 { 255 regulator-min-microvolt = <1080000>; 256 regulator-max-microvolt = <1304000>; 257 }; 258 259 vreg_l15b_0p8: ldo15 { 260 regulator-min-microvolt = <765000>; 261 regulator-max-microvolt = <1020000>; 262 }; 263 264 vreg_l16b_1p2: ldo16 { 265 regulator-min-microvolt = <1100000>; 266 regulator-max-microvolt = <1300000>; 267 }; 268 269 vreg_l17b_1p8: ldo17 { 270 regulator-min-microvolt = <1700000>; 271 regulator-max-microvolt = <1900000>; 272 }; 273 274 vreg_l18b_1p8: ldo18 { 275 regulator-min-microvolt = <1800000>; 276 regulator-max-microvolt = <2000000>; 277 }; 278 279 vreg_l19b_1p8: ldo19 { 280 regulator-min-microvolt = <1800000>; 281 regulator-max-microvolt = <1800000>; 282 }; 283 }; 284 285 pm8350c-regulators { 286 compatible = "qcom,pm8350c-rpmh-regulators"; 287 qcom,pmic-id = "c"; 288 289 vreg_s1c_2p2: smps1 { 290 regulator-min-microvolt = <2190000>; 291 regulator-max-microvolt = <2210000>; 292 }; 293 294 vreg_s9c_1p0: smps9 { 295 regulator-min-microvolt = <1010000>; 296 regulator-max-microvolt = <1170000>; 297 }; 298 299 vreg_l1c_1p8: ldo1 { 300 regulator-min-microvolt = <1800000>; 301 regulator-max-microvolt = <1980000>; 302 }; 303 304 vreg_l2c_1p8: ldo2 { 305 regulator-min-microvolt = <1620000>; 306 regulator-max-microvolt = <1980000>; 307 }; 308 309 vreg_l3c_3p0: ldo3 { 310 regulator-min-microvolt = <2800000>; 311 regulator-max-microvolt = <3540000>; 312 }; 313 314 vreg_l4c_1p8: ldo4 { 315 regulator-min-microvolt = <1620000>; 316 regulator-max-microvolt = <3300000>; 317 }; 318 319 vreg_l5c_1p8: ldo5 { 320 regulator-min-microvolt = <1620000>; 321 regulator-max-microvolt = <3300000>; 322 }; 323 324 vreg_l6c_2p9: ldo6 { 325 regulator-min-microvolt = <1800000>; 326 regulator-max-microvolt = <2950000>; 327 }; 328 329 vreg_l7c_3p0: ldo7 { 330 regulator-min-microvolt = <3000000>; 331 regulator-max-microvolt = <3544000>; 332 }; 333 334 vreg_l8c_1p8: ldo8 { 335 regulator-min-microvolt = <1620000>; 336 regulator-max-microvolt = <2000000>; 337 }; 338 339 vreg_l9c_2p9: ldo9 { 340 regulator-min-microvolt = <2960000>; 341 regulator-max-microvolt = <2960000>; 342 }; 343 344 vreg_l10c_0p8: ldo10 { 345 regulator-min-microvolt = <720000>; 346 regulator-max-microvolt = <1050000>; 347 }; 348 349 vreg_l11c_2p8: ldo11 { 350 regulator-min-microvolt = <2800000>; 351 regulator-max-microvolt = <3544000>; 352 }; 353 354 vreg_l12c_1p8: ldo12 { 355 regulator-min-microvolt = <1650000>; 356 regulator-max-microvolt = <2000000>; 357 }; 358 359 vreg_l13c_3p0: ldo13 { 360 regulator-min-microvolt = <2700000>; 361 regulator-max-microvolt = <3544000>; 362 }; 363 364 vreg_bob: bob { 365 regulator-min-microvolt = <3008000>; 366 regulator-max-microvolt = <3960000>; 367 }; 368 }; 369}; 370 371&gpi_dma0 { 372 status = "okay"; 373}; 374 375&gpi_dma1 { 376 status = "okay"; 377}; 378 379&ipa { 380 status = "okay"; 381 modem-init; 382}; 383 384&lpass_cpu { 385 status = "okay"; 386 387 pinctrl-names = "default"; 388 pinctrl-0 = <&mi2s1_data0>, <&mi2s1_sclk>, <&mi2s1_ws>; 389 390 dai-link@1 { 391 reg = <MI2S_SECONDARY>; 392 qcom,playback-sd-lines = <0>; 393 }; 394 395 dai-link@5 { 396 reg = <LPASS_DP_RX>; 397 }; 398 399 dai-link@6 { 400 reg = <LPASS_CDC_DMA_RX0>; 401 }; 402 403 dai-link@19 { 404 reg = <LPASS_CDC_DMA_TX3>; 405 }; 406 407 dai-link@25 { 408 reg = <LPASS_CDC_DMA_VA_TX0>; 409 }; 410}; 411 412&lpass_rx_macro { 413 status = "okay"; 414}; 415 416&lpass_tx_macro { 417 status = "okay"; 418}; 419 420&lpass_va_macro { 421 status = "okay"; 422 vdd-micb-supply = <&vreg_bob>; 423}; 424 425&pcie1 { 426 status = "okay"; 427 perst-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>; 428 429 vddpe-3v3-supply = <&nvme_3v3_regulator>; 430 431 pinctrl-names = "default"; 432 pinctrl-0 = <&pcie1_reset_n>, <&pcie1_wake_n>; 433}; 434 435&pcie1_phy { 436 status = "okay"; 437 438 vdda-phy-supply = <&vreg_l10c_0p8>; 439 vdda-pll-supply = <&vreg_l6b_1p2>; 440}; 441 442&pmk8350_vadc { 443 pmk8350-die-temp@3 { 444 reg = <PMK8350_ADC7_DIE_TEMP>; 445 label = "pmk8350_die_temp"; 446 qcom,pre-scaling = <1 1>; 447 }; 448}; 449 450&qfprom { 451 vcc-supply = <&vreg_l1c_1p8>; 452}; 453 454&qupv3_id_0 { 455 status = "okay"; 456}; 457 458&qupv3_id_1 { 459 status = "okay"; 460}; 461 462&sdhc_1 { 463 status = "okay"; 464 465 non-removable; 466 no-sd; 467 no-sdio; 468 469 vmmc-supply = <&vreg_l7b_2p9>; 470 vqmmc-supply = <&vreg_l19b_1p8>; 471}; 472 473&sdhc_2 { 474 status = "okay"; 475 476 pinctrl-0 = <&sdc2_clk>, <&sdc2_cmd>, <&sdc2_data>, <&sd_cd>; 477 pinctrl-1 = <&sdc2_clk_sleep>, <&sdc2_cmd_sleep>, <&sdc2_data_sleep>, <&sd_cd>; 478 479 vmmc-supply = <&vreg_l9c_2p9>; 480 vqmmc-supply = <&vreg_l6c_2p9>; 481 482 cd-gpios = <&tlmm 91 GPIO_ACTIVE_LOW>; 483}; 484 485&swr0 { 486 status = "okay"; 487 488 wcd_rx: codec@0,4 { 489 compatible = "sdw20217010d00"; 490 reg = <0 4>; 491 #sound-dai-cells = <1>; 492 qcom,rx-port-mapping = <1 2 3 4 5>; 493 }; 494}; 495 496&swr1 { 497 status = "okay"; 498 499 wcd_tx: codec@0,3 { 500 compatible = "sdw20217010d00"; 501 reg = <0 3>; 502 #sound-dai-cells = <1>; 503 qcom,tx-port-mapping = <1 2 3 4>; 504 }; 505}; 506 507&uart5 { 508 compatible = "qcom,geni-debug-uart"; 509 status = "okay"; 510}; 511 512&usb_1 { 513 status = "okay"; 514}; 515 516&usb_1_dwc3 { 517 dr_mode = "host"; 518}; 519 520&usb_1_hsphy { 521 status = "okay"; 522 523 vdda-pll-supply = <&vreg_l10c_0p8>; 524 vdda33-supply = <&vreg_l2b_3p0>; 525 vdda18-supply = <&vreg_l1c_1p8>; 526 qcom,hs-rise-fall-time-bp = <0>; 527 qcom,squelch-detector-bp = <(-2090)>; 528 qcom,hs-disconnect-bp = <1743>; 529 qcom,hs-amplitude-bp = <1780>; 530 qcom,hs-crossover-voltage-microvolt = <(-31000)>; 531 qcom,hs-output-impedance-micro-ohms = <2600000>; 532}; 533 534&usb_1_qmpphy { 535 status = "okay"; 536 537 vdda-phy-supply = <&vreg_l6b_1p2>; 538 vdda-pll-supply = <&vreg_l1b_0p8>; 539}; 540 541&uart7 { 542 status = "okay"; 543 544 /delete-property/interrupts; 545 interrupts-extended = <&intc GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>, 546 <&tlmm 31 IRQ_TYPE_EDGE_FALLING>; 547 pinctrl-names = "default", "sleep"; 548 pinctrl-1 = <&qup_uart7_sleep_cts>, <&qup_uart7_sleep_rts>, <&qup_uart7_sleep_tx>, <&qup_uart7_sleep_rx>; 549 550 bluetooth: bluetooth { 551 compatible = "qcom,wcn6750-bt"; 552 pinctrl-names = "default"; 553 pinctrl-0 = <&bt_en>, <&sw_ctrl>; 554 enable-gpios = <&tlmm 85 GPIO_ACTIVE_HIGH>; 555 swctrl-gpios = <&tlmm 86 GPIO_ACTIVE_HIGH>; 556 vddaon-supply = <&vreg_s7b_0p9>; 557 vddbtcxmx-supply = <&vreg_s7b_0p9>; 558 vddrfacmn-supply = <&vreg_s7b_0p9>; 559 vddrfa0p8-supply = <&vreg_s7b_0p9>; 560 vddrfa1p7-supply = <&vreg_s1b_1p8>; 561 vddrfa1p2-supply = <&vreg_s8b_1p2>; 562 vddrfa2p2-supply = <&vreg_s1c_2p2>; 563 vddasd-supply = <&vreg_l11c_2p8>; 564 max-speed = <3200000>; 565 }; 566}; 567 568/* PINCTRL - additions to nodes defined in sc7280.dtsi */ 569 570&dp_hot_plug_det { 571 bias-disable; 572}; 573 574&lpass_dmic01_clk { 575 drive-strength = <8>; 576 bias-disable; 577}; 578 579&lpass_dmic01_data { 580 bias-pull-down; 581}; 582 583&lpass_dmic23_clk { 584 drive-strength = <8>; 585 bias-disable; 586}; 587 588&lpass_dmic23_data { 589 bias-pull-down; 590}; 591 592&lpass_rx_swr_clk { 593 drive-strength = <2>; 594 slew-rate = <1>; 595 bias-disable; 596}; 597 598&lpass_rx_swr_data { 599 drive-strength = <2>; 600 slew-rate = <1>; 601 bias-bus-hold; 602}; 603 604&lpass_tx_swr_clk { 605 drive-strength = <2>; 606 slew-rate = <1>; 607 bias-disable; 608}; 609 610&lpass_tx_swr_data { 611 drive-strength = <2>; 612 slew-rate = <1>; 613 bias-bus-hold; 614}; 615 616&mi2s1_data0 { 617 drive-strength = <6>; 618 bias-disable; 619}; 620 621&mi2s1_sclk { 622 drive-strength = <6>; 623 bias-disable; 624}; 625 626&mi2s1_ws { 627 drive-strength = <6>; 628}; 629 630&pm7325_gpios { 631 key_vol_up_default: key-vol-up-state { 632 pins = "gpio6"; 633 function = "normal"; 634 input-enable; 635 bias-pull-up; 636 power-source = <0>; 637 qcom,drive-strength = <3>; 638 }; 639}; 640 641&pcie1_clkreq_n { 642 bias-pull-up; 643 drive-strength = <2>; 644}; 645 646&qspi_cs0 { 647 bias-disable; 648}; 649 650&qspi_clk { 651 bias-disable; 652}; 653 654&qspi_data01 { 655 /* High-Z when no transfers; nice to park the lines */ 656 bias-pull-up; 657}; 658 659&qup_uart5_tx { 660 drive-strength = <2>; 661 bias-disable; 662}; 663 664&qup_uart5_rx { 665 drive-strength = <2>; 666 bias-pull-up; 667}; 668 669&qup_uart7_cts { 670 /* 671 * Configure a bias-bus-hold on CTS to lower power 672 * usage when Bluetooth is turned off. Bus hold will 673 * maintain a low power state regardless of whether 674 * the Bluetooth module drives the pin in either 675 * direction or leaves the pin fully unpowered. 676 */ 677 bias-bus-hold; 678}; 679 680&qup_uart7_rts { 681 /* We'll drive RTS, so no pull */ 682 drive-strength = <2>; 683 bias-disable; 684}; 685 686&qup_uart7_tx { 687 /* We'll drive TX, so no pull */ 688 drive-strength = <2>; 689 bias-disable; 690}; 691 692&qup_uart7_rx { 693 /* 694 * Configure a pull-up on RX. This is needed to avoid 695 * garbage data when the TX pin of the Bluetooth module is 696 * in tri-state (module powered off or not driving the 697 * signal yet). 698 */ 699 bias-pull-up; 700}; 701 702&sdc1_clk { 703 bias-disable; 704 drive-strength = <16>; 705}; 706 707&sdc1_cmd { 708 bias-pull-up; 709 drive-strength = <10>; 710}; 711 712&sdc1_data { 713 bias-pull-up; 714 drive-strength = <10>; 715}; 716 717&sdc1_rclk { 718 bias-pull-down; 719}; 720 721&sdc2_clk { 722 bias-disable; 723 drive-strength = <16>; 724}; 725 726&sdc2_cmd { 727 bias-pull-up; 728 drive-strength = <10>; 729}; 730 731&sdc2_data { 732 bias-pull-up; 733 drive-strength = <10>; 734}; 735 736&tlmm { 737 amp_en: amp-en-state { 738 pins = "gpio63"; 739 bias-pull-down; 740 drive-strength = <2>; 741 }; 742 743 bt_en: bt-en-state { 744 pins = "gpio85"; 745 function = "gpio"; 746 output-low; 747 bias-disable; 748 }; 749 750 nvme_pwren: nvme-pwren-state { 751 function = "gpio"; 752 }; 753 754 pcie1_reset_n: pcie1-reset-n-state { 755 pins = "gpio2"; 756 function = "gpio"; 757 758 drive-strength = <16>; 759 output-low; 760 bias-disable; 761 }; 762 763 pcie1_wake_n: pcie1-wake-n-state { 764 pins = "gpio3"; 765 function = "gpio"; 766 767 drive-strength = <2>; 768 bias-pull-up; 769 }; 770 771 qup_uart7_sleep_cts: qup-uart7-sleep-cts-state { 772 pins = "gpio28"; 773 function = "gpio"; 774 /* 775 * Configure a bias-bus-hold on CTS to lower power 776 * usage when Bluetooth is turned off. Bus hold will 777 * maintain a low power state regardless of whether 778 * the Bluetooth module drives the pin in either 779 * direction or leaves the pin fully unpowered. 780 */ 781 bias-bus-hold; 782 }; 783 784 qup_uart7_sleep_rts: qup-uart7-sleep-rts-state { 785 pins = "gpio29"; 786 function = "gpio"; 787 /* 788 * Configure pull-down on RTS. As RTS is active low 789 * signal, pull it low to indicate the BT SoC that it 790 * can wakeup the system anytime from suspend state by 791 * pulling RX low (by sending wakeup bytes). 792 */ 793 bias-pull-down; 794 }; 795 796 qup_uart7_sleep_tx: qup-uart7-sleep-tx-state { 797 pins = "gpio30"; 798 function = "gpio"; 799 /* 800 * Configure pull-up on TX when it isn't actively driven 801 * to prevent BT SoC from receiving garbage during sleep. 802 */ 803 bias-pull-up; 804 }; 805 806 qup_uart7_sleep_rx: qup-uart7-sleep-rx-state { 807 pins = "gpio31"; 808 function = "gpio"; 809 /* 810 * Configure a pull-up on RX. This is needed to avoid 811 * garbage data when the TX pin of the Bluetooth module 812 * is floating which may cause spurious wakeups. 813 */ 814 bias-pull-up; 815 }; 816 817 sd_cd: sd-cd-state { 818 pins = "gpio91"; 819 function = "gpio"; 820 bias-pull-up; 821 }; 822 823 sw_ctrl: sw-ctrl-state { 824 pins = "gpio86"; 825 function = "gpio"; 826 bias-pull-down; 827 }; 828 829 wcd_reset_n: wcd-reset-n-state { 830 pins = "gpio83"; 831 function = "gpio"; 832 drive-strength = <8>; 833 }; 834 835 wcd_reset_n_sleep: wcd-reset-n-sleep-state { 836 pins = "gpio83"; 837 function = "gpio"; 838 drive-strength = <8>; 839 bias-disable; 840 }; 841}; 842