xref: /linux/arch/arm64/boot/dts/qcom/sc7280-herobrine-audio-wcd9385.dtsi (revision c532de5a67a70f8533d495f8f2aaa9a0491c3ad0) 
1// SPDX-License-Identifier: BSD-3-Clause
2/*
3 * sc7280 device tree source for boards using Max98360 and wcd9385 codec
4 *
5 * Copyright (c) 2022, The Linux Foundation. All rights reserved.
6 */
7
8/ {
9	/* BOARD-SPECIFIC TOP LEVEL NODES */
10	sound: sound {
11		compatible = "google,sc7280-herobrine";
12		model = "sc7280-wcd938x-max98360a-1mic";
13
14		audio-routing =
15			"IN1_HPHL", "HPHL_OUT",
16			"IN2_HPHR", "HPHR_OUT",
17			"AMIC1", "MIC BIAS1",
18			"AMIC2", "MIC BIAS2",
19			"VA DMIC0", "MIC BIAS1",
20			"VA DMIC1", "MIC BIAS1",
21			"VA DMIC2", "MIC BIAS3",
22			"VA DMIC3", "MIC BIAS3",
23			"TX SWR_ADC0", "ADC1_OUTPUT",
24			"TX SWR_ADC1", "ADC2_OUTPUT",
25			"TX SWR_ADC2", "ADC3_OUTPUT",
26			"TX SWR_DMIC0", "DMIC1_OUTPUT",
27			"TX SWR_DMIC1", "DMIC2_OUTPUT",
28			"TX SWR_DMIC2", "DMIC3_OUTPUT",
29			"TX SWR_DMIC3", "DMIC4_OUTPUT",
30			"TX SWR_DMIC4", "DMIC5_OUTPUT",
31			"TX SWR_DMIC5", "DMIC6_OUTPUT",
32			"TX SWR_DMIC6", "DMIC7_OUTPUT",
33			"TX SWR_DMIC7", "DMIC8_OUTPUT";
34
35		#address-cells = <1>;
36		#size-cells = <0>;
37
38		dai-link@0 {
39			link-name = "MAX98360A";
40			reg = <0>;
41
42			cpu {
43				sound-dai = <&lpass_cpu MI2S_SECONDARY>;
44			};
45
46			codec {
47				sound-dai = <&max98360a>;
48			};
49		};
50
51		dai-link@1 {
52			link-name = "DisplayPort";
53			reg = <1>;
54
55			cpu {
56				sound-dai = <&lpass_cpu LPASS_DP_RX>;
57			};
58
59			codec {
60				sound-dai = <&mdss_dp>;
61			};
62		};
63
64		dai-link@2 {
65			link-name = "WCD9385 Playback";
66			reg = <2>;
67
68			cpu {
69				sound-dai = <&lpass_cpu LPASS_CDC_DMA_RX0>;
70			};
71
72			codec {
73				sound-dai = <&wcd9385 0>, <&swr0 0>, <&lpass_rx_macro 0>;
74			};
75		};
76
77		dai-link@3 {
78			link-name = "WCD9385 Capture";
79			reg = <3>;
80
81			cpu {
82				sound-dai = <&lpass_cpu LPASS_CDC_DMA_TX3>;
83			};
84
85			codec {
86				sound-dai = <&wcd9385 1>, <&swr1 0>, <&lpass_tx_macro 0>;
87			};
88		};
89
90		dai-link@4 {
91			link-name = "DMIC";
92			reg = <4>;
93
94			cpu {
95				sound-dai = <&lpass_cpu LPASS_CDC_DMA_VA_TX0>;
96			};
97
98			codec {
99				sound-dai = <&lpass_va_macro 0>;
100			};
101		};
102	};
103};
104
105/* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */
106
107&lpass_cpu {
108	status = "okay";
109
110	pinctrl-names = "default";
111	pinctrl-0 = <&mi2s1_data0>, <&mi2s1_sclk>, <&mi2s1_ws>;
112
113	dai-link@1 {
114		reg = <MI2S_SECONDARY>;
115		qcom,playback-sd-lines = <0>;
116	};
117
118	dai-link@5 {
119		reg = <LPASS_DP_RX>;
120	};
121
122	dai-link@6 {
123		reg = <LPASS_CDC_DMA_RX0>;
124	};
125
126	dai-link@19 {
127		reg = <LPASS_CDC_DMA_TX3>;
128	};
129
130	dai-link@25 {
131		reg = <LPASS_CDC_DMA_VA_TX0>;
132	};
133};
134
135&lpass_rx_macro {
136	status = "okay";
137};
138
139&lpass_tx_macro {
140	status = "okay";
141};
142
143&lpass_va_macro {
144	status = "okay";
145};
146
147&swr0 {
148	status = "okay";
149};
150
151&swr1 {
152	status = "okay";
153};
154
155&wcd9385 {
156	status = "okay";
157};
158
159/* PINCTRL */
160
161&lpass_dmic01_clk {
162	drive-strength = <8>;
163	bias-disable;
164};
165
166&lpass_dmic01_data {
167	bias-pull-down;
168};
169
170&lpass_dmic23_clk {
171	drive-strength = <8>;
172	bias-disable;
173};
174
175&lpass_dmic23_data {
176	bias-pull-down;
177};
178
179&lpass_rx_swr_clk {
180	drive-strength = <2>;
181	slew-rate = <1>;
182	bias-disable;
183};
184
185&lpass_rx_swr_data {
186	drive-strength = <2>;
187	slew-rate = <1>;
188	bias-bus-hold;
189};
190
191&lpass_tx_swr_clk {
192	drive-strength = <2>;
193	slew-rate = <1>;
194	bias-disable;
195};
196
197&lpass_tx_swr_data {
198	drive-strength = <2>;
199	slew-rate = <1>;
200	bias-bus-hold;
201};
202
203&mi2s1_data0 {
204	drive-strength = <6>;
205	bias-disable;
206};
207
208&mi2s1_sclk {
209	drive-strength = <6>;
210	bias-disable;
211};
212
213&mi2s1_ws {
214	drive-strength = <6>;
215};
216