1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * sc7280 fragment for devices with Chrome bootloader 4 * 5 * This file mainly tries to abstract out the memory protections put into 6 * place by the Chrome bootloader which are different than what's put into 7 * place by Qualcomm's typical bootloader. It also has a smattering of other 8 * things that will hold true for any conceivable Chrome design 9 * 10 * Copyright 2022 Google LLC. 11 */ 12 13/* 14 * Reserved memory changes 15 * 16 * Delete all unused memory nodes and define the peripheral memory regions 17 * required by the setup for Chrome boards. 18 */ 19 20/delete-node/ &cdsp_mem; 21/delete-node/ &domain_idle_states; 22/delete-node/ &gpu_zap_mem; 23/delete-node/ &gpu_zap_shader; 24/delete-node/ &hyp_mem; 25/delete-node/ &xbl_mem; 26/delete-node/ &reserved_xbl_uefi_log; 27/delete-node/ &sec_apps_mem; 28 29/ { 30 cpus { 31 domain_idle_states: domain-idle-states { 32 CLUSTER_SLEEP_0: cluster-sleep-0 { 33 compatible = "domain-idle-state"; 34 arm,psci-suspend-param = <0x40003444>; 35 entry-latency-us = <2752>; 36 exit-latency-us = <6562>; 37 min-residency-us = <9926>; 38 }; 39 }; 40 }; 41 42 reserved-memory { 43 camera_mem: memory@8ad00000 { 44 reg = <0x0 0x8ad00000 0x0 0x500000>; 45 no-map; 46 }; 47 48 venus_mem: memory@8b200000 { 49 reg = <0x0 0x8b200000 0x0 0x500000>; 50 no-map; 51 }; 52 }; 53}; 54 55&CLUSTER_PD { 56 domain-idle-states = <&CLUSTER_SLEEP_0>; 57}; 58 59&lpass_aon { 60 status = "okay"; 61}; 62 63&lpass_core { 64 status = "okay"; 65}; 66 67&lpass_hm { 68 status = "okay"; 69}; 70 71&lpasscc { 72 status = "okay"; 73}; 74 75&pdc_reset { 76 status = "okay"; 77}; 78 79/* The PMIC PON code isn't compatible w/ how Chrome EC/BIOS handle things. */ 80&pmk8350_pon { 81 status = "disabled"; 82}; 83 84/* 85 * Chrome designs always boot from SPI flash hooked up to the qspi. 86 * 87 * It's expected that all boards will support "dual SPI" at 37.5 MHz. 88 * If some boards need a different speed or have a package that allows 89 * Quad SPI together with WP then those boards can easily override. 90 */ 91&qspi { 92 status = "okay"; 93 pinctrl-names = "default", "sleep"; 94 pinctrl-0 = <&qspi_clk>, <&qspi_cs0>, <&qspi_data0>, <&qspi_data1>; 95 pinctrl-1 = <&qspi_sleep>; 96 97 spi_flash: flash@0 { 98 compatible = "jedec,spi-nor"; 99 reg = <0>; 100 101 spi-max-frequency = <37500000>; 102 spi-tx-bus-width = <2>; 103 spi-rx-bus-width = <2>; 104 }; 105}; 106 107/* Currently not used */ 108&remoteproc_cdsp { 109 /delete-property/ memory-region; 110}; 111 112&remoteproc_wpss { 113 compatible = "qcom,sc7280-wpss-pil"; 114 clocks = <&gcc GCC_WPSS_AHB_BDG_MST_CLK>, 115 <&gcc GCC_WPSS_AHB_CLK>, 116 <&gcc GCC_WPSS_RSCP_CLK>, 117 <&rpmhcc RPMH_CXO_CLK>; 118 clock-names = "ahb_bdg", 119 "ahb", 120 "rscp", 121 "xo"; 122 123 resets = <&aoss_reset AOSS_CC_WCSS_RESTART>, 124 <&pdc_reset PDC_WPSS_SYNC_RESET>; 125 reset-names = "restart", "pdc_sync"; 126 127 qcom,halt-regs = <&tcsr_1 0x17000>; 128 129 firmware-name = "ath11k/WCN6750/hw1.0/wpss.mdt"; 130 131 status = "okay"; 132}; 133 134&scm { 135 /* TF-A firmware maps memory cached so mark dma-coherent to match. */ 136 dma-coherent; 137}; 138 139&venus { 140 iommus = <&apps_smmu 0x2180 0x20>, 141 <&apps_smmu 0x2184 0x20>; 142 143 status = "okay"; 144 145 video-firmware { 146 iommus = <&apps_smmu 0x21a2 0x0>; 147 }; 148}; 149 150&watchdog { 151 status = "okay"; 152}; 153 154&wifi { 155 status = "okay"; 156 157 wifi-firmware { 158 iommus = <&apps_smmu 0x1c02 0x1>; 159 }; 160}; 161 162/* PINCTRL - chrome-common pinctrl */ 163 164&tlmm { 165 qspi_sleep: qspi-sleep-state { 166 pins = "gpio12", "gpio13", "gpio14", "gpio15"; 167 168 /* 169 * When we're not actively transferring we want pins as GPIOs 170 * with output disabled so that the quad SPI IP block stops 171 * driving them. We rely on the normal pulls configured in 172 * the active state and don't redefine them here. Also note 173 * that we don't need the reverse (output-enable) in the 174 * normal mode since the "output-enable" only matters for 175 * GPIO function. 176 */ 177 function = "gpio"; 178 output-disable; 179 }; 180}; 181