190db71e4SRajendra Nayak// SPDX-License-Identifier: BSD-3-Clause 290db71e4SRajendra Nayak/* 390db71e4SRajendra Nayak * SC7180 SoC device tree source 490db71e4SRajendra Nayak * 590db71e4SRajendra Nayak * Copyright (c) 2019, The Linux Foundation. All rights reserved. 690db71e4SRajendra Nayak */ 790db71e4SRajendra Nayak 8*e07f8354STaniya Das#include <dt-bindings/clock/qcom,dispcc-sc7180.h> 990db71e4SRajendra Nayak#include <dt-bindings/clock/qcom,gcc-sc7180.h> 10*e07f8354STaniya Das#include <dt-bindings/clock/qcom,gpucc-sc7180.h> 110def3f14STaniya Das#include <dt-bindings/clock/qcom,rpmh.h> 12*e07f8354STaniya Das#include <dt-bindings/clock/qcom,videocc-sc7180.h> 1390db71e4SRajendra Nayak#include <dt-bindings/interrupt-controller/arm-gic.h> 140b766e7fSSandeep Maheswaram#include <dt-bindings/phy/phy-qcom-qusb2.h> 15f5ab220dSSibi Sankar#include <dt-bindings/power/qcom-aoss-qmp.h> 16a16f862fSSibi Sankar#include <dt-bindings/power/qcom-rpmpd.h> 17f5ab220dSSibi Sankar#include <dt-bindings/reset/qcom,sdm845-aoss.h> 18f5ab220dSSibi Sankar#include <dt-bindings/reset/qcom,sdm845-pdc.h> 19fec6359cSMaulik Shah#include <dt-bindings/soc/qcom,rpmh-rsc.h> 202552c123SRajeshwari#include <dt-bindings/thermal/thermal.h> 2190db71e4SRajendra Nayak 2290db71e4SRajendra Nayak/ { 2390db71e4SRajendra Nayak interrupt-parent = <&intc>; 2490db71e4SRajendra Nayak 2590db71e4SRajendra Nayak #address-cells = <2>; 2690db71e4SRajendra Nayak #size-cells = <2>; 2790db71e4SRajendra Nayak 2890db71e4SRajendra Nayak chosen { }; 2990db71e4SRajendra Nayak 309868a31cSRajendra Nayak aliases { 319868a31cSRajendra Nayak i2c0 = &i2c0; 329868a31cSRajendra Nayak i2c1 = &i2c1; 339868a31cSRajendra Nayak i2c2 = &i2c2; 349868a31cSRajendra Nayak i2c3 = &i2c3; 359868a31cSRajendra Nayak i2c4 = &i2c4; 369868a31cSRajendra Nayak i2c5 = &i2c5; 379868a31cSRajendra Nayak i2c6 = &i2c6; 389868a31cSRajendra Nayak i2c7 = &i2c7; 399868a31cSRajendra Nayak i2c8 = &i2c8; 409868a31cSRajendra Nayak i2c9 = &i2c9; 419868a31cSRajendra Nayak i2c10 = &i2c10; 429868a31cSRajendra Nayak i2c11 = &i2c11; 439868a31cSRajendra Nayak spi0 = &spi0; 449868a31cSRajendra Nayak spi1 = &spi1; 459868a31cSRajendra Nayak spi3 = &spi3; 469868a31cSRajendra Nayak spi5 = &spi5; 479868a31cSRajendra Nayak spi6 = &spi6; 489868a31cSRajendra Nayak spi8 = &spi8; 499868a31cSRajendra Nayak spi10 = &spi10; 509868a31cSRajendra Nayak spi11 = &spi11; 519868a31cSRajendra Nayak }; 529868a31cSRajendra Nayak 5390db71e4SRajendra Nayak clocks { 5490db71e4SRajendra Nayak xo_board: xo-board { 5590db71e4SRajendra Nayak compatible = "fixed-clock"; 5690db71e4SRajendra Nayak clock-frequency = <38400000>; 5790db71e4SRajendra Nayak #clock-cells = <0>; 5890db71e4SRajendra Nayak }; 5990db71e4SRajendra Nayak 6090db71e4SRajendra Nayak sleep_clk: sleep-clk { 6190db71e4SRajendra Nayak compatible = "fixed-clock"; 6290db71e4SRajendra Nayak clock-frequency = <32764>; 6390db71e4SRajendra Nayak #clock-cells = <0>; 6490db71e4SRajendra Nayak }; 6590db71e4SRajendra Nayak }; 6690db71e4SRajendra Nayak 67e0abc5ebSMaulik Shah reserved_memory: reserved-memory { 68e0abc5ebSMaulik Shah #address-cells = <2>; 69e0abc5ebSMaulik Shah #size-cells = <2>; 70e0abc5ebSMaulik Shah ranges; 71e0abc5ebSMaulik Shah 72e0abc5ebSMaulik Shah aop_cmd_db_mem: memory@80820000 { 73e0abc5ebSMaulik Shah reg = <0x0 0x80820000 0x0 0x20000>; 74e0abc5ebSMaulik Shah compatible = "qcom,cmd-db"; 75f5ab220dSSibi Sankar }; 76f5ab220dSSibi Sankar 77f5ab220dSSibi Sankar smem_mem: memory@80900000 { 78f5ab220dSSibi Sankar reg = <0x0 0x80900000 0x0 0x200000>; 79e0abc5ebSMaulik Shah no-map; 80e0abc5ebSMaulik Shah }; 81e0abc5ebSMaulik Shah }; 82e0abc5ebSMaulik Shah 8390db71e4SRajendra Nayak cpus { 8490db71e4SRajendra Nayak #address-cells = <2>; 8590db71e4SRajendra Nayak #size-cells = <0>; 8690db71e4SRajendra Nayak 8790db71e4SRajendra Nayak CPU0: cpu@0 { 8890db71e4SRajendra Nayak device_type = "cpu"; 8990db71e4SRajendra Nayak compatible = "arm,armv8"; 9090db71e4SRajendra Nayak reg = <0x0 0x0>; 9190db71e4SRajendra Nayak enable-method = "psci"; 9290db71e4SRajendra Nayak next-level-cache = <&L2_0>; 932552c123SRajeshwari #cooling-cells = <2>; 9486899d82STaniya Das qcom,freq-domain = <&cpufreq_hw 0>; 9590db71e4SRajendra Nayak L2_0: l2-cache { 9690db71e4SRajendra Nayak compatible = "cache"; 9790db71e4SRajendra Nayak next-level-cache = <&L3_0>; 9890db71e4SRajendra Nayak L3_0: l3-cache { 9990db71e4SRajendra Nayak compatible = "cache"; 10090db71e4SRajendra Nayak }; 10190db71e4SRajendra Nayak }; 10290db71e4SRajendra Nayak }; 10390db71e4SRajendra Nayak 10490db71e4SRajendra Nayak CPU1: cpu@100 { 10590db71e4SRajendra Nayak device_type = "cpu"; 10690db71e4SRajendra Nayak compatible = "arm,armv8"; 10790db71e4SRajendra Nayak reg = <0x0 0x100>; 10890db71e4SRajendra Nayak enable-method = "psci"; 10990db71e4SRajendra Nayak next-level-cache = <&L2_100>; 1102552c123SRajeshwari #cooling-cells = <2>; 11186899d82STaniya Das qcom,freq-domain = <&cpufreq_hw 0>; 11290db71e4SRajendra Nayak L2_100: l2-cache { 11390db71e4SRajendra Nayak compatible = "cache"; 11490db71e4SRajendra Nayak next-level-cache = <&L3_0>; 11590db71e4SRajendra Nayak }; 11690db71e4SRajendra Nayak }; 11790db71e4SRajendra Nayak 11890db71e4SRajendra Nayak CPU2: cpu@200 { 11990db71e4SRajendra Nayak device_type = "cpu"; 12090db71e4SRajendra Nayak compatible = "arm,armv8"; 12190db71e4SRajendra Nayak reg = <0x0 0x200>; 12290db71e4SRajendra Nayak enable-method = "psci"; 12390db71e4SRajendra Nayak next-level-cache = <&L2_200>; 1242552c123SRajeshwari #cooling-cells = <2>; 12586899d82STaniya Das qcom,freq-domain = <&cpufreq_hw 0>; 12690db71e4SRajendra Nayak L2_200: l2-cache { 12790db71e4SRajendra Nayak compatible = "cache"; 12890db71e4SRajendra Nayak next-level-cache = <&L3_0>; 12990db71e4SRajendra Nayak }; 13090db71e4SRajendra Nayak }; 13190db71e4SRajendra Nayak 13290db71e4SRajendra Nayak CPU3: cpu@300 { 13390db71e4SRajendra Nayak device_type = "cpu"; 13490db71e4SRajendra Nayak compatible = "arm,armv8"; 13590db71e4SRajendra Nayak reg = <0x0 0x300>; 13690db71e4SRajendra Nayak enable-method = "psci"; 13790db71e4SRajendra Nayak next-level-cache = <&L2_300>; 1382552c123SRajeshwari #cooling-cells = <2>; 13986899d82STaniya Das qcom,freq-domain = <&cpufreq_hw 0>; 14090db71e4SRajendra Nayak L2_300: l2-cache { 14190db71e4SRajendra Nayak compatible = "cache"; 14290db71e4SRajendra Nayak next-level-cache = <&L3_0>; 14390db71e4SRajendra Nayak }; 14490db71e4SRajendra Nayak }; 14590db71e4SRajendra Nayak 14690db71e4SRajendra Nayak CPU4: cpu@400 { 14790db71e4SRajendra Nayak device_type = "cpu"; 14890db71e4SRajendra Nayak compatible = "arm,armv8"; 14990db71e4SRajendra Nayak reg = <0x0 0x400>; 15090db71e4SRajendra Nayak enable-method = "psci"; 15190db71e4SRajendra Nayak next-level-cache = <&L2_400>; 1522552c123SRajeshwari #cooling-cells = <2>; 15386899d82STaniya Das qcom,freq-domain = <&cpufreq_hw 0>; 15490db71e4SRajendra Nayak L2_400: l2-cache { 15590db71e4SRajendra Nayak compatible = "cache"; 15690db71e4SRajendra Nayak next-level-cache = <&L3_0>; 15790db71e4SRajendra Nayak }; 15890db71e4SRajendra Nayak }; 15990db71e4SRajendra Nayak 16090db71e4SRajendra Nayak CPU5: cpu@500 { 16190db71e4SRajendra Nayak device_type = "cpu"; 16290db71e4SRajendra Nayak compatible = "arm,armv8"; 16390db71e4SRajendra Nayak reg = <0x0 0x500>; 16490db71e4SRajendra Nayak enable-method = "psci"; 16590db71e4SRajendra Nayak next-level-cache = <&L2_500>; 1662552c123SRajeshwari #cooling-cells = <2>; 16786899d82STaniya Das qcom,freq-domain = <&cpufreq_hw 0>; 16890db71e4SRajendra Nayak L2_500: l2-cache { 16990db71e4SRajendra Nayak compatible = "cache"; 17090db71e4SRajendra Nayak next-level-cache = <&L3_0>; 17190db71e4SRajendra Nayak }; 17290db71e4SRajendra Nayak }; 17390db71e4SRajendra Nayak 17490db71e4SRajendra Nayak CPU6: cpu@600 { 17590db71e4SRajendra Nayak device_type = "cpu"; 17690db71e4SRajendra Nayak compatible = "arm,armv8"; 17790db71e4SRajendra Nayak reg = <0x0 0x600>; 17890db71e4SRajendra Nayak enable-method = "psci"; 17990db71e4SRajendra Nayak next-level-cache = <&L2_600>; 1802552c123SRajeshwari #cooling-cells = <2>; 18186899d82STaniya Das qcom,freq-domain = <&cpufreq_hw 1>; 18290db71e4SRajendra Nayak L2_600: l2-cache { 18390db71e4SRajendra Nayak compatible = "cache"; 18490db71e4SRajendra Nayak next-level-cache = <&L3_0>; 18590db71e4SRajendra Nayak }; 18690db71e4SRajendra Nayak }; 18790db71e4SRajendra Nayak 18890db71e4SRajendra Nayak CPU7: cpu@700 { 18990db71e4SRajendra Nayak device_type = "cpu"; 19090db71e4SRajendra Nayak compatible = "arm,armv8"; 19190db71e4SRajendra Nayak reg = <0x0 0x700>; 19290db71e4SRajendra Nayak enable-method = "psci"; 19390db71e4SRajendra Nayak next-level-cache = <&L2_700>; 1942552c123SRajeshwari #cooling-cells = <2>; 19586899d82STaniya Das qcom,freq-domain = <&cpufreq_hw 1>; 19690db71e4SRajendra Nayak L2_700: l2-cache { 19790db71e4SRajendra Nayak compatible = "cache"; 19890db71e4SRajendra Nayak next-level-cache = <&L3_0>; 19990db71e4SRajendra Nayak }; 20090db71e4SRajendra Nayak }; 20190db71e4SRajendra Nayak }; 20290db71e4SRajendra Nayak 20390db71e4SRajendra Nayak memory@80000000 { 20490db71e4SRajendra Nayak device_type = "memory"; 20590db71e4SRajendra Nayak /* We expect the bootloader to fill in the size */ 20690db71e4SRajendra Nayak reg = <0 0x80000000 0 0>; 20790db71e4SRajendra Nayak }; 20890db71e4SRajendra Nayak 20990db71e4SRajendra Nayak pmu { 21090db71e4SRajendra Nayak compatible = "arm,armv8-pmuv3"; 21190db71e4SRajendra Nayak interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH>; 21290db71e4SRajendra Nayak }; 21390db71e4SRajendra Nayak 214f5ab220dSSibi Sankar firmware { 215f5ab220dSSibi Sankar scm { 216f5ab220dSSibi Sankar compatible = "qcom,scm-sc7180", "qcom,scm"; 217f5ab220dSSibi Sankar }; 218f5ab220dSSibi Sankar }; 219f5ab220dSSibi Sankar 220f5ab220dSSibi Sankar tcsr_mutex: hwlock { 221f5ab220dSSibi Sankar compatible = "qcom,tcsr-mutex"; 222f5ab220dSSibi Sankar syscon = <&tcsr_mutex_regs 0 0x1000>; 223f5ab220dSSibi Sankar #hwlock-cells = <1>; 224f5ab220dSSibi Sankar }; 225f5ab220dSSibi Sankar 226f5ab220dSSibi Sankar smem { 227f5ab220dSSibi Sankar compatible = "qcom,smem"; 228f5ab220dSSibi Sankar memory-region = <&smem_mem>; 229f5ab220dSSibi Sankar hwlocks = <&tcsr_mutex 3>; 230f5ab220dSSibi Sankar }; 231f5ab220dSSibi Sankar 232f5ab220dSSibi Sankar smp2p-cdsp { 233f5ab220dSSibi Sankar compatible = "qcom,smp2p"; 234f5ab220dSSibi Sankar qcom,smem = <94>, <432>; 235f5ab220dSSibi Sankar 236f5ab220dSSibi Sankar interrupts = <GIC_SPI 576 IRQ_TYPE_EDGE_RISING>; 237f5ab220dSSibi Sankar 238f5ab220dSSibi Sankar mboxes = <&apss_shared 6>; 239f5ab220dSSibi Sankar 240f5ab220dSSibi Sankar qcom,local-pid = <0>; 241f5ab220dSSibi Sankar qcom,remote-pid = <5>; 242f5ab220dSSibi Sankar 243f5ab220dSSibi Sankar cdsp_smp2p_out: master-kernel { 244f5ab220dSSibi Sankar qcom,entry-name = "master-kernel"; 245f5ab220dSSibi Sankar #qcom,smem-state-cells = <1>; 246f5ab220dSSibi Sankar }; 247f5ab220dSSibi Sankar 248f5ab220dSSibi Sankar cdsp_smp2p_in: slave-kernel { 249f5ab220dSSibi Sankar qcom,entry-name = "slave-kernel"; 250f5ab220dSSibi Sankar 251f5ab220dSSibi Sankar interrupt-controller; 252f5ab220dSSibi Sankar #interrupt-cells = <2>; 253f5ab220dSSibi Sankar }; 254f5ab220dSSibi Sankar }; 255f5ab220dSSibi Sankar 256f5ab220dSSibi Sankar smp2p-lpass { 257f5ab220dSSibi Sankar compatible = "qcom,smp2p"; 258f5ab220dSSibi Sankar qcom,smem = <443>, <429>; 259f5ab220dSSibi Sankar 260f5ab220dSSibi Sankar interrupts = <GIC_SPI 158 IRQ_TYPE_EDGE_RISING>; 261f5ab220dSSibi Sankar 262f5ab220dSSibi Sankar mboxes = <&apss_shared 10>; 263f5ab220dSSibi Sankar 264f5ab220dSSibi Sankar qcom,local-pid = <0>; 265f5ab220dSSibi Sankar qcom,remote-pid = <2>; 266f5ab220dSSibi Sankar 267f5ab220dSSibi Sankar adsp_smp2p_out: master-kernel { 268f5ab220dSSibi Sankar qcom,entry-name = "master-kernel"; 269f5ab220dSSibi Sankar #qcom,smem-state-cells = <1>; 270f5ab220dSSibi Sankar }; 271f5ab220dSSibi Sankar 272f5ab220dSSibi Sankar adsp_smp2p_in: slave-kernel { 273f5ab220dSSibi Sankar qcom,entry-name = "slave-kernel"; 274f5ab220dSSibi Sankar 275f5ab220dSSibi Sankar interrupt-controller; 276f5ab220dSSibi Sankar #interrupt-cells = <2>; 277f5ab220dSSibi Sankar }; 278f5ab220dSSibi Sankar }; 279f5ab220dSSibi Sankar 280f5ab220dSSibi Sankar smp2p-mpss { 281f5ab220dSSibi Sankar compatible = "qcom,smp2p"; 282f5ab220dSSibi Sankar qcom,smem = <435>, <428>; 283f5ab220dSSibi Sankar interrupts = <GIC_SPI 451 IRQ_TYPE_EDGE_RISING>; 284f5ab220dSSibi Sankar mboxes = <&apss_shared 14>; 285f5ab220dSSibi Sankar qcom,local-pid = <0>; 286f5ab220dSSibi Sankar qcom,remote-pid = <1>; 287f5ab220dSSibi Sankar 288f5ab220dSSibi Sankar modem_smp2p_out: master-kernel { 289f5ab220dSSibi Sankar qcom,entry-name = "master-kernel"; 290f5ab220dSSibi Sankar #qcom,smem-state-cells = <1>; 291f5ab220dSSibi Sankar }; 292f5ab220dSSibi Sankar 293f5ab220dSSibi Sankar modem_smp2p_in: slave-kernel { 294f5ab220dSSibi Sankar qcom,entry-name = "slave-kernel"; 295f5ab220dSSibi Sankar interrupt-controller; 296f5ab220dSSibi Sankar #interrupt-cells = <2>; 297f5ab220dSSibi Sankar }; 298f5ab220dSSibi Sankar }; 299f5ab220dSSibi Sankar 30090db71e4SRajendra Nayak psci { 30190db71e4SRajendra Nayak compatible = "arm,psci-1.0"; 30290db71e4SRajendra Nayak method = "smc"; 30390db71e4SRajendra Nayak }; 30490db71e4SRajendra Nayak 30590db71e4SRajendra Nayak soc: soc { 30690db71e4SRajendra Nayak #address-cells = <2>; 30790db71e4SRajendra Nayak #size-cells = <2>; 30890db71e4SRajendra Nayak ranges = <0 0 0 0 0x10 0>; 30990db71e4SRajendra Nayak dma-ranges = <0 0 0 0 0x10 0>; 31090db71e4SRajendra Nayak compatible = "simple-bus"; 31190db71e4SRajendra Nayak 31290db71e4SRajendra Nayak gcc: clock-controller@100000 { 31390db71e4SRajendra Nayak compatible = "qcom,gcc-sc7180"; 31490db71e4SRajendra Nayak reg = <0 0x00100000 0 0x1f0000>; 3150def3f14STaniya Das clocks = <&rpmhcc RPMH_CXO_CLK>, 316b418cf63SDouglas Anderson <&rpmhcc RPMH_CXO_CLK_A>, 317b418cf63SDouglas Anderson <&sleep_clk>; 318b418cf63SDouglas Anderson clock-names = "bi_tcxo", "bi_tcxo_ao", "sleep_clk"; 31990db71e4SRajendra Nayak #clock-cells = <1>; 32090db71e4SRajendra Nayak #reset-cells = <1>; 32190db71e4SRajendra Nayak #power-domain-cells = <1>; 32290db71e4SRajendra Nayak }; 32390db71e4SRajendra Nayak 3240b766e7fSSandeep Maheswaram qfprom@784000 { 3250b766e7fSSandeep Maheswaram compatible = "qcom,qfprom"; 3260b766e7fSSandeep Maheswaram reg = <0 0x00784000 0 0x8ff>; 3270b766e7fSSandeep Maheswaram #address-cells = <1>; 3280b766e7fSSandeep Maheswaram #size-cells = <1>; 3290b766e7fSSandeep Maheswaram 3300b766e7fSSandeep Maheswaram qusb2p_hstx_trim: hstx-trim-primary@25b { 3310b766e7fSSandeep Maheswaram reg = <0x25b 0x1>; 3320b766e7fSSandeep Maheswaram bits = <1 3>; 3330b766e7fSSandeep Maheswaram }; 3340b766e7fSSandeep Maheswaram }; 3350b766e7fSSandeep Maheswaram 33624254a8eSVeerabhadrarao Badiganti sdhc_1: sdhci@7c4000 { 33724254a8eSVeerabhadrarao Badiganti compatible = "qcom,sc7180-sdhci", "qcom,sdhci-msm-v5"; 33824254a8eSVeerabhadrarao Badiganti reg = <0 0x7c4000 0 0x1000>, 33924254a8eSVeerabhadrarao Badiganti <0 0x07c5000 0 0x1000>; 34024254a8eSVeerabhadrarao Badiganti reg-names = "hc_mem", "cqhci_mem"; 34124254a8eSVeerabhadrarao Badiganti 34224254a8eSVeerabhadrarao Badiganti iommus = <&apps_smmu 0x60 0x0>; 34324254a8eSVeerabhadrarao Badiganti interrupts = <GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH>, 34424254a8eSVeerabhadrarao Badiganti <GIC_SPI 644 IRQ_TYPE_LEVEL_HIGH>; 34524254a8eSVeerabhadrarao Badiganti interrupt-names = "hc_irq", "pwr_irq"; 34624254a8eSVeerabhadrarao Badiganti 34724254a8eSVeerabhadrarao Badiganti clocks = <&gcc GCC_SDCC1_APPS_CLK>, 34824254a8eSVeerabhadrarao Badiganti <&gcc GCC_SDCC1_AHB_CLK>; 34924254a8eSVeerabhadrarao Badiganti clock-names = "core", "iface"; 35024254a8eSVeerabhadrarao Badiganti 35124254a8eSVeerabhadrarao Badiganti bus-width = <8>; 35224254a8eSVeerabhadrarao Badiganti non-removable; 35324254a8eSVeerabhadrarao Badiganti supports-cqe; 35424254a8eSVeerabhadrarao Badiganti 35524254a8eSVeerabhadrarao Badiganti mmc-ddr-1_8v; 35624254a8eSVeerabhadrarao Badiganti mmc-hs200-1_8v; 35724254a8eSVeerabhadrarao Badiganti mmc-hs400-1_8v; 35824254a8eSVeerabhadrarao Badiganti mmc-hs400-enhanced-strobe; 35924254a8eSVeerabhadrarao Badiganti 36024254a8eSVeerabhadrarao Badiganti status = "disabled"; 36124254a8eSVeerabhadrarao Badiganti }; 36224254a8eSVeerabhadrarao Badiganti 363ba3fc649SRoja Rani Yarubandi qupv3_id_0: geniqup@8c0000 { 364ba3fc649SRoja Rani Yarubandi compatible = "qcom,geni-se-qup"; 365ba3fc649SRoja Rani Yarubandi reg = <0 0x008c0000 0 0x6000>; 366ba3fc649SRoja Rani Yarubandi clock-names = "m-ahb", "s-ahb"; 367ba3fc649SRoja Rani Yarubandi clocks = <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>, 368ba3fc649SRoja Rani Yarubandi <&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>; 369ba3fc649SRoja Rani Yarubandi #address-cells = <2>; 370ba3fc649SRoja Rani Yarubandi #size-cells = <2>; 371ba3fc649SRoja Rani Yarubandi ranges; 3723d60d80aSSai Prakash Ranjan iommus = <&apps_smmu 0x43 0x0>; 373ba3fc649SRoja Rani Yarubandi status = "disabled"; 374ba3fc649SRoja Rani Yarubandi 375ba3fc649SRoja Rani Yarubandi i2c0: i2c@880000 { 376ba3fc649SRoja Rani Yarubandi compatible = "qcom,geni-i2c"; 377ba3fc649SRoja Rani Yarubandi reg = <0 0x00880000 0 0x4000>; 378ba3fc649SRoja Rani Yarubandi clock-names = "se"; 379ba3fc649SRoja Rani Yarubandi clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>; 380ba3fc649SRoja Rani Yarubandi pinctrl-names = "default"; 381ba3fc649SRoja Rani Yarubandi pinctrl-0 = <&qup_i2c0_default>; 382ba3fc649SRoja Rani Yarubandi interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>; 383ba3fc649SRoja Rani Yarubandi #address-cells = <1>; 384ba3fc649SRoja Rani Yarubandi #size-cells = <0>; 385ba3fc649SRoja Rani Yarubandi status = "disabled"; 386ba3fc649SRoja Rani Yarubandi }; 387ba3fc649SRoja Rani Yarubandi 388ba3fc649SRoja Rani Yarubandi spi0: spi@880000 { 389ba3fc649SRoja Rani Yarubandi compatible = "qcom,geni-spi"; 390ba3fc649SRoja Rani Yarubandi reg = <0 0x00880000 0 0x4000>; 391ba3fc649SRoja Rani Yarubandi clock-names = "se"; 392ba3fc649SRoja Rani Yarubandi clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>; 393ba3fc649SRoja Rani Yarubandi pinctrl-names = "default"; 394ba3fc649SRoja Rani Yarubandi pinctrl-0 = <&qup_spi0_default>; 395ba3fc649SRoja Rani Yarubandi interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>; 396ba3fc649SRoja Rani Yarubandi #address-cells = <1>; 397ba3fc649SRoja Rani Yarubandi #size-cells = <0>; 398ba3fc649SRoja Rani Yarubandi status = "disabled"; 399ba3fc649SRoja Rani Yarubandi }; 400ba3fc649SRoja Rani Yarubandi 401ba3fc649SRoja Rani Yarubandi uart0: serial@880000 { 402ba3fc649SRoja Rani Yarubandi compatible = "qcom,geni-uart"; 403ba3fc649SRoja Rani Yarubandi reg = <0 0x00880000 0 0x4000>; 404ba3fc649SRoja Rani Yarubandi clock-names = "se"; 405ba3fc649SRoja Rani Yarubandi clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>; 406ba3fc649SRoja Rani Yarubandi pinctrl-names = "default"; 407ba3fc649SRoja Rani Yarubandi pinctrl-0 = <&qup_uart0_default>; 408ba3fc649SRoja Rani Yarubandi interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>; 409ba3fc649SRoja Rani Yarubandi status = "disabled"; 410ba3fc649SRoja Rani Yarubandi }; 411ba3fc649SRoja Rani Yarubandi 412ba3fc649SRoja Rani Yarubandi i2c1: i2c@884000 { 413ba3fc649SRoja Rani Yarubandi compatible = "qcom,geni-i2c"; 414ba3fc649SRoja Rani Yarubandi reg = <0 0x00884000 0 0x4000>; 415ba3fc649SRoja Rani Yarubandi clock-names = "se"; 416ba3fc649SRoja Rani Yarubandi clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>; 417ba3fc649SRoja Rani Yarubandi pinctrl-names = "default"; 418ba3fc649SRoja Rani Yarubandi pinctrl-0 = <&qup_i2c1_default>; 419ba3fc649SRoja Rani Yarubandi interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>; 420ba3fc649SRoja Rani Yarubandi #address-cells = <1>; 421ba3fc649SRoja Rani Yarubandi #size-cells = <0>; 422ba3fc649SRoja Rani Yarubandi status = "disabled"; 423ba3fc649SRoja Rani Yarubandi }; 424ba3fc649SRoja Rani Yarubandi 425ba3fc649SRoja Rani Yarubandi spi1: spi@884000 { 426ba3fc649SRoja Rani Yarubandi compatible = "qcom,geni-spi"; 427ba3fc649SRoja Rani Yarubandi reg = <0 0x00884000 0 0x4000>; 428ba3fc649SRoja Rani Yarubandi clock-names = "se"; 429ba3fc649SRoja Rani Yarubandi clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>; 430ba3fc649SRoja Rani Yarubandi pinctrl-names = "default"; 431ba3fc649SRoja Rani Yarubandi pinctrl-0 = <&qup_spi1_default>; 432ba3fc649SRoja Rani Yarubandi interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>; 433ba3fc649SRoja Rani Yarubandi #address-cells = <1>; 434ba3fc649SRoja Rani Yarubandi #size-cells = <0>; 435ba3fc649SRoja Rani Yarubandi status = "disabled"; 436ba3fc649SRoja Rani Yarubandi }; 437ba3fc649SRoja Rani Yarubandi 438ba3fc649SRoja Rani Yarubandi uart1: serial@884000 { 439ba3fc649SRoja Rani Yarubandi compatible = "qcom,geni-uart"; 440ba3fc649SRoja Rani Yarubandi reg = <0 0x00884000 0 0x4000>; 441ba3fc649SRoja Rani Yarubandi clock-names = "se"; 442ba3fc649SRoja Rani Yarubandi clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>; 443ba3fc649SRoja Rani Yarubandi pinctrl-names = "default"; 444ba3fc649SRoja Rani Yarubandi pinctrl-0 = <&qup_uart1_default>; 445ba3fc649SRoja Rani Yarubandi interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>; 446ba3fc649SRoja Rani Yarubandi status = "disabled"; 447ba3fc649SRoja Rani Yarubandi }; 448ba3fc649SRoja Rani Yarubandi 449ba3fc649SRoja Rani Yarubandi i2c2: i2c@888000 { 450ba3fc649SRoja Rani Yarubandi compatible = "qcom,geni-i2c"; 451ba3fc649SRoja Rani Yarubandi reg = <0 0x00888000 0 0x4000>; 452ba3fc649SRoja Rani Yarubandi clock-names = "se"; 453ba3fc649SRoja Rani Yarubandi clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>; 454ba3fc649SRoja Rani Yarubandi pinctrl-names = "default"; 455ba3fc649SRoja Rani Yarubandi pinctrl-0 = <&qup_i2c2_default>; 456ba3fc649SRoja Rani Yarubandi interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>; 457ba3fc649SRoja Rani Yarubandi #address-cells = <1>; 458ba3fc649SRoja Rani Yarubandi #size-cells = <0>; 459ba3fc649SRoja Rani Yarubandi status = "disabled"; 460ba3fc649SRoja Rani Yarubandi }; 461ba3fc649SRoja Rani Yarubandi 462ba3fc649SRoja Rani Yarubandi uart2: serial@888000 { 463ba3fc649SRoja Rani Yarubandi compatible = "qcom,geni-uart"; 464ba3fc649SRoja Rani Yarubandi reg = <0 0x00888000 0 0x4000>; 465ba3fc649SRoja Rani Yarubandi clock-names = "se"; 466ba3fc649SRoja Rani Yarubandi clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>; 467ba3fc649SRoja Rani Yarubandi pinctrl-names = "default"; 468ba3fc649SRoja Rani Yarubandi pinctrl-0 = <&qup_uart2_default>; 469ba3fc649SRoja Rani Yarubandi interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>; 470ba3fc649SRoja Rani Yarubandi status = "disabled"; 471ba3fc649SRoja Rani Yarubandi }; 472ba3fc649SRoja Rani Yarubandi 473ba3fc649SRoja Rani Yarubandi i2c3: i2c@88c000 { 474ba3fc649SRoja Rani Yarubandi compatible = "qcom,geni-i2c"; 475ba3fc649SRoja Rani Yarubandi reg = <0 0x0088c000 0 0x4000>; 476ba3fc649SRoja Rani Yarubandi clock-names = "se"; 477ba3fc649SRoja Rani Yarubandi clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>; 478ba3fc649SRoja Rani Yarubandi pinctrl-names = "default"; 479ba3fc649SRoja Rani Yarubandi pinctrl-0 = <&qup_i2c3_default>; 480ba3fc649SRoja Rani Yarubandi interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>; 481ba3fc649SRoja Rani Yarubandi #address-cells = <1>; 482ba3fc649SRoja Rani Yarubandi #size-cells = <0>; 483ba3fc649SRoja Rani Yarubandi status = "disabled"; 484ba3fc649SRoja Rani Yarubandi }; 485ba3fc649SRoja Rani Yarubandi 486ba3fc649SRoja Rani Yarubandi spi3: spi@88c000 { 487ba3fc649SRoja Rani Yarubandi compatible = "qcom,geni-spi"; 488ba3fc649SRoja Rani Yarubandi reg = <0 0x0088c000 0 0x4000>; 489ba3fc649SRoja Rani Yarubandi clock-names = "se"; 490ba3fc649SRoja Rani Yarubandi clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>; 491ba3fc649SRoja Rani Yarubandi pinctrl-names = "default"; 492ba3fc649SRoja Rani Yarubandi pinctrl-0 = <&qup_spi3_default>; 493ba3fc649SRoja Rani Yarubandi interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>; 494ba3fc649SRoja Rani Yarubandi #address-cells = <1>; 495ba3fc649SRoja Rani Yarubandi #size-cells = <0>; 496ba3fc649SRoja Rani Yarubandi status = "disabled"; 497ba3fc649SRoja Rani Yarubandi }; 498ba3fc649SRoja Rani Yarubandi 499ba3fc649SRoja Rani Yarubandi uart3: serial@88c000 { 500ba3fc649SRoja Rani Yarubandi compatible = "qcom,geni-uart"; 501ba3fc649SRoja Rani Yarubandi reg = <0 0x0088c000 0 0x4000>; 502ba3fc649SRoja Rani Yarubandi clock-names = "se"; 503ba3fc649SRoja Rani Yarubandi clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>; 504ba3fc649SRoja Rani Yarubandi pinctrl-names = "default"; 505ba3fc649SRoja Rani Yarubandi pinctrl-0 = <&qup_uart3_default>; 506ba3fc649SRoja Rani Yarubandi interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>; 507ba3fc649SRoja Rani Yarubandi status = "disabled"; 508ba3fc649SRoja Rani Yarubandi }; 509ba3fc649SRoja Rani Yarubandi 510ba3fc649SRoja Rani Yarubandi i2c4: i2c@890000 { 511ba3fc649SRoja Rani Yarubandi compatible = "qcom,geni-i2c"; 512ba3fc649SRoja Rani Yarubandi reg = <0 0x00890000 0 0x4000>; 513ba3fc649SRoja Rani Yarubandi clock-names = "se"; 514ba3fc649SRoja Rani Yarubandi clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>; 515ba3fc649SRoja Rani Yarubandi pinctrl-names = "default"; 516ba3fc649SRoja Rani Yarubandi pinctrl-0 = <&qup_i2c4_default>; 517ba3fc649SRoja Rani Yarubandi interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>; 518ba3fc649SRoja Rani Yarubandi #address-cells = <1>; 519ba3fc649SRoja Rani Yarubandi #size-cells = <0>; 520ba3fc649SRoja Rani Yarubandi status = "disabled"; 521ba3fc649SRoja Rani Yarubandi }; 522ba3fc649SRoja Rani Yarubandi 523ba3fc649SRoja Rani Yarubandi uart4: serial@890000 { 524ba3fc649SRoja Rani Yarubandi compatible = "qcom,geni-uart"; 525ba3fc649SRoja Rani Yarubandi reg = <0 0x00890000 0 0x4000>; 526ba3fc649SRoja Rani Yarubandi clock-names = "se"; 527ba3fc649SRoja Rani Yarubandi clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>; 528ba3fc649SRoja Rani Yarubandi pinctrl-names = "default"; 529ba3fc649SRoja Rani Yarubandi pinctrl-0 = <&qup_uart4_default>; 530ba3fc649SRoja Rani Yarubandi interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>; 531ba3fc649SRoja Rani Yarubandi status = "disabled"; 532ba3fc649SRoja Rani Yarubandi }; 533ba3fc649SRoja Rani Yarubandi 534ba3fc649SRoja Rani Yarubandi i2c5: i2c@894000 { 535ba3fc649SRoja Rani Yarubandi compatible = "qcom,geni-i2c"; 536ba3fc649SRoja Rani Yarubandi reg = <0 0x00894000 0 0x4000>; 537ba3fc649SRoja Rani Yarubandi clock-names = "se"; 538ba3fc649SRoja Rani Yarubandi clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>; 539ba3fc649SRoja Rani Yarubandi pinctrl-names = "default"; 540ba3fc649SRoja Rani Yarubandi pinctrl-0 = <&qup_i2c5_default>; 541ba3fc649SRoja Rani Yarubandi interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>; 542ba3fc649SRoja Rani Yarubandi #address-cells = <1>; 543ba3fc649SRoja Rani Yarubandi #size-cells = <0>; 544ba3fc649SRoja Rani Yarubandi status = "disabled"; 545ba3fc649SRoja Rani Yarubandi }; 546ba3fc649SRoja Rani Yarubandi 547ba3fc649SRoja Rani Yarubandi spi5: spi@894000 { 548ba3fc649SRoja Rani Yarubandi compatible = "qcom,geni-spi"; 549ba3fc649SRoja Rani Yarubandi reg = <0 0x00894000 0 0x4000>; 550ba3fc649SRoja Rani Yarubandi clock-names = "se"; 551ba3fc649SRoja Rani Yarubandi clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>; 552ba3fc649SRoja Rani Yarubandi pinctrl-names = "default"; 553ba3fc649SRoja Rani Yarubandi pinctrl-0 = <&qup_spi5_default>; 554ba3fc649SRoja Rani Yarubandi interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>; 555ba3fc649SRoja Rani Yarubandi #address-cells = <1>; 556ba3fc649SRoja Rani Yarubandi #size-cells = <0>; 557ba3fc649SRoja Rani Yarubandi status = "disabled"; 558ba3fc649SRoja Rani Yarubandi }; 559ba3fc649SRoja Rani Yarubandi 560ba3fc649SRoja Rani Yarubandi uart5: serial@894000 { 561ba3fc649SRoja Rani Yarubandi compatible = "qcom,geni-uart"; 562ba3fc649SRoja Rani Yarubandi reg = <0 0x00894000 0 0x4000>; 563ba3fc649SRoja Rani Yarubandi clock-names = "se"; 564ba3fc649SRoja Rani Yarubandi clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>; 565ba3fc649SRoja Rani Yarubandi pinctrl-names = "default"; 566ba3fc649SRoja Rani Yarubandi pinctrl-0 = <&qup_uart5_default>; 567ba3fc649SRoja Rani Yarubandi interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>; 568ba3fc649SRoja Rani Yarubandi status = "disabled"; 569ba3fc649SRoja Rani Yarubandi }; 570ba3fc649SRoja Rani Yarubandi }; 571ba3fc649SRoja Rani Yarubandi 57290db71e4SRajendra Nayak qupv3_id_1: geniqup@ac0000 { 57390db71e4SRajendra Nayak compatible = "qcom,geni-se-qup"; 57490db71e4SRajendra Nayak reg = <0 0x00ac0000 0 0x6000>; 57590db71e4SRajendra Nayak clock-names = "m-ahb", "s-ahb"; 57690db71e4SRajendra Nayak clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>, 57790db71e4SRajendra Nayak <&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>; 57890db71e4SRajendra Nayak #address-cells = <2>; 57990db71e4SRajendra Nayak #size-cells = <2>; 58090db71e4SRajendra Nayak ranges; 5813d60d80aSSai Prakash Ranjan iommus = <&apps_smmu 0x4c3 0x0>; 58290db71e4SRajendra Nayak status = "disabled"; 58390db71e4SRajendra Nayak 584ba3fc649SRoja Rani Yarubandi i2c6: i2c@a80000 { 585ba3fc649SRoja Rani Yarubandi compatible = "qcom,geni-i2c"; 586ba3fc649SRoja Rani Yarubandi reg = <0 0x00a80000 0 0x4000>; 587ba3fc649SRoja Rani Yarubandi clock-names = "se"; 588ba3fc649SRoja Rani Yarubandi clocks = <&gcc GCC_QUPV3_WRAP1_S0_CLK>; 589ba3fc649SRoja Rani Yarubandi pinctrl-names = "default"; 590ba3fc649SRoja Rani Yarubandi pinctrl-0 = <&qup_i2c6_default>; 591ba3fc649SRoja Rani Yarubandi interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 592ba3fc649SRoja Rani Yarubandi #address-cells = <1>; 593ba3fc649SRoja Rani Yarubandi #size-cells = <0>; 594ba3fc649SRoja Rani Yarubandi status = "disabled"; 595ba3fc649SRoja Rani Yarubandi }; 596ba3fc649SRoja Rani Yarubandi 597ba3fc649SRoja Rani Yarubandi spi6: spi@a80000 { 598ba3fc649SRoja Rani Yarubandi compatible = "qcom,geni-spi"; 599ba3fc649SRoja Rani Yarubandi reg = <0 0x00a80000 0 0x4000>; 600ba3fc649SRoja Rani Yarubandi clock-names = "se"; 601ba3fc649SRoja Rani Yarubandi clocks = <&gcc GCC_QUPV3_WRAP1_S0_CLK>; 602ba3fc649SRoja Rani Yarubandi pinctrl-names = "default"; 603ba3fc649SRoja Rani Yarubandi pinctrl-0 = <&qup_spi6_default>; 604ba3fc649SRoja Rani Yarubandi interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 605ba3fc649SRoja Rani Yarubandi #address-cells = <1>; 606ba3fc649SRoja Rani Yarubandi #size-cells = <0>; 607ba3fc649SRoja Rani Yarubandi status = "disabled"; 608ba3fc649SRoja Rani Yarubandi }; 609ba3fc649SRoja Rani Yarubandi 610ba3fc649SRoja Rani Yarubandi uart6: serial@a80000 { 611ba3fc649SRoja Rani Yarubandi compatible = "qcom,geni-uart"; 612ba3fc649SRoja Rani Yarubandi reg = <0 0x00a80000 0 0x4000>; 613ba3fc649SRoja Rani Yarubandi clock-names = "se"; 614ba3fc649SRoja Rani Yarubandi clocks = <&gcc GCC_QUPV3_WRAP1_S0_CLK>; 615ba3fc649SRoja Rani Yarubandi pinctrl-names = "default"; 616ba3fc649SRoja Rani Yarubandi pinctrl-0 = <&qup_uart6_default>; 617ba3fc649SRoja Rani Yarubandi interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 618ba3fc649SRoja Rani Yarubandi status = "disabled"; 619ba3fc649SRoja Rani Yarubandi }; 620ba3fc649SRoja Rani Yarubandi 621ba3fc649SRoja Rani Yarubandi i2c7: i2c@a84000 { 622ba3fc649SRoja Rani Yarubandi compatible = "qcom,geni-i2c"; 623ba3fc649SRoja Rani Yarubandi reg = <0 0x00a84000 0 0x4000>; 624ba3fc649SRoja Rani Yarubandi clock-names = "se"; 625ba3fc649SRoja Rani Yarubandi clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>; 626ba3fc649SRoja Rani Yarubandi pinctrl-names = "default"; 627ba3fc649SRoja Rani Yarubandi pinctrl-0 = <&qup_i2c7_default>; 628ba3fc649SRoja Rani Yarubandi interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 629ba3fc649SRoja Rani Yarubandi #address-cells = <1>; 630ba3fc649SRoja Rani Yarubandi #size-cells = <0>; 631ba3fc649SRoja Rani Yarubandi status = "disabled"; 632ba3fc649SRoja Rani Yarubandi }; 633ba3fc649SRoja Rani Yarubandi 634ba3fc649SRoja Rani Yarubandi uart7: serial@a84000 { 635ba3fc649SRoja Rani Yarubandi compatible = "qcom,geni-uart"; 636ba3fc649SRoja Rani Yarubandi reg = <0 0x00a84000 0 0x4000>; 637ba3fc649SRoja Rani Yarubandi clock-names = "se"; 638ba3fc649SRoja Rani Yarubandi clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>; 639ba3fc649SRoja Rani Yarubandi pinctrl-names = "default"; 640ba3fc649SRoja Rani Yarubandi pinctrl-0 = <&qup_uart7_default>; 641ba3fc649SRoja Rani Yarubandi interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 642ba3fc649SRoja Rani Yarubandi status = "disabled"; 643ba3fc649SRoja Rani Yarubandi }; 644ba3fc649SRoja Rani Yarubandi 645ba3fc649SRoja Rani Yarubandi i2c8: i2c@a88000 { 646ba3fc649SRoja Rani Yarubandi compatible = "qcom,geni-i2c"; 647ba3fc649SRoja Rani Yarubandi reg = <0 0x00a88000 0 0x4000>; 648ba3fc649SRoja Rani Yarubandi clock-names = "se"; 649ba3fc649SRoja Rani Yarubandi clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>; 650ba3fc649SRoja Rani Yarubandi pinctrl-names = "default"; 651ba3fc649SRoja Rani Yarubandi pinctrl-0 = <&qup_i2c8_default>; 652ba3fc649SRoja Rani Yarubandi interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 653ba3fc649SRoja Rani Yarubandi #address-cells = <1>; 654ba3fc649SRoja Rani Yarubandi #size-cells = <0>; 655ba3fc649SRoja Rani Yarubandi status = "disabled"; 656ba3fc649SRoja Rani Yarubandi }; 657ba3fc649SRoja Rani Yarubandi 658ba3fc649SRoja Rani Yarubandi spi8: spi@a88000 { 659ba3fc649SRoja Rani Yarubandi compatible = "qcom,geni-spi"; 660ba3fc649SRoja Rani Yarubandi reg = <0 0x00a88000 0 0x4000>; 661ba3fc649SRoja Rani Yarubandi clock-names = "se"; 662ba3fc649SRoja Rani Yarubandi clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>; 663ba3fc649SRoja Rani Yarubandi pinctrl-names = "default"; 664ba3fc649SRoja Rani Yarubandi pinctrl-0 = <&qup_spi8_default>; 665ba3fc649SRoja Rani Yarubandi interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 666ba3fc649SRoja Rani Yarubandi #address-cells = <1>; 667ba3fc649SRoja Rani Yarubandi #size-cells = <0>; 668ba3fc649SRoja Rani Yarubandi status = "disabled"; 669ba3fc649SRoja Rani Yarubandi }; 670ba3fc649SRoja Rani Yarubandi 67190db71e4SRajendra Nayak uart8: serial@a88000 { 67290db71e4SRajendra Nayak compatible = "qcom,geni-debug-uart"; 67390db71e4SRajendra Nayak reg = <0 0x00a88000 0 0x4000>; 67490db71e4SRajendra Nayak clock-names = "se"; 67590db71e4SRajendra Nayak clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>; 67690db71e4SRajendra Nayak pinctrl-names = "default"; 67790db71e4SRajendra Nayak pinctrl-0 = <&qup_uart8_default>; 67890db71e4SRajendra Nayak interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 67990db71e4SRajendra Nayak status = "disabled"; 68090db71e4SRajendra Nayak }; 681ba3fc649SRoja Rani Yarubandi 682ba3fc649SRoja Rani Yarubandi i2c9: i2c@a8c000 { 683ba3fc649SRoja Rani Yarubandi compatible = "qcom,geni-i2c"; 684ba3fc649SRoja Rani Yarubandi reg = <0 0x00a8c000 0 0x4000>; 685ba3fc649SRoja Rani Yarubandi clock-names = "se"; 686ba3fc649SRoja Rani Yarubandi clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>; 687ba3fc649SRoja Rani Yarubandi pinctrl-names = "default"; 688ba3fc649SRoja Rani Yarubandi pinctrl-0 = <&qup_i2c9_default>; 689ba3fc649SRoja Rani Yarubandi interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 690ba3fc649SRoja Rani Yarubandi #address-cells = <1>; 691ba3fc649SRoja Rani Yarubandi #size-cells = <0>; 692ba3fc649SRoja Rani Yarubandi status = "disabled"; 693ba3fc649SRoja Rani Yarubandi }; 694ba3fc649SRoja Rani Yarubandi 695ba3fc649SRoja Rani Yarubandi uart9: serial@a8c000 { 696ba3fc649SRoja Rani Yarubandi compatible = "qcom,geni-uart"; 697ba3fc649SRoja Rani Yarubandi reg = <0 0x00a8c000 0 0x4000>; 698ba3fc649SRoja Rani Yarubandi clock-names = "se"; 699ba3fc649SRoja Rani Yarubandi clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>; 700ba3fc649SRoja Rani Yarubandi pinctrl-names = "default"; 701ba3fc649SRoja Rani Yarubandi pinctrl-0 = <&qup_uart9_default>; 702ba3fc649SRoja Rani Yarubandi interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 703ba3fc649SRoja Rani Yarubandi status = "disabled"; 704ba3fc649SRoja Rani Yarubandi }; 705ba3fc649SRoja Rani Yarubandi 706ba3fc649SRoja Rani Yarubandi i2c10: i2c@a90000 { 707ba3fc649SRoja Rani Yarubandi compatible = "qcom,geni-i2c"; 708ba3fc649SRoja Rani Yarubandi reg = <0 0x00a90000 0 0x4000>; 709ba3fc649SRoja Rani Yarubandi clock-names = "se"; 710ba3fc649SRoja Rani Yarubandi clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>; 711ba3fc649SRoja Rani Yarubandi pinctrl-names = "default"; 712ba3fc649SRoja Rani Yarubandi pinctrl-0 = <&qup_i2c10_default>; 713ba3fc649SRoja Rani Yarubandi interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 714ba3fc649SRoja Rani Yarubandi #address-cells = <1>; 715ba3fc649SRoja Rani Yarubandi #size-cells = <0>; 716ba3fc649SRoja Rani Yarubandi status = "disabled"; 717ba3fc649SRoja Rani Yarubandi }; 718ba3fc649SRoja Rani Yarubandi 719ba3fc649SRoja Rani Yarubandi spi10: spi@a90000 { 720ba3fc649SRoja Rani Yarubandi compatible = "qcom,geni-spi"; 721ba3fc649SRoja Rani Yarubandi reg = <0 0x00a90000 0 0x4000>; 722ba3fc649SRoja Rani Yarubandi clock-names = "se"; 723ba3fc649SRoja Rani Yarubandi clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>; 724ba3fc649SRoja Rani Yarubandi pinctrl-names = "default"; 725ba3fc649SRoja Rani Yarubandi pinctrl-0 = <&qup_spi10_default>; 726ba3fc649SRoja Rani Yarubandi interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 727ba3fc649SRoja Rani Yarubandi #address-cells = <1>; 728ba3fc649SRoja Rani Yarubandi #size-cells = <0>; 729ba3fc649SRoja Rani Yarubandi status = "disabled"; 730ba3fc649SRoja Rani Yarubandi }; 731ba3fc649SRoja Rani Yarubandi 732ba3fc649SRoja Rani Yarubandi uart10: serial@a90000 { 733ba3fc649SRoja Rani Yarubandi compatible = "qcom,geni-uart"; 734ba3fc649SRoja Rani Yarubandi reg = <0 0x00a90000 0 0x4000>; 735ba3fc649SRoja Rani Yarubandi clock-names = "se"; 736ba3fc649SRoja Rani Yarubandi clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>; 737ba3fc649SRoja Rani Yarubandi pinctrl-names = "default"; 738ba3fc649SRoja Rani Yarubandi pinctrl-0 = <&qup_uart10_default>; 739ba3fc649SRoja Rani Yarubandi interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 740ba3fc649SRoja Rani Yarubandi status = "disabled"; 741ba3fc649SRoja Rani Yarubandi }; 742ba3fc649SRoja Rani Yarubandi 743ba3fc649SRoja Rani Yarubandi i2c11: i2c@a94000 { 744ba3fc649SRoja Rani Yarubandi compatible = "qcom,geni-i2c"; 745ba3fc649SRoja Rani Yarubandi reg = <0 0x00a94000 0 0x4000>; 746ba3fc649SRoja Rani Yarubandi clock-names = "se"; 747ba3fc649SRoja Rani Yarubandi clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>; 748ba3fc649SRoja Rani Yarubandi pinctrl-names = "default"; 749ba3fc649SRoja Rani Yarubandi pinctrl-0 = <&qup_i2c11_default>; 750ba3fc649SRoja Rani Yarubandi interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 751ba3fc649SRoja Rani Yarubandi #address-cells = <1>; 752ba3fc649SRoja Rani Yarubandi #size-cells = <0>; 753ba3fc649SRoja Rani Yarubandi status = "disabled"; 754ba3fc649SRoja Rani Yarubandi }; 755ba3fc649SRoja Rani Yarubandi 756ba3fc649SRoja Rani Yarubandi spi11: spi@a94000 { 757ba3fc649SRoja Rani Yarubandi compatible = "qcom,geni-spi"; 758ba3fc649SRoja Rani Yarubandi reg = <0 0x00a94000 0 0x4000>; 759ba3fc649SRoja Rani Yarubandi clock-names = "se"; 760ba3fc649SRoja Rani Yarubandi clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>; 761ba3fc649SRoja Rani Yarubandi pinctrl-names = "default"; 762ba3fc649SRoja Rani Yarubandi pinctrl-0 = <&qup_spi11_default>; 763ba3fc649SRoja Rani Yarubandi interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 764ba3fc649SRoja Rani Yarubandi #address-cells = <1>; 765ba3fc649SRoja Rani Yarubandi #size-cells = <0>; 766ba3fc649SRoja Rani Yarubandi status = "disabled"; 767ba3fc649SRoja Rani Yarubandi }; 768ba3fc649SRoja Rani Yarubandi 769ba3fc649SRoja Rani Yarubandi uart11: serial@a94000 { 770ba3fc649SRoja Rani Yarubandi compatible = "qcom,geni-uart"; 771ba3fc649SRoja Rani Yarubandi reg = <0 0x00a94000 0 0x4000>; 772ba3fc649SRoja Rani Yarubandi clock-names = "se"; 773ba3fc649SRoja Rani Yarubandi clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>; 774ba3fc649SRoja Rani Yarubandi pinctrl-names = "default"; 775ba3fc649SRoja Rani Yarubandi pinctrl-0 = <&qup_uart11_default>; 776ba3fc649SRoja Rani Yarubandi interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 777ba3fc649SRoja Rani Yarubandi status = "disabled"; 778ba3fc649SRoja Rani Yarubandi }; 77990db71e4SRajendra Nayak }; 78090db71e4SRajendra Nayak 781f5ab220dSSibi Sankar tcsr_mutex_regs: syscon@1f40000 { 782f5ab220dSSibi Sankar compatible = "syscon"; 783f5ab220dSSibi Sankar reg = <0 0x01f40000 0 0x40000>; 784f5ab220dSSibi Sankar }; 785f5ab220dSSibi Sankar 78690db71e4SRajendra Nayak tlmm: pinctrl@3500000 { 78790db71e4SRajendra Nayak compatible = "qcom,sc7180-pinctrl"; 78890db71e4SRajendra Nayak reg = <0 0x03500000 0 0x300000>, 78990db71e4SRajendra Nayak <0 0x03900000 0 0x300000>, 79090db71e4SRajendra Nayak <0 0x03d00000 0 0x300000>; 79190db71e4SRajendra Nayak reg-names = "west", "north", "south"; 79290db71e4SRajendra Nayak interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; 79390db71e4SRajendra Nayak gpio-controller; 79490db71e4SRajendra Nayak #gpio-cells = <2>; 79590db71e4SRajendra Nayak interrupt-controller; 79690db71e4SRajendra Nayak #interrupt-cells = <2>; 79790db71e4SRajendra Nayak gpio-ranges = <&tlmm 0 0 120>; 798456d677cSMaulik Shah wakeup-parent = <&pdc>; 79990db71e4SRajendra Nayak 800ba3fc649SRoja Rani Yarubandi qspi_clk: qspi-clk { 801ba3fc649SRoja Rani Yarubandi pinmux { 802ba3fc649SRoja Rani Yarubandi pins = "gpio63"; 803ba3fc649SRoja Rani Yarubandi function = "qspi_clk"; 804ba3fc649SRoja Rani Yarubandi }; 805ba3fc649SRoja Rani Yarubandi }; 806ba3fc649SRoja Rani Yarubandi 807ba3fc649SRoja Rani Yarubandi qspi_cs0: qspi-cs0 { 808ba3fc649SRoja Rani Yarubandi pinmux { 809ba3fc649SRoja Rani Yarubandi pins = "gpio68"; 810ba3fc649SRoja Rani Yarubandi function = "qspi_cs"; 811ba3fc649SRoja Rani Yarubandi }; 812ba3fc649SRoja Rani Yarubandi }; 813ba3fc649SRoja Rani Yarubandi 814ba3fc649SRoja Rani Yarubandi qspi_cs1: qspi-cs1 { 815ba3fc649SRoja Rani Yarubandi pinmux { 816ba3fc649SRoja Rani Yarubandi pins = "gpio72"; 817ba3fc649SRoja Rani Yarubandi function = "qspi_cs"; 818ba3fc649SRoja Rani Yarubandi }; 819ba3fc649SRoja Rani Yarubandi }; 820ba3fc649SRoja Rani Yarubandi 821ba3fc649SRoja Rani Yarubandi qspi_data01: qspi-data01 { 822ba3fc649SRoja Rani Yarubandi pinmux-data { 823ba3fc649SRoja Rani Yarubandi pins = "gpio64", "gpio65"; 824ba3fc649SRoja Rani Yarubandi function = "qspi_data"; 825ba3fc649SRoja Rani Yarubandi }; 826ba3fc649SRoja Rani Yarubandi }; 827ba3fc649SRoja Rani Yarubandi 828ba3fc649SRoja Rani Yarubandi qspi_data12: qspi-data12 { 829ba3fc649SRoja Rani Yarubandi pinmux-data { 830ba3fc649SRoja Rani Yarubandi pins = "gpio66", "gpio67"; 831ba3fc649SRoja Rani Yarubandi function = "qspi_data"; 832ba3fc649SRoja Rani Yarubandi }; 833ba3fc649SRoja Rani Yarubandi }; 834ba3fc649SRoja Rani Yarubandi 835ba3fc649SRoja Rani Yarubandi qup_i2c0_default: qup-i2c0-default { 836ba3fc649SRoja Rani Yarubandi pinmux { 837ba3fc649SRoja Rani Yarubandi pins = "gpio34", "gpio35"; 838ba3fc649SRoja Rani Yarubandi function = "qup00"; 839ba3fc649SRoja Rani Yarubandi }; 840ba3fc649SRoja Rani Yarubandi }; 841ba3fc649SRoja Rani Yarubandi 842ba3fc649SRoja Rani Yarubandi qup_i2c1_default: qup-i2c1-default { 843ba3fc649SRoja Rani Yarubandi pinmux { 844ba3fc649SRoja Rani Yarubandi pins = "gpio0", "gpio1"; 845ba3fc649SRoja Rani Yarubandi function = "qup01"; 846ba3fc649SRoja Rani Yarubandi }; 847ba3fc649SRoja Rani Yarubandi }; 848ba3fc649SRoja Rani Yarubandi 849ba3fc649SRoja Rani Yarubandi qup_i2c2_default: qup-i2c2-default { 850ba3fc649SRoja Rani Yarubandi pinmux { 851ba3fc649SRoja Rani Yarubandi pins = "gpio15", "gpio16"; 85229c5cb64SDouglas Anderson function = "qup02_i2c"; 853ba3fc649SRoja Rani Yarubandi }; 854ba3fc649SRoja Rani Yarubandi }; 855ba3fc649SRoja Rani Yarubandi 856ba3fc649SRoja Rani Yarubandi qup_i2c3_default: qup-i2c3-default { 857ba3fc649SRoja Rani Yarubandi pinmux { 858ba3fc649SRoja Rani Yarubandi pins = "gpio38", "gpio39"; 859ba3fc649SRoja Rani Yarubandi function = "qup03"; 860ba3fc649SRoja Rani Yarubandi }; 861ba3fc649SRoja Rani Yarubandi }; 862ba3fc649SRoja Rani Yarubandi 863ba3fc649SRoja Rani Yarubandi qup_i2c4_default: qup-i2c4-default { 864ba3fc649SRoja Rani Yarubandi pinmux { 865ba3fc649SRoja Rani Yarubandi pins = "gpio115", "gpio116"; 86629c5cb64SDouglas Anderson function = "qup04_i2c"; 867ba3fc649SRoja Rani Yarubandi }; 868ba3fc649SRoja Rani Yarubandi }; 869ba3fc649SRoja Rani Yarubandi 870ba3fc649SRoja Rani Yarubandi qup_i2c5_default: qup-i2c5-default { 871ba3fc649SRoja Rani Yarubandi pinmux { 872ba3fc649SRoja Rani Yarubandi pins = "gpio25", "gpio26"; 873ba3fc649SRoja Rani Yarubandi function = "qup05"; 874ba3fc649SRoja Rani Yarubandi }; 875ba3fc649SRoja Rani Yarubandi }; 876ba3fc649SRoja Rani Yarubandi 877ba3fc649SRoja Rani Yarubandi qup_i2c6_default: qup-i2c6-default { 878ba3fc649SRoja Rani Yarubandi pinmux { 879ba3fc649SRoja Rani Yarubandi pins = "gpio59", "gpio60"; 880ba3fc649SRoja Rani Yarubandi function = "qup10"; 881ba3fc649SRoja Rani Yarubandi }; 882ba3fc649SRoja Rani Yarubandi }; 883ba3fc649SRoja Rani Yarubandi 884ba3fc649SRoja Rani Yarubandi qup_i2c7_default: qup-i2c7-default { 885ba3fc649SRoja Rani Yarubandi pinmux { 886ba3fc649SRoja Rani Yarubandi pins = "gpio6", "gpio7"; 88729c5cb64SDouglas Anderson function = "qup11_i2c"; 888ba3fc649SRoja Rani Yarubandi }; 889ba3fc649SRoja Rani Yarubandi }; 890ba3fc649SRoja Rani Yarubandi 891ba3fc649SRoja Rani Yarubandi qup_i2c8_default: qup-i2c8-default { 892ba3fc649SRoja Rani Yarubandi pinmux { 893ba3fc649SRoja Rani Yarubandi pins = "gpio42", "gpio43"; 894ba3fc649SRoja Rani Yarubandi function = "qup12"; 895ba3fc649SRoja Rani Yarubandi }; 896ba3fc649SRoja Rani Yarubandi }; 897ba3fc649SRoja Rani Yarubandi 898ba3fc649SRoja Rani Yarubandi qup_i2c9_default: qup-i2c9-default { 899ba3fc649SRoja Rani Yarubandi pinmux { 900ba3fc649SRoja Rani Yarubandi pins = "gpio46", "gpio47"; 90129c5cb64SDouglas Anderson function = "qup13_i2c"; 902ba3fc649SRoja Rani Yarubandi }; 903ba3fc649SRoja Rani Yarubandi }; 904ba3fc649SRoja Rani Yarubandi 905ba3fc649SRoja Rani Yarubandi qup_i2c10_default: qup-i2c10-default { 906ba3fc649SRoja Rani Yarubandi pinmux { 907ba3fc649SRoja Rani Yarubandi pins = "gpio86", "gpio87"; 908ba3fc649SRoja Rani Yarubandi function = "qup14"; 909ba3fc649SRoja Rani Yarubandi }; 910ba3fc649SRoja Rani Yarubandi }; 911ba3fc649SRoja Rani Yarubandi 912ba3fc649SRoja Rani Yarubandi qup_i2c11_default: qup-i2c11-default { 913ba3fc649SRoja Rani Yarubandi pinmux { 914ba3fc649SRoja Rani Yarubandi pins = "gpio53", "gpio54"; 915ba3fc649SRoja Rani Yarubandi function = "qup15"; 916ba3fc649SRoja Rani Yarubandi }; 917ba3fc649SRoja Rani Yarubandi }; 918ba3fc649SRoja Rani Yarubandi 919ba3fc649SRoja Rani Yarubandi qup_spi0_default: qup-spi0-default { 920ba3fc649SRoja Rani Yarubandi pinmux { 921ba3fc649SRoja Rani Yarubandi pins = "gpio34", "gpio35", 922ba3fc649SRoja Rani Yarubandi "gpio36", "gpio37"; 923ba3fc649SRoja Rani Yarubandi function = "qup00"; 924ba3fc649SRoja Rani Yarubandi }; 925ba3fc649SRoja Rani Yarubandi }; 926ba3fc649SRoja Rani Yarubandi 927ba3fc649SRoja Rani Yarubandi qup_spi1_default: qup-spi1-default { 928ba3fc649SRoja Rani Yarubandi pinmux { 929ba3fc649SRoja Rani Yarubandi pins = "gpio0", "gpio1", 930d8b076b8SRajendra Nayak "gpio2", "gpio3"; 931ba3fc649SRoja Rani Yarubandi function = "qup01"; 932ba3fc649SRoja Rani Yarubandi }; 933ba3fc649SRoja Rani Yarubandi }; 934ba3fc649SRoja Rani Yarubandi 935ba3fc649SRoja Rani Yarubandi qup_spi3_default: qup-spi3-default { 936ba3fc649SRoja Rani Yarubandi pinmux { 937ba3fc649SRoja Rani Yarubandi pins = "gpio38", "gpio39", 938ba3fc649SRoja Rani Yarubandi "gpio40", "gpio41"; 939ba3fc649SRoja Rani Yarubandi function = "qup03"; 940ba3fc649SRoja Rani Yarubandi }; 941ba3fc649SRoja Rani Yarubandi }; 942ba3fc649SRoja Rani Yarubandi 943ba3fc649SRoja Rani Yarubandi qup_spi5_default: qup-spi5-default { 944ba3fc649SRoja Rani Yarubandi pinmux { 945ba3fc649SRoja Rani Yarubandi pins = "gpio25", "gpio26", 946ba3fc649SRoja Rani Yarubandi "gpio27", "gpio28"; 947ba3fc649SRoja Rani Yarubandi function = "qup05"; 948ba3fc649SRoja Rani Yarubandi }; 949ba3fc649SRoja Rani Yarubandi }; 950ba3fc649SRoja Rani Yarubandi 951ba3fc649SRoja Rani Yarubandi qup_spi6_default: qup-spi6-default { 952ba3fc649SRoja Rani Yarubandi pinmux { 953ba3fc649SRoja Rani Yarubandi pins = "gpio59", "gpio60", 954d8b076b8SRajendra Nayak "gpio61", "gpio62"; 955ba3fc649SRoja Rani Yarubandi function = "qup10"; 956ba3fc649SRoja Rani Yarubandi }; 957ba3fc649SRoja Rani Yarubandi }; 958ba3fc649SRoja Rani Yarubandi 959ba3fc649SRoja Rani Yarubandi qup_spi8_default: qup-spi8-default { 960ba3fc649SRoja Rani Yarubandi pinmux { 961ba3fc649SRoja Rani Yarubandi pins = "gpio42", "gpio43", 962ba3fc649SRoja Rani Yarubandi "gpio44", "gpio45"; 963ba3fc649SRoja Rani Yarubandi function = "qup12"; 964ba3fc649SRoja Rani Yarubandi }; 965ba3fc649SRoja Rani Yarubandi }; 966ba3fc649SRoja Rani Yarubandi 967ba3fc649SRoja Rani Yarubandi qup_spi10_default: qup-spi10-default { 968ba3fc649SRoja Rani Yarubandi pinmux { 969ba3fc649SRoja Rani Yarubandi pins = "gpio86", "gpio87", 970d8b076b8SRajendra Nayak "gpio88", "gpio89"; 971ba3fc649SRoja Rani Yarubandi function = "qup14"; 972ba3fc649SRoja Rani Yarubandi }; 973ba3fc649SRoja Rani Yarubandi }; 974ba3fc649SRoja Rani Yarubandi 975ba3fc649SRoja Rani Yarubandi qup_spi11_default: qup-spi11-default { 976ba3fc649SRoja Rani Yarubandi pinmux { 977ba3fc649SRoja Rani Yarubandi pins = "gpio53", "gpio54", 978ba3fc649SRoja Rani Yarubandi "gpio55", "gpio56"; 979ba3fc649SRoja Rani Yarubandi function = "qup15"; 980ba3fc649SRoja Rani Yarubandi }; 981ba3fc649SRoja Rani Yarubandi }; 982ba3fc649SRoja Rani Yarubandi 983ba3fc649SRoja Rani Yarubandi qup_uart0_default: qup-uart0-default { 984ba3fc649SRoja Rani Yarubandi pinmux { 985ba3fc649SRoja Rani Yarubandi pins = "gpio34", "gpio35", 986ba3fc649SRoja Rani Yarubandi "gpio36", "gpio37"; 987ba3fc649SRoja Rani Yarubandi function = "qup00"; 988ba3fc649SRoja Rani Yarubandi }; 989ba3fc649SRoja Rani Yarubandi }; 990ba3fc649SRoja Rani Yarubandi 991ba3fc649SRoja Rani Yarubandi qup_uart1_default: qup-uart1-default { 992ba3fc649SRoja Rani Yarubandi pinmux { 993ba3fc649SRoja Rani Yarubandi pins = "gpio0", "gpio1", 994ba3fc649SRoja Rani Yarubandi "gpio2", "gpio3"; 995ba3fc649SRoja Rani Yarubandi function = "qup01"; 996ba3fc649SRoja Rani Yarubandi }; 997ba3fc649SRoja Rani Yarubandi }; 998ba3fc649SRoja Rani Yarubandi 999ba3fc649SRoja Rani Yarubandi qup_uart2_default: qup-uart2-default { 1000ba3fc649SRoja Rani Yarubandi pinmux { 1001ba3fc649SRoja Rani Yarubandi pins = "gpio15", "gpio16"; 100229c5cb64SDouglas Anderson function = "qup02_uart"; 1003ba3fc649SRoja Rani Yarubandi }; 1004ba3fc649SRoja Rani Yarubandi }; 1005ba3fc649SRoja Rani Yarubandi 1006ba3fc649SRoja Rani Yarubandi qup_uart3_default: qup-uart3-default { 1007ba3fc649SRoja Rani Yarubandi pinmux { 1008ba3fc649SRoja Rani Yarubandi pins = "gpio38", "gpio39", 1009ba3fc649SRoja Rani Yarubandi "gpio40", "gpio41"; 1010ba3fc649SRoja Rani Yarubandi function = "qup03"; 1011ba3fc649SRoja Rani Yarubandi }; 1012ba3fc649SRoja Rani Yarubandi }; 1013ba3fc649SRoja Rani Yarubandi 1014ba3fc649SRoja Rani Yarubandi qup_uart4_default: qup-uart4-default { 1015ba3fc649SRoja Rani Yarubandi pinmux { 1016ba3fc649SRoja Rani Yarubandi pins = "gpio115", "gpio116"; 101729c5cb64SDouglas Anderson function = "qup04_uart"; 1018ba3fc649SRoja Rani Yarubandi }; 1019ba3fc649SRoja Rani Yarubandi }; 1020ba3fc649SRoja Rani Yarubandi 1021ba3fc649SRoja Rani Yarubandi qup_uart5_default: qup-uart5-default { 1022ba3fc649SRoja Rani Yarubandi pinmux { 1023ba3fc649SRoja Rani Yarubandi pins = "gpio25", "gpio26", 1024ba3fc649SRoja Rani Yarubandi "gpio27", "gpio28"; 1025ba3fc649SRoja Rani Yarubandi function = "qup05"; 1026ba3fc649SRoja Rani Yarubandi }; 1027ba3fc649SRoja Rani Yarubandi }; 1028ba3fc649SRoja Rani Yarubandi 1029ba3fc649SRoja Rani Yarubandi qup_uart6_default: qup-uart6-default { 1030ba3fc649SRoja Rani Yarubandi pinmux { 1031ba3fc649SRoja Rani Yarubandi pins = "gpio59", "gpio60", 1032ba3fc649SRoja Rani Yarubandi "gpio61", "gpio62"; 1033ba3fc649SRoja Rani Yarubandi function = "qup10"; 1034ba3fc649SRoja Rani Yarubandi }; 1035ba3fc649SRoja Rani Yarubandi }; 1036ba3fc649SRoja Rani Yarubandi 1037ba3fc649SRoja Rani Yarubandi qup_uart7_default: qup-uart7-default { 1038ba3fc649SRoja Rani Yarubandi pinmux { 1039ba3fc649SRoja Rani Yarubandi pins = "gpio6", "gpio7"; 104029c5cb64SDouglas Anderson function = "qup11_uart"; 1041ba3fc649SRoja Rani Yarubandi }; 1042ba3fc649SRoja Rani Yarubandi }; 1043ba3fc649SRoja Rani Yarubandi 104490db71e4SRajendra Nayak qup_uart8_default: qup-uart8-default { 104590db71e4SRajendra Nayak pinmux { 104690db71e4SRajendra Nayak pins = "gpio44", "gpio45"; 104790db71e4SRajendra Nayak function = "qup12"; 104890db71e4SRajendra Nayak }; 104990db71e4SRajendra Nayak }; 1050ba3fc649SRoja Rani Yarubandi 1051ba3fc649SRoja Rani Yarubandi qup_uart9_default: qup-uart9-default { 1052ba3fc649SRoja Rani Yarubandi pinmux { 1053ba3fc649SRoja Rani Yarubandi pins = "gpio46", "gpio47"; 105429c5cb64SDouglas Anderson function = "qup13_uart"; 1055ba3fc649SRoja Rani Yarubandi }; 1056ba3fc649SRoja Rani Yarubandi }; 1057ba3fc649SRoja Rani Yarubandi 1058ba3fc649SRoja Rani Yarubandi qup_uart10_default: qup-uart10-default { 1059ba3fc649SRoja Rani Yarubandi pinmux { 1060ba3fc649SRoja Rani Yarubandi pins = "gpio86", "gpio87", 1061ba3fc649SRoja Rani Yarubandi "gpio88", "gpio89"; 1062ba3fc649SRoja Rani Yarubandi function = "qup14"; 1063ba3fc649SRoja Rani Yarubandi }; 1064ba3fc649SRoja Rani Yarubandi }; 1065ba3fc649SRoja Rani Yarubandi 1066ba3fc649SRoja Rani Yarubandi qup_uart11_default: qup-uart11-default { 1067ba3fc649SRoja Rani Yarubandi pinmux { 1068ba3fc649SRoja Rani Yarubandi pins = "gpio53", "gpio54", 1069ba3fc649SRoja Rani Yarubandi "gpio55", "gpio56"; 1070ba3fc649SRoja Rani Yarubandi function = "qup15"; 1071ba3fc649SRoja Rani Yarubandi }; 1072ba3fc649SRoja Rani Yarubandi }; 107324254a8eSVeerabhadrarao Badiganti 107424254a8eSVeerabhadrarao Badiganti sdc1_on: sdc1-on { 107524254a8eSVeerabhadrarao Badiganti pinconf-clk { 107624254a8eSVeerabhadrarao Badiganti pins = "sdc1_clk"; 107724254a8eSVeerabhadrarao Badiganti bias-disable; 107824254a8eSVeerabhadrarao Badiganti drive-strength = <16>; 107924254a8eSVeerabhadrarao Badiganti }; 108024254a8eSVeerabhadrarao Badiganti 108124254a8eSVeerabhadrarao Badiganti pinconf-cmd { 108224254a8eSVeerabhadrarao Badiganti pins = "sdc1_cmd"; 108324254a8eSVeerabhadrarao Badiganti bias-pull-up; 108424254a8eSVeerabhadrarao Badiganti drive-strength = <10>; 108524254a8eSVeerabhadrarao Badiganti }; 108624254a8eSVeerabhadrarao Badiganti 108724254a8eSVeerabhadrarao Badiganti pinconf-data { 108824254a8eSVeerabhadrarao Badiganti pins = "sdc1_data"; 108924254a8eSVeerabhadrarao Badiganti bias-pull-up; 109024254a8eSVeerabhadrarao Badiganti drive-strength = <10>; 109124254a8eSVeerabhadrarao Badiganti }; 109224254a8eSVeerabhadrarao Badiganti 109324254a8eSVeerabhadrarao Badiganti pinconf-rclk { 109424254a8eSVeerabhadrarao Badiganti pins = "sdc1_rclk"; 109524254a8eSVeerabhadrarao Badiganti bias-pull-down; 109624254a8eSVeerabhadrarao Badiganti }; 109724254a8eSVeerabhadrarao Badiganti }; 109824254a8eSVeerabhadrarao Badiganti 109924254a8eSVeerabhadrarao Badiganti sdc1_off: sdc1-off { 110024254a8eSVeerabhadrarao Badiganti pinconf-clk { 110124254a8eSVeerabhadrarao Badiganti pins = "sdc1_clk"; 110224254a8eSVeerabhadrarao Badiganti bias-disable; 110324254a8eSVeerabhadrarao Badiganti drive-strength = <2>; 110424254a8eSVeerabhadrarao Badiganti }; 110524254a8eSVeerabhadrarao Badiganti 110624254a8eSVeerabhadrarao Badiganti pinconf-cmd { 110724254a8eSVeerabhadrarao Badiganti pins = "sdc1_cmd"; 110824254a8eSVeerabhadrarao Badiganti bias-pull-up; 110924254a8eSVeerabhadrarao Badiganti drive-strength = <2>; 111024254a8eSVeerabhadrarao Badiganti }; 111124254a8eSVeerabhadrarao Badiganti 111224254a8eSVeerabhadrarao Badiganti pinconf-data { 111324254a8eSVeerabhadrarao Badiganti pins = "sdc1_data"; 111424254a8eSVeerabhadrarao Badiganti bias-pull-up; 111524254a8eSVeerabhadrarao Badiganti drive-strength = <2>; 111624254a8eSVeerabhadrarao Badiganti }; 111724254a8eSVeerabhadrarao Badiganti 111824254a8eSVeerabhadrarao Badiganti pinconf-rclk { 111924254a8eSVeerabhadrarao Badiganti pins = "sdc1_rclk"; 112024254a8eSVeerabhadrarao Badiganti bias-pull-down; 112124254a8eSVeerabhadrarao Badiganti }; 112224254a8eSVeerabhadrarao Badiganti }; 112324254a8eSVeerabhadrarao Badiganti 112424254a8eSVeerabhadrarao Badiganti sdc2_on: sdc2-on { 112524254a8eSVeerabhadrarao Badiganti pinconf-clk { 112624254a8eSVeerabhadrarao Badiganti pins = "sdc2_clk"; 112724254a8eSVeerabhadrarao Badiganti bias-disable; 112824254a8eSVeerabhadrarao Badiganti drive-strength = <16>; 112924254a8eSVeerabhadrarao Badiganti }; 113024254a8eSVeerabhadrarao Badiganti 113124254a8eSVeerabhadrarao Badiganti pinconf-cmd { 113224254a8eSVeerabhadrarao Badiganti pins = "sdc2_cmd"; 113324254a8eSVeerabhadrarao Badiganti bias-pull-up; 113424254a8eSVeerabhadrarao Badiganti drive-strength = <10>; 113524254a8eSVeerabhadrarao Badiganti }; 113624254a8eSVeerabhadrarao Badiganti 113724254a8eSVeerabhadrarao Badiganti pinconf-data { 113824254a8eSVeerabhadrarao Badiganti pins = "sdc2_data"; 113924254a8eSVeerabhadrarao Badiganti bias-pull-up; 114024254a8eSVeerabhadrarao Badiganti drive-strength = <10>; 114124254a8eSVeerabhadrarao Badiganti }; 114224254a8eSVeerabhadrarao Badiganti 114324254a8eSVeerabhadrarao Badiganti pinconf-sd-cd { 114424254a8eSVeerabhadrarao Badiganti pins = "gpio69"; 114524254a8eSVeerabhadrarao Badiganti bias-pull-up; 114624254a8eSVeerabhadrarao Badiganti drive-strength = <2>; 114724254a8eSVeerabhadrarao Badiganti }; 114824254a8eSVeerabhadrarao Badiganti }; 114924254a8eSVeerabhadrarao Badiganti 115024254a8eSVeerabhadrarao Badiganti sdc2_off: sdc2-off { 115124254a8eSVeerabhadrarao Badiganti pinconf-clk { 115224254a8eSVeerabhadrarao Badiganti pins = "sdc2_clk"; 115324254a8eSVeerabhadrarao Badiganti bias-disable; 115424254a8eSVeerabhadrarao Badiganti drive-strength = <2>; 115524254a8eSVeerabhadrarao Badiganti }; 115624254a8eSVeerabhadrarao Badiganti 115724254a8eSVeerabhadrarao Badiganti pinconf-cmd { 115824254a8eSVeerabhadrarao Badiganti pins = "sdc2_cmd"; 115924254a8eSVeerabhadrarao Badiganti bias-pull-up; 116024254a8eSVeerabhadrarao Badiganti drive-strength = <2>; 116124254a8eSVeerabhadrarao Badiganti }; 116224254a8eSVeerabhadrarao Badiganti 116324254a8eSVeerabhadrarao Badiganti pinconf-data { 116424254a8eSVeerabhadrarao Badiganti pins = "sdc2_data"; 116524254a8eSVeerabhadrarao Badiganti bias-pull-up; 116624254a8eSVeerabhadrarao Badiganti drive-strength = <2>; 116724254a8eSVeerabhadrarao Badiganti }; 116824254a8eSVeerabhadrarao Badiganti 116924254a8eSVeerabhadrarao Badiganti pinconf-sd-cd { 117024254a8eSVeerabhadrarao Badiganti pins = "gpio69"; 117124254a8eSVeerabhadrarao Badiganti bias-disable; 117224254a8eSVeerabhadrarao Badiganti drive-strength = <2>; 117324254a8eSVeerabhadrarao Badiganti }; 117424254a8eSVeerabhadrarao Badiganti }; 117524254a8eSVeerabhadrarao Badiganti }; 117624254a8eSVeerabhadrarao Badiganti 117724254a8eSVeerabhadrarao Badiganti sdhc_2: sdhci@8804000 { 117824254a8eSVeerabhadrarao Badiganti compatible = "qcom,sc7180-sdhci", "qcom,sdhci-msm-v5"; 117924254a8eSVeerabhadrarao Badiganti reg = <0 0x08804000 0 0x1000>; 118024254a8eSVeerabhadrarao Badiganti reg-names = "hc_mem"; 118124254a8eSVeerabhadrarao Badiganti 118224254a8eSVeerabhadrarao Badiganti iommus = <&apps_smmu 0x80 0>; 118324254a8eSVeerabhadrarao Badiganti interrupts = <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 118424254a8eSVeerabhadrarao Badiganti <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>; 118524254a8eSVeerabhadrarao Badiganti interrupt-names = "hc_irq", "pwr_irq"; 118624254a8eSVeerabhadrarao Badiganti 118724254a8eSVeerabhadrarao Badiganti clocks = <&gcc GCC_SDCC2_APPS_CLK>, 118824254a8eSVeerabhadrarao Badiganti <&gcc GCC_SDCC2_AHB_CLK>; 118924254a8eSVeerabhadrarao Badiganti clock-names = "core", "iface"; 119024254a8eSVeerabhadrarao Badiganti 119124254a8eSVeerabhadrarao Badiganti bus-width = <4>; 119224254a8eSVeerabhadrarao Badiganti 119324254a8eSVeerabhadrarao Badiganti status = "disabled"; 1194ba3fc649SRoja Rani Yarubandi }; 1195ba3fc649SRoja Rani Yarubandi 1196*e07f8354STaniya Das gpucc: clock-controller@5090000 { 1197*e07f8354STaniya Das compatible = "qcom,sc7180-gpucc"; 1198*e07f8354STaniya Das reg = <0 0x05090000 0 0x9000>; 1199*e07f8354STaniya Das clocks = <&rpmhcc RPMH_CXO_CLK>, 1200*e07f8354STaniya Das <&gcc GCC_GPU_GPLL0_CLK_SRC>, 1201*e07f8354STaniya Das <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>; 1202*e07f8354STaniya Das clock-names = "bi_tcxo", 1203*e07f8354STaniya Das "gcc_gpu_gpll0_clk_src", 1204*e07f8354STaniya Das "gcc_gpu_gpll0_div_clk_src"; 1205*e07f8354STaniya Das #clock-cells = <1>; 1206*e07f8354STaniya Das #reset-cells = <1>; 1207*e07f8354STaniya Das #power-domain-cells = <1>; 1208*e07f8354STaniya Das }; 1209*e07f8354STaniya Das 1210ba3fc649SRoja Rani Yarubandi qspi: spi@88dc000 { 1211ba3fc649SRoja Rani Yarubandi compatible = "qcom,qspi-v1"; 1212ba3fc649SRoja Rani Yarubandi reg = <0 0x088dc000 0 0x600>; 1213ba3fc649SRoja Rani Yarubandi #address-cells = <1>; 1214ba3fc649SRoja Rani Yarubandi #size-cells = <0>; 1215ba3fc649SRoja Rani Yarubandi interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; 1216ba3fc649SRoja Rani Yarubandi clocks = <&gcc GCC_QSPI_CNOC_PERIPH_AHB_CLK>, 1217ba3fc649SRoja Rani Yarubandi <&gcc GCC_QSPI_CORE_CLK>; 1218ba3fc649SRoja Rani Yarubandi clock-names = "iface", "core"; 1219ba3fc649SRoja Rani Yarubandi status = "disabled"; 122090db71e4SRajendra Nayak }; 122190db71e4SRajendra Nayak 12220b766e7fSSandeep Maheswaram usb_1_hsphy: phy@88e3000 { 12230b766e7fSSandeep Maheswaram compatible = "qcom,sc7180-qusb2-phy"; 12240b766e7fSSandeep Maheswaram reg = <0 0x088e3000 0 0x400>; 12250b766e7fSSandeep Maheswaram status = "disabled"; 12260b766e7fSSandeep Maheswaram #phy-cells = <0>; 12270b766e7fSSandeep Maheswaram clocks = <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>, 12280b766e7fSSandeep Maheswaram <&rpmhcc RPMH_CXO_CLK>; 12290b766e7fSSandeep Maheswaram clock-names = "cfg_ahb", "ref"; 12300b766e7fSSandeep Maheswaram resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>; 12310b766e7fSSandeep Maheswaram 12320b766e7fSSandeep Maheswaram nvmem-cells = <&qusb2p_hstx_trim>; 12330b766e7fSSandeep Maheswaram }; 12340b766e7fSSandeep Maheswaram 1235fd916516SDouglas Anderson usb_1_qmpphy: phy-wrapper@88e9000 { 12360b766e7fSSandeep Maheswaram compatible = "qcom,sc7180-qmp-usb3-phy"; 12370b766e7fSSandeep Maheswaram reg = <0 0x088e9000 0 0x18c>, 12380b766e7fSSandeep Maheswaram <0 0x088e8000 0 0x38>; 12390b766e7fSSandeep Maheswaram reg-names = "reg-base", "dp_com"; 12400b766e7fSSandeep Maheswaram status = "disabled"; 12410b766e7fSSandeep Maheswaram #clock-cells = <1>; 12420b766e7fSSandeep Maheswaram #address-cells = <2>; 12430b766e7fSSandeep Maheswaram #size-cells = <2>; 12440b766e7fSSandeep Maheswaram ranges; 12450b766e7fSSandeep Maheswaram 12460b766e7fSSandeep Maheswaram clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>, 12470b766e7fSSandeep Maheswaram <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>, 12480b766e7fSSandeep Maheswaram <&gcc GCC_USB3_PRIM_CLKREF_CLK>, 12490b766e7fSSandeep Maheswaram <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>; 12500b766e7fSSandeep Maheswaram clock-names = "aux", "cfg_ahb", "ref", "com_aux"; 12510b766e7fSSandeep Maheswaram 12520b766e7fSSandeep Maheswaram resets = <&gcc GCC_USB3_DP_PHY_PRIM_BCR>, 12530b766e7fSSandeep Maheswaram <&gcc GCC_USB3_PHY_PRIM_BCR>; 12540b766e7fSSandeep Maheswaram reset-names = "phy", "common"; 12550b766e7fSSandeep Maheswaram 1256fd916516SDouglas Anderson usb_1_ssphy: phy@88e9200 { 12570b766e7fSSandeep Maheswaram reg = <0 0x088e9200 0 0x128>, 12580b766e7fSSandeep Maheswaram <0 0x088e9400 0 0x200>, 12590b766e7fSSandeep Maheswaram <0 0x088e9c00 0 0x218>, 12600b766e7fSSandeep Maheswaram <0 0x088e9600 0 0x128>, 12610b766e7fSSandeep Maheswaram <0 0x088e9800 0 0x200>, 12620b766e7fSSandeep Maheswaram <0 0x088e9a00 0 0x18>; 12636e369727SDouglas Anderson #clock-cells = <0>; 12640b766e7fSSandeep Maheswaram #phy-cells = <0>; 12650b766e7fSSandeep Maheswaram clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; 12660b766e7fSSandeep Maheswaram clock-names = "pipe0"; 12670b766e7fSSandeep Maheswaram clock-output-names = "usb3_phy_pipe_clk_src"; 12680b766e7fSSandeep Maheswaram }; 12690b766e7fSSandeep Maheswaram }; 12700b766e7fSSandeep Maheswaram 12717cee5c74SMatthias Kaehlcke system-cache-controller@9200000 { 12727cee5c74SMatthias Kaehlcke compatible = "qcom,sc7180-llcc"; 12737cee5c74SMatthias Kaehlcke reg = <0 0x09200000 0 0x200000>, <0 0x09600000 0 0x50000>; 12747cee5c74SMatthias Kaehlcke reg-names = "llcc_base", "llcc_broadcast_base"; 12757cee5c74SMatthias Kaehlcke interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>; 12767cee5c74SMatthias Kaehlcke }; 12777cee5c74SMatthias Kaehlcke 12780b766e7fSSandeep Maheswaram usb_1: usb@a6f8800 { 12790b766e7fSSandeep Maheswaram compatible = "qcom,sc7180-dwc3", "qcom,dwc3"; 12800b766e7fSSandeep Maheswaram reg = <0 0x0a6f8800 0 0x400>; 12810b766e7fSSandeep Maheswaram status = "disabled"; 12820b766e7fSSandeep Maheswaram #address-cells = <2>; 12830b766e7fSSandeep Maheswaram #size-cells = <2>; 12840b766e7fSSandeep Maheswaram ranges; 12850b766e7fSSandeep Maheswaram dma-ranges; 12860b766e7fSSandeep Maheswaram 12870b766e7fSSandeep Maheswaram clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, 12880b766e7fSSandeep Maheswaram <&gcc GCC_USB30_PRIM_MASTER_CLK>, 12890b766e7fSSandeep Maheswaram <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>, 12900b766e7fSSandeep Maheswaram <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, 12910b766e7fSSandeep Maheswaram <&gcc GCC_USB30_PRIM_SLEEP_CLK>; 12920b766e7fSSandeep Maheswaram clock-names = "cfg_noc", "core", "iface", "mock_utmi", 12930b766e7fSSandeep Maheswaram "sleep"; 12940b766e7fSSandeep Maheswaram 12950b766e7fSSandeep Maheswaram assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, 12960b766e7fSSandeep Maheswaram <&gcc GCC_USB30_PRIM_MASTER_CLK>; 12970b766e7fSSandeep Maheswaram assigned-clock-rates = <19200000>, <150000000>; 12980b766e7fSSandeep Maheswaram 12990b766e7fSSandeep Maheswaram interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 13000b766e7fSSandeep Maheswaram <GIC_SPI 486 IRQ_TYPE_LEVEL_HIGH>, 13010b766e7fSSandeep Maheswaram <GIC_SPI 488 IRQ_TYPE_LEVEL_HIGH>, 13020b766e7fSSandeep Maheswaram <GIC_SPI 489 IRQ_TYPE_LEVEL_HIGH>; 13030b766e7fSSandeep Maheswaram interrupt-names = "hs_phy_irq", "ss_phy_irq", 13040b766e7fSSandeep Maheswaram "dm_hs_phy_irq", "dp_hs_phy_irq"; 13050b766e7fSSandeep Maheswaram 13060b766e7fSSandeep Maheswaram power-domains = <&gcc USB30_PRIM_GDSC>; 13070b766e7fSSandeep Maheswaram 13080b766e7fSSandeep Maheswaram resets = <&gcc GCC_USB30_PRIM_BCR>; 13090b766e7fSSandeep Maheswaram 13100b766e7fSSandeep Maheswaram usb_1_dwc3: dwc3@a600000 { 13110b766e7fSSandeep Maheswaram compatible = "snps,dwc3"; 13120b766e7fSSandeep Maheswaram reg = <0 0x0a600000 0 0xe000>; 13130b766e7fSSandeep Maheswaram interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 13140b766e7fSSandeep Maheswaram iommus = <&apps_smmu 0x540 0>; 13150b766e7fSSandeep Maheswaram snps,dis_u2_susphy_quirk; 13160b766e7fSSandeep Maheswaram snps,dis_enblslpm_quirk; 13170b766e7fSSandeep Maheswaram phys = <&usb_1_hsphy>, <&usb_1_ssphy>; 13180b766e7fSSandeep Maheswaram phy-names = "usb2-phy", "usb3-phy"; 13190b766e7fSSandeep Maheswaram }; 13200b766e7fSSandeep Maheswaram }; 13210b766e7fSSandeep Maheswaram 1322*e07f8354STaniya Das videocc: clock-controller@ab00000 { 1323*e07f8354STaniya Das compatible = "qcom,sc7180-videocc"; 1324*e07f8354STaniya Das reg = <0 0x0ab00000 0 0x10000>; 1325*e07f8354STaniya Das clocks = <&rpmhcc RPMH_CXO_CLK>; 1326*e07f8354STaniya Das clock-names = "bi_tcxo"; 1327*e07f8354STaniya Das #clock-cells = <1>; 1328*e07f8354STaniya Das #reset-cells = <1>; 1329*e07f8354STaniya Das #power-domain-cells = <1>; 1330*e07f8354STaniya Das }; 1331*e07f8354STaniya Das 1332*e07f8354STaniya Das dispcc: clock-controller@af00000 { 1333*e07f8354STaniya Das compatible = "qcom,sc7180-dispcc"; 1334*e07f8354STaniya Das reg = <0 0x0af00000 0 0x200000>; 1335*e07f8354STaniya Das clocks = <&rpmhcc RPMH_CXO_CLK>, 1336*e07f8354STaniya Das <&gcc GCC_DISP_GPLL0_CLK_SRC>, 1337*e07f8354STaniya Das <0>, 1338*e07f8354STaniya Das <0>, 1339*e07f8354STaniya Das <0>, 1340*e07f8354STaniya Das <0>; 1341*e07f8354STaniya Das clock-names = "bi_tcxo", 1342*e07f8354STaniya Das "gcc_disp_gpll0_clk_src", 1343*e07f8354STaniya Das "dsi0_phy_pll_out_byteclk", 1344*e07f8354STaniya Das "dsi0_phy_pll_out_dsiclk", 1345*e07f8354STaniya Das "dp_phy_pll_link_clk", 1346*e07f8354STaniya Das "dp_phy_pll_vco_div_clk"; 1347*e07f8354STaniya Das #clock-cells = <1>; 1348*e07f8354STaniya Das #reset-cells = <1>; 1349*e07f8354STaniya Das #power-domain-cells = <1>; 1350*e07f8354STaniya Das }; 1351*e07f8354STaniya Das 13527cee5c74SMatthias Kaehlcke pdc: interrupt-controller@b220000 { 13537cee5c74SMatthias Kaehlcke compatible = "qcom,sc7180-pdc", "qcom,pdc"; 13547cee5c74SMatthias Kaehlcke reg = <0 0x0b220000 0 0x30000>; 13557cee5c74SMatthias Kaehlcke qcom,pdc-ranges = <0 480 15>, <17 497 98>, 13567cee5c74SMatthias Kaehlcke <119 634 4>, <124 639 1>; 13577cee5c74SMatthias Kaehlcke #interrupt-cells = <2>; 13587cee5c74SMatthias Kaehlcke interrupt-parent = <&intc>; 13597cee5c74SMatthias Kaehlcke interrupt-controller; 13607cee5c74SMatthias Kaehlcke }; 13617cee5c74SMatthias Kaehlcke 1362f5ab220dSSibi Sankar pdc_reset: reset-controller@b2e0000 { 1363f5ab220dSSibi Sankar compatible = "qcom,sc7180-pdc-global", "qcom,sdm845-pdc-global"; 1364f5ab220dSSibi Sankar reg = <0 0x0b2e0000 0 0x20000>; 1365f5ab220dSSibi Sankar #reset-cells = <1>; 1366f5ab220dSSibi Sankar }; 1367f5ab220dSSibi Sankar 13687cee5c74SMatthias Kaehlcke tsens0: thermal-sensor@c263000 { 13697cee5c74SMatthias Kaehlcke compatible = "qcom,sc7180-tsens","qcom,tsens-v2"; 13707cee5c74SMatthias Kaehlcke reg = <0 0x0c263000 0 0x1ff>, /* TM */ 13717cee5c74SMatthias Kaehlcke <0 0x0c222000 0 0x1ff>; /* SROT */ 13727cee5c74SMatthias Kaehlcke #qcom,sensors = <15>; 13732552c123SRajeshwari interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>, 13742552c123SRajeshwari <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>; 13752552c123SRajeshwari interrupt-names = "uplow","critical"; 13767cee5c74SMatthias Kaehlcke #thermal-sensor-cells = <1>; 13777cee5c74SMatthias Kaehlcke }; 13787cee5c74SMatthias Kaehlcke 13797cee5c74SMatthias Kaehlcke tsens1: thermal-sensor@c265000 { 13807cee5c74SMatthias Kaehlcke compatible = "qcom,sc7180-tsens","qcom,tsens-v2"; 13817cee5c74SMatthias Kaehlcke reg = <0 0x0c265000 0 0x1ff>, /* TM */ 13827cee5c74SMatthias Kaehlcke <0 0x0c223000 0 0x1ff>; /* SROT */ 13837cee5c74SMatthias Kaehlcke #qcom,sensors = <10>; 13842552c123SRajeshwari interrupts = <GIC_SPI 507 IRQ_TYPE_LEVEL_HIGH>, 13852552c123SRajeshwari <GIC_SPI 509 IRQ_TYPE_LEVEL_HIGH>; 13862552c123SRajeshwari interrupt-names = "uplow","critical"; 13877cee5c74SMatthias Kaehlcke #thermal-sensor-cells = <1>; 13887cee5c74SMatthias Kaehlcke }; 13897cee5c74SMatthias Kaehlcke 1390f5ab220dSSibi Sankar aoss_reset: reset-controller@c2a0000 { 1391f5ab220dSSibi Sankar compatible = "qcom,sc7180-aoss-cc", "qcom,sdm845-aoss-cc"; 1392f5ab220dSSibi Sankar reg = <0 0x0c2a0000 0 0x31000>; 1393f5ab220dSSibi Sankar #reset-cells = <1>; 1394f5ab220dSSibi Sankar }; 1395f5ab220dSSibi Sankar 1396f5ab220dSSibi Sankar aoss_qmp: qmp@c300000 { 1397f5ab220dSSibi Sankar compatible = "qcom,sc7180-aoss-qmp"; 1398f5ab220dSSibi Sankar reg = <0 0x0c300000 0 0x100000>; 1399f5ab220dSSibi Sankar interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>; 1400f5ab220dSSibi Sankar mboxes = <&apss_shared 0>; 1401f5ab220dSSibi Sankar 1402f5ab220dSSibi Sankar #clock-cells = <0>; 1403f5ab220dSSibi Sankar #power-domain-cells = <1>; 1404f5ab220dSSibi Sankar }; 1405f5ab220dSSibi Sankar 14060f9dc5f0SKiran Gunda spmi_bus: spmi@c440000 { 14070f9dc5f0SKiran Gunda compatible = "qcom,spmi-pmic-arb"; 14080f9dc5f0SKiran Gunda reg = <0 0x0c440000 0 0x1100>, 14090f9dc5f0SKiran Gunda <0 0x0c600000 0 0x2000000>, 14100f9dc5f0SKiran Gunda <0 0x0e600000 0 0x100000>, 14110f9dc5f0SKiran Gunda <0 0x0e700000 0 0xa0000>, 14120f9dc5f0SKiran Gunda <0 0x0c40a000 0 0x26000>; 14130f9dc5f0SKiran Gunda reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; 14140f9dc5f0SKiran Gunda interrupt-names = "periph_irq"; 14150f9dc5f0SKiran Gunda interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>; 14160f9dc5f0SKiran Gunda qcom,ee = <0>; 14170f9dc5f0SKiran Gunda qcom,channel = <0>; 14180f9dc5f0SKiran Gunda #address-cells = <1>; 14190f9dc5f0SKiran Gunda #size-cells = <1>; 14200f9dc5f0SKiran Gunda interrupt-controller; 14210f9dc5f0SKiran Gunda #interrupt-cells = <4>; 14220f9dc5f0SKiran Gunda cell-index = <0>; 14230f9dc5f0SKiran Gunda }; 14240f9dc5f0SKiran Gunda 1425d66df624SVivek Gautam apps_smmu: iommu@15000000 { 1426d66df624SVivek Gautam compatible = "qcom,sc7180-smmu-500", "arm,mmu-500"; 1427d66df624SVivek Gautam reg = <0 0x15000000 0 0x100000>; 1428d66df624SVivek Gautam #iommu-cells = <2>; 1429d66df624SVivek Gautam #global-interrupts = <1>; 1430d66df624SVivek Gautam interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, 1431d66df624SVivek Gautam <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>, 1432d66df624SVivek Gautam <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>, 1433d66df624SVivek Gautam <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, 1434d66df624SVivek Gautam <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>, 1435d66df624SVivek Gautam <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, 1436d66df624SVivek Gautam <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>, 1437d66df624SVivek Gautam <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, 1438d66df624SVivek Gautam <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>, 1439d66df624SVivek Gautam <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, 1440d66df624SVivek Gautam <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, 1441d66df624SVivek Gautam <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, 1442d66df624SVivek Gautam <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, 1443d66df624SVivek Gautam <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, 1444d66df624SVivek Gautam <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, 1445d66df624SVivek Gautam <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 1446d66df624SVivek Gautam <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 1447d66df624SVivek Gautam <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 1448d66df624SVivek Gautam <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, 1449d66df624SVivek Gautam <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, 1450d66df624SVivek Gautam <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, 1451d66df624SVivek Gautam <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, 1452d66df624SVivek Gautam <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>, 1453d66df624SVivek Gautam <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 1454d66df624SVivek Gautam <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 1455d66df624SVivek Gautam <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, 1456d66df624SVivek Gautam <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>, 1457d66df624SVivek Gautam <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>, 1458d66df624SVivek Gautam <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>, 1459d66df624SVivek Gautam <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>, 1460d66df624SVivek Gautam <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>, 1461d66df624SVivek Gautam <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>, 1462d66df624SVivek Gautam <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>, 1463d66df624SVivek Gautam <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>, 1464d66df624SVivek Gautam <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>, 1465d66df624SVivek Gautam <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>, 1466d66df624SVivek Gautam <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>, 1467d66df624SVivek Gautam <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>, 1468d66df624SVivek Gautam <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 1469d66df624SVivek Gautam <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 1470d66df624SVivek Gautam <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 1471d66df624SVivek Gautam <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, 1472d66df624SVivek Gautam <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>, 1473d66df624SVivek Gautam <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 1474d66df624SVivek Gautam <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 1475d66df624SVivek Gautam <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 1476d66df624SVivek Gautam <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 1477d66df624SVivek Gautam <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 1478d66df624SVivek Gautam <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 1479d66df624SVivek Gautam <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 1480d66df624SVivek Gautam <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 1481d66df624SVivek Gautam <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 1482d66df624SVivek Gautam <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 1483d66df624SVivek Gautam <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 1484d66df624SVivek Gautam <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 1485d66df624SVivek Gautam <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, 1486d66df624SVivek Gautam <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 1487d66df624SVivek Gautam <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 1488d66df624SVivek Gautam <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, 1489d66df624SVivek Gautam <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 1490d66df624SVivek Gautam <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 1491d66df624SVivek Gautam <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 1492d66df624SVivek Gautam <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 1493d66df624SVivek Gautam <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 1494d66df624SVivek Gautam <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 1495d66df624SVivek Gautam <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 1496d66df624SVivek Gautam <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 1497d66df624SVivek Gautam <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 1498d66df624SVivek Gautam <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 1499d66df624SVivek Gautam <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 1500d66df624SVivek Gautam <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 1501d66df624SVivek Gautam <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 1502d66df624SVivek Gautam <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 1503d66df624SVivek Gautam <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>, 1504d66df624SVivek Gautam <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 1505d66df624SVivek Gautam <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 1506d66df624SVivek Gautam <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>, 1507d66df624SVivek Gautam <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>, 1508d66df624SVivek Gautam <GIC_SPI 410 IRQ_TYPE_LEVEL_HIGH>, 1509d66df624SVivek Gautam <GIC_SPI 411 IRQ_TYPE_LEVEL_HIGH>, 1510d66df624SVivek Gautam <GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>; 1511d66df624SVivek Gautam }; 1512d66df624SVivek Gautam 151390db71e4SRajendra Nayak intc: interrupt-controller@17a00000 { 151490db71e4SRajendra Nayak compatible = "arm,gic-v3"; 151590db71e4SRajendra Nayak #address-cells = <2>; 151690db71e4SRajendra Nayak #size-cells = <2>; 151790db71e4SRajendra Nayak ranges; 151890db71e4SRajendra Nayak #interrupt-cells = <3>; 151990db71e4SRajendra Nayak interrupt-controller; 152090db71e4SRajendra Nayak reg = <0 0x17a00000 0 0x10000>, /* GICD */ 152190db71e4SRajendra Nayak <0 0x17a60000 0 0x100000>; /* GICR * 8 */ 152290db71e4SRajendra Nayak interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; 152390db71e4SRajendra Nayak 1524ac00546aSDouglas Anderson msi-controller@17a40000 { 152590db71e4SRajendra Nayak compatible = "arm,gic-v3-its"; 152690db71e4SRajendra Nayak msi-controller; 152790db71e4SRajendra Nayak #msi-cells = <1>; 152890db71e4SRajendra Nayak reg = <0 0x17a40000 0 0x20000>; 152990db71e4SRajendra Nayak status = "disabled"; 153090db71e4SRajendra Nayak }; 153190db71e4SRajendra Nayak }; 153290db71e4SRajendra Nayak 1533f5ab220dSSibi Sankar apss_shared: mailbox@17c00000 { 1534f5ab220dSSibi Sankar compatible = "qcom,sc7180-apss-shared"; 1535f5ab220dSSibi Sankar reg = <0 0x17c00000 0 0x10000>; 1536f5ab220dSSibi Sankar #mbox-cells = <1>; 1537f5ab220dSSibi Sankar }; 1538f5ab220dSSibi Sankar 15394722f956SSai Prakash Ranjan watchdog@17c10000 { 15404722f956SSai Prakash Ranjan compatible = "qcom,apss-wdt-sc7180", "qcom,kpss-wdt"; 15414722f956SSai Prakash Ranjan reg = <0 0x17c10000 0 0x1000>; 15424722f956SSai Prakash Ranjan clocks = <&sleep_clk>; 15434722f956SSai Prakash Ranjan }; 15444722f956SSai Prakash Ranjan 154590db71e4SRajendra Nayak timer@17c20000{ 154690db71e4SRajendra Nayak #address-cells = <2>; 154790db71e4SRajendra Nayak #size-cells = <2>; 154890db71e4SRajendra Nayak ranges; 154990db71e4SRajendra Nayak compatible = "arm,armv7-timer-mem"; 155090db71e4SRajendra Nayak reg = <0 0x17c20000 0 0x1000>; 155190db71e4SRajendra Nayak 155290db71e4SRajendra Nayak frame@17c21000 { 155390db71e4SRajendra Nayak frame-number = <0>; 155490db71e4SRajendra Nayak interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, 155590db71e4SRajendra Nayak <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 155690db71e4SRajendra Nayak reg = <0 0x17c21000 0 0x1000>, 155790db71e4SRajendra Nayak <0 0x17c22000 0 0x1000>; 155890db71e4SRajendra Nayak }; 155990db71e4SRajendra Nayak 156090db71e4SRajendra Nayak frame@17c23000 { 156190db71e4SRajendra Nayak frame-number = <1>; 156290db71e4SRajendra Nayak interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 156390db71e4SRajendra Nayak reg = <0 0x17c23000 0 0x1000>; 156490db71e4SRajendra Nayak status = "disabled"; 156590db71e4SRajendra Nayak }; 156690db71e4SRajendra Nayak 156790db71e4SRajendra Nayak frame@17c25000 { 156890db71e4SRajendra Nayak frame-number = <2>; 156990db71e4SRajendra Nayak interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 157090db71e4SRajendra Nayak reg = <0 0x17c25000 0 0x1000>; 157190db71e4SRajendra Nayak status = "disabled"; 157290db71e4SRajendra Nayak }; 157390db71e4SRajendra Nayak 157490db71e4SRajendra Nayak frame@17c27000 { 157590db71e4SRajendra Nayak frame-number = <3>; 157690db71e4SRajendra Nayak interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 157790db71e4SRajendra Nayak reg = <0 0x17c27000 0 0x1000>; 157890db71e4SRajendra Nayak status = "disabled"; 157990db71e4SRajendra Nayak }; 158090db71e4SRajendra Nayak 158190db71e4SRajendra Nayak frame@17c29000 { 158290db71e4SRajendra Nayak frame-number = <4>; 158390db71e4SRajendra Nayak interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 158490db71e4SRajendra Nayak reg = <0 0x17c29000 0 0x1000>; 158590db71e4SRajendra Nayak status = "disabled"; 158690db71e4SRajendra Nayak }; 158790db71e4SRajendra Nayak 158890db71e4SRajendra Nayak frame@17c2b000 { 158990db71e4SRajendra Nayak frame-number = <5>; 159090db71e4SRajendra Nayak interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 159190db71e4SRajendra Nayak reg = <0 0x17c2b000 0 0x1000>; 159290db71e4SRajendra Nayak status = "disabled"; 159390db71e4SRajendra Nayak }; 159490db71e4SRajendra Nayak 159590db71e4SRajendra Nayak frame@17c2d000 { 159690db71e4SRajendra Nayak frame-number = <6>; 159790db71e4SRajendra Nayak interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 159890db71e4SRajendra Nayak reg = <0 0x17c2d000 0 0x1000>; 159990db71e4SRajendra Nayak status = "disabled"; 160090db71e4SRajendra Nayak }; 160190db71e4SRajendra Nayak }; 1602fec6359cSMaulik Shah 1603fec6359cSMaulik Shah apps_rsc: rsc@18200000 { 1604fec6359cSMaulik Shah compatible = "qcom,rpmh-rsc"; 1605fec6359cSMaulik Shah reg = <0 0x18200000 0 0x10000>, 1606fec6359cSMaulik Shah <0 0x18210000 0 0x10000>, 1607fec6359cSMaulik Shah <0 0x18220000 0 0x10000>; 1608fec6359cSMaulik Shah reg-names = "drv-0", "drv-1", "drv-2"; 1609fec6359cSMaulik Shah interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 1610fec6359cSMaulik Shah <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, 1611fec6359cSMaulik Shah <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 1612fec6359cSMaulik Shah qcom,tcs-offset = <0xd00>; 1613fec6359cSMaulik Shah qcom,drv-id = <2>; 1614fec6359cSMaulik Shah qcom,tcs-config = <ACTIVE_TCS 2>, 1615fec6359cSMaulik Shah <SLEEP_TCS 3>, 1616fec6359cSMaulik Shah <WAKE_TCS 3>, 1617fec6359cSMaulik Shah <CONTROL_TCS 1>; 16180def3f14STaniya Das 16190def3f14STaniya Das rpmhcc: clock-controller { 16200def3f14STaniya Das compatible = "qcom,sc7180-rpmh-clk"; 16210def3f14STaniya Das clocks = <&xo_board>; 16220def3f14STaniya Das clock-names = "xo"; 16230def3f14STaniya Das #clock-cells = <1>; 16240def3f14STaniya Das }; 1625a16f862fSSibi Sankar 1626a16f862fSSibi Sankar rpmhpd: power-controller { 1627a16f862fSSibi Sankar compatible = "qcom,sc7180-rpmhpd"; 1628a16f862fSSibi Sankar #power-domain-cells = <1>; 1629a16f862fSSibi Sankar operating-points-v2 = <&rpmhpd_opp_table>; 1630a16f862fSSibi Sankar 1631a16f862fSSibi Sankar rpmhpd_opp_table: opp-table { 1632a16f862fSSibi Sankar compatible = "operating-points-v2"; 1633a16f862fSSibi Sankar 1634a16f862fSSibi Sankar rpmhpd_opp_ret: opp1 { 1635a16f862fSSibi Sankar opp-level = <RPMH_REGULATOR_LEVEL_RETENTION>; 1636a16f862fSSibi Sankar }; 1637a16f862fSSibi Sankar 1638a16f862fSSibi Sankar rpmhpd_opp_min_svs: opp2 { 1639a16f862fSSibi Sankar opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>; 1640a16f862fSSibi Sankar }; 1641a16f862fSSibi Sankar 1642a16f862fSSibi Sankar rpmhpd_opp_low_svs: opp3 { 1643a16f862fSSibi Sankar opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>; 1644a16f862fSSibi Sankar }; 1645a16f862fSSibi Sankar 1646a16f862fSSibi Sankar rpmhpd_opp_svs: opp4 { 1647a16f862fSSibi Sankar opp-level = <RPMH_REGULATOR_LEVEL_SVS>; 1648a16f862fSSibi Sankar }; 1649a16f862fSSibi Sankar 1650a16f862fSSibi Sankar rpmhpd_opp_svs_l1: opp5 { 1651a16f862fSSibi Sankar opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>; 1652a16f862fSSibi Sankar }; 1653a16f862fSSibi Sankar 1654a16f862fSSibi Sankar rpmhpd_opp_svs_l2: opp6 { 1655a16f862fSSibi Sankar opp-level = <224>; 1656a16f862fSSibi Sankar }; 1657a16f862fSSibi Sankar 1658a16f862fSSibi Sankar rpmhpd_opp_nom: opp7 { 1659a16f862fSSibi Sankar opp-level = <RPMH_REGULATOR_LEVEL_NOM>; 1660a16f862fSSibi Sankar }; 1661a16f862fSSibi Sankar 1662a16f862fSSibi Sankar rpmhpd_opp_nom_l1: opp8 { 1663a16f862fSSibi Sankar opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>; 1664a16f862fSSibi Sankar }; 1665a16f862fSSibi Sankar 1666a16f862fSSibi Sankar rpmhpd_opp_nom_l2: opp9 { 1667a16f862fSSibi Sankar opp-level = <RPMH_REGULATOR_LEVEL_NOM_L2>; 1668a16f862fSSibi Sankar }; 1669a16f862fSSibi Sankar 1670a16f862fSSibi Sankar rpmhpd_opp_turbo: opp10 { 1671a16f862fSSibi Sankar opp-level = <RPMH_REGULATOR_LEVEL_TURBO>; 1672a16f862fSSibi Sankar }; 1673a16f862fSSibi Sankar 1674a16f862fSSibi Sankar rpmhpd_opp_turbo_l1: opp11 { 1675a16f862fSSibi Sankar opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>; 1676a16f862fSSibi Sankar }; 1677a16f862fSSibi Sankar }; 1678a16f862fSSibi Sankar }; 1679fec6359cSMaulik Shah }; 168086899d82STaniya Das 168186899d82STaniya Das cpufreq_hw: cpufreq@18323000 { 168286899d82STaniya Das compatible = "qcom,cpufreq-hw"; 168386899d82STaniya Das reg = <0 0x18323000 0 0x1400>, <0 0x18325800 0 0x1400>; 168486899d82STaniya Das reg-names = "freq-domain0", "freq-domain1"; 168586899d82STaniya Das 168686899d82STaniya Das clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>; 168786899d82STaniya Das clock-names = "xo", "alternate"; 168886899d82STaniya Das 168986899d82STaniya Das #freq-domain-cells = <1>; 169086899d82STaniya Das }; 169190db71e4SRajendra Nayak }; 169290db71e4SRajendra Nayak 169382bdc939SRajeshwari thermal-zones { 169482bdc939SRajeshwari cpu0-thermal { 169582bdc939SRajeshwari polling-delay-passive = <250>; 169682bdc939SRajeshwari polling-delay = <1000>; 169782bdc939SRajeshwari 169882bdc939SRajeshwari thermal-sensors = <&tsens0 1>; 169982bdc939SRajeshwari 170082bdc939SRajeshwari trips { 170182bdc939SRajeshwari cpu0_alert0: trip-point0 { 170282bdc939SRajeshwari temperature = <90000>; 170382bdc939SRajeshwari hysteresis = <2000>; 170482bdc939SRajeshwari type = "passive"; 170582bdc939SRajeshwari }; 170682bdc939SRajeshwari 170782bdc939SRajeshwari cpu0_alert1: trip-point1 { 170882bdc939SRajeshwari temperature = <95000>; 170982bdc939SRajeshwari hysteresis = <2000>; 171082bdc939SRajeshwari type = "passive"; 171182bdc939SRajeshwari }; 171282bdc939SRajeshwari 171382bdc939SRajeshwari cpu0_crit: cpu_crit { 171482bdc939SRajeshwari temperature = <110000>; 171582bdc939SRajeshwari hysteresis = <1000>; 171682bdc939SRajeshwari type = "critical"; 171782bdc939SRajeshwari }; 171882bdc939SRajeshwari }; 17192552c123SRajeshwari 17202552c123SRajeshwari cooling-maps { 17212552c123SRajeshwari map0 { 17222552c123SRajeshwari trip = <&cpu0_alert0>; 17232552c123SRajeshwari cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 17242552c123SRajeshwari <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 17252552c123SRajeshwari <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 17262552c123SRajeshwari <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 17272552c123SRajeshwari <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 17282552c123SRajeshwari <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 17292552c123SRajeshwari }; 17302552c123SRajeshwari map1 { 17312552c123SRajeshwari trip = <&cpu0_alert1>; 17322552c123SRajeshwari cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 17332552c123SRajeshwari <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 17342552c123SRajeshwari <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 17352552c123SRajeshwari <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 17362552c123SRajeshwari <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 17372552c123SRajeshwari <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 17382552c123SRajeshwari }; 17392552c123SRajeshwari }; 174082bdc939SRajeshwari }; 174182bdc939SRajeshwari 174282bdc939SRajeshwari cpu1-thermal { 174382bdc939SRajeshwari polling-delay-passive = <250>; 174482bdc939SRajeshwari polling-delay = <1000>; 174582bdc939SRajeshwari 174682bdc939SRajeshwari thermal-sensors = <&tsens0 2>; 174782bdc939SRajeshwari 174882bdc939SRajeshwari trips { 174982bdc939SRajeshwari cpu1_alert0: trip-point0 { 175082bdc939SRajeshwari temperature = <90000>; 175182bdc939SRajeshwari hysteresis = <2000>; 175282bdc939SRajeshwari type = "passive"; 175382bdc939SRajeshwari }; 175482bdc939SRajeshwari 175582bdc939SRajeshwari cpu1_alert1: trip-point1 { 175682bdc939SRajeshwari temperature = <95000>; 175782bdc939SRajeshwari hysteresis = <2000>; 175882bdc939SRajeshwari type = "passive"; 175982bdc939SRajeshwari }; 176082bdc939SRajeshwari 176182bdc939SRajeshwari cpu1_crit: cpu_crit { 176282bdc939SRajeshwari temperature = <110000>; 176382bdc939SRajeshwari hysteresis = <1000>; 176482bdc939SRajeshwari type = "critical"; 176582bdc939SRajeshwari }; 176682bdc939SRajeshwari }; 17672552c123SRajeshwari 17682552c123SRajeshwari cooling-maps { 17692552c123SRajeshwari map0 { 17702552c123SRajeshwari trip = <&cpu1_alert0>; 17712552c123SRajeshwari cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 17722552c123SRajeshwari <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 17732552c123SRajeshwari <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 17742552c123SRajeshwari <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 17752552c123SRajeshwari <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 17762552c123SRajeshwari <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 17772552c123SRajeshwari }; 17782552c123SRajeshwari map1 { 17792552c123SRajeshwari trip = <&cpu1_alert1>; 17802552c123SRajeshwari cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 17812552c123SRajeshwari <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 17822552c123SRajeshwari <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 17832552c123SRajeshwari <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 17842552c123SRajeshwari <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 17852552c123SRajeshwari <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 17862552c123SRajeshwari }; 17872552c123SRajeshwari }; 178882bdc939SRajeshwari }; 178982bdc939SRajeshwari 179082bdc939SRajeshwari cpu2-thermal { 179182bdc939SRajeshwari polling-delay-passive = <250>; 179282bdc939SRajeshwari polling-delay = <1000>; 179382bdc939SRajeshwari 179482bdc939SRajeshwari thermal-sensors = <&tsens0 3>; 179582bdc939SRajeshwari 179682bdc939SRajeshwari trips { 179782bdc939SRajeshwari cpu2_alert0: trip-point0 { 179882bdc939SRajeshwari temperature = <90000>; 179982bdc939SRajeshwari hysteresis = <2000>; 180082bdc939SRajeshwari type = "passive"; 180182bdc939SRajeshwari }; 180282bdc939SRajeshwari 180382bdc939SRajeshwari cpu2_alert1: trip-point1 { 180482bdc939SRajeshwari temperature = <95000>; 180582bdc939SRajeshwari hysteresis = <2000>; 180682bdc939SRajeshwari type = "passive"; 180782bdc939SRajeshwari }; 180882bdc939SRajeshwari 180982bdc939SRajeshwari cpu2_crit: cpu_crit { 181082bdc939SRajeshwari temperature = <110000>; 181182bdc939SRajeshwari hysteresis = <1000>; 181282bdc939SRajeshwari type = "critical"; 181382bdc939SRajeshwari }; 181482bdc939SRajeshwari }; 18152552c123SRajeshwari 18162552c123SRajeshwari cooling-maps { 18172552c123SRajeshwari map0 { 18182552c123SRajeshwari trip = <&cpu2_alert0>; 18192552c123SRajeshwari cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 18202552c123SRajeshwari <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 18212552c123SRajeshwari <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 18222552c123SRajeshwari <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 18232552c123SRajeshwari <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 18242552c123SRajeshwari <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 18252552c123SRajeshwari }; 18262552c123SRajeshwari map1 { 18272552c123SRajeshwari trip = <&cpu2_alert1>; 18282552c123SRajeshwari cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 18292552c123SRajeshwari <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 18302552c123SRajeshwari <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 18312552c123SRajeshwari <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 18322552c123SRajeshwari <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 18332552c123SRajeshwari <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 18342552c123SRajeshwari }; 18352552c123SRajeshwari }; 183682bdc939SRajeshwari }; 183782bdc939SRajeshwari 183882bdc939SRajeshwari cpu3-thermal { 183982bdc939SRajeshwari polling-delay-passive = <250>; 184082bdc939SRajeshwari polling-delay = <1000>; 184182bdc939SRajeshwari 184282bdc939SRajeshwari thermal-sensors = <&tsens0 4>; 184382bdc939SRajeshwari 184482bdc939SRajeshwari trips { 184582bdc939SRajeshwari cpu3_alert0: trip-point0 { 184682bdc939SRajeshwari temperature = <90000>; 184782bdc939SRajeshwari hysteresis = <2000>; 184882bdc939SRajeshwari type = "passive"; 184982bdc939SRajeshwari }; 185082bdc939SRajeshwari 185182bdc939SRajeshwari cpu3_alert1: trip-point1 { 185282bdc939SRajeshwari temperature = <95000>; 185382bdc939SRajeshwari hysteresis = <2000>; 185482bdc939SRajeshwari type = "passive"; 185582bdc939SRajeshwari }; 185682bdc939SRajeshwari 185782bdc939SRajeshwari cpu3_crit: cpu_crit { 185882bdc939SRajeshwari temperature = <110000>; 185982bdc939SRajeshwari hysteresis = <1000>; 186082bdc939SRajeshwari type = "critical"; 186182bdc939SRajeshwari }; 186282bdc939SRajeshwari }; 18632552c123SRajeshwari 18642552c123SRajeshwari cooling-maps { 18652552c123SRajeshwari map0 { 18662552c123SRajeshwari trip = <&cpu3_alert0>; 18672552c123SRajeshwari cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 18682552c123SRajeshwari <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 18692552c123SRajeshwari <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 18702552c123SRajeshwari <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 18712552c123SRajeshwari <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 18722552c123SRajeshwari <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 18732552c123SRajeshwari }; 18742552c123SRajeshwari map1 { 18752552c123SRajeshwari trip = <&cpu3_alert1>; 18762552c123SRajeshwari cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 18772552c123SRajeshwari <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 18782552c123SRajeshwari <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 18792552c123SRajeshwari <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 18802552c123SRajeshwari <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 18812552c123SRajeshwari <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 18822552c123SRajeshwari }; 18832552c123SRajeshwari }; 188482bdc939SRajeshwari }; 188582bdc939SRajeshwari 188682bdc939SRajeshwari cpu4-thermal { 188782bdc939SRajeshwari polling-delay-passive = <250>; 188882bdc939SRajeshwari polling-delay = <1000>; 188982bdc939SRajeshwari 189082bdc939SRajeshwari thermal-sensors = <&tsens0 5>; 189182bdc939SRajeshwari 189282bdc939SRajeshwari trips { 189382bdc939SRajeshwari cpu4_alert0: trip-point0 { 189482bdc939SRajeshwari temperature = <90000>; 189582bdc939SRajeshwari hysteresis = <2000>; 189682bdc939SRajeshwari type = "passive"; 189782bdc939SRajeshwari }; 189882bdc939SRajeshwari 189982bdc939SRajeshwari cpu4_alert1: trip-point1 { 190082bdc939SRajeshwari temperature = <95000>; 190182bdc939SRajeshwari hysteresis = <2000>; 190282bdc939SRajeshwari type = "passive"; 190382bdc939SRajeshwari }; 190482bdc939SRajeshwari 190582bdc939SRajeshwari cpu4_crit: cpu_crit { 190682bdc939SRajeshwari temperature = <110000>; 190782bdc939SRajeshwari hysteresis = <1000>; 190882bdc939SRajeshwari type = "critical"; 190982bdc939SRajeshwari }; 191082bdc939SRajeshwari }; 19112552c123SRajeshwari 19122552c123SRajeshwari cooling-maps { 19132552c123SRajeshwari map0 { 19142552c123SRajeshwari trip = <&cpu4_alert0>; 19152552c123SRajeshwari cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 19162552c123SRajeshwari <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 19172552c123SRajeshwari <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 19182552c123SRajeshwari <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 19192552c123SRajeshwari <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 19202552c123SRajeshwari <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 19212552c123SRajeshwari }; 19222552c123SRajeshwari map1 { 19232552c123SRajeshwari trip = <&cpu4_alert1>; 19242552c123SRajeshwari cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 19252552c123SRajeshwari <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 19262552c123SRajeshwari <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 19272552c123SRajeshwari <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 19282552c123SRajeshwari <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 19292552c123SRajeshwari <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 19302552c123SRajeshwari }; 19312552c123SRajeshwari }; 193282bdc939SRajeshwari }; 193382bdc939SRajeshwari 193482bdc939SRajeshwari cpu5-thermal { 193582bdc939SRajeshwari polling-delay-passive = <250>; 193682bdc939SRajeshwari polling-delay = <1000>; 193782bdc939SRajeshwari 193882bdc939SRajeshwari thermal-sensors = <&tsens0 6>; 193982bdc939SRajeshwari 194082bdc939SRajeshwari trips { 194182bdc939SRajeshwari cpu5_alert0: trip-point0 { 194282bdc939SRajeshwari temperature = <90000>; 194382bdc939SRajeshwari hysteresis = <2000>; 194482bdc939SRajeshwari type = "passive"; 194582bdc939SRajeshwari }; 194682bdc939SRajeshwari 194782bdc939SRajeshwari cpu5_alert1: trip-point1 { 194882bdc939SRajeshwari temperature = <95000>; 194982bdc939SRajeshwari hysteresis = <2000>; 195082bdc939SRajeshwari type = "passive"; 195182bdc939SRajeshwari }; 195282bdc939SRajeshwari 195382bdc939SRajeshwari cpu5_crit: cpu_crit { 195482bdc939SRajeshwari temperature = <110000>; 195582bdc939SRajeshwari hysteresis = <1000>; 195682bdc939SRajeshwari type = "critical"; 195782bdc939SRajeshwari }; 195882bdc939SRajeshwari }; 19592552c123SRajeshwari 19602552c123SRajeshwari cooling-maps { 19612552c123SRajeshwari map0 { 19622552c123SRajeshwari trip = <&cpu5_alert0>; 19632552c123SRajeshwari cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 19642552c123SRajeshwari <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 19652552c123SRajeshwari <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 19662552c123SRajeshwari <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 19672552c123SRajeshwari <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 19682552c123SRajeshwari <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 19692552c123SRajeshwari }; 19702552c123SRajeshwari map1 { 19712552c123SRajeshwari trip = <&cpu5_alert1>; 19722552c123SRajeshwari cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 19732552c123SRajeshwari <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 19742552c123SRajeshwari <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 19752552c123SRajeshwari <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 19762552c123SRajeshwari <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 19772552c123SRajeshwari <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 19782552c123SRajeshwari }; 19792552c123SRajeshwari }; 198082bdc939SRajeshwari }; 198182bdc939SRajeshwari 198282bdc939SRajeshwari cpu6-thermal { 198382bdc939SRajeshwari polling-delay-passive = <250>; 198482bdc939SRajeshwari polling-delay = <1000>; 198582bdc939SRajeshwari 198682bdc939SRajeshwari thermal-sensors = <&tsens0 9>; 198782bdc939SRajeshwari 198882bdc939SRajeshwari trips { 198982bdc939SRajeshwari cpu6_alert0: trip-point0 { 199082bdc939SRajeshwari temperature = <90000>; 199182bdc939SRajeshwari hysteresis = <2000>; 199282bdc939SRajeshwari type = "passive"; 199382bdc939SRajeshwari }; 199482bdc939SRajeshwari 199582bdc939SRajeshwari cpu6_alert1: trip-point1 { 199682bdc939SRajeshwari temperature = <95000>; 199782bdc939SRajeshwari hysteresis = <2000>; 199882bdc939SRajeshwari type = "passive"; 199982bdc939SRajeshwari }; 200082bdc939SRajeshwari 200182bdc939SRajeshwari cpu6_crit: cpu_crit { 200282bdc939SRajeshwari temperature = <110000>; 200382bdc939SRajeshwari hysteresis = <1000>; 200482bdc939SRajeshwari type = "critical"; 200582bdc939SRajeshwari }; 200682bdc939SRajeshwari }; 20072552c123SRajeshwari 20082552c123SRajeshwari cooling-maps { 20092552c123SRajeshwari map0 { 20102552c123SRajeshwari trip = <&cpu6_alert0>; 20112552c123SRajeshwari cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 20122552c123SRajeshwari <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 20132552c123SRajeshwari }; 20142552c123SRajeshwari map1 { 20152552c123SRajeshwari trip = <&cpu6_alert1>; 20162552c123SRajeshwari cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 20172552c123SRajeshwari <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 20182552c123SRajeshwari }; 20192552c123SRajeshwari }; 202082bdc939SRajeshwari }; 202182bdc939SRajeshwari 202282bdc939SRajeshwari cpu7-thermal { 202382bdc939SRajeshwari polling-delay-passive = <250>; 202482bdc939SRajeshwari polling-delay = <1000>; 202582bdc939SRajeshwari 202682bdc939SRajeshwari thermal-sensors = <&tsens0 10>; 202782bdc939SRajeshwari 202882bdc939SRajeshwari trips { 202982bdc939SRajeshwari cpu7_alert0: trip-point0 { 203082bdc939SRajeshwari temperature = <90000>; 203182bdc939SRajeshwari hysteresis = <2000>; 203282bdc939SRajeshwari type = "passive"; 203382bdc939SRajeshwari }; 203482bdc939SRajeshwari 203582bdc939SRajeshwari cpu7_alert1: trip-point1 { 203682bdc939SRajeshwari temperature = <95000>; 203782bdc939SRajeshwari hysteresis = <2000>; 203882bdc939SRajeshwari type = "passive"; 203982bdc939SRajeshwari }; 204082bdc939SRajeshwari 204182bdc939SRajeshwari cpu7_crit: cpu_crit { 204282bdc939SRajeshwari temperature = <110000>; 204382bdc939SRajeshwari hysteresis = <1000>; 204482bdc939SRajeshwari type = "critical"; 204582bdc939SRajeshwari }; 204682bdc939SRajeshwari }; 20472552c123SRajeshwari 20482552c123SRajeshwari cooling-maps { 20492552c123SRajeshwari map0 { 20502552c123SRajeshwari trip = <&cpu7_alert0>; 20512552c123SRajeshwari cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 20522552c123SRajeshwari <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 20532552c123SRajeshwari }; 20542552c123SRajeshwari map1 { 20552552c123SRajeshwari trip = <&cpu7_alert1>; 20562552c123SRajeshwari cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 20572552c123SRajeshwari <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 20582552c123SRajeshwari }; 20592552c123SRajeshwari }; 206082bdc939SRajeshwari }; 206182bdc939SRajeshwari 206282bdc939SRajeshwari cpu8-thermal { 206382bdc939SRajeshwari polling-delay-passive = <250>; 206482bdc939SRajeshwari polling-delay = <1000>; 206582bdc939SRajeshwari 206682bdc939SRajeshwari thermal-sensors = <&tsens0 11>; 206782bdc939SRajeshwari 206882bdc939SRajeshwari trips { 206982bdc939SRajeshwari cpu8_alert0: trip-point0 { 207082bdc939SRajeshwari temperature = <90000>; 207182bdc939SRajeshwari hysteresis = <2000>; 207282bdc939SRajeshwari type = "passive"; 207382bdc939SRajeshwari }; 207482bdc939SRajeshwari 207582bdc939SRajeshwari cpu8_alert1: trip-point1 { 207682bdc939SRajeshwari temperature = <95000>; 207782bdc939SRajeshwari hysteresis = <2000>; 207882bdc939SRajeshwari type = "passive"; 207982bdc939SRajeshwari }; 208082bdc939SRajeshwari 208182bdc939SRajeshwari cpu8_crit: cpu_crit { 208282bdc939SRajeshwari temperature = <110000>; 208382bdc939SRajeshwari hysteresis = <1000>; 208482bdc939SRajeshwari type = "critical"; 208582bdc939SRajeshwari }; 208682bdc939SRajeshwari }; 20872552c123SRajeshwari 20882552c123SRajeshwari cooling-maps { 20892552c123SRajeshwari map0 { 20902552c123SRajeshwari trip = <&cpu8_alert0>; 20912552c123SRajeshwari cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 20922552c123SRajeshwari <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 20932552c123SRajeshwari }; 20942552c123SRajeshwari map1 { 20952552c123SRajeshwari trip = <&cpu8_alert1>; 20962552c123SRajeshwari cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 20972552c123SRajeshwari <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 20982552c123SRajeshwari }; 20992552c123SRajeshwari }; 210082bdc939SRajeshwari }; 210182bdc939SRajeshwari 210282bdc939SRajeshwari cpu9-thermal { 210382bdc939SRajeshwari polling-delay-passive = <250>; 210482bdc939SRajeshwari polling-delay = <1000>; 210582bdc939SRajeshwari 210682bdc939SRajeshwari thermal-sensors = <&tsens0 12>; 210782bdc939SRajeshwari 210882bdc939SRajeshwari trips { 210982bdc939SRajeshwari cpu9_alert0: trip-point0 { 211082bdc939SRajeshwari temperature = <90000>; 211182bdc939SRajeshwari hysteresis = <2000>; 211282bdc939SRajeshwari type = "passive"; 211382bdc939SRajeshwari }; 211482bdc939SRajeshwari 211582bdc939SRajeshwari cpu9_alert1: trip-point1 { 211682bdc939SRajeshwari temperature = <95000>; 211782bdc939SRajeshwari hysteresis = <2000>; 211882bdc939SRajeshwari type = "passive"; 211982bdc939SRajeshwari }; 212082bdc939SRajeshwari 212182bdc939SRajeshwari cpu9_crit: cpu_crit { 212282bdc939SRajeshwari temperature = <110000>; 212382bdc939SRajeshwari hysteresis = <1000>; 212482bdc939SRajeshwari type = "critical"; 212582bdc939SRajeshwari }; 212682bdc939SRajeshwari }; 21272552c123SRajeshwari 21282552c123SRajeshwari cooling-maps { 21292552c123SRajeshwari map0 { 21302552c123SRajeshwari trip = <&cpu9_alert0>; 21312552c123SRajeshwari cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 21322552c123SRajeshwari <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 21332552c123SRajeshwari }; 21342552c123SRajeshwari map1 { 21352552c123SRajeshwari trip = <&cpu9_alert1>; 21362552c123SRajeshwari cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 21372552c123SRajeshwari <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 21382552c123SRajeshwari }; 21392552c123SRajeshwari }; 214082bdc939SRajeshwari }; 214182bdc939SRajeshwari 214282bdc939SRajeshwari aoss0-thermal { 214382bdc939SRajeshwari polling-delay-passive = <250>; 214482bdc939SRajeshwari polling-delay = <1000>; 214582bdc939SRajeshwari 214682bdc939SRajeshwari thermal-sensors = <&tsens0 0>; 214782bdc939SRajeshwari 214882bdc939SRajeshwari trips { 214982bdc939SRajeshwari aoss0_alert0: trip-point0 { 215082bdc939SRajeshwari temperature = <90000>; 215182bdc939SRajeshwari hysteresis = <2000>; 215282bdc939SRajeshwari type = "hot"; 215382bdc939SRajeshwari }; 215482bdc939SRajeshwari }; 215582bdc939SRajeshwari }; 215682bdc939SRajeshwari 215782bdc939SRajeshwari cpuss0-thermal { 215882bdc939SRajeshwari polling-delay-passive = <250>; 215982bdc939SRajeshwari polling-delay = <1000>; 216082bdc939SRajeshwari 216182bdc939SRajeshwari thermal-sensors = <&tsens0 7>; 216282bdc939SRajeshwari 216382bdc939SRajeshwari trips { 216482bdc939SRajeshwari cpuss0_alert0: trip-point0 { 216582bdc939SRajeshwari temperature = <90000>; 216682bdc939SRajeshwari hysteresis = <2000>; 216782bdc939SRajeshwari type = "hot"; 216882bdc939SRajeshwari }; 216982bdc939SRajeshwari cpuss0_crit: cluster0_crit { 217082bdc939SRajeshwari temperature = <110000>; 217182bdc939SRajeshwari hysteresis = <2000>; 217282bdc939SRajeshwari type = "critical"; 217382bdc939SRajeshwari }; 217482bdc939SRajeshwari }; 217582bdc939SRajeshwari }; 217682bdc939SRajeshwari 217782bdc939SRajeshwari cpuss1-thermal { 217882bdc939SRajeshwari polling-delay-passive = <250>; 217982bdc939SRajeshwari polling-delay = <1000>; 218082bdc939SRajeshwari 218182bdc939SRajeshwari thermal-sensors = <&tsens0 8>; 218282bdc939SRajeshwari 218382bdc939SRajeshwari trips { 218482bdc939SRajeshwari cpuss1_alert0: trip-point0 { 218582bdc939SRajeshwari temperature = <90000>; 218682bdc939SRajeshwari hysteresis = <2000>; 218782bdc939SRajeshwari type = "hot"; 218882bdc939SRajeshwari }; 218982bdc939SRajeshwari cpuss1_crit: cluster0_crit { 219082bdc939SRajeshwari temperature = <110000>; 219182bdc939SRajeshwari hysteresis = <2000>; 219282bdc939SRajeshwari type = "critical"; 219382bdc939SRajeshwari }; 219482bdc939SRajeshwari }; 219582bdc939SRajeshwari }; 219682bdc939SRajeshwari 219782bdc939SRajeshwari gpuss0-thermal { 219882bdc939SRajeshwari polling-delay-passive = <250>; 219982bdc939SRajeshwari polling-delay = <1000>; 220082bdc939SRajeshwari 220182bdc939SRajeshwari thermal-sensors = <&tsens0 13>; 220282bdc939SRajeshwari 220382bdc939SRajeshwari trips { 220482bdc939SRajeshwari gpuss0_alert0: trip-point0 { 220582bdc939SRajeshwari temperature = <90000>; 220682bdc939SRajeshwari hysteresis = <2000>; 220782bdc939SRajeshwari type = "hot"; 220882bdc939SRajeshwari }; 220982bdc939SRajeshwari }; 221082bdc939SRajeshwari }; 221182bdc939SRajeshwari 221282bdc939SRajeshwari gpuss1-thermal { 221382bdc939SRajeshwari polling-delay-passive = <250>; 221482bdc939SRajeshwari polling-delay = <1000>; 221582bdc939SRajeshwari 221682bdc939SRajeshwari thermal-sensors = <&tsens0 14>; 221782bdc939SRajeshwari 221882bdc939SRajeshwari trips { 221982bdc939SRajeshwari gpuss1_alert0: trip-point0 { 222082bdc939SRajeshwari temperature = <90000>; 222182bdc939SRajeshwari hysteresis = <2000>; 222282bdc939SRajeshwari type = "hot"; 222382bdc939SRajeshwari }; 222482bdc939SRajeshwari }; 222582bdc939SRajeshwari }; 222682bdc939SRajeshwari 222782bdc939SRajeshwari aoss1-thermal { 222882bdc939SRajeshwari polling-delay-passive = <250>; 222982bdc939SRajeshwari polling-delay = <1000>; 223082bdc939SRajeshwari 223182bdc939SRajeshwari thermal-sensors = <&tsens1 0>; 223282bdc939SRajeshwari 223382bdc939SRajeshwari trips { 223482bdc939SRajeshwari aoss1_alert0: trip-point0 { 223582bdc939SRajeshwari temperature = <90000>; 223682bdc939SRajeshwari hysteresis = <2000>; 223782bdc939SRajeshwari type = "hot"; 223882bdc939SRajeshwari }; 223982bdc939SRajeshwari }; 224082bdc939SRajeshwari }; 224182bdc939SRajeshwari 224282bdc939SRajeshwari cwlan-thermal { 224382bdc939SRajeshwari polling-delay-passive = <250>; 224482bdc939SRajeshwari polling-delay = <1000>; 224582bdc939SRajeshwari 224682bdc939SRajeshwari thermal-sensors = <&tsens1 1>; 224782bdc939SRajeshwari 224882bdc939SRajeshwari trips { 224982bdc939SRajeshwari cwlan_alert0: trip-point0 { 225082bdc939SRajeshwari temperature = <90000>; 225182bdc939SRajeshwari hysteresis = <2000>; 225282bdc939SRajeshwari type = "hot"; 225382bdc939SRajeshwari }; 225482bdc939SRajeshwari }; 225582bdc939SRajeshwari }; 225682bdc939SRajeshwari 225782bdc939SRajeshwari audio-thermal { 225882bdc939SRajeshwari polling-delay-passive = <250>; 225982bdc939SRajeshwari polling-delay = <1000>; 226082bdc939SRajeshwari 226182bdc939SRajeshwari thermal-sensors = <&tsens1 2>; 226282bdc939SRajeshwari 226382bdc939SRajeshwari trips { 226482bdc939SRajeshwari audio_alert0: trip-point0 { 226582bdc939SRajeshwari temperature = <90000>; 226682bdc939SRajeshwari hysteresis = <2000>; 226782bdc939SRajeshwari type = "hot"; 226882bdc939SRajeshwari }; 226982bdc939SRajeshwari }; 227082bdc939SRajeshwari }; 227182bdc939SRajeshwari 227282bdc939SRajeshwari ddr-thermal { 227382bdc939SRajeshwari polling-delay-passive = <250>; 227482bdc939SRajeshwari polling-delay = <1000>; 227582bdc939SRajeshwari 227682bdc939SRajeshwari thermal-sensors = <&tsens1 3>; 227782bdc939SRajeshwari 227882bdc939SRajeshwari trips { 227982bdc939SRajeshwari ddr_alert0: trip-point0 { 228082bdc939SRajeshwari temperature = <90000>; 228182bdc939SRajeshwari hysteresis = <2000>; 228282bdc939SRajeshwari type = "hot"; 228382bdc939SRajeshwari }; 228482bdc939SRajeshwari }; 228582bdc939SRajeshwari }; 228682bdc939SRajeshwari 228782bdc939SRajeshwari q6-hvx-thermal { 228882bdc939SRajeshwari polling-delay-passive = <250>; 228982bdc939SRajeshwari polling-delay = <1000>; 229082bdc939SRajeshwari 229182bdc939SRajeshwari thermal-sensors = <&tsens1 4>; 229282bdc939SRajeshwari 229382bdc939SRajeshwari trips { 229482bdc939SRajeshwari q6_hvx_alert0: trip-point0 { 229582bdc939SRajeshwari temperature = <90000>; 229682bdc939SRajeshwari hysteresis = <2000>; 229782bdc939SRajeshwari type = "hot"; 229882bdc939SRajeshwari }; 229982bdc939SRajeshwari }; 230082bdc939SRajeshwari }; 230182bdc939SRajeshwari 230282bdc939SRajeshwari camera-thermal { 230382bdc939SRajeshwari polling-delay-passive = <250>; 230482bdc939SRajeshwari polling-delay = <1000>; 230582bdc939SRajeshwari 230682bdc939SRajeshwari thermal-sensors = <&tsens1 5>; 230782bdc939SRajeshwari 230882bdc939SRajeshwari trips { 230982bdc939SRajeshwari camera_alert0: trip-point0 { 231082bdc939SRajeshwari temperature = <90000>; 231182bdc939SRajeshwari hysteresis = <2000>; 231282bdc939SRajeshwari type = "hot"; 231382bdc939SRajeshwari }; 231482bdc939SRajeshwari }; 231582bdc939SRajeshwari }; 231682bdc939SRajeshwari 231782bdc939SRajeshwari mdm-core-thermal { 231882bdc939SRajeshwari polling-delay-passive = <250>; 231982bdc939SRajeshwari polling-delay = <1000>; 232082bdc939SRajeshwari 232182bdc939SRajeshwari thermal-sensors = <&tsens1 6>; 232282bdc939SRajeshwari 232382bdc939SRajeshwari trips { 232482bdc939SRajeshwari mdm_alert0: trip-point0 { 232582bdc939SRajeshwari temperature = <90000>; 232682bdc939SRajeshwari hysteresis = <2000>; 232782bdc939SRajeshwari type = "hot"; 232882bdc939SRajeshwari }; 232982bdc939SRajeshwari }; 233082bdc939SRajeshwari }; 233182bdc939SRajeshwari 233282bdc939SRajeshwari mdm-dsp-thermal { 233382bdc939SRajeshwari polling-delay-passive = <250>; 233482bdc939SRajeshwari polling-delay = <1000>; 233582bdc939SRajeshwari 233682bdc939SRajeshwari thermal-sensors = <&tsens1 7>; 233782bdc939SRajeshwari 233882bdc939SRajeshwari trips { 233982bdc939SRajeshwari mdm_dsp_alert0: trip-point0 { 234082bdc939SRajeshwari temperature = <90000>; 234182bdc939SRajeshwari hysteresis = <2000>; 234282bdc939SRajeshwari type = "hot"; 234382bdc939SRajeshwari }; 234482bdc939SRajeshwari }; 234582bdc939SRajeshwari }; 234682bdc939SRajeshwari 234782bdc939SRajeshwari npu-thermal { 234882bdc939SRajeshwari polling-delay-passive = <250>; 234982bdc939SRajeshwari polling-delay = <1000>; 235082bdc939SRajeshwari 235182bdc939SRajeshwari thermal-sensors = <&tsens1 8>; 235282bdc939SRajeshwari 235382bdc939SRajeshwari trips { 235482bdc939SRajeshwari npu_alert0: trip-point0 { 235582bdc939SRajeshwari temperature = <90000>; 235682bdc939SRajeshwari hysteresis = <2000>; 235782bdc939SRajeshwari type = "hot"; 235882bdc939SRajeshwari }; 235982bdc939SRajeshwari }; 236082bdc939SRajeshwari }; 236182bdc939SRajeshwari 236282bdc939SRajeshwari video-thermal { 236382bdc939SRajeshwari polling-delay-passive = <250>; 236482bdc939SRajeshwari polling-delay = <1000>; 236582bdc939SRajeshwari 236682bdc939SRajeshwari thermal-sensors = <&tsens1 9>; 236782bdc939SRajeshwari 236882bdc939SRajeshwari trips { 236982bdc939SRajeshwari video_alert0: trip-point0 { 237082bdc939SRajeshwari temperature = <90000>; 237182bdc939SRajeshwari hysteresis = <2000>; 237282bdc939SRajeshwari type = "hot"; 237382bdc939SRajeshwari }; 237482bdc939SRajeshwari }; 237582bdc939SRajeshwari }; 237682bdc939SRajeshwari }; 237782bdc939SRajeshwari 237890db71e4SRajendra Nayak timer { 237990db71e4SRajendra Nayak compatible = "arm,armv8-timer"; 238090db71e4SRajendra Nayak interrupts = <GIC_PPI 1 IRQ_TYPE_LEVEL_LOW>, 238190db71e4SRajendra Nayak <GIC_PPI 2 IRQ_TYPE_LEVEL_LOW>, 238290db71e4SRajendra Nayak <GIC_PPI 3 IRQ_TYPE_LEVEL_LOW>, 238390db71e4SRajendra Nayak <GIC_PPI 0 IRQ_TYPE_LEVEL_LOW>; 238490db71e4SRajendra Nayak }; 238590db71e4SRajendra Nayak}; 2386