xref: /linux/arch/arm64/boot/dts/qcom/sc7180.dtsi (revision 39f3d3bb05a43414905aba33f6250e8ddaea38b6)
190db71e4SRajendra Nayak// SPDX-License-Identifier: BSD-3-Clause
290db71e4SRajendra Nayak/*
390db71e4SRajendra Nayak * SC7180 SoC device tree source
490db71e4SRajendra Nayak *
590db71e4SRajendra Nayak * Copyright (c) 2019, The Linux Foundation. All rights reserved.
690db71e4SRajendra Nayak */
790db71e4SRajendra Nayak
8e07f8354STaniya Das#include <dt-bindings/clock/qcom,dispcc-sc7180.h>
990db71e4SRajendra Nayak#include <dt-bindings/clock/qcom,gcc-sc7180.h>
10e07f8354STaniya Das#include <dt-bindings/clock/qcom,gpucc-sc7180.h>
110def3f14STaniya Das#include <dt-bindings/clock/qcom,rpmh.h>
12e07f8354STaniya Das#include <dt-bindings/clock/qcom,videocc-sc7180.h>
13a0fa17f1SEvan Green#include <dt-bindings/interconnect/qcom,sc7180.h>
1490db71e4SRajendra Nayak#include <dt-bindings/interrupt-controller/arm-gic.h>
150b766e7fSSandeep Maheswaram#include <dt-bindings/phy/phy-qcom-qusb2.h>
16f5ab220dSSibi Sankar#include <dt-bindings/power/qcom-aoss-qmp.h>
17a16f862fSSibi Sankar#include <dt-bindings/power/qcom-rpmpd.h>
18f5ab220dSSibi Sankar#include <dt-bindings/reset/qcom,sdm845-aoss.h>
19f5ab220dSSibi Sankar#include <dt-bindings/reset/qcom,sdm845-pdc.h>
20fec6359cSMaulik Shah#include <dt-bindings/soc/qcom,rpmh-rsc.h>
212552c123SRajeshwari#include <dt-bindings/thermal/thermal.h>
2290db71e4SRajendra Nayak
2390db71e4SRajendra Nayak/ {
2490db71e4SRajendra Nayak	interrupt-parent = <&intc>;
2590db71e4SRajendra Nayak
2690db71e4SRajendra Nayak	#address-cells = <2>;
2790db71e4SRajendra Nayak	#size-cells = <2>;
2890db71e4SRajendra Nayak
2990db71e4SRajendra Nayak	chosen { };
3090db71e4SRajendra Nayak
319868a31cSRajendra Nayak	aliases {
329868a31cSRajendra Nayak		i2c0 = &i2c0;
339868a31cSRajendra Nayak		i2c1 = &i2c1;
349868a31cSRajendra Nayak		i2c2 = &i2c2;
359868a31cSRajendra Nayak		i2c3 = &i2c3;
369868a31cSRajendra Nayak		i2c4 = &i2c4;
379868a31cSRajendra Nayak		i2c5 = &i2c5;
389868a31cSRajendra Nayak		i2c6 = &i2c6;
399868a31cSRajendra Nayak		i2c7 = &i2c7;
409868a31cSRajendra Nayak		i2c8 = &i2c8;
419868a31cSRajendra Nayak		i2c9 = &i2c9;
429868a31cSRajendra Nayak		i2c10 = &i2c10;
439868a31cSRajendra Nayak		i2c11 = &i2c11;
449868a31cSRajendra Nayak		spi0 = &spi0;
459868a31cSRajendra Nayak		spi1 = &spi1;
469868a31cSRajendra Nayak		spi3 = &spi3;
479868a31cSRajendra Nayak		spi5 = &spi5;
489868a31cSRajendra Nayak		spi6 = &spi6;
499868a31cSRajendra Nayak		spi8 = &spi8;
509868a31cSRajendra Nayak		spi10 = &spi10;
519868a31cSRajendra Nayak		spi11 = &spi11;
529868a31cSRajendra Nayak	};
539868a31cSRajendra Nayak
5490db71e4SRajendra Nayak	clocks {
5590db71e4SRajendra Nayak		xo_board: xo-board {
5690db71e4SRajendra Nayak			compatible = "fixed-clock";
5790db71e4SRajendra Nayak			clock-frequency = <38400000>;
5890db71e4SRajendra Nayak			#clock-cells = <0>;
5990db71e4SRajendra Nayak		};
6090db71e4SRajendra Nayak
6190db71e4SRajendra Nayak		sleep_clk: sleep-clk {
6290db71e4SRajendra Nayak			compatible = "fixed-clock";
6390db71e4SRajendra Nayak			clock-frequency = <32764>;
6490db71e4SRajendra Nayak			#clock-cells = <0>;
6590db71e4SRajendra Nayak		};
6690db71e4SRajendra Nayak	};
6790db71e4SRajendra Nayak
68e0abc5ebSMaulik Shah	reserved_memory: reserved-memory {
69e0abc5ebSMaulik Shah		#address-cells = <2>;
70e0abc5ebSMaulik Shah		#size-cells = <2>;
71e0abc5ebSMaulik Shah		ranges;
72e0abc5ebSMaulik Shah
7333c172b9SSibi Sankar		hyp_mem: memory@80000000 {
7433c172b9SSibi Sankar			reg = <0x0 0x80000000 0x0 0x600000>;
7533c172b9SSibi Sankar			no-map;
7633c172b9SSibi Sankar		};
7733c172b9SSibi Sankar
7833c172b9SSibi Sankar		xbl_mem: memory@80600000 {
7933c172b9SSibi Sankar			reg = <0x0 0x80600000 0x0 0x200000>;
8033c172b9SSibi Sankar			no-map;
8133c172b9SSibi Sankar		};
8233c172b9SSibi Sankar
8333c172b9SSibi Sankar		aop_mem: memory@80800000 {
8433c172b9SSibi Sankar			reg = <0x0 0x80800000 0x0 0x20000>;
8533c172b9SSibi Sankar			no-map;
8633c172b9SSibi Sankar		};
8733c172b9SSibi Sankar
88e0abc5ebSMaulik Shah		aop_cmd_db_mem: memory@80820000 {
89e0abc5ebSMaulik Shah			reg = <0x0 0x80820000 0x0 0x20000>;
90e0abc5ebSMaulik Shah			compatible = "qcom,cmd-db";
919fc18435SDouglas Anderson			no-map;
92f5ab220dSSibi Sankar		};
93f5ab220dSSibi Sankar
9433c172b9SSibi Sankar		sec_apps_mem: memory@808ff000 {
9533c172b9SSibi Sankar			reg = <0x0 0x808ff000 0x0 0x1000>;
9633c172b9SSibi Sankar			no-map;
9733c172b9SSibi Sankar		};
9833c172b9SSibi Sankar
99f5ab220dSSibi Sankar		smem_mem: memory@80900000 {
100f5ab220dSSibi Sankar			reg = <0x0 0x80900000 0x0 0x200000>;
101e0abc5ebSMaulik Shah			no-map;
102e0abc5ebSMaulik Shah		};
1030e4621a4SDikshita Agarwal
10433c172b9SSibi Sankar		tz_mem: memory@80b00000 {
10533c172b9SSibi Sankar			reg = <0x0 0x80b00000 0x0 0x3900000>;
1060e4621a4SDikshita Agarwal			no-map;
1070e4621a4SDikshita Agarwal		};
10833c172b9SSibi Sankar
10933c172b9SSibi Sankar		rmtfs_mem: memory@84400000 {
11033c172b9SSibi Sankar			compatible = "qcom,rmtfs-mem";
11133c172b9SSibi Sankar			reg = <0x0 0x84400000 0x0 0x200000>;
11233c172b9SSibi Sankar			no-map;
11333c172b9SSibi Sankar
11433c172b9SSibi Sankar			qcom,client-id = <1>;
11533c172b9SSibi Sankar			qcom,vmid = <15>;
11633c172b9SSibi Sankar		};
117e0abc5ebSMaulik Shah	};
118e0abc5ebSMaulik Shah
11990db71e4SRajendra Nayak	cpus {
12090db71e4SRajendra Nayak		#address-cells = <2>;
12190db71e4SRajendra Nayak		#size-cells = <0>;
12290db71e4SRajendra Nayak
12390db71e4SRajendra Nayak		CPU0: cpu@0 {
12490db71e4SRajendra Nayak			device_type = "cpu";
125f97d414dSAmit Kucheria			compatible = "qcom,kryo468";
12690db71e4SRajendra Nayak			reg = <0x0 0x0>;
12790db71e4SRajendra Nayak			enable-method = "psci";
1288cd62099SMaulik Shah			cpu-idle-states = <&LITTLE_CPU_SLEEP_0
1298cd62099SMaulik Shah					   &LITTLE_CPU_SLEEP_1
1308cd62099SMaulik Shah					   &CLUSTER_SLEEP_0>;
131e7bb680fSRajendra Nayak			capacity-dmips-mhz = <1024>;
13271f87316SRajendra Nayak			dynamic-power-coefficient = <100>;
13390db71e4SRajendra Nayak			next-level-cache = <&L2_0>;
1342552c123SRajeshwari			#cooling-cells = <2>;
13586899d82STaniya Das			qcom,freq-domain = <&cpufreq_hw 0>;
13690db71e4SRajendra Nayak			L2_0: l2-cache {
13790db71e4SRajendra Nayak				compatible = "cache";
13890db71e4SRajendra Nayak				next-level-cache = <&L3_0>;
13990db71e4SRajendra Nayak				L3_0: l3-cache {
14090db71e4SRajendra Nayak					compatible = "cache";
14190db71e4SRajendra Nayak				};
14290db71e4SRajendra Nayak			};
14390db71e4SRajendra Nayak		};
14490db71e4SRajendra Nayak
14590db71e4SRajendra Nayak		CPU1: cpu@100 {
14690db71e4SRajendra Nayak			device_type = "cpu";
147f97d414dSAmit Kucheria			compatible = "qcom,kryo468";
14890db71e4SRajendra Nayak			reg = <0x0 0x100>;
14990db71e4SRajendra Nayak			enable-method = "psci";
1508cd62099SMaulik Shah			cpu-idle-states = <&LITTLE_CPU_SLEEP_0
1518cd62099SMaulik Shah					   &LITTLE_CPU_SLEEP_1
1528cd62099SMaulik Shah					   &CLUSTER_SLEEP_0>;
153e7bb680fSRajendra Nayak			capacity-dmips-mhz = <1024>;
15471f87316SRajendra Nayak			dynamic-power-coefficient = <100>;
15590db71e4SRajendra Nayak			next-level-cache = <&L2_100>;
1562552c123SRajeshwari			#cooling-cells = <2>;
15786899d82STaniya Das			qcom,freq-domain = <&cpufreq_hw 0>;
15890db71e4SRajendra Nayak			L2_100: l2-cache {
15990db71e4SRajendra Nayak				compatible = "cache";
16090db71e4SRajendra Nayak				next-level-cache = <&L3_0>;
16190db71e4SRajendra Nayak			};
16290db71e4SRajendra Nayak		};
16390db71e4SRajendra Nayak
16490db71e4SRajendra Nayak		CPU2: cpu@200 {
16590db71e4SRajendra Nayak			device_type = "cpu";
166f97d414dSAmit Kucheria			compatible = "qcom,kryo468";
16790db71e4SRajendra Nayak			reg = <0x0 0x200>;
16890db71e4SRajendra Nayak			enable-method = "psci";
1698cd62099SMaulik Shah			cpu-idle-states = <&LITTLE_CPU_SLEEP_0
1708cd62099SMaulik Shah					   &LITTLE_CPU_SLEEP_1
1718cd62099SMaulik Shah					   &CLUSTER_SLEEP_0>;
172e7bb680fSRajendra Nayak			capacity-dmips-mhz = <1024>;
17371f87316SRajendra Nayak			dynamic-power-coefficient = <100>;
17490db71e4SRajendra Nayak			next-level-cache = <&L2_200>;
1752552c123SRajeshwari			#cooling-cells = <2>;
17686899d82STaniya Das			qcom,freq-domain = <&cpufreq_hw 0>;
17790db71e4SRajendra Nayak			L2_200: l2-cache {
17890db71e4SRajendra Nayak				compatible = "cache";
17990db71e4SRajendra Nayak				next-level-cache = <&L3_0>;
18090db71e4SRajendra Nayak			};
18190db71e4SRajendra Nayak		};
18290db71e4SRajendra Nayak
18390db71e4SRajendra Nayak		CPU3: cpu@300 {
18490db71e4SRajendra Nayak			device_type = "cpu";
185f97d414dSAmit Kucheria			compatible = "qcom,kryo468";
18690db71e4SRajendra Nayak			reg = <0x0 0x300>;
18790db71e4SRajendra Nayak			enable-method = "psci";
1888cd62099SMaulik Shah			cpu-idle-states = <&LITTLE_CPU_SLEEP_0
1898cd62099SMaulik Shah					   &LITTLE_CPU_SLEEP_1
1908cd62099SMaulik Shah					   &CLUSTER_SLEEP_0>;
191e7bb680fSRajendra Nayak			capacity-dmips-mhz = <1024>;
19271f87316SRajendra Nayak			dynamic-power-coefficient = <100>;
19390db71e4SRajendra Nayak			next-level-cache = <&L2_300>;
1942552c123SRajeshwari			#cooling-cells = <2>;
19586899d82STaniya Das			qcom,freq-domain = <&cpufreq_hw 0>;
19690db71e4SRajendra Nayak			L2_300: l2-cache {
19790db71e4SRajendra Nayak				compatible = "cache";
19890db71e4SRajendra Nayak				next-level-cache = <&L3_0>;
19990db71e4SRajendra Nayak			};
20090db71e4SRajendra Nayak		};
20190db71e4SRajendra Nayak
20290db71e4SRajendra Nayak		CPU4: cpu@400 {
20390db71e4SRajendra Nayak			device_type = "cpu";
204f97d414dSAmit Kucheria			compatible = "qcom,kryo468";
20590db71e4SRajendra Nayak			reg = <0x0 0x400>;
20690db71e4SRajendra Nayak			enable-method = "psci";
2078cd62099SMaulik Shah			cpu-idle-states = <&LITTLE_CPU_SLEEP_0
2088cd62099SMaulik Shah					   &LITTLE_CPU_SLEEP_1
2098cd62099SMaulik Shah					   &CLUSTER_SLEEP_0>;
210e7bb680fSRajendra Nayak			capacity-dmips-mhz = <1024>;
21171f87316SRajendra Nayak			dynamic-power-coefficient = <100>;
21290db71e4SRajendra Nayak			next-level-cache = <&L2_400>;
2132552c123SRajeshwari			#cooling-cells = <2>;
21486899d82STaniya Das			qcom,freq-domain = <&cpufreq_hw 0>;
21590db71e4SRajendra Nayak			L2_400: l2-cache {
21690db71e4SRajendra Nayak				compatible = "cache";
21790db71e4SRajendra Nayak				next-level-cache = <&L3_0>;
21890db71e4SRajendra Nayak			};
21990db71e4SRajendra Nayak		};
22090db71e4SRajendra Nayak
22190db71e4SRajendra Nayak		CPU5: cpu@500 {
22290db71e4SRajendra Nayak			device_type = "cpu";
223f97d414dSAmit Kucheria			compatible = "qcom,kryo468";
22490db71e4SRajendra Nayak			reg = <0x0 0x500>;
22590db71e4SRajendra Nayak			enable-method = "psci";
2268cd62099SMaulik Shah			cpu-idle-states = <&LITTLE_CPU_SLEEP_0
2278cd62099SMaulik Shah					   &LITTLE_CPU_SLEEP_1
2288cd62099SMaulik Shah					   &CLUSTER_SLEEP_0>;
229e7bb680fSRajendra Nayak			capacity-dmips-mhz = <1024>;
23071f87316SRajendra Nayak			dynamic-power-coefficient = <100>;
23190db71e4SRajendra Nayak			next-level-cache = <&L2_500>;
2322552c123SRajeshwari			#cooling-cells = <2>;
23386899d82STaniya Das			qcom,freq-domain = <&cpufreq_hw 0>;
23490db71e4SRajendra Nayak			L2_500: l2-cache {
23590db71e4SRajendra Nayak				compatible = "cache";
23690db71e4SRajendra Nayak				next-level-cache = <&L3_0>;
23790db71e4SRajendra Nayak			};
23890db71e4SRajendra Nayak		};
23990db71e4SRajendra Nayak
24090db71e4SRajendra Nayak		CPU6: cpu@600 {
24190db71e4SRajendra Nayak			device_type = "cpu";
242f97d414dSAmit Kucheria			compatible = "qcom,kryo468";
24390db71e4SRajendra Nayak			reg = <0x0 0x600>;
24490db71e4SRajendra Nayak			enable-method = "psci";
2458cd62099SMaulik Shah			cpu-idle-states = <&BIG_CPU_SLEEP_0
2468cd62099SMaulik Shah					   &BIG_CPU_SLEEP_1
2478cd62099SMaulik Shah					   &CLUSTER_SLEEP_0>;
248e7bb680fSRajendra Nayak			capacity-dmips-mhz = <1740>;
24971f87316SRajendra Nayak			dynamic-power-coefficient = <405>;
25090db71e4SRajendra Nayak			next-level-cache = <&L2_600>;
2512552c123SRajeshwari			#cooling-cells = <2>;
25286899d82STaniya Das			qcom,freq-domain = <&cpufreq_hw 1>;
25390db71e4SRajendra Nayak			L2_600: l2-cache {
25490db71e4SRajendra Nayak				compatible = "cache";
25590db71e4SRajendra Nayak				next-level-cache = <&L3_0>;
25690db71e4SRajendra Nayak			};
25790db71e4SRajendra Nayak		};
25890db71e4SRajendra Nayak
25990db71e4SRajendra Nayak		CPU7: cpu@700 {
26090db71e4SRajendra Nayak			device_type = "cpu";
261f97d414dSAmit Kucheria			compatible = "qcom,kryo468";
26290db71e4SRajendra Nayak			reg = <0x0 0x700>;
26390db71e4SRajendra Nayak			enable-method = "psci";
2648cd62099SMaulik Shah			cpu-idle-states = <&BIG_CPU_SLEEP_0
2658cd62099SMaulik Shah					   &BIG_CPU_SLEEP_1
2668cd62099SMaulik Shah					   &CLUSTER_SLEEP_0>;
267e7bb680fSRajendra Nayak			capacity-dmips-mhz = <1740>;
26871f87316SRajendra Nayak			dynamic-power-coefficient = <405>;
26990db71e4SRajendra Nayak			next-level-cache = <&L2_700>;
2702552c123SRajeshwari			#cooling-cells = <2>;
27186899d82STaniya Das			qcom,freq-domain = <&cpufreq_hw 1>;
27290db71e4SRajendra Nayak			L2_700: l2-cache {
27390db71e4SRajendra Nayak				compatible = "cache";
27490db71e4SRajendra Nayak				next-level-cache = <&L3_0>;
27590db71e4SRajendra Nayak			};
27690db71e4SRajendra Nayak		};
27783e5e33eSRajendra Nayak
27883e5e33eSRajendra Nayak		cpu-map {
27983e5e33eSRajendra Nayak			cluster0 {
28083e5e33eSRajendra Nayak				core0 {
28183e5e33eSRajendra Nayak					cpu = <&CPU0>;
28283e5e33eSRajendra Nayak				};
28383e5e33eSRajendra Nayak
28483e5e33eSRajendra Nayak				core1 {
28583e5e33eSRajendra Nayak					cpu = <&CPU1>;
28683e5e33eSRajendra Nayak				};
28783e5e33eSRajendra Nayak
28883e5e33eSRajendra Nayak				core2 {
28983e5e33eSRajendra Nayak					cpu = <&CPU2>;
29083e5e33eSRajendra Nayak				};
29183e5e33eSRajendra Nayak
29283e5e33eSRajendra Nayak				core3 {
29383e5e33eSRajendra Nayak					cpu = <&CPU3>;
29483e5e33eSRajendra Nayak				};
29583e5e33eSRajendra Nayak
29683e5e33eSRajendra Nayak				core4 {
29783e5e33eSRajendra Nayak					cpu = <&CPU4>;
29883e5e33eSRajendra Nayak				};
29983e5e33eSRajendra Nayak
30083e5e33eSRajendra Nayak				core5 {
30183e5e33eSRajendra Nayak					cpu = <&CPU5>;
30283e5e33eSRajendra Nayak				};
30383e5e33eSRajendra Nayak
30483e5e33eSRajendra Nayak				core6 {
30583e5e33eSRajendra Nayak					cpu = <&CPU6>;
30683e5e33eSRajendra Nayak				};
30783e5e33eSRajendra Nayak
30883e5e33eSRajendra Nayak				core7 {
30983e5e33eSRajendra Nayak					cpu = <&CPU7>;
31083e5e33eSRajendra Nayak				};
31183e5e33eSRajendra Nayak			};
31283e5e33eSRajendra Nayak		};
3138cd62099SMaulik Shah
3148cd62099SMaulik Shah		idle-states {
3158cd62099SMaulik Shah			entry-method = "psci";
3168cd62099SMaulik Shah
3178cd62099SMaulik Shah			LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 {
3188cd62099SMaulik Shah				compatible = "arm,idle-state";
3198cd62099SMaulik Shah				idle-state-name = "little-power-down";
3208cd62099SMaulik Shah				arm,psci-suspend-param = <0x40000003>;
3218cd62099SMaulik Shah				entry-latency-us = <549>;
3228cd62099SMaulik Shah				exit-latency-us = <901>;
3238cd62099SMaulik Shah				min-residency-us = <1774>;
3248cd62099SMaulik Shah				local-timer-stop;
3258cd62099SMaulik Shah			};
3268cd62099SMaulik Shah
3278cd62099SMaulik Shah			LITTLE_CPU_SLEEP_1: cpu-sleep-0-1 {
3288cd62099SMaulik Shah				compatible = "arm,idle-state";
3298cd62099SMaulik Shah				idle-state-name = "little-rail-power-down";
3308cd62099SMaulik Shah				arm,psci-suspend-param = <0x40000004>;
3318cd62099SMaulik Shah				entry-latency-us = <702>;
3328cd62099SMaulik Shah				exit-latency-us = <915>;
3338cd62099SMaulik Shah				min-residency-us = <4001>;
3348cd62099SMaulik Shah				local-timer-stop;
3358cd62099SMaulik Shah			};
3368cd62099SMaulik Shah
3378cd62099SMaulik Shah			BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
3388cd62099SMaulik Shah				compatible = "arm,idle-state";
3398cd62099SMaulik Shah				idle-state-name = "big-power-down";
3408cd62099SMaulik Shah				arm,psci-suspend-param = <0x40000003>;
3418cd62099SMaulik Shah				entry-latency-us = <523>;
3428cd62099SMaulik Shah				exit-latency-us = <1244>;
3438cd62099SMaulik Shah				min-residency-us = <2207>;
3448cd62099SMaulik Shah				local-timer-stop;
3458cd62099SMaulik Shah			};
3468cd62099SMaulik Shah
3478cd62099SMaulik Shah			BIG_CPU_SLEEP_1: cpu-sleep-1-1 {
3488cd62099SMaulik Shah				compatible = "arm,idle-state";
3498cd62099SMaulik Shah				idle-state-name = "big-rail-power-down";
3508cd62099SMaulik Shah				arm,psci-suspend-param = <0x40000004>;
3518cd62099SMaulik Shah				entry-latency-us = <526>;
3528cd62099SMaulik Shah				exit-latency-us = <1854>;
3538cd62099SMaulik Shah				min-residency-us = <5555>;
3548cd62099SMaulik Shah				local-timer-stop;
3558cd62099SMaulik Shah			};
3568cd62099SMaulik Shah
3578cd62099SMaulik Shah			CLUSTER_SLEEP_0: cluster-sleep-0 {
3588cd62099SMaulik Shah				compatible = "arm,idle-state";
3598cd62099SMaulik Shah				idle-state-name = "cluster-power-down";
3608cd62099SMaulik Shah				arm,psci-suspend-param = <0x40003444>;
3618cd62099SMaulik Shah				entry-latency-us = <3263>;
3628cd62099SMaulik Shah				exit-latency-us = <6562>;
3638cd62099SMaulik Shah				min-residency-us = <9926>;
3648cd62099SMaulik Shah				local-timer-stop;
3658cd62099SMaulik Shah			};
3668cd62099SMaulik Shah		};
36790db71e4SRajendra Nayak	};
36890db71e4SRajendra Nayak
36990db71e4SRajendra Nayak	memory@80000000 {
37090db71e4SRajendra Nayak		device_type = "memory";
37190db71e4SRajendra Nayak		/* We expect the bootloader to fill in the size */
37290db71e4SRajendra Nayak		reg = <0 0x80000000 0 0>;
37390db71e4SRajendra Nayak	};
37490db71e4SRajendra Nayak
37590db71e4SRajendra Nayak	pmu {
37690db71e4SRajendra Nayak		compatible = "arm,armv8-pmuv3";
37790db71e4SRajendra Nayak		interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH>;
37890db71e4SRajendra Nayak	};
37990db71e4SRajendra Nayak
380f5ab220dSSibi Sankar	firmware {
381f5ab220dSSibi Sankar		scm {
382f5ab220dSSibi Sankar			compatible = "qcom,scm-sc7180", "qcom,scm";
383f5ab220dSSibi Sankar		};
384f5ab220dSSibi Sankar	};
385f5ab220dSSibi Sankar
386f5ab220dSSibi Sankar	tcsr_mutex: hwlock {
387f5ab220dSSibi Sankar		compatible = "qcom,tcsr-mutex";
388f5ab220dSSibi Sankar		syscon = <&tcsr_mutex_regs 0 0x1000>;
389f5ab220dSSibi Sankar		#hwlock-cells = <1>;
390f5ab220dSSibi Sankar	};
391f5ab220dSSibi Sankar
392f5ab220dSSibi Sankar	smem {
393f5ab220dSSibi Sankar		compatible = "qcom,smem";
394f5ab220dSSibi Sankar		memory-region = <&smem_mem>;
395f5ab220dSSibi Sankar		hwlocks = <&tcsr_mutex 3>;
396f5ab220dSSibi Sankar	};
397f5ab220dSSibi Sankar
398f5ab220dSSibi Sankar	smp2p-cdsp {
399f5ab220dSSibi Sankar		compatible = "qcom,smp2p";
400f5ab220dSSibi Sankar		qcom,smem = <94>, <432>;
401f5ab220dSSibi Sankar
402f5ab220dSSibi Sankar		interrupts = <GIC_SPI 576 IRQ_TYPE_EDGE_RISING>;
403f5ab220dSSibi Sankar
404f5ab220dSSibi Sankar		mboxes = <&apss_shared 6>;
405f5ab220dSSibi Sankar
406f5ab220dSSibi Sankar		qcom,local-pid = <0>;
407f5ab220dSSibi Sankar		qcom,remote-pid = <5>;
408f5ab220dSSibi Sankar
409f5ab220dSSibi Sankar		cdsp_smp2p_out: master-kernel {
410f5ab220dSSibi Sankar			qcom,entry-name = "master-kernel";
411f5ab220dSSibi Sankar			#qcom,smem-state-cells = <1>;
412f5ab220dSSibi Sankar		};
413f5ab220dSSibi Sankar
414f5ab220dSSibi Sankar		cdsp_smp2p_in: slave-kernel {
415f5ab220dSSibi Sankar			qcom,entry-name = "slave-kernel";
416f5ab220dSSibi Sankar
417f5ab220dSSibi Sankar			interrupt-controller;
418f5ab220dSSibi Sankar			#interrupt-cells = <2>;
419f5ab220dSSibi Sankar		};
420f5ab220dSSibi Sankar	};
421f5ab220dSSibi Sankar
422f5ab220dSSibi Sankar	smp2p-lpass {
423f5ab220dSSibi Sankar		compatible = "qcom,smp2p";
424f5ab220dSSibi Sankar		qcom,smem = <443>, <429>;
425f5ab220dSSibi Sankar
426f5ab220dSSibi Sankar		interrupts = <GIC_SPI 158 IRQ_TYPE_EDGE_RISING>;
427f5ab220dSSibi Sankar
428f5ab220dSSibi Sankar		mboxes = <&apss_shared 10>;
429f5ab220dSSibi Sankar
430f5ab220dSSibi Sankar		qcom,local-pid = <0>;
431f5ab220dSSibi Sankar		qcom,remote-pid = <2>;
432f5ab220dSSibi Sankar
433f5ab220dSSibi Sankar		adsp_smp2p_out: master-kernel {
434f5ab220dSSibi Sankar			qcom,entry-name = "master-kernel";
435f5ab220dSSibi Sankar			#qcom,smem-state-cells = <1>;
436f5ab220dSSibi Sankar		};
437f5ab220dSSibi Sankar
438f5ab220dSSibi Sankar		adsp_smp2p_in: slave-kernel {
439f5ab220dSSibi Sankar			qcom,entry-name = "slave-kernel";
440f5ab220dSSibi Sankar
441f5ab220dSSibi Sankar			interrupt-controller;
442f5ab220dSSibi Sankar			#interrupt-cells = <2>;
443f5ab220dSSibi Sankar		};
444f5ab220dSSibi Sankar	};
445f5ab220dSSibi Sankar
446f5ab220dSSibi Sankar	smp2p-mpss {
447f5ab220dSSibi Sankar		compatible = "qcom,smp2p";
448f5ab220dSSibi Sankar		qcom,smem = <435>, <428>;
449f5ab220dSSibi Sankar		interrupts = <GIC_SPI 451 IRQ_TYPE_EDGE_RISING>;
450f5ab220dSSibi Sankar		mboxes = <&apss_shared 14>;
451f5ab220dSSibi Sankar		qcom,local-pid = <0>;
452f5ab220dSSibi Sankar		qcom,remote-pid = <1>;
453f5ab220dSSibi Sankar
454f5ab220dSSibi Sankar		modem_smp2p_out: master-kernel {
455f5ab220dSSibi Sankar			qcom,entry-name = "master-kernel";
456f5ab220dSSibi Sankar			#qcom,smem-state-cells = <1>;
457f5ab220dSSibi Sankar		};
458f5ab220dSSibi Sankar
459f5ab220dSSibi Sankar		modem_smp2p_in: slave-kernel {
460f5ab220dSSibi Sankar			qcom,entry-name = "slave-kernel";
461f5ab220dSSibi Sankar			interrupt-controller;
462f5ab220dSSibi Sankar			#interrupt-cells = <2>;
463f5ab220dSSibi Sankar		};
464f5ab220dSSibi Sankar	};
465f5ab220dSSibi Sankar
46690db71e4SRajendra Nayak	psci {
46790db71e4SRajendra Nayak		compatible = "arm,psci-1.0";
46890db71e4SRajendra Nayak		method = "smc";
46990db71e4SRajendra Nayak	};
47090db71e4SRajendra Nayak
47130162dceSDouglas Anderson	soc: soc@0 {
47290db71e4SRajendra Nayak		#address-cells = <2>;
47390db71e4SRajendra Nayak		#size-cells = <2>;
47490db71e4SRajendra Nayak		ranges = <0 0 0 0 0x10 0>;
47590db71e4SRajendra Nayak		dma-ranges = <0 0 0 0 0x10 0>;
47690db71e4SRajendra Nayak		compatible = "simple-bus";
47790db71e4SRajendra Nayak
47890db71e4SRajendra Nayak		gcc: clock-controller@100000 {
47990db71e4SRajendra Nayak			compatible = "qcom,gcc-sc7180";
48090db71e4SRajendra Nayak			reg = <0 0x00100000 0 0x1f0000>;
4810def3f14STaniya Das			clocks = <&rpmhcc RPMH_CXO_CLK>,
482b418cf63SDouglas Anderson				 <&rpmhcc RPMH_CXO_CLK_A>,
483b418cf63SDouglas Anderson				 <&sleep_clk>;
484b418cf63SDouglas Anderson			clock-names = "bi_tcxo", "bi_tcxo_ao", "sleep_clk";
48590db71e4SRajendra Nayak			#clock-cells = <1>;
48690db71e4SRajendra Nayak			#reset-cells = <1>;
48790db71e4SRajendra Nayak			#power-domain-cells = <1>;
48890db71e4SRajendra Nayak		};
48990db71e4SRajendra Nayak
4900b766e7fSSandeep Maheswaram		qfprom@784000 {
4910b766e7fSSandeep Maheswaram			compatible = "qcom,qfprom";
4920b766e7fSSandeep Maheswaram			reg = <0 0x00784000 0 0x8ff>;
4930b766e7fSSandeep Maheswaram			#address-cells = <1>;
4940b766e7fSSandeep Maheswaram			#size-cells = <1>;
4950b766e7fSSandeep Maheswaram
4960b766e7fSSandeep Maheswaram			qusb2p_hstx_trim: hstx-trim-primary@25b {
4970b766e7fSSandeep Maheswaram				reg = <0x25b 0x1>;
4980b766e7fSSandeep Maheswaram				bits = <1 3>;
4990b766e7fSSandeep Maheswaram			};
5000b766e7fSSandeep Maheswaram		};
5010b766e7fSSandeep Maheswaram
50224254a8eSVeerabhadrarao Badiganti		sdhc_1: sdhci@7c4000 {
50324254a8eSVeerabhadrarao Badiganti			compatible = "qcom,sc7180-sdhci", "qcom,sdhci-msm-v5";
50424254a8eSVeerabhadrarao Badiganti			reg = <0 0x7c4000 0 0x1000>,
50524254a8eSVeerabhadrarao Badiganti				<0 0x07c5000 0 0x1000>;
506f4820fd3SVeerabhadrarao Badiganti			reg-names = "hc", "cqhci";
50724254a8eSVeerabhadrarao Badiganti
50824254a8eSVeerabhadrarao Badiganti			iommus = <&apps_smmu 0x60 0x0>;
50924254a8eSVeerabhadrarao Badiganti			interrupts = <GIC_SPI 641 IRQ_TYPE_LEVEL_HIGH>,
51024254a8eSVeerabhadrarao Badiganti					<GIC_SPI 644 IRQ_TYPE_LEVEL_HIGH>;
51124254a8eSVeerabhadrarao Badiganti			interrupt-names = "hc_irq", "pwr_irq";
51224254a8eSVeerabhadrarao Badiganti
51324254a8eSVeerabhadrarao Badiganti			clocks = <&gcc GCC_SDCC1_APPS_CLK>,
51424254a8eSVeerabhadrarao Badiganti					<&gcc GCC_SDCC1_AHB_CLK>;
51524254a8eSVeerabhadrarao Badiganti			clock-names = "core", "iface";
51624254a8eSVeerabhadrarao Badiganti
51724254a8eSVeerabhadrarao Badiganti			bus-width = <8>;
51824254a8eSVeerabhadrarao Badiganti			non-removable;
51924254a8eSVeerabhadrarao Badiganti			supports-cqe;
52024254a8eSVeerabhadrarao Badiganti
52124254a8eSVeerabhadrarao Badiganti			mmc-ddr-1_8v;
52224254a8eSVeerabhadrarao Badiganti			mmc-hs200-1_8v;
52324254a8eSVeerabhadrarao Badiganti			mmc-hs400-1_8v;
52424254a8eSVeerabhadrarao Badiganti			mmc-hs400-enhanced-strobe;
52524254a8eSVeerabhadrarao Badiganti
52624254a8eSVeerabhadrarao Badiganti			status = "disabled";
52724254a8eSVeerabhadrarao Badiganti		};
52824254a8eSVeerabhadrarao Badiganti
529ba3fc649SRoja Rani Yarubandi		qupv3_id_0: geniqup@8c0000 {
530ba3fc649SRoja Rani Yarubandi			compatible = "qcom,geni-se-qup";
531ba3fc649SRoja Rani Yarubandi			reg = <0 0x008c0000 0 0x6000>;
532ba3fc649SRoja Rani Yarubandi			clock-names = "m-ahb", "s-ahb";
533ba3fc649SRoja Rani Yarubandi			clocks = <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>,
534ba3fc649SRoja Rani Yarubandi				 <&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>;
535ba3fc649SRoja Rani Yarubandi			#address-cells = <2>;
536ba3fc649SRoja Rani Yarubandi			#size-cells = <2>;
537ba3fc649SRoja Rani Yarubandi			ranges;
5383d60d80aSSai Prakash Ranjan			iommus = <&apps_smmu 0x43 0x0>;
539ba3fc649SRoja Rani Yarubandi			status = "disabled";
540ba3fc649SRoja Rani Yarubandi
541ba3fc649SRoja Rani Yarubandi			i2c0: i2c@880000 {
542ba3fc649SRoja Rani Yarubandi				compatible = "qcom,geni-i2c";
543ba3fc649SRoja Rani Yarubandi				reg = <0 0x00880000 0 0x4000>;
544ba3fc649SRoja Rani Yarubandi				clock-names = "se";
545ba3fc649SRoja Rani Yarubandi				clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>;
546ba3fc649SRoja Rani Yarubandi				pinctrl-names = "default";
547ba3fc649SRoja Rani Yarubandi				pinctrl-0 = <&qup_i2c0_default>;
548ba3fc649SRoja Rani Yarubandi				interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>;
549ba3fc649SRoja Rani Yarubandi				#address-cells = <1>;
550ba3fc649SRoja Rani Yarubandi				#size-cells = <0>;
551ba3fc649SRoja Rani Yarubandi				status = "disabled";
552ba3fc649SRoja Rani Yarubandi			};
553ba3fc649SRoja Rani Yarubandi
554ba3fc649SRoja Rani Yarubandi			spi0: spi@880000 {
555ba3fc649SRoja Rani Yarubandi				compatible = "qcom,geni-spi";
556ba3fc649SRoja Rani Yarubandi				reg = <0 0x00880000 0 0x4000>;
557ba3fc649SRoja Rani Yarubandi				clock-names = "se";
558ba3fc649SRoja Rani Yarubandi				clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>;
559ba3fc649SRoja Rani Yarubandi				pinctrl-names = "default";
560ba3fc649SRoja Rani Yarubandi				pinctrl-0 = <&qup_spi0_default>;
561ba3fc649SRoja Rani Yarubandi				interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>;
562ba3fc649SRoja Rani Yarubandi				#address-cells = <1>;
563ba3fc649SRoja Rani Yarubandi				#size-cells = <0>;
564ba3fc649SRoja Rani Yarubandi				status = "disabled";
565ba3fc649SRoja Rani Yarubandi			};
566ba3fc649SRoja Rani Yarubandi
567ba3fc649SRoja Rani Yarubandi			uart0: serial@880000 {
568ba3fc649SRoja Rani Yarubandi				compatible = "qcom,geni-uart";
569ba3fc649SRoja Rani Yarubandi				reg = <0 0x00880000 0 0x4000>;
570ba3fc649SRoja Rani Yarubandi				clock-names = "se";
571ba3fc649SRoja Rani Yarubandi				clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>;
572ba3fc649SRoja Rani Yarubandi				pinctrl-names = "default";
573ba3fc649SRoja Rani Yarubandi				pinctrl-0 = <&qup_uart0_default>;
574ba3fc649SRoja Rani Yarubandi				interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>;
575ba3fc649SRoja Rani Yarubandi				status = "disabled";
576ba3fc649SRoja Rani Yarubandi			};
577ba3fc649SRoja Rani Yarubandi
578ba3fc649SRoja Rani Yarubandi			i2c1: i2c@884000 {
579ba3fc649SRoja Rani Yarubandi				compatible = "qcom,geni-i2c";
580ba3fc649SRoja Rani Yarubandi				reg = <0 0x00884000 0 0x4000>;
581ba3fc649SRoja Rani Yarubandi				clock-names = "se";
582ba3fc649SRoja Rani Yarubandi				clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>;
583ba3fc649SRoja Rani Yarubandi				pinctrl-names = "default";
584ba3fc649SRoja Rani Yarubandi				pinctrl-0 = <&qup_i2c1_default>;
585ba3fc649SRoja Rani Yarubandi				interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>;
586ba3fc649SRoja Rani Yarubandi				#address-cells = <1>;
587ba3fc649SRoja Rani Yarubandi				#size-cells = <0>;
588ba3fc649SRoja Rani Yarubandi				status = "disabled";
589ba3fc649SRoja Rani Yarubandi			};
590ba3fc649SRoja Rani Yarubandi
591ba3fc649SRoja Rani Yarubandi			spi1: spi@884000 {
592ba3fc649SRoja Rani Yarubandi				compatible = "qcom,geni-spi";
593ba3fc649SRoja Rani Yarubandi				reg = <0 0x00884000 0 0x4000>;
594ba3fc649SRoja Rani Yarubandi				clock-names = "se";
595ba3fc649SRoja Rani Yarubandi				clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>;
596ba3fc649SRoja Rani Yarubandi				pinctrl-names = "default";
597ba3fc649SRoja Rani Yarubandi				pinctrl-0 = <&qup_spi1_default>;
598ba3fc649SRoja Rani Yarubandi				interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>;
599ba3fc649SRoja Rani Yarubandi				#address-cells = <1>;
600ba3fc649SRoja Rani Yarubandi				#size-cells = <0>;
601ba3fc649SRoja Rani Yarubandi				status = "disabled";
602ba3fc649SRoja Rani Yarubandi			};
603ba3fc649SRoja Rani Yarubandi
604ba3fc649SRoja Rani Yarubandi			uart1: serial@884000 {
605ba3fc649SRoja Rani Yarubandi				compatible = "qcom,geni-uart";
606ba3fc649SRoja Rani Yarubandi				reg = <0 0x00884000 0 0x4000>;
607ba3fc649SRoja Rani Yarubandi				clock-names = "se";
608ba3fc649SRoja Rani Yarubandi				clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>;
609ba3fc649SRoja Rani Yarubandi				pinctrl-names = "default";
610ba3fc649SRoja Rani Yarubandi				pinctrl-0 = <&qup_uart1_default>;
611ba3fc649SRoja Rani Yarubandi				interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>;
612ba3fc649SRoja Rani Yarubandi				status = "disabled";
613ba3fc649SRoja Rani Yarubandi			};
614ba3fc649SRoja Rani Yarubandi
615ba3fc649SRoja Rani Yarubandi			i2c2: i2c@888000 {
616ba3fc649SRoja Rani Yarubandi				compatible = "qcom,geni-i2c";
617ba3fc649SRoja Rani Yarubandi				reg = <0 0x00888000 0 0x4000>;
618ba3fc649SRoja Rani Yarubandi				clock-names = "se";
619ba3fc649SRoja Rani Yarubandi				clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>;
620ba3fc649SRoja Rani Yarubandi				pinctrl-names = "default";
621ba3fc649SRoja Rani Yarubandi				pinctrl-0 = <&qup_i2c2_default>;
622ba3fc649SRoja Rani Yarubandi				interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>;
623ba3fc649SRoja Rani Yarubandi				#address-cells = <1>;
624ba3fc649SRoja Rani Yarubandi				#size-cells = <0>;
625ba3fc649SRoja Rani Yarubandi				status = "disabled";
626ba3fc649SRoja Rani Yarubandi			};
627ba3fc649SRoja Rani Yarubandi
628ba3fc649SRoja Rani Yarubandi			uart2: serial@888000 {
629ba3fc649SRoja Rani Yarubandi				compatible = "qcom,geni-uart";
630ba3fc649SRoja Rani Yarubandi				reg = <0 0x00888000 0 0x4000>;
631ba3fc649SRoja Rani Yarubandi				clock-names = "se";
632ba3fc649SRoja Rani Yarubandi				clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>;
633ba3fc649SRoja Rani Yarubandi				pinctrl-names = "default";
634ba3fc649SRoja Rani Yarubandi				pinctrl-0 = <&qup_uart2_default>;
635ba3fc649SRoja Rani Yarubandi				interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>;
636ba3fc649SRoja Rani Yarubandi				status = "disabled";
637ba3fc649SRoja Rani Yarubandi			};
638ba3fc649SRoja Rani Yarubandi
639ba3fc649SRoja Rani Yarubandi			i2c3: i2c@88c000 {
640ba3fc649SRoja Rani Yarubandi				compatible = "qcom,geni-i2c";
641ba3fc649SRoja Rani Yarubandi				reg = <0 0x0088c000 0 0x4000>;
642ba3fc649SRoja Rani Yarubandi				clock-names = "se";
643ba3fc649SRoja Rani Yarubandi				clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>;
644ba3fc649SRoja Rani Yarubandi				pinctrl-names = "default";
645ba3fc649SRoja Rani Yarubandi				pinctrl-0 = <&qup_i2c3_default>;
646ba3fc649SRoja Rani Yarubandi				interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>;
647ba3fc649SRoja Rani Yarubandi				#address-cells = <1>;
648ba3fc649SRoja Rani Yarubandi				#size-cells = <0>;
649ba3fc649SRoja Rani Yarubandi				status = "disabled";
650ba3fc649SRoja Rani Yarubandi			};
651ba3fc649SRoja Rani Yarubandi
652ba3fc649SRoja Rani Yarubandi			spi3: spi@88c000 {
653ba3fc649SRoja Rani Yarubandi				compatible = "qcom,geni-spi";
654ba3fc649SRoja Rani Yarubandi				reg = <0 0x0088c000 0 0x4000>;
655ba3fc649SRoja Rani Yarubandi				clock-names = "se";
656ba3fc649SRoja Rani Yarubandi				clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>;
657ba3fc649SRoja Rani Yarubandi				pinctrl-names = "default";
658ba3fc649SRoja Rani Yarubandi				pinctrl-0 = <&qup_spi3_default>;
659ba3fc649SRoja Rani Yarubandi				interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>;
660ba3fc649SRoja Rani Yarubandi				#address-cells = <1>;
661ba3fc649SRoja Rani Yarubandi				#size-cells = <0>;
662ba3fc649SRoja Rani Yarubandi				status = "disabled";
663ba3fc649SRoja Rani Yarubandi			};
664ba3fc649SRoja Rani Yarubandi
665ba3fc649SRoja Rani Yarubandi			uart3: serial@88c000 {
666ba3fc649SRoja Rani Yarubandi				compatible = "qcom,geni-uart";
667ba3fc649SRoja Rani Yarubandi				reg = <0 0x0088c000 0 0x4000>;
668ba3fc649SRoja Rani Yarubandi				clock-names = "se";
669ba3fc649SRoja Rani Yarubandi				clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>;
670ba3fc649SRoja Rani Yarubandi				pinctrl-names = "default";
671ba3fc649SRoja Rani Yarubandi				pinctrl-0 = <&qup_uart3_default>;
672ba3fc649SRoja Rani Yarubandi				interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>;
673ba3fc649SRoja Rani Yarubandi				status = "disabled";
674ba3fc649SRoja Rani Yarubandi			};
675ba3fc649SRoja Rani Yarubandi
676ba3fc649SRoja Rani Yarubandi			i2c4: i2c@890000 {
677ba3fc649SRoja Rani Yarubandi				compatible = "qcom,geni-i2c";
678ba3fc649SRoja Rani Yarubandi				reg = <0 0x00890000 0 0x4000>;
679ba3fc649SRoja Rani Yarubandi				clock-names = "se";
680ba3fc649SRoja Rani Yarubandi				clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>;
681ba3fc649SRoja Rani Yarubandi				pinctrl-names = "default";
682ba3fc649SRoja Rani Yarubandi				pinctrl-0 = <&qup_i2c4_default>;
683ba3fc649SRoja Rani Yarubandi				interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>;
684ba3fc649SRoja Rani Yarubandi				#address-cells = <1>;
685ba3fc649SRoja Rani Yarubandi				#size-cells = <0>;
686ba3fc649SRoja Rani Yarubandi				status = "disabled";
687ba3fc649SRoja Rani Yarubandi			};
688ba3fc649SRoja Rani Yarubandi
689ba3fc649SRoja Rani Yarubandi			uart4: serial@890000 {
690ba3fc649SRoja Rani Yarubandi				compatible = "qcom,geni-uart";
691ba3fc649SRoja Rani Yarubandi				reg = <0 0x00890000 0 0x4000>;
692ba3fc649SRoja Rani Yarubandi				clock-names = "se";
693ba3fc649SRoja Rani Yarubandi				clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>;
694ba3fc649SRoja Rani Yarubandi				pinctrl-names = "default";
695ba3fc649SRoja Rani Yarubandi				pinctrl-0 = <&qup_uart4_default>;
696ba3fc649SRoja Rani Yarubandi				interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>;
697ba3fc649SRoja Rani Yarubandi				status = "disabled";
698ba3fc649SRoja Rani Yarubandi			};
699ba3fc649SRoja Rani Yarubandi
700ba3fc649SRoja Rani Yarubandi			i2c5: i2c@894000 {
701ba3fc649SRoja Rani Yarubandi				compatible = "qcom,geni-i2c";
702ba3fc649SRoja Rani Yarubandi				reg = <0 0x00894000 0 0x4000>;
703ba3fc649SRoja Rani Yarubandi				clock-names = "se";
704ba3fc649SRoja Rani Yarubandi				clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>;
705ba3fc649SRoja Rani Yarubandi				pinctrl-names = "default";
706ba3fc649SRoja Rani Yarubandi				pinctrl-0 = <&qup_i2c5_default>;
707ba3fc649SRoja Rani Yarubandi				interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>;
708ba3fc649SRoja Rani Yarubandi				#address-cells = <1>;
709ba3fc649SRoja Rani Yarubandi				#size-cells = <0>;
710ba3fc649SRoja Rani Yarubandi				status = "disabled";
711ba3fc649SRoja Rani Yarubandi			};
712ba3fc649SRoja Rani Yarubandi
713ba3fc649SRoja Rani Yarubandi			spi5: spi@894000 {
714ba3fc649SRoja Rani Yarubandi				compatible = "qcom,geni-spi";
715ba3fc649SRoja Rani Yarubandi				reg = <0 0x00894000 0 0x4000>;
716ba3fc649SRoja Rani Yarubandi				clock-names = "se";
717ba3fc649SRoja Rani Yarubandi				clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>;
718ba3fc649SRoja Rani Yarubandi				pinctrl-names = "default";
719ba3fc649SRoja Rani Yarubandi				pinctrl-0 = <&qup_spi5_default>;
720ba3fc649SRoja Rani Yarubandi				interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>;
721ba3fc649SRoja Rani Yarubandi				#address-cells = <1>;
722ba3fc649SRoja Rani Yarubandi				#size-cells = <0>;
723ba3fc649SRoja Rani Yarubandi				status = "disabled";
724ba3fc649SRoja Rani Yarubandi			};
725ba3fc649SRoja Rani Yarubandi
726ba3fc649SRoja Rani Yarubandi			uart5: serial@894000 {
727ba3fc649SRoja Rani Yarubandi				compatible = "qcom,geni-uart";
728ba3fc649SRoja Rani Yarubandi				reg = <0 0x00894000 0 0x4000>;
729ba3fc649SRoja Rani Yarubandi				clock-names = "se";
730ba3fc649SRoja Rani Yarubandi				clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>;
731ba3fc649SRoja Rani Yarubandi				pinctrl-names = "default";
732ba3fc649SRoja Rani Yarubandi				pinctrl-0 = <&qup_uart5_default>;
733ba3fc649SRoja Rani Yarubandi				interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>;
734ba3fc649SRoja Rani Yarubandi				status = "disabled";
735ba3fc649SRoja Rani Yarubandi			};
736ba3fc649SRoja Rani Yarubandi		};
737ba3fc649SRoja Rani Yarubandi
73890db71e4SRajendra Nayak		qupv3_id_1: geniqup@ac0000 {
73990db71e4SRajendra Nayak			compatible = "qcom,geni-se-qup";
74090db71e4SRajendra Nayak			reg = <0 0x00ac0000 0 0x6000>;
74190db71e4SRajendra Nayak			clock-names = "m-ahb", "s-ahb";
74290db71e4SRajendra Nayak			clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>,
74390db71e4SRajendra Nayak				 <&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>;
74490db71e4SRajendra Nayak			#address-cells = <2>;
74590db71e4SRajendra Nayak			#size-cells = <2>;
74690db71e4SRajendra Nayak			ranges;
7473d60d80aSSai Prakash Ranjan			iommus = <&apps_smmu 0x4c3 0x0>;
74890db71e4SRajendra Nayak			status = "disabled";
74990db71e4SRajendra Nayak
750ba3fc649SRoja Rani Yarubandi			i2c6: i2c@a80000 {
751ba3fc649SRoja Rani Yarubandi				compatible = "qcom,geni-i2c";
752ba3fc649SRoja Rani Yarubandi				reg = <0 0x00a80000 0 0x4000>;
753ba3fc649SRoja Rani Yarubandi				clock-names = "se";
754ba3fc649SRoja Rani Yarubandi				clocks = <&gcc GCC_QUPV3_WRAP1_S0_CLK>;
755ba3fc649SRoja Rani Yarubandi				pinctrl-names = "default";
756ba3fc649SRoja Rani Yarubandi				pinctrl-0 = <&qup_i2c6_default>;
757ba3fc649SRoja Rani Yarubandi				interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
758ba3fc649SRoja Rani Yarubandi				#address-cells = <1>;
759ba3fc649SRoja Rani Yarubandi				#size-cells = <0>;
760ba3fc649SRoja Rani Yarubandi				status = "disabled";
761ba3fc649SRoja Rani Yarubandi			};
762ba3fc649SRoja Rani Yarubandi
763ba3fc649SRoja Rani Yarubandi			spi6: spi@a80000 {
764ba3fc649SRoja Rani Yarubandi				compatible = "qcom,geni-spi";
765ba3fc649SRoja Rani Yarubandi				reg = <0 0x00a80000 0 0x4000>;
766ba3fc649SRoja Rani Yarubandi				clock-names = "se";
767ba3fc649SRoja Rani Yarubandi				clocks = <&gcc GCC_QUPV3_WRAP1_S0_CLK>;
768ba3fc649SRoja Rani Yarubandi				pinctrl-names = "default";
769ba3fc649SRoja Rani Yarubandi				pinctrl-0 = <&qup_spi6_default>;
770ba3fc649SRoja Rani Yarubandi				interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
771ba3fc649SRoja Rani Yarubandi				#address-cells = <1>;
772ba3fc649SRoja Rani Yarubandi				#size-cells = <0>;
773ba3fc649SRoja Rani Yarubandi				status = "disabled";
774ba3fc649SRoja Rani Yarubandi			};
775ba3fc649SRoja Rani Yarubandi
776ba3fc649SRoja Rani Yarubandi			uart6: serial@a80000 {
777ba3fc649SRoja Rani Yarubandi				compatible = "qcom,geni-uart";
778ba3fc649SRoja Rani Yarubandi				reg = <0 0x00a80000 0 0x4000>;
779ba3fc649SRoja Rani Yarubandi				clock-names = "se";
780ba3fc649SRoja Rani Yarubandi				clocks = <&gcc GCC_QUPV3_WRAP1_S0_CLK>;
781ba3fc649SRoja Rani Yarubandi				pinctrl-names = "default";
782ba3fc649SRoja Rani Yarubandi				pinctrl-0 = <&qup_uart6_default>;
783ba3fc649SRoja Rani Yarubandi				interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
784ba3fc649SRoja Rani Yarubandi				status = "disabled";
785ba3fc649SRoja Rani Yarubandi			};
786ba3fc649SRoja Rani Yarubandi
787ba3fc649SRoja Rani Yarubandi			i2c7: i2c@a84000 {
788ba3fc649SRoja Rani Yarubandi				compatible = "qcom,geni-i2c";
789ba3fc649SRoja Rani Yarubandi				reg = <0 0x00a84000 0 0x4000>;
790ba3fc649SRoja Rani Yarubandi				clock-names = "se";
791ba3fc649SRoja Rani Yarubandi				clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>;
792ba3fc649SRoja Rani Yarubandi				pinctrl-names = "default";
793ba3fc649SRoja Rani Yarubandi				pinctrl-0 = <&qup_i2c7_default>;
794ba3fc649SRoja Rani Yarubandi				interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
795ba3fc649SRoja Rani Yarubandi				#address-cells = <1>;
796ba3fc649SRoja Rani Yarubandi				#size-cells = <0>;
797ba3fc649SRoja Rani Yarubandi				status = "disabled";
798ba3fc649SRoja Rani Yarubandi			};
799ba3fc649SRoja Rani Yarubandi
800ba3fc649SRoja Rani Yarubandi			uart7: serial@a84000 {
801ba3fc649SRoja Rani Yarubandi				compatible = "qcom,geni-uart";
802ba3fc649SRoja Rani Yarubandi				reg = <0 0x00a84000 0 0x4000>;
803ba3fc649SRoja Rani Yarubandi				clock-names = "se";
804ba3fc649SRoja Rani Yarubandi				clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>;
805ba3fc649SRoja Rani Yarubandi				pinctrl-names = "default";
806ba3fc649SRoja Rani Yarubandi				pinctrl-0 = <&qup_uart7_default>;
807ba3fc649SRoja Rani Yarubandi				interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
808ba3fc649SRoja Rani Yarubandi				status = "disabled";
809ba3fc649SRoja Rani Yarubandi			};
810ba3fc649SRoja Rani Yarubandi
811ba3fc649SRoja Rani Yarubandi			i2c8: i2c@a88000 {
812ba3fc649SRoja Rani Yarubandi				compatible = "qcom,geni-i2c";
813ba3fc649SRoja Rani Yarubandi				reg = <0 0x00a88000 0 0x4000>;
814ba3fc649SRoja Rani Yarubandi				clock-names = "se";
815ba3fc649SRoja Rani Yarubandi				clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>;
816ba3fc649SRoja Rani Yarubandi				pinctrl-names = "default";
817ba3fc649SRoja Rani Yarubandi				pinctrl-0 = <&qup_i2c8_default>;
818ba3fc649SRoja Rani Yarubandi				interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
819ba3fc649SRoja Rani Yarubandi				#address-cells = <1>;
820ba3fc649SRoja Rani Yarubandi				#size-cells = <0>;
821ba3fc649SRoja Rani Yarubandi				status = "disabled";
822ba3fc649SRoja Rani Yarubandi			};
823ba3fc649SRoja Rani Yarubandi
824ba3fc649SRoja Rani Yarubandi			spi8: spi@a88000 {
825ba3fc649SRoja Rani Yarubandi				compatible = "qcom,geni-spi";
826ba3fc649SRoja Rani Yarubandi				reg = <0 0x00a88000 0 0x4000>;
827ba3fc649SRoja Rani Yarubandi				clock-names = "se";
828ba3fc649SRoja Rani Yarubandi				clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>;
829ba3fc649SRoja Rani Yarubandi				pinctrl-names = "default";
830ba3fc649SRoja Rani Yarubandi				pinctrl-0 = <&qup_spi8_default>;
831ba3fc649SRoja Rani Yarubandi				interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
832ba3fc649SRoja Rani Yarubandi				#address-cells = <1>;
833ba3fc649SRoja Rani Yarubandi				#size-cells = <0>;
834ba3fc649SRoja Rani Yarubandi				status = "disabled";
835ba3fc649SRoja Rani Yarubandi			};
836ba3fc649SRoja Rani Yarubandi
83790db71e4SRajendra Nayak			uart8: serial@a88000 {
83890db71e4SRajendra Nayak				compatible = "qcom,geni-debug-uart";
83990db71e4SRajendra Nayak				reg = <0 0x00a88000 0 0x4000>;
84090db71e4SRajendra Nayak				clock-names = "se";
84190db71e4SRajendra Nayak				clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>;
84290db71e4SRajendra Nayak				pinctrl-names = "default";
84390db71e4SRajendra Nayak				pinctrl-0 = <&qup_uart8_default>;
84490db71e4SRajendra Nayak				interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
84590db71e4SRajendra Nayak				status = "disabled";
84690db71e4SRajendra Nayak			};
847ba3fc649SRoja Rani Yarubandi
848ba3fc649SRoja Rani Yarubandi			i2c9: i2c@a8c000 {
849ba3fc649SRoja Rani Yarubandi				compatible = "qcom,geni-i2c";
850ba3fc649SRoja Rani Yarubandi				reg = <0 0x00a8c000 0 0x4000>;
851ba3fc649SRoja Rani Yarubandi				clock-names = "se";
852ba3fc649SRoja Rani Yarubandi				clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>;
853ba3fc649SRoja Rani Yarubandi				pinctrl-names = "default";
854ba3fc649SRoja Rani Yarubandi				pinctrl-0 = <&qup_i2c9_default>;
855ba3fc649SRoja Rani Yarubandi				interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
856ba3fc649SRoja Rani Yarubandi				#address-cells = <1>;
857ba3fc649SRoja Rani Yarubandi				#size-cells = <0>;
858ba3fc649SRoja Rani Yarubandi				status = "disabled";
859ba3fc649SRoja Rani Yarubandi			};
860ba3fc649SRoja Rani Yarubandi
861ba3fc649SRoja Rani Yarubandi			uart9: serial@a8c000 {
862ba3fc649SRoja Rani Yarubandi				compatible = "qcom,geni-uart";
863ba3fc649SRoja Rani Yarubandi				reg = <0 0x00a8c000 0 0x4000>;
864ba3fc649SRoja Rani Yarubandi				clock-names = "se";
865ba3fc649SRoja Rani Yarubandi				clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>;
866ba3fc649SRoja Rani Yarubandi				pinctrl-names = "default";
867ba3fc649SRoja Rani Yarubandi				pinctrl-0 = <&qup_uart9_default>;
868ba3fc649SRoja Rani Yarubandi				interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
869ba3fc649SRoja Rani Yarubandi				status = "disabled";
870ba3fc649SRoja Rani Yarubandi			};
871ba3fc649SRoja Rani Yarubandi
872ba3fc649SRoja Rani Yarubandi			i2c10: i2c@a90000 {
873ba3fc649SRoja Rani Yarubandi				compatible = "qcom,geni-i2c";
874ba3fc649SRoja Rani Yarubandi				reg = <0 0x00a90000 0 0x4000>;
875ba3fc649SRoja Rani Yarubandi				clock-names = "se";
876ba3fc649SRoja Rani Yarubandi				clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>;
877ba3fc649SRoja Rani Yarubandi				pinctrl-names = "default";
878ba3fc649SRoja Rani Yarubandi				pinctrl-0 = <&qup_i2c10_default>;
879ba3fc649SRoja Rani Yarubandi				interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
880ba3fc649SRoja Rani Yarubandi				#address-cells = <1>;
881ba3fc649SRoja Rani Yarubandi				#size-cells = <0>;
882ba3fc649SRoja Rani Yarubandi				status = "disabled";
883ba3fc649SRoja Rani Yarubandi			};
884ba3fc649SRoja Rani Yarubandi
885ba3fc649SRoja Rani Yarubandi			spi10: spi@a90000 {
886ba3fc649SRoja Rani Yarubandi				compatible = "qcom,geni-spi";
887ba3fc649SRoja Rani Yarubandi				reg = <0 0x00a90000 0 0x4000>;
888ba3fc649SRoja Rani Yarubandi				clock-names = "se";
889ba3fc649SRoja Rani Yarubandi				clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>;
890ba3fc649SRoja Rani Yarubandi				pinctrl-names = "default";
891ba3fc649SRoja Rani Yarubandi				pinctrl-0 = <&qup_spi10_default>;
892ba3fc649SRoja Rani Yarubandi				interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
893ba3fc649SRoja Rani Yarubandi				#address-cells = <1>;
894ba3fc649SRoja Rani Yarubandi				#size-cells = <0>;
895ba3fc649SRoja Rani Yarubandi				status = "disabled";
896ba3fc649SRoja Rani Yarubandi			};
897ba3fc649SRoja Rani Yarubandi
898ba3fc649SRoja Rani Yarubandi			uart10: serial@a90000 {
899ba3fc649SRoja Rani Yarubandi				compatible = "qcom,geni-uart";
900ba3fc649SRoja Rani Yarubandi				reg = <0 0x00a90000 0 0x4000>;
901ba3fc649SRoja Rani Yarubandi				clock-names = "se";
902ba3fc649SRoja Rani Yarubandi				clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>;
903ba3fc649SRoja Rani Yarubandi				pinctrl-names = "default";
904ba3fc649SRoja Rani Yarubandi				pinctrl-0 = <&qup_uart10_default>;
905ba3fc649SRoja Rani Yarubandi				interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
906ba3fc649SRoja Rani Yarubandi				status = "disabled";
907ba3fc649SRoja Rani Yarubandi			};
908ba3fc649SRoja Rani Yarubandi
909ba3fc649SRoja Rani Yarubandi			i2c11: i2c@a94000 {
910ba3fc649SRoja Rani Yarubandi				compatible = "qcom,geni-i2c";
911ba3fc649SRoja Rani Yarubandi				reg = <0 0x00a94000 0 0x4000>;
912ba3fc649SRoja Rani Yarubandi				clock-names = "se";
913ba3fc649SRoja Rani Yarubandi				clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>;
914ba3fc649SRoja Rani Yarubandi				pinctrl-names = "default";
915ba3fc649SRoja Rani Yarubandi				pinctrl-0 = <&qup_i2c11_default>;
916ba3fc649SRoja Rani Yarubandi				interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
917ba3fc649SRoja Rani Yarubandi				#address-cells = <1>;
918ba3fc649SRoja Rani Yarubandi				#size-cells = <0>;
919ba3fc649SRoja Rani Yarubandi				status = "disabled";
920ba3fc649SRoja Rani Yarubandi			};
921ba3fc649SRoja Rani Yarubandi
922ba3fc649SRoja Rani Yarubandi			spi11: spi@a94000 {
923ba3fc649SRoja Rani Yarubandi				compatible = "qcom,geni-spi";
924ba3fc649SRoja Rani Yarubandi				reg = <0 0x00a94000 0 0x4000>;
925ba3fc649SRoja Rani Yarubandi				clock-names = "se";
926ba3fc649SRoja Rani Yarubandi				clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>;
927ba3fc649SRoja Rani Yarubandi				pinctrl-names = "default";
928ba3fc649SRoja Rani Yarubandi				pinctrl-0 = <&qup_spi11_default>;
929ba3fc649SRoja Rani Yarubandi				interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
930ba3fc649SRoja Rani Yarubandi				#address-cells = <1>;
931ba3fc649SRoja Rani Yarubandi				#size-cells = <0>;
932ba3fc649SRoja Rani Yarubandi				status = "disabled";
933ba3fc649SRoja Rani Yarubandi			};
934ba3fc649SRoja Rani Yarubandi
935ba3fc649SRoja Rani Yarubandi			uart11: serial@a94000 {
936ba3fc649SRoja Rani Yarubandi				compatible = "qcom,geni-uart";
937ba3fc649SRoja Rani Yarubandi				reg = <0 0x00a94000 0 0x4000>;
938ba3fc649SRoja Rani Yarubandi				clock-names = "se";
939ba3fc649SRoja Rani Yarubandi				clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>;
940ba3fc649SRoja Rani Yarubandi				pinctrl-names = "default";
941ba3fc649SRoja Rani Yarubandi				pinctrl-0 = <&qup_uart11_default>;
942ba3fc649SRoja Rani Yarubandi				interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
943ba3fc649SRoja Rani Yarubandi				status = "disabled";
944ba3fc649SRoja Rani Yarubandi			};
94590db71e4SRajendra Nayak		};
94690db71e4SRajendra Nayak
947b1b24dd7SOdelu Kukatla		config_noc: interconnect@1500000 {
948b1b24dd7SOdelu Kukatla			compatible = "qcom,sc7180-config-noc";
949b1b24dd7SOdelu Kukatla			reg = <0 0x01500000 0 0x28000>;
950b1b24dd7SOdelu Kukatla			#interconnect-cells = <1>;
951b1b24dd7SOdelu Kukatla			qcom,bcm-voters = <&apps_bcm_voter>;
952b1b24dd7SOdelu Kukatla		};
953b1b24dd7SOdelu Kukatla
954b1b24dd7SOdelu Kukatla		system_noc: interconnect@1620000 {
955b1b24dd7SOdelu Kukatla			compatible = "qcom,sc7180-system-noc";
956b1b24dd7SOdelu Kukatla			reg = <0 0x01620000 0 0x17080>;
957b1b24dd7SOdelu Kukatla			#interconnect-cells = <1>;
958b1b24dd7SOdelu Kukatla			qcom,bcm-voters = <&apps_bcm_voter>;
959b1b24dd7SOdelu Kukatla		};
960b1b24dd7SOdelu Kukatla
961b1b24dd7SOdelu Kukatla		mc_virt: interconnect@1638000 {
962b1b24dd7SOdelu Kukatla			compatible = "qcom,sc7180-mc-virt";
963b1b24dd7SOdelu Kukatla			reg = <0 0x01638000 0 0x1000>;
964b1b24dd7SOdelu Kukatla			#interconnect-cells = <1>;
965b1b24dd7SOdelu Kukatla			qcom,bcm-voters = <&apps_bcm_voter>;
966b1b24dd7SOdelu Kukatla		};
967b1b24dd7SOdelu Kukatla
968b1b24dd7SOdelu Kukatla		qup_virt: interconnect@1650000 {
969b1b24dd7SOdelu Kukatla			compatible = "qcom,sc7180-qup-virt";
970b1b24dd7SOdelu Kukatla			reg = <0 0x01650000 0 0x1000>;
971b1b24dd7SOdelu Kukatla			#interconnect-cells = <1>;
972b1b24dd7SOdelu Kukatla			qcom,bcm-voters = <&apps_bcm_voter>;
973b1b24dd7SOdelu Kukatla		};
974b1b24dd7SOdelu Kukatla
975b1b24dd7SOdelu Kukatla		aggre1_noc: interconnect@16e0000 {
976b1b24dd7SOdelu Kukatla			compatible = "qcom,sc7180-aggre1-noc";
977b1b24dd7SOdelu Kukatla			reg = <0 0x016e0000 0 0x15080>;
978b1b24dd7SOdelu Kukatla			#interconnect-cells = <1>;
979b1b24dd7SOdelu Kukatla			qcom,bcm-voters = <&apps_bcm_voter>;
980b1b24dd7SOdelu Kukatla		};
981b1b24dd7SOdelu Kukatla
982b1b24dd7SOdelu Kukatla		aggre2_noc: interconnect@1705000 {
983b1b24dd7SOdelu Kukatla			compatible = "qcom,sc7180-aggre2-noc";
984b1b24dd7SOdelu Kukatla			reg = <0 0x01705000 0 0x9000>;
985b1b24dd7SOdelu Kukatla			#interconnect-cells = <1>;
986b1b24dd7SOdelu Kukatla			qcom,bcm-voters = <&apps_bcm_voter>;
987b1b24dd7SOdelu Kukatla		};
988b1b24dd7SOdelu Kukatla
989b1b24dd7SOdelu Kukatla		compute_noc: interconnect@170e000 {
990b1b24dd7SOdelu Kukatla			compatible = "qcom,sc7180-compute-noc";
991b1b24dd7SOdelu Kukatla			reg = <0 0x0170e000 0 0x6000>;
992b1b24dd7SOdelu Kukatla			#interconnect-cells = <1>;
993b1b24dd7SOdelu Kukatla			qcom,bcm-voters = <&apps_bcm_voter>;
994b1b24dd7SOdelu Kukatla		};
995b1b24dd7SOdelu Kukatla
996b1b24dd7SOdelu Kukatla		mmss_noc: interconnect@1740000 {
997b1b24dd7SOdelu Kukatla			compatible = "qcom,sc7180-mmss-noc";
998b1b24dd7SOdelu Kukatla			reg = <0 0x01740000 0 0x1c100>;
999b1b24dd7SOdelu Kukatla			#interconnect-cells = <1>;
1000b1b24dd7SOdelu Kukatla			qcom,bcm-voters = <&apps_bcm_voter>;
1001b1b24dd7SOdelu Kukatla		};
1002b1b24dd7SOdelu Kukatla
1003b1b24dd7SOdelu Kukatla		ipa_virt: interconnect@1e00000 {
1004b1b24dd7SOdelu Kukatla			compatible = "qcom,sc7180-ipa-virt";
1005b1b24dd7SOdelu Kukatla			reg = <0 0x01e00000 0 0x1000>;
1006b1b24dd7SOdelu Kukatla			#interconnect-cells = <1>;
1007b1b24dd7SOdelu Kukatla			qcom,bcm-voters = <&apps_bcm_voter>;
1008b1b24dd7SOdelu Kukatla		};
1009b1b24dd7SOdelu Kukatla
1010f5ab220dSSibi Sankar		tcsr_mutex_regs: syscon@1f40000 {
1011f5ab220dSSibi Sankar			compatible = "syscon";
1012f5ab220dSSibi Sankar			reg = <0 0x01f40000 0 0x40000>;
1013f5ab220dSSibi Sankar		};
1014f5ab220dSSibi Sankar
1015bec71ba2SSibi Sankar		tcsr_regs: syscon@1fc0000 {
1016bec71ba2SSibi Sankar			compatible = "syscon";
1017bec71ba2SSibi Sankar			reg = <0 0x01fc0000 0 0x40000>;
1018bec71ba2SSibi Sankar		};
1019bec71ba2SSibi Sankar
102090db71e4SRajendra Nayak		tlmm: pinctrl@3500000 {
102190db71e4SRajendra Nayak			compatible = "qcom,sc7180-pinctrl";
102290db71e4SRajendra Nayak			reg = <0 0x03500000 0 0x300000>,
102390db71e4SRajendra Nayak			      <0 0x03900000 0 0x300000>,
102490db71e4SRajendra Nayak			      <0 0x03d00000 0 0x300000>;
102590db71e4SRajendra Nayak			reg-names = "west", "north", "south";
102690db71e4SRajendra Nayak			interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
102790db71e4SRajendra Nayak			gpio-controller;
102890db71e4SRajendra Nayak			#gpio-cells = <2>;
102990db71e4SRajendra Nayak			interrupt-controller;
103090db71e4SRajendra Nayak			#interrupt-cells = <2>;
103190db71e4SRajendra Nayak			gpio-ranges = <&tlmm 0 0 120>;
1032456d677cSMaulik Shah			wakeup-parent = <&pdc>;
103390db71e4SRajendra Nayak
1034ba3fc649SRoja Rani Yarubandi			qspi_clk: qspi-clk {
1035ba3fc649SRoja Rani Yarubandi				pinmux {
1036ba3fc649SRoja Rani Yarubandi					pins = "gpio63";
1037ba3fc649SRoja Rani Yarubandi					function = "qspi_clk";
1038ba3fc649SRoja Rani Yarubandi				};
1039ba3fc649SRoja Rani Yarubandi			};
1040ba3fc649SRoja Rani Yarubandi
1041ba3fc649SRoja Rani Yarubandi			qspi_cs0: qspi-cs0 {
1042ba3fc649SRoja Rani Yarubandi				pinmux {
1043ba3fc649SRoja Rani Yarubandi					pins = "gpio68";
1044ba3fc649SRoja Rani Yarubandi					function = "qspi_cs";
1045ba3fc649SRoja Rani Yarubandi				};
1046ba3fc649SRoja Rani Yarubandi			};
1047ba3fc649SRoja Rani Yarubandi
1048ba3fc649SRoja Rani Yarubandi			qspi_cs1: qspi-cs1 {
1049ba3fc649SRoja Rani Yarubandi				pinmux {
1050ba3fc649SRoja Rani Yarubandi					pins = "gpio72";
1051ba3fc649SRoja Rani Yarubandi					function = "qspi_cs";
1052ba3fc649SRoja Rani Yarubandi				};
1053ba3fc649SRoja Rani Yarubandi			};
1054ba3fc649SRoja Rani Yarubandi
1055ba3fc649SRoja Rani Yarubandi			qspi_data01: qspi-data01 {
1056ba3fc649SRoja Rani Yarubandi				pinmux-data {
1057ba3fc649SRoja Rani Yarubandi					pins = "gpio64", "gpio65";
1058ba3fc649SRoja Rani Yarubandi					function = "qspi_data";
1059ba3fc649SRoja Rani Yarubandi				};
1060ba3fc649SRoja Rani Yarubandi			};
1061ba3fc649SRoja Rani Yarubandi
1062ba3fc649SRoja Rani Yarubandi			qspi_data12: qspi-data12 {
1063ba3fc649SRoja Rani Yarubandi				pinmux-data {
1064ba3fc649SRoja Rani Yarubandi					pins = "gpio66", "gpio67";
1065ba3fc649SRoja Rani Yarubandi					function = "qspi_data";
1066ba3fc649SRoja Rani Yarubandi				};
1067ba3fc649SRoja Rani Yarubandi			};
1068ba3fc649SRoja Rani Yarubandi
1069ba3fc649SRoja Rani Yarubandi			qup_i2c0_default: qup-i2c0-default {
1070ba3fc649SRoja Rani Yarubandi				pinmux {
1071ba3fc649SRoja Rani Yarubandi					pins = "gpio34", "gpio35";
1072ba3fc649SRoja Rani Yarubandi					function = "qup00";
1073ba3fc649SRoja Rani Yarubandi				};
1074ba3fc649SRoja Rani Yarubandi			};
1075ba3fc649SRoja Rani Yarubandi
1076ba3fc649SRoja Rani Yarubandi			qup_i2c1_default: qup-i2c1-default {
1077ba3fc649SRoja Rani Yarubandi				pinmux {
1078ba3fc649SRoja Rani Yarubandi					pins = "gpio0", "gpio1";
1079ba3fc649SRoja Rani Yarubandi					function = "qup01";
1080ba3fc649SRoja Rani Yarubandi				};
1081ba3fc649SRoja Rani Yarubandi			};
1082ba3fc649SRoja Rani Yarubandi
1083ba3fc649SRoja Rani Yarubandi			qup_i2c2_default: qup-i2c2-default {
1084ba3fc649SRoja Rani Yarubandi				pinmux {
1085ba3fc649SRoja Rani Yarubandi					pins = "gpio15", "gpio16";
108629c5cb64SDouglas Anderson					function = "qup02_i2c";
1087ba3fc649SRoja Rani Yarubandi				};
1088ba3fc649SRoja Rani Yarubandi			};
1089ba3fc649SRoja Rani Yarubandi
1090ba3fc649SRoja Rani Yarubandi			qup_i2c3_default: qup-i2c3-default {
1091ba3fc649SRoja Rani Yarubandi				pinmux {
1092ba3fc649SRoja Rani Yarubandi					pins = "gpio38", "gpio39";
1093ba3fc649SRoja Rani Yarubandi					function = "qup03";
1094ba3fc649SRoja Rani Yarubandi				};
1095ba3fc649SRoja Rani Yarubandi			};
1096ba3fc649SRoja Rani Yarubandi
1097ba3fc649SRoja Rani Yarubandi			qup_i2c4_default: qup-i2c4-default {
1098ba3fc649SRoja Rani Yarubandi				pinmux {
1099ba3fc649SRoja Rani Yarubandi					pins = "gpio115", "gpio116";
110029c5cb64SDouglas Anderson					function = "qup04_i2c";
1101ba3fc649SRoja Rani Yarubandi				};
1102ba3fc649SRoja Rani Yarubandi			};
1103ba3fc649SRoja Rani Yarubandi
1104ba3fc649SRoja Rani Yarubandi			qup_i2c5_default: qup-i2c5-default {
1105ba3fc649SRoja Rani Yarubandi				pinmux {
1106ba3fc649SRoja Rani Yarubandi					pins = "gpio25", "gpio26";
1107ba3fc649SRoja Rani Yarubandi					function = "qup05";
1108ba3fc649SRoja Rani Yarubandi				};
1109ba3fc649SRoja Rani Yarubandi			};
1110ba3fc649SRoja Rani Yarubandi
1111ba3fc649SRoja Rani Yarubandi			qup_i2c6_default: qup-i2c6-default {
1112ba3fc649SRoja Rani Yarubandi				pinmux {
1113ba3fc649SRoja Rani Yarubandi					pins = "gpio59", "gpio60";
1114ba3fc649SRoja Rani Yarubandi					function = "qup10";
1115ba3fc649SRoja Rani Yarubandi				};
1116ba3fc649SRoja Rani Yarubandi			};
1117ba3fc649SRoja Rani Yarubandi
1118ba3fc649SRoja Rani Yarubandi			qup_i2c7_default: qup-i2c7-default {
1119ba3fc649SRoja Rani Yarubandi				pinmux {
1120ba3fc649SRoja Rani Yarubandi					pins = "gpio6", "gpio7";
112129c5cb64SDouglas Anderson					function = "qup11_i2c";
1122ba3fc649SRoja Rani Yarubandi				};
1123ba3fc649SRoja Rani Yarubandi			};
1124ba3fc649SRoja Rani Yarubandi
1125ba3fc649SRoja Rani Yarubandi			qup_i2c8_default: qup-i2c8-default {
1126ba3fc649SRoja Rani Yarubandi				pinmux {
1127ba3fc649SRoja Rani Yarubandi					pins = "gpio42", "gpio43";
1128ba3fc649SRoja Rani Yarubandi					function = "qup12";
1129ba3fc649SRoja Rani Yarubandi				};
1130ba3fc649SRoja Rani Yarubandi			};
1131ba3fc649SRoja Rani Yarubandi
1132ba3fc649SRoja Rani Yarubandi			qup_i2c9_default: qup-i2c9-default {
1133ba3fc649SRoja Rani Yarubandi				pinmux {
1134ba3fc649SRoja Rani Yarubandi					pins = "gpio46", "gpio47";
113529c5cb64SDouglas Anderson					function = "qup13_i2c";
1136ba3fc649SRoja Rani Yarubandi				};
1137ba3fc649SRoja Rani Yarubandi			};
1138ba3fc649SRoja Rani Yarubandi
1139ba3fc649SRoja Rani Yarubandi			qup_i2c10_default: qup-i2c10-default {
1140ba3fc649SRoja Rani Yarubandi				pinmux {
1141ba3fc649SRoja Rani Yarubandi					pins = "gpio86", "gpio87";
1142ba3fc649SRoja Rani Yarubandi					function = "qup14";
1143ba3fc649SRoja Rani Yarubandi				};
1144ba3fc649SRoja Rani Yarubandi			};
1145ba3fc649SRoja Rani Yarubandi
1146ba3fc649SRoja Rani Yarubandi			qup_i2c11_default: qup-i2c11-default {
1147ba3fc649SRoja Rani Yarubandi				pinmux {
1148ba3fc649SRoja Rani Yarubandi					pins = "gpio53", "gpio54";
1149ba3fc649SRoja Rani Yarubandi					function = "qup15";
1150ba3fc649SRoja Rani Yarubandi				};
1151ba3fc649SRoja Rani Yarubandi			};
1152ba3fc649SRoja Rani Yarubandi
1153ba3fc649SRoja Rani Yarubandi			qup_spi0_default: qup-spi0-default {
1154ba3fc649SRoja Rani Yarubandi				pinmux {
1155ba3fc649SRoja Rani Yarubandi					pins = "gpio34", "gpio35",
1156ba3fc649SRoja Rani Yarubandi					       "gpio36", "gpio37";
1157ba3fc649SRoja Rani Yarubandi					function = "qup00";
1158ba3fc649SRoja Rani Yarubandi				};
1159ba3fc649SRoja Rani Yarubandi			};
1160ba3fc649SRoja Rani Yarubandi
1161ba3fc649SRoja Rani Yarubandi			qup_spi1_default: qup-spi1-default {
1162ba3fc649SRoja Rani Yarubandi				pinmux {
1163ba3fc649SRoja Rani Yarubandi					pins = "gpio0", "gpio1",
1164d8b076b8SRajendra Nayak					       "gpio2", "gpio3";
1165ba3fc649SRoja Rani Yarubandi					function = "qup01";
1166ba3fc649SRoja Rani Yarubandi				};
1167ba3fc649SRoja Rani Yarubandi			};
1168ba3fc649SRoja Rani Yarubandi
1169ba3fc649SRoja Rani Yarubandi			qup_spi3_default: qup-spi3-default {
1170ba3fc649SRoja Rani Yarubandi				pinmux {
1171ba3fc649SRoja Rani Yarubandi					pins = "gpio38", "gpio39",
1172ba3fc649SRoja Rani Yarubandi					       "gpio40", "gpio41";
1173ba3fc649SRoja Rani Yarubandi					function = "qup03";
1174ba3fc649SRoja Rani Yarubandi				};
1175ba3fc649SRoja Rani Yarubandi			};
1176ba3fc649SRoja Rani Yarubandi
1177ba3fc649SRoja Rani Yarubandi			qup_spi5_default: qup-spi5-default {
1178ba3fc649SRoja Rani Yarubandi				pinmux {
1179ba3fc649SRoja Rani Yarubandi					pins = "gpio25", "gpio26",
1180ba3fc649SRoja Rani Yarubandi					       "gpio27", "gpio28";
1181ba3fc649SRoja Rani Yarubandi					function = "qup05";
1182ba3fc649SRoja Rani Yarubandi				};
1183ba3fc649SRoja Rani Yarubandi			};
1184ba3fc649SRoja Rani Yarubandi
1185ba3fc649SRoja Rani Yarubandi			qup_spi6_default: qup-spi6-default {
1186ba3fc649SRoja Rani Yarubandi				pinmux {
1187ba3fc649SRoja Rani Yarubandi					pins = "gpio59", "gpio60",
1188d8b076b8SRajendra Nayak					       "gpio61", "gpio62";
1189ba3fc649SRoja Rani Yarubandi					function = "qup10";
1190ba3fc649SRoja Rani Yarubandi				};
1191ba3fc649SRoja Rani Yarubandi			};
1192ba3fc649SRoja Rani Yarubandi
1193ba3fc649SRoja Rani Yarubandi			qup_spi8_default: qup-spi8-default {
1194ba3fc649SRoja Rani Yarubandi				pinmux {
1195ba3fc649SRoja Rani Yarubandi					pins = "gpio42", "gpio43",
1196ba3fc649SRoja Rani Yarubandi					       "gpio44", "gpio45";
1197ba3fc649SRoja Rani Yarubandi					function = "qup12";
1198ba3fc649SRoja Rani Yarubandi				};
1199ba3fc649SRoja Rani Yarubandi			};
1200ba3fc649SRoja Rani Yarubandi
1201ba3fc649SRoja Rani Yarubandi			qup_spi10_default: qup-spi10-default {
1202ba3fc649SRoja Rani Yarubandi				pinmux {
1203ba3fc649SRoja Rani Yarubandi					pins = "gpio86", "gpio87",
1204d8b076b8SRajendra Nayak					       "gpio88", "gpio89";
1205ba3fc649SRoja Rani Yarubandi					function = "qup14";
1206ba3fc649SRoja Rani Yarubandi				};
1207ba3fc649SRoja Rani Yarubandi			};
1208ba3fc649SRoja Rani Yarubandi
1209ba3fc649SRoja Rani Yarubandi			qup_spi11_default: qup-spi11-default {
1210ba3fc649SRoja Rani Yarubandi				pinmux {
1211ba3fc649SRoja Rani Yarubandi					pins = "gpio53", "gpio54",
1212ba3fc649SRoja Rani Yarubandi					       "gpio55", "gpio56";
1213ba3fc649SRoja Rani Yarubandi					function = "qup15";
1214ba3fc649SRoja Rani Yarubandi				};
1215ba3fc649SRoja Rani Yarubandi			};
1216ba3fc649SRoja Rani Yarubandi
1217ba3fc649SRoja Rani Yarubandi			qup_uart0_default: qup-uart0-default {
1218ba3fc649SRoja Rani Yarubandi				pinmux {
1219ba3fc649SRoja Rani Yarubandi					pins = "gpio34", "gpio35",
1220ba3fc649SRoja Rani Yarubandi					       "gpio36", "gpio37";
1221ba3fc649SRoja Rani Yarubandi					function = "qup00";
1222ba3fc649SRoja Rani Yarubandi				};
1223ba3fc649SRoja Rani Yarubandi			};
1224ba3fc649SRoja Rani Yarubandi
1225ba3fc649SRoja Rani Yarubandi			qup_uart1_default: qup-uart1-default {
1226ba3fc649SRoja Rani Yarubandi				pinmux {
1227ba3fc649SRoja Rani Yarubandi					pins = "gpio0", "gpio1",
1228ba3fc649SRoja Rani Yarubandi					       "gpio2", "gpio3";
1229ba3fc649SRoja Rani Yarubandi					function = "qup01";
1230ba3fc649SRoja Rani Yarubandi				};
1231ba3fc649SRoja Rani Yarubandi			};
1232ba3fc649SRoja Rani Yarubandi
1233ba3fc649SRoja Rani Yarubandi			qup_uart2_default: qup-uart2-default {
1234ba3fc649SRoja Rani Yarubandi				pinmux {
1235ba3fc649SRoja Rani Yarubandi					pins = "gpio15", "gpio16";
123629c5cb64SDouglas Anderson					function = "qup02_uart";
1237ba3fc649SRoja Rani Yarubandi				};
1238ba3fc649SRoja Rani Yarubandi			};
1239ba3fc649SRoja Rani Yarubandi
1240ba3fc649SRoja Rani Yarubandi			qup_uart3_default: qup-uart3-default {
1241ba3fc649SRoja Rani Yarubandi				pinmux {
1242ba3fc649SRoja Rani Yarubandi					pins = "gpio38", "gpio39",
1243ba3fc649SRoja Rani Yarubandi					       "gpio40", "gpio41";
1244ba3fc649SRoja Rani Yarubandi					function = "qup03";
1245ba3fc649SRoja Rani Yarubandi				};
1246ba3fc649SRoja Rani Yarubandi			};
1247ba3fc649SRoja Rani Yarubandi
1248ba3fc649SRoja Rani Yarubandi			qup_uart4_default: qup-uart4-default {
1249ba3fc649SRoja Rani Yarubandi				pinmux {
1250ba3fc649SRoja Rani Yarubandi					pins = "gpio115", "gpio116";
125129c5cb64SDouglas Anderson					function = "qup04_uart";
1252ba3fc649SRoja Rani Yarubandi				};
1253ba3fc649SRoja Rani Yarubandi			};
1254ba3fc649SRoja Rani Yarubandi
1255ba3fc649SRoja Rani Yarubandi			qup_uart5_default: qup-uart5-default {
1256ba3fc649SRoja Rani Yarubandi				pinmux {
1257ba3fc649SRoja Rani Yarubandi					pins = "gpio25", "gpio26",
1258ba3fc649SRoja Rani Yarubandi					       "gpio27", "gpio28";
1259ba3fc649SRoja Rani Yarubandi					function = "qup05";
1260ba3fc649SRoja Rani Yarubandi				};
1261ba3fc649SRoja Rani Yarubandi			};
1262ba3fc649SRoja Rani Yarubandi
1263ba3fc649SRoja Rani Yarubandi			qup_uart6_default: qup-uart6-default {
1264ba3fc649SRoja Rani Yarubandi				pinmux {
1265ba3fc649SRoja Rani Yarubandi					pins = "gpio59", "gpio60",
1266ba3fc649SRoja Rani Yarubandi					       "gpio61", "gpio62";
1267ba3fc649SRoja Rani Yarubandi					function = "qup10";
1268ba3fc649SRoja Rani Yarubandi				};
1269ba3fc649SRoja Rani Yarubandi			};
1270ba3fc649SRoja Rani Yarubandi
1271ba3fc649SRoja Rani Yarubandi			qup_uart7_default: qup-uart7-default {
1272ba3fc649SRoja Rani Yarubandi				pinmux {
1273ba3fc649SRoja Rani Yarubandi					pins = "gpio6", "gpio7";
127429c5cb64SDouglas Anderson					function = "qup11_uart";
1275ba3fc649SRoja Rani Yarubandi				};
1276ba3fc649SRoja Rani Yarubandi			};
1277ba3fc649SRoja Rani Yarubandi
127890db71e4SRajendra Nayak			qup_uart8_default: qup-uart8-default {
127990db71e4SRajendra Nayak				pinmux {
128090db71e4SRajendra Nayak					pins = "gpio44", "gpio45";
128190db71e4SRajendra Nayak					function = "qup12";
128290db71e4SRajendra Nayak				};
128390db71e4SRajendra Nayak			};
1284ba3fc649SRoja Rani Yarubandi
1285ba3fc649SRoja Rani Yarubandi			qup_uart9_default: qup-uart9-default {
1286ba3fc649SRoja Rani Yarubandi				pinmux {
1287ba3fc649SRoja Rani Yarubandi					pins = "gpio46", "gpio47";
128829c5cb64SDouglas Anderson					function = "qup13_uart";
1289ba3fc649SRoja Rani Yarubandi				};
1290ba3fc649SRoja Rani Yarubandi			};
1291ba3fc649SRoja Rani Yarubandi
1292ba3fc649SRoja Rani Yarubandi			qup_uart10_default: qup-uart10-default {
1293ba3fc649SRoja Rani Yarubandi				pinmux {
1294ba3fc649SRoja Rani Yarubandi					pins = "gpio86", "gpio87",
1295ba3fc649SRoja Rani Yarubandi					       "gpio88", "gpio89";
1296ba3fc649SRoja Rani Yarubandi					function = "qup14";
1297ba3fc649SRoja Rani Yarubandi				};
1298ba3fc649SRoja Rani Yarubandi			};
1299ba3fc649SRoja Rani Yarubandi
1300ba3fc649SRoja Rani Yarubandi			qup_uart11_default: qup-uart11-default {
1301ba3fc649SRoja Rani Yarubandi				pinmux {
1302ba3fc649SRoja Rani Yarubandi					pins = "gpio53", "gpio54",
1303ba3fc649SRoja Rani Yarubandi					       "gpio55", "gpio56";
1304ba3fc649SRoja Rani Yarubandi					function = "qup15";
1305ba3fc649SRoja Rani Yarubandi				};
1306ba3fc649SRoja Rani Yarubandi			};
130724254a8eSVeerabhadrarao Badiganti
130824254a8eSVeerabhadrarao Badiganti			sdc1_on: sdc1-on {
130924254a8eSVeerabhadrarao Badiganti				pinconf-clk {
131024254a8eSVeerabhadrarao Badiganti					pins = "sdc1_clk";
131124254a8eSVeerabhadrarao Badiganti					bias-disable;
131224254a8eSVeerabhadrarao Badiganti					drive-strength = <16>;
131324254a8eSVeerabhadrarao Badiganti				};
131424254a8eSVeerabhadrarao Badiganti
131524254a8eSVeerabhadrarao Badiganti				pinconf-cmd {
131624254a8eSVeerabhadrarao Badiganti					pins = "sdc1_cmd";
131724254a8eSVeerabhadrarao Badiganti					bias-pull-up;
131824254a8eSVeerabhadrarao Badiganti					drive-strength = <10>;
131924254a8eSVeerabhadrarao Badiganti				};
132024254a8eSVeerabhadrarao Badiganti
132124254a8eSVeerabhadrarao Badiganti				pinconf-data {
132224254a8eSVeerabhadrarao Badiganti					pins = "sdc1_data";
132324254a8eSVeerabhadrarao Badiganti					bias-pull-up;
132424254a8eSVeerabhadrarao Badiganti					drive-strength = <10>;
132524254a8eSVeerabhadrarao Badiganti				};
132624254a8eSVeerabhadrarao Badiganti
132724254a8eSVeerabhadrarao Badiganti				pinconf-rclk {
132824254a8eSVeerabhadrarao Badiganti					pins = "sdc1_rclk";
132924254a8eSVeerabhadrarao Badiganti					bias-pull-down;
133024254a8eSVeerabhadrarao Badiganti				};
133124254a8eSVeerabhadrarao Badiganti			};
133224254a8eSVeerabhadrarao Badiganti
133324254a8eSVeerabhadrarao Badiganti			sdc1_off: sdc1-off {
133424254a8eSVeerabhadrarao Badiganti				pinconf-clk {
133524254a8eSVeerabhadrarao Badiganti					pins = "sdc1_clk";
133624254a8eSVeerabhadrarao Badiganti					bias-disable;
133724254a8eSVeerabhadrarao Badiganti					drive-strength = <2>;
133824254a8eSVeerabhadrarao Badiganti				};
133924254a8eSVeerabhadrarao Badiganti
134024254a8eSVeerabhadrarao Badiganti				pinconf-cmd {
134124254a8eSVeerabhadrarao Badiganti					pins = "sdc1_cmd";
134224254a8eSVeerabhadrarao Badiganti					bias-pull-up;
134324254a8eSVeerabhadrarao Badiganti					drive-strength = <2>;
134424254a8eSVeerabhadrarao Badiganti				};
134524254a8eSVeerabhadrarao Badiganti
134624254a8eSVeerabhadrarao Badiganti				pinconf-data {
134724254a8eSVeerabhadrarao Badiganti					pins = "sdc1_data";
134824254a8eSVeerabhadrarao Badiganti					bias-pull-up;
134924254a8eSVeerabhadrarao Badiganti					drive-strength = <2>;
135024254a8eSVeerabhadrarao Badiganti				};
135124254a8eSVeerabhadrarao Badiganti
135224254a8eSVeerabhadrarao Badiganti				pinconf-rclk {
135324254a8eSVeerabhadrarao Badiganti					pins = "sdc1_rclk";
135424254a8eSVeerabhadrarao Badiganti					bias-pull-down;
135524254a8eSVeerabhadrarao Badiganti				};
135624254a8eSVeerabhadrarao Badiganti			};
135724254a8eSVeerabhadrarao Badiganti
135824254a8eSVeerabhadrarao Badiganti			sdc2_on: sdc2-on {
135924254a8eSVeerabhadrarao Badiganti				pinconf-clk {
136024254a8eSVeerabhadrarao Badiganti					pins = "sdc2_clk";
136124254a8eSVeerabhadrarao Badiganti					bias-disable;
136224254a8eSVeerabhadrarao Badiganti					drive-strength = <16>;
136324254a8eSVeerabhadrarao Badiganti				};
136424254a8eSVeerabhadrarao Badiganti
136524254a8eSVeerabhadrarao Badiganti				pinconf-cmd {
136624254a8eSVeerabhadrarao Badiganti					pins = "sdc2_cmd";
136724254a8eSVeerabhadrarao Badiganti					bias-pull-up;
136824254a8eSVeerabhadrarao Badiganti					drive-strength = <10>;
136924254a8eSVeerabhadrarao Badiganti				};
137024254a8eSVeerabhadrarao Badiganti
137124254a8eSVeerabhadrarao Badiganti				pinconf-data {
137224254a8eSVeerabhadrarao Badiganti					pins = "sdc2_data";
137324254a8eSVeerabhadrarao Badiganti					bias-pull-up;
137424254a8eSVeerabhadrarao Badiganti					drive-strength = <10>;
137524254a8eSVeerabhadrarao Badiganti				};
137624254a8eSVeerabhadrarao Badiganti
137724254a8eSVeerabhadrarao Badiganti				pinconf-sd-cd {
137824254a8eSVeerabhadrarao Badiganti					pins = "gpio69";
137924254a8eSVeerabhadrarao Badiganti					bias-pull-up;
138024254a8eSVeerabhadrarao Badiganti					drive-strength = <2>;
138124254a8eSVeerabhadrarao Badiganti				};
138224254a8eSVeerabhadrarao Badiganti			};
138324254a8eSVeerabhadrarao Badiganti
138424254a8eSVeerabhadrarao Badiganti			sdc2_off: sdc2-off {
138524254a8eSVeerabhadrarao Badiganti				pinconf-clk {
138624254a8eSVeerabhadrarao Badiganti					pins = "sdc2_clk";
138724254a8eSVeerabhadrarao Badiganti					bias-disable;
138824254a8eSVeerabhadrarao Badiganti					drive-strength = <2>;
138924254a8eSVeerabhadrarao Badiganti				};
139024254a8eSVeerabhadrarao Badiganti
139124254a8eSVeerabhadrarao Badiganti				pinconf-cmd {
139224254a8eSVeerabhadrarao Badiganti					pins = "sdc2_cmd";
139324254a8eSVeerabhadrarao Badiganti					bias-pull-up;
139424254a8eSVeerabhadrarao Badiganti					drive-strength = <2>;
139524254a8eSVeerabhadrarao Badiganti				};
139624254a8eSVeerabhadrarao Badiganti
139724254a8eSVeerabhadrarao Badiganti				pinconf-data {
139824254a8eSVeerabhadrarao Badiganti					pins = "sdc2_data";
139924254a8eSVeerabhadrarao Badiganti					bias-pull-up;
140024254a8eSVeerabhadrarao Badiganti					drive-strength = <2>;
140124254a8eSVeerabhadrarao Badiganti				};
140224254a8eSVeerabhadrarao Badiganti
140324254a8eSVeerabhadrarao Badiganti				pinconf-sd-cd {
140424254a8eSVeerabhadrarao Badiganti					pins = "gpio69";
140524254a8eSVeerabhadrarao Badiganti					bias-disable;
140624254a8eSVeerabhadrarao Badiganti					drive-strength = <2>;
140724254a8eSVeerabhadrarao Badiganti				};
140824254a8eSVeerabhadrarao Badiganti			};
140924254a8eSVeerabhadrarao Badiganti		};
141024254a8eSVeerabhadrarao Badiganti
1411*39f3d3bbSSharat Masetty		gpu: gpu@5000000 {
1412*39f3d3bbSSharat Masetty			compatible = "qcom,adreno-618.0", "qcom,adreno";
1413*39f3d3bbSSharat Masetty			#stream-id-cells = <16>;
1414*39f3d3bbSSharat Masetty			reg = <0 0x05000000 0 0x40000>, <0 0x0509e000 0 0x1000>,
1415*39f3d3bbSSharat Masetty				<0 0x05061000 0 0x800>;
1416*39f3d3bbSSharat Masetty			reg-names = "kgsl_3d0_reg_memory", "cx_mem", "cx_dbgc";
1417*39f3d3bbSSharat Masetty			interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>;
1418*39f3d3bbSSharat Masetty			iommus = <&adreno_smmu 0>;
1419*39f3d3bbSSharat Masetty			operating-points-v2 = <&gpu_opp_table>;
1420*39f3d3bbSSharat Masetty			qcom,gmu = <&gmu>;
1421*39f3d3bbSSharat Masetty
1422*39f3d3bbSSharat Masetty			gpu_opp_table: opp-table {
1423*39f3d3bbSSharat Masetty				compatible = "operating-points-v2";
1424*39f3d3bbSSharat Masetty
1425*39f3d3bbSSharat Masetty				opp-800000000 {
1426*39f3d3bbSSharat Masetty					opp-hz = /bits/ 64 <800000000>;
1427*39f3d3bbSSharat Masetty					opp-level = <RPMH_REGULATOR_LEVEL_TURBO>;
1428*39f3d3bbSSharat Masetty				};
1429*39f3d3bbSSharat Masetty
1430*39f3d3bbSSharat Masetty				opp-650000000 {
1431*39f3d3bbSSharat Masetty					opp-hz = /bits/ 64 <650000000>;
1432*39f3d3bbSSharat Masetty					opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
1433*39f3d3bbSSharat Masetty				};
1434*39f3d3bbSSharat Masetty
1435*39f3d3bbSSharat Masetty				opp-565000000 {
1436*39f3d3bbSSharat Masetty					opp-hz = /bits/ 64 <565000000>;
1437*39f3d3bbSSharat Masetty					opp-level = <RPMH_REGULATOR_LEVEL_NOM>;
1438*39f3d3bbSSharat Masetty				};
1439*39f3d3bbSSharat Masetty
1440*39f3d3bbSSharat Masetty				opp-430000000 {
1441*39f3d3bbSSharat Masetty					opp-hz = /bits/ 64 <430000000>;
1442*39f3d3bbSSharat Masetty					opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
1443*39f3d3bbSSharat Masetty				};
1444*39f3d3bbSSharat Masetty
1445*39f3d3bbSSharat Masetty				opp-355000000 {
1446*39f3d3bbSSharat Masetty					opp-hz = /bits/ 64 <355000000>;
1447*39f3d3bbSSharat Masetty					opp-level = <RPMH_REGULATOR_LEVEL_SVS>;
1448*39f3d3bbSSharat Masetty				};
1449*39f3d3bbSSharat Masetty
1450*39f3d3bbSSharat Masetty				opp-267000000 {
1451*39f3d3bbSSharat Masetty					opp-hz = /bits/ 64 <267000000>;
1452*39f3d3bbSSharat Masetty					opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
1453*39f3d3bbSSharat Masetty				};
1454*39f3d3bbSSharat Masetty
1455*39f3d3bbSSharat Masetty				opp-180000000 {
1456*39f3d3bbSSharat Masetty					opp-hz = /bits/ 64 <180000000>;
1457*39f3d3bbSSharat Masetty					opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>;
1458*39f3d3bbSSharat Masetty				};
1459*39f3d3bbSSharat Masetty			};
1460*39f3d3bbSSharat Masetty		};
1461*39f3d3bbSSharat Masetty
1462*39f3d3bbSSharat Masetty		adreno_smmu: iommu@5040000 {
1463*39f3d3bbSSharat Masetty			compatible = "qcom,sc7180-smmu-v2", "qcom,smmu-v2";
1464*39f3d3bbSSharat Masetty			reg = <0 0x05040000 0 0x10000>;
1465*39f3d3bbSSharat Masetty			#iommu-cells = <1>;
1466*39f3d3bbSSharat Masetty			#global-interrupts = <2>;
1467*39f3d3bbSSharat Masetty			interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>,
1468*39f3d3bbSSharat Masetty					<GIC_SPI 231 IRQ_TYPE_LEVEL_HIGH>,
1469*39f3d3bbSSharat Masetty					<GIC_SPI 364 IRQ_TYPE_EDGE_RISING>,
1470*39f3d3bbSSharat Masetty					<GIC_SPI 365 IRQ_TYPE_EDGE_RISING>,
1471*39f3d3bbSSharat Masetty					<GIC_SPI 366 IRQ_TYPE_EDGE_RISING>,
1472*39f3d3bbSSharat Masetty					<GIC_SPI 367 IRQ_TYPE_EDGE_RISING>,
1473*39f3d3bbSSharat Masetty					<GIC_SPI 368 IRQ_TYPE_EDGE_RISING>,
1474*39f3d3bbSSharat Masetty					<GIC_SPI 369 IRQ_TYPE_EDGE_RISING>,
1475*39f3d3bbSSharat Masetty					<GIC_SPI 370 IRQ_TYPE_EDGE_RISING>,
1476*39f3d3bbSSharat Masetty					<GIC_SPI 371 IRQ_TYPE_EDGE_RISING>;
1477*39f3d3bbSSharat Masetty
1478*39f3d3bbSSharat Masetty			clocks = <&gcc GCC_GPU_MEMNOC_GFX_CLK>,
1479*39f3d3bbSSharat Masetty				<&gcc GCC_GPU_CFG_AHB_CLK>;
1480*39f3d3bbSSharat Masetty			clock-names = "bus", "iface";
1481*39f3d3bbSSharat Masetty
1482*39f3d3bbSSharat Masetty			power-domains = <&gpucc CX_GDSC>;
1483*39f3d3bbSSharat Masetty		};
1484*39f3d3bbSSharat Masetty
1485*39f3d3bbSSharat Masetty		gmu: gmu@506a000 {
1486*39f3d3bbSSharat Masetty			compatible="qcom,adreno-gmu-618.0", "qcom,adreno-gmu";
1487*39f3d3bbSSharat Masetty			reg = <0 0x0506a000 0 0x31000>, <0 0x0b290000 0 0x10000>,
1488*39f3d3bbSSharat Masetty				<0 0x0b490000 0 0x10000>;
1489*39f3d3bbSSharat Masetty			reg-names = "gmu", "gmu_pdc", "gmu_pdc_seq";
1490*39f3d3bbSSharat Masetty			interrupts = <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
1491*39f3d3bbSSharat Masetty				   <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
1492*39f3d3bbSSharat Masetty			interrupt-names = "hfi", "gmu";
1493*39f3d3bbSSharat Masetty			clocks = <&gpucc GPU_CC_CX_GMU_CLK>,
1494*39f3d3bbSSharat Masetty			       <&gpucc GPU_CC_CXO_CLK>,
1495*39f3d3bbSSharat Masetty			       <&gcc GCC_DDRSS_GPU_AXI_CLK>,
1496*39f3d3bbSSharat Masetty			       <&gcc GCC_GPU_MEMNOC_GFX_CLK>;
1497*39f3d3bbSSharat Masetty			clock-names = "gmu", "cxo", "axi", "memnoc";
1498*39f3d3bbSSharat Masetty			power-domains = <&gpucc CX_GDSC>, <&gpucc GX_GDSC>;
1499*39f3d3bbSSharat Masetty			power-domain-names = "cx", "gx";
1500*39f3d3bbSSharat Masetty			iommus = <&adreno_smmu 5>;
1501*39f3d3bbSSharat Masetty			operating-points-v2 = <&gmu_opp_table>;
1502*39f3d3bbSSharat Masetty
1503*39f3d3bbSSharat Masetty			gmu_opp_table: opp-table {
1504*39f3d3bbSSharat Masetty				compatible = "operating-points-v2";
1505*39f3d3bbSSharat Masetty
1506*39f3d3bbSSharat Masetty				opp-200000000 {
1507*39f3d3bbSSharat Masetty					opp-hz = /bits/ 64 <200000000>;
1508*39f3d3bbSSharat Masetty					opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>;
1509*39f3d3bbSSharat Masetty				};
1510*39f3d3bbSSharat Masetty			};
1511*39f3d3bbSSharat Masetty		};
1512*39f3d3bbSSharat Masetty
1513a0e5aea1SDouglas Anderson		gpucc: clock-controller@5090000 {
1514a0e5aea1SDouglas Anderson			compatible = "qcom,sc7180-gpucc";
1515a0e5aea1SDouglas Anderson			reg = <0 0x05090000 0 0x9000>;
1516a0e5aea1SDouglas Anderson			clocks = <&rpmhcc RPMH_CXO_CLK>,
1517a0e5aea1SDouglas Anderson				 <&gcc GCC_GPU_GPLL0_CLK_SRC>,
1518a0e5aea1SDouglas Anderson				 <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>;
1519a0e5aea1SDouglas Anderson			clock-names = "bi_tcxo",
1520a0e5aea1SDouglas Anderson				      "gcc_gpu_gpll0_clk_src",
1521a0e5aea1SDouglas Anderson				      "gcc_gpu_gpll0_div_clk_src";
1522a0e5aea1SDouglas Anderson			#clock-cells = <1>;
1523a0e5aea1SDouglas Anderson			#reset-cells = <1>;
1524a0e5aea1SDouglas Anderson			#power-domain-cells = <1>;
1525a0e5aea1SDouglas Anderson		};
1526a0e5aea1SDouglas Anderson
152795c31e68SSai Prakash Ranjan		stm@6002000 {
152895c31e68SSai Prakash Ranjan			compatible = "arm,coresight-stm", "arm,primecell";
152995c31e68SSai Prakash Ranjan			reg = <0 0x06002000 0 0x1000>,
153095c31e68SSai Prakash Ranjan			      <0 0x16280000 0 0x180000>;
153195c31e68SSai Prakash Ranjan			reg-names = "stm-base", "stm-stimulus-base";
153295c31e68SSai Prakash Ranjan
153395c31e68SSai Prakash Ranjan			clocks = <&aoss_qmp>;
153495c31e68SSai Prakash Ranjan			clock-names = "apb_pclk";
153595c31e68SSai Prakash Ranjan
153695c31e68SSai Prakash Ranjan			out-ports {
153795c31e68SSai Prakash Ranjan				port {
153895c31e68SSai Prakash Ranjan					stm_out: endpoint {
153995c31e68SSai Prakash Ranjan						remote-endpoint = <&funnel0_in7>;
154095c31e68SSai Prakash Ranjan					};
154195c31e68SSai Prakash Ranjan				};
154295c31e68SSai Prakash Ranjan			};
154395c31e68SSai Prakash Ranjan		};
154495c31e68SSai Prakash Ranjan
154595c31e68SSai Prakash Ranjan		funnel@6041000 {
154695c31e68SSai Prakash Ranjan			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
154795c31e68SSai Prakash Ranjan			reg = <0 0x06041000 0 0x1000>;
154895c31e68SSai Prakash Ranjan
154995c31e68SSai Prakash Ranjan			clocks = <&aoss_qmp>;
155095c31e68SSai Prakash Ranjan			clock-names = "apb_pclk";
155195c31e68SSai Prakash Ranjan
155295c31e68SSai Prakash Ranjan			out-ports {
155395c31e68SSai Prakash Ranjan				port {
155495c31e68SSai Prakash Ranjan					funnel0_out: endpoint {
155595c31e68SSai Prakash Ranjan						remote-endpoint = <&merge_funnel_in0>;
155695c31e68SSai Prakash Ranjan					};
155795c31e68SSai Prakash Ranjan				};
155895c31e68SSai Prakash Ranjan			};
155995c31e68SSai Prakash Ranjan
156095c31e68SSai Prakash Ranjan			in-ports {
156195c31e68SSai Prakash Ranjan				#address-cells = <1>;
156295c31e68SSai Prakash Ranjan				#size-cells = <0>;
156395c31e68SSai Prakash Ranjan
156495c31e68SSai Prakash Ranjan				port@7 {
156595c31e68SSai Prakash Ranjan					reg = <7>;
156695c31e68SSai Prakash Ranjan					funnel0_in7: endpoint {
156795c31e68SSai Prakash Ranjan						remote-endpoint = <&stm_out>;
156895c31e68SSai Prakash Ranjan					};
156995c31e68SSai Prakash Ranjan				};
157095c31e68SSai Prakash Ranjan			};
157195c31e68SSai Prakash Ranjan		};
157295c31e68SSai Prakash Ranjan
157395c31e68SSai Prakash Ranjan		funnel@6042000 {
157495c31e68SSai Prakash Ranjan			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
157595c31e68SSai Prakash Ranjan			reg = <0 0x06042000 0 0x1000>;
157695c31e68SSai Prakash Ranjan
157795c31e68SSai Prakash Ranjan			clocks = <&aoss_qmp>;
157895c31e68SSai Prakash Ranjan			clock-names = "apb_pclk";
157995c31e68SSai Prakash Ranjan
158095c31e68SSai Prakash Ranjan			out-ports {
158195c31e68SSai Prakash Ranjan				port {
158295c31e68SSai Prakash Ranjan					funnel1_out: endpoint {
158395c31e68SSai Prakash Ranjan						remote-endpoint = <&merge_funnel_in1>;
158495c31e68SSai Prakash Ranjan					};
158595c31e68SSai Prakash Ranjan				};
158695c31e68SSai Prakash Ranjan			};
158795c31e68SSai Prakash Ranjan
158895c31e68SSai Prakash Ranjan			in-ports {
158995c31e68SSai Prakash Ranjan				#address-cells = <1>;
159095c31e68SSai Prakash Ranjan				#size-cells = <0>;
159195c31e68SSai Prakash Ranjan
159295c31e68SSai Prakash Ranjan				port@4 {
159395c31e68SSai Prakash Ranjan					reg = <4>;
159495c31e68SSai Prakash Ranjan					funnel1_in4: endpoint {
159595c31e68SSai Prakash Ranjan						remote-endpoint = <&apss_merge_funnel_out>;
159695c31e68SSai Prakash Ranjan					};
159795c31e68SSai Prakash Ranjan				};
159895c31e68SSai Prakash Ranjan			};
159995c31e68SSai Prakash Ranjan		};
160095c31e68SSai Prakash Ranjan
160195c31e68SSai Prakash Ranjan		funnel@6045000 {
160295c31e68SSai Prakash Ranjan			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
160395c31e68SSai Prakash Ranjan			reg = <0 0x06045000 0 0x1000>;
160495c31e68SSai Prakash Ranjan
160595c31e68SSai Prakash Ranjan			clocks = <&aoss_qmp>;
160695c31e68SSai Prakash Ranjan			clock-names = "apb_pclk";
160795c31e68SSai Prakash Ranjan
160895c31e68SSai Prakash Ranjan			out-ports {
160995c31e68SSai Prakash Ranjan				port {
161095c31e68SSai Prakash Ranjan					merge_funnel_out: endpoint {
161195c31e68SSai Prakash Ranjan						remote-endpoint = <&swao_funnel_in>;
161295c31e68SSai Prakash Ranjan					};
161395c31e68SSai Prakash Ranjan				};
161495c31e68SSai Prakash Ranjan			};
161595c31e68SSai Prakash Ranjan
161695c31e68SSai Prakash Ranjan			in-ports {
161795c31e68SSai Prakash Ranjan				#address-cells = <1>;
161895c31e68SSai Prakash Ranjan				#size-cells = <0>;
161995c31e68SSai Prakash Ranjan
162095c31e68SSai Prakash Ranjan				port@0 {
162195c31e68SSai Prakash Ranjan					reg = <0>;
162295c31e68SSai Prakash Ranjan					merge_funnel_in0: endpoint {
162395c31e68SSai Prakash Ranjan						remote-endpoint = <&funnel0_out>;
162495c31e68SSai Prakash Ranjan					};
162595c31e68SSai Prakash Ranjan				};
162695c31e68SSai Prakash Ranjan
162795c31e68SSai Prakash Ranjan				port@1 {
162895c31e68SSai Prakash Ranjan					reg = <1>;
162995c31e68SSai Prakash Ranjan					merge_funnel_in1: endpoint {
163095c31e68SSai Prakash Ranjan						remote-endpoint = <&funnel1_out>;
163195c31e68SSai Prakash Ranjan					};
163295c31e68SSai Prakash Ranjan				};
163395c31e68SSai Prakash Ranjan			};
163495c31e68SSai Prakash Ranjan		};
163595c31e68SSai Prakash Ranjan
163695c31e68SSai Prakash Ranjan		replicator@6046000 {
163795c31e68SSai Prakash Ranjan			compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
163895c31e68SSai Prakash Ranjan			reg = <0 0x06046000 0 0x1000>;
163995c31e68SSai Prakash Ranjan
164095c31e68SSai Prakash Ranjan			clocks = <&aoss_qmp>;
164195c31e68SSai Prakash Ranjan			clock-names = "apb_pclk";
164295c31e68SSai Prakash Ranjan
164395c31e68SSai Prakash Ranjan			out-ports {
164495c31e68SSai Prakash Ranjan				port {
164595c31e68SSai Prakash Ranjan					replicator_out: endpoint {
164695c31e68SSai Prakash Ranjan						remote-endpoint = <&etr_in>;
164795c31e68SSai Prakash Ranjan					};
164895c31e68SSai Prakash Ranjan				};
164995c31e68SSai Prakash Ranjan			};
165095c31e68SSai Prakash Ranjan
165195c31e68SSai Prakash Ranjan			in-ports {
165295c31e68SSai Prakash Ranjan				port {
165395c31e68SSai Prakash Ranjan					replicator_in: endpoint {
165495c31e68SSai Prakash Ranjan						remote-endpoint = <&swao_replicator_out>;
165595c31e68SSai Prakash Ranjan					};
165695c31e68SSai Prakash Ranjan				};
165795c31e68SSai Prakash Ranjan			};
165895c31e68SSai Prakash Ranjan		};
165995c31e68SSai Prakash Ranjan
166095c31e68SSai Prakash Ranjan		etr@6048000 {
166195c31e68SSai Prakash Ranjan			compatible = "arm,coresight-tmc", "arm,primecell";
166295c31e68SSai Prakash Ranjan			reg = <0 0x06048000 0 0x1000>;
166395c31e68SSai Prakash Ranjan
166495c31e68SSai Prakash Ranjan			clocks = <&aoss_qmp>;
166595c31e68SSai Prakash Ranjan			clock-names = "apb_pclk";
166695c31e68SSai Prakash Ranjan			arm,scatter-gather;
166795c31e68SSai Prakash Ranjan
166895c31e68SSai Prakash Ranjan			in-ports {
166995c31e68SSai Prakash Ranjan				port {
167095c31e68SSai Prakash Ranjan					etr_in: endpoint {
167195c31e68SSai Prakash Ranjan						remote-endpoint = <&replicator_out>;
167295c31e68SSai Prakash Ranjan					};
167395c31e68SSai Prakash Ranjan				};
167495c31e68SSai Prakash Ranjan			};
167595c31e68SSai Prakash Ranjan		};
167695c31e68SSai Prakash Ranjan
167795c31e68SSai Prakash Ranjan		funnel@6b04000 {
167895c31e68SSai Prakash Ranjan			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
167995c31e68SSai Prakash Ranjan			reg = <0 0x06b04000 0 0x1000>;
168095c31e68SSai Prakash Ranjan
168195c31e68SSai Prakash Ranjan			clocks = <&aoss_qmp>;
168295c31e68SSai Prakash Ranjan			clock-names = "apb_pclk";
168395c31e68SSai Prakash Ranjan
168495c31e68SSai Prakash Ranjan			out-ports {
168595c31e68SSai Prakash Ranjan				port {
168695c31e68SSai Prakash Ranjan					swao_funnel_out: endpoint {
168795c31e68SSai Prakash Ranjan						remote-endpoint = <&etf_in>;
168895c31e68SSai Prakash Ranjan					};
168995c31e68SSai Prakash Ranjan				};
169095c31e68SSai Prakash Ranjan			};
169195c31e68SSai Prakash Ranjan
169295c31e68SSai Prakash Ranjan			in-ports {
169395c31e68SSai Prakash Ranjan				#address-cells = <1>;
169495c31e68SSai Prakash Ranjan				#size-cells = <0>;
169595c31e68SSai Prakash Ranjan
169695c31e68SSai Prakash Ranjan				port@7 {
169795c31e68SSai Prakash Ranjan					reg = <7>;
169895c31e68SSai Prakash Ranjan					swao_funnel_in: endpoint {
169995c31e68SSai Prakash Ranjan						remote-endpoint = <&merge_funnel_out>;
170095c31e68SSai Prakash Ranjan					};
170195c31e68SSai Prakash Ranjan				};
170295c31e68SSai Prakash Ranjan			};
170395c31e68SSai Prakash Ranjan		};
170495c31e68SSai Prakash Ranjan
170595c31e68SSai Prakash Ranjan		etf@6b05000 {
170695c31e68SSai Prakash Ranjan			compatible = "arm,coresight-tmc", "arm,primecell";
170795c31e68SSai Prakash Ranjan			reg = <0 0x06b05000 0 0x1000>;
170895c31e68SSai Prakash Ranjan
170995c31e68SSai Prakash Ranjan			clocks = <&aoss_qmp>;
171095c31e68SSai Prakash Ranjan			clock-names = "apb_pclk";
171195c31e68SSai Prakash Ranjan
171295c31e68SSai Prakash Ranjan			out-ports {
171395c31e68SSai Prakash Ranjan				port {
171495c31e68SSai Prakash Ranjan					etf_out: endpoint {
171595c31e68SSai Prakash Ranjan						remote-endpoint = <&swao_replicator_in>;
171695c31e68SSai Prakash Ranjan					};
171795c31e68SSai Prakash Ranjan				};
171895c31e68SSai Prakash Ranjan			};
171995c31e68SSai Prakash Ranjan
172095c31e68SSai Prakash Ranjan			in-ports {
172195c31e68SSai Prakash Ranjan				port {
172295c31e68SSai Prakash Ranjan					etf_in: endpoint {
172395c31e68SSai Prakash Ranjan						remote-endpoint = <&swao_funnel_out>;
172495c31e68SSai Prakash Ranjan					};
172595c31e68SSai Prakash Ranjan				};
172695c31e68SSai Prakash Ranjan			};
172795c31e68SSai Prakash Ranjan		};
172895c31e68SSai Prakash Ranjan
172995c31e68SSai Prakash Ranjan		replicator@6b06000 {
173095c31e68SSai Prakash Ranjan			compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
173195c31e68SSai Prakash Ranjan			reg = <0 0x06b06000 0 0x1000>;
173295c31e68SSai Prakash Ranjan
173395c31e68SSai Prakash Ranjan			clocks = <&aoss_qmp>;
173495c31e68SSai Prakash Ranjan			clock-names = "apb_pclk";
17350f1decaaSSai Prakash Ranjan			arm,coresight-loses-context-with-cpu;
173695c31e68SSai Prakash Ranjan
173795c31e68SSai Prakash Ranjan			out-ports {
173895c31e68SSai Prakash Ranjan				port {
173995c31e68SSai Prakash Ranjan					swao_replicator_out: endpoint {
174095c31e68SSai Prakash Ranjan						remote-endpoint = <&replicator_in>;
174195c31e68SSai Prakash Ranjan					};
174295c31e68SSai Prakash Ranjan				};
174395c31e68SSai Prakash Ranjan			};
174495c31e68SSai Prakash Ranjan
174595c31e68SSai Prakash Ranjan			in-ports {
174695c31e68SSai Prakash Ranjan				port {
174795c31e68SSai Prakash Ranjan					swao_replicator_in: endpoint {
174895c31e68SSai Prakash Ranjan						remote-endpoint = <&etf_out>;
174995c31e68SSai Prakash Ranjan					};
175095c31e68SSai Prakash Ranjan				};
175195c31e68SSai Prakash Ranjan			};
175295c31e68SSai Prakash Ranjan		};
175395c31e68SSai Prakash Ranjan
175495c31e68SSai Prakash Ranjan		etm@7040000 {
175595c31e68SSai Prakash Ranjan			compatible = "arm,coresight-etm4x", "arm,primecell";
175695c31e68SSai Prakash Ranjan			reg = <0 0x07040000 0 0x1000>;
175795c31e68SSai Prakash Ranjan
175895c31e68SSai Prakash Ranjan			cpu = <&CPU0>;
175995c31e68SSai Prakash Ranjan
176095c31e68SSai Prakash Ranjan			clocks = <&aoss_qmp>;
176195c31e68SSai Prakash Ranjan			clock-names = "apb_pclk";
17620f1decaaSSai Prakash Ranjan			arm,coresight-loses-context-with-cpu;
176395c31e68SSai Prakash Ranjan
176495c31e68SSai Prakash Ranjan			out-ports {
176595c31e68SSai Prakash Ranjan				port {
176695c31e68SSai Prakash Ranjan					etm0_out: endpoint {
176795c31e68SSai Prakash Ranjan						remote-endpoint = <&apss_funnel_in0>;
176895c31e68SSai Prakash Ranjan					};
176995c31e68SSai Prakash Ranjan				};
177095c31e68SSai Prakash Ranjan			};
177195c31e68SSai Prakash Ranjan		};
177295c31e68SSai Prakash Ranjan
177395c31e68SSai Prakash Ranjan		etm@7140000 {
177495c31e68SSai Prakash Ranjan			compatible = "arm,coresight-etm4x", "arm,primecell";
177595c31e68SSai Prakash Ranjan			reg = <0 0x07140000 0 0x1000>;
177695c31e68SSai Prakash Ranjan
177795c31e68SSai Prakash Ranjan			cpu = <&CPU1>;
177895c31e68SSai Prakash Ranjan
177995c31e68SSai Prakash Ranjan			clocks = <&aoss_qmp>;
178095c31e68SSai Prakash Ranjan			clock-names = "apb_pclk";
17810f1decaaSSai Prakash Ranjan			arm,coresight-loses-context-with-cpu;
178295c31e68SSai Prakash Ranjan
178395c31e68SSai Prakash Ranjan			out-ports {
178495c31e68SSai Prakash Ranjan				port {
178595c31e68SSai Prakash Ranjan					etm1_out: endpoint {
178695c31e68SSai Prakash Ranjan						remote-endpoint = <&apss_funnel_in1>;
178795c31e68SSai Prakash Ranjan					};
178895c31e68SSai Prakash Ranjan				};
178995c31e68SSai Prakash Ranjan			};
179095c31e68SSai Prakash Ranjan		};
179195c31e68SSai Prakash Ranjan
179295c31e68SSai Prakash Ranjan		etm@7240000 {
179395c31e68SSai Prakash Ranjan			compatible = "arm,coresight-etm4x", "arm,primecell";
179495c31e68SSai Prakash Ranjan			reg = <0 0x07240000 0 0x1000>;
179595c31e68SSai Prakash Ranjan
179695c31e68SSai Prakash Ranjan			cpu = <&CPU2>;
179795c31e68SSai Prakash Ranjan
179895c31e68SSai Prakash Ranjan			clocks = <&aoss_qmp>;
179995c31e68SSai Prakash Ranjan			clock-names = "apb_pclk";
18000f1decaaSSai Prakash Ranjan			arm,coresight-loses-context-with-cpu;
180195c31e68SSai Prakash Ranjan
180295c31e68SSai Prakash Ranjan			out-ports {
180395c31e68SSai Prakash Ranjan				port {
180495c31e68SSai Prakash Ranjan					etm2_out: endpoint {
180595c31e68SSai Prakash Ranjan						remote-endpoint = <&apss_funnel_in2>;
180695c31e68SSai Prakash Ranjan					};
180795c31e68SSai Prakash Ranjan				};
180895c31e68SSai Prakash Ranjan			};
180995c31e68SSai Prakash Ranjan		};
181095c31e68SSai Prakash Ranjan
181195c31e68SSai Prakash Ranjan		etm@7340000 {
181295c31e68SSai Prakash Ranjan			compatible = "arm,coresight-etm4x", "arm,primecell";
181395c31e68SSai Prakash Ranjan			reg = <0 0x07340000 0 0x1000>;
181495c31e68SSai Prakash Ranjan
181595c31e68SSai Prakash Ranjan			cpu = <&CPU3>;
181695c31e68SSai Prakash Ranjan
181795c31e68SSai Prakash Ranjan			clocks = <&aoss_qmp>;
181895c31e68SSai Prakash Ranjan			clock-names = "apb_pclk";
18190f1decaaSSai Prakash Ranjan			arm,coresight-loses-context-with-cpu;
182095c31e68SSai Prakash Ranjan
182195c31e68SSai Prakash Ranjan			out-ports {
182295c31e68SSai Prakash Ranjan				port {
182395c31e68SSai Prakash Ranjan					etm3_out: endpoint {
182495c31e68SSai Prakash Ranjan						remote-endpoint = <&apss_funnel_in3>;
182595c31e68SSai Prakash Ranjan					};
182695c31e68SSai Prakash Ranjan				};
182795c31e68SSai Prakash Ranjan			};
182895c31e68SSai Prakash Ranjan		};
182995c31e68SSai Prakash Ranjan
183095c31e68SSai Prakash Ranjan		etm@7440000 {
183195c31e68SSai Prakash Ranjan			compatible = "arm,coresight-etm4x", "arm,primecell";
183295c31e68SSai Prakash Ranjan			reg = <0 0x07440000 0 0x1000>;
183395c31e68SSai Prakash Ranjan
183495c31e68SSai Prakash Ranjan			cpu = <&CPU4>;
183595c31e68SSai Prakash Ranjan
183695c31e68SSai Prakash Ranjan			clocks = <&aoss_qmp>;
183795c31e68SSai Prakash Ranjan			clock-names = "apb_pclk";
18380f1decaaSSai Prakash Ranjan			arm,coresight-loses-context-with-cpu;
183995c31e68SSai Prakash Ranjan
184095c31e68SSai Prakash Ranjan			out-ports {
184195c31e68SSai Prakash Ranjan				port {
184295c31e68SSai Prakash Ranjan					etm4_out: endpoint {
184395c31e68SSai Prakash Ranjan						remote-endpoint = <&apss_funnel_in4>;
184495c31e68SSai Prakash Ranjan					};
184595c31e68SSai Prakash Ranjan				};
184695c31e68SSai Prakash Ranjan			};
184795c31e68SSai Prakash Ranjan		};
184895c31e68SSai Prakash Ranjan
184995c31e68SSai Prakash Ranjan		etm@7540000 {
185095c31e68SSai Prakash Ranjan			compatible = "arm,coresight-etm4x", "arm,primecell";
185195c31e68SSai Prakash Ranjan			reg = <0 0x07540000 0 0x1000>;
185295c31e68SSai Prakash Ranjan
185395c31e68SSai Prakash Ranjan			cpu = <&CPU5>;
185495c31e68SSai Prakash Ranjan
185595c31e68SSai Prakash Ranjan			clocks = <&aoss_qmp>;
185695c31e68SSai Prakash Ranjan			clock-names = "apb_pclk";
18570f1decaaSSai Prakash Ranjan			arm,coresight-loses-context-with-cpu;
185895c31e68SSai Prakash Ranjan
185995c31e68SSai Prakash Ranjan			out-ports {
186095c31e68SSai Prakash Ranjan				port {
186195c31e68SSai Prakash Ranjan					etm5_out: endpoint {
186295c31e68SSai Prakash Ranjan						remote-endpoint = <&apss_funnel_in5>;
186395c31e68SSai Prakash Ranjan					};
186495c31e68SSai Prakash Ranjan				};
186595c31e68SSai Prakash Ranjan			};
186695c31e68SSai Prakash Ranjan		};
186795c31e68SSai Prakash Ranjan
186895c31e68SSai Prakash Ranjan		etm@7640000 {
186995c31e68SSai Prakash Ranjan			compatible = "arm,coresight-etm4x", "arm,primecell";
187095c31e68SSai Prakash Ranjan			reg = <0 0x07640000 0 0x1000>;
187195c31e68SSai Prakash Ranjan
187295c31e68SSai Prakash Ranjan			cpu = <&CPU6>;
187395c31e68SSai Prakash Ranjan
187495c31e68SSai Prakash Ranjan			clocks = <&aoss_qmp>;
187595c31e68SSai Prakash Ranjan			clock-names = "apb_pclk";
18760f1decaaSSai Prakash Ranjan			arm,coresight-loses-context-with-cpu;
187795c31e68SSai Prakash Ranjan
187895c31e68SSai Prakash Ranjan			out-ports {
187995c31e68SSai Prakash Ranjan				port {
188095c31e68SSai Prakash Ranjan					etm6_out: endpoint {
188195c31e68SSai Prakash Ranjan						remote-endpoint = <&apss_funnel_in6>;
188295c31e68SSai Prakash Ranjan					};
188395c31e68SSai Prakash Ranjan				};
188495c31e68SSai Prakash Ranjan			};
188595c31e68SSai Prakash Ranjan		};
188695c31e68SSai Prakash Ranjan
188795c31e68SSai Prakash Ranjan		etm@7740000 {
188895c31e68SSai Prakash Ranjan			compatible = "arm,coresight-etm4x", "arm,primecell";
188995c31e68SSai Prakash Ranjan			reg = <0 0x07740000 0 0x1000>;
189095c31e68SSai Prakash Ranjan
189195c31e68SSai Prakash Ranjan			cpu = <&CPU7>;
189295c31e68SSai Prakash Ranjan
189395c31e68SSai Prakash Ranjan			clocks = <&aoss_qmp>;
189495c31e68SSai Prakash Ranjan			clock-names = "apb_pclk";
189595c31e68SSai Prakash Ranjan
189695c31e68SSai Prakash Ranjan			out-ports {
189795c31e68SSai Prakash Ranjan				port {
189895c31e68SSai Prakash Ranjan					etm7_out: endpoint {
189995c31e68SSai Prakash Ranjan						remote-endpoint = <&apss_funnel_in7>;
190095c31e68SSai Prakash Ranjan					};
190195c31e68SSai Prakash Ranjan				};
190295c31e68SSai Prakash Ranjan			};
190395c31e68SSai Prakash Ranjan		};
190495c31e68SSai Prakash Ranjan
190595c31e68SSai Prakash Ranjan		funnel@7800000 { /* APSS Funnel */
190695c31e68SSai Prakash Ranjan			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
190795c31e68SSai Prakash Ranjan			reg = <0 0x07800000 0 0x1000>;
190895c31e68SSai Prakash Ranjan
190995c31e68SSai Prakash Ranjan			clocks = <&aoss_qmp>;
191095c31e68SSai Prakash Ranjan			clock-names = "apb_pclk";
191195c31e68SSai Prakash Ranjan
191295c31e68SSai Prakash Ranjan			out-ports {
191395c31e68SSai Prakash Ranjan				port {
191495c31e68SSai Prakash Ranjan					apss_funnel_out: endpoint {
191595c31e68SSai Prakash Ranjan						remote-endpoint = <&apss_merge_funnel_in>;
191695c31e68SSai Prakash Ranjan					};
191795c31e68SSai Prakash Ranjan				};
191895c31e68SSai Prakash Ranjan			};
191995c31e68SSai Prakash Ranjan
192095c31e68SSai Prakash Ranjan			in-ports {
192195c31e68SSai Prakash Ranjan				#address-cells = <1>;
192295c31e68SSai Prakash Ranjan				#size-cells = <0>;
192395c31e68SSai Prakash Ranjan
192495c31e68SSai Prakash Ranjan				port@0 {
192595c31e68SSai Prakash Ranjan					reg = <0>;
192695c31e68SSai Prakash Ranjan					apss_funnel_in0: endpoint {
192795c31e68SSai Prakash Ranjan						remote-endpoint = <&etm0_out>;
192895c31e68SSai Prakash Ranjan					};
192995c31e68SSai Prakash Ranjan				};
193095c31e68SSai Prakash Ranjan
193195c31e68SSai Prakash Ranjan				port@1 {
193295c31e68SSai Prakash Ranjan					reg = <1>;
193395c31e68SSai Prakash Ranjan					apss_funnel_in1: endpoint {
193495c31e68SSai Prakash Ranjan						remote-endpoint = <&etm1_out>;
193595c31e68SSai Prakash Ranjan					};
193695c31e68SSai Prakash Ranjan				};
193795c31e68SSai Prakash Ranjan
193895c31e68SSai Prakash Ranjan				port@2 {
193995c31e68SSai Prakash Ranjan					reg = <2>;
194095c31e68SSai Prakash Ranjan					apss_funnel_in2: endpoint {
194195c31e68SSai Prakash Ranjan						remote-endpoint = <&etm2_out>;
194295c31e68SSai Prakash Ranjan					};
194395c31e68SSai Prakash Ranjan				};
194495c31e68SSai Prakash Ranjan
194595c31e68SSai Prakash Ranjan				port@3 {
194695c31e68SSai Prakash Ranjan					reg = <3>;
194795c31e68SSai Prakash Ranjan					apss_funnel_in3: endpoint {
194895c31e68SSai Prakash Ranjan						remote-endpoint = <&etm3_out>;
194995c31e68SSai Prakash Ranjan					};
195095c31e68SSai Prakash Ranjan				};
195195c31e68SSai Prakash Ranjan
195295c31e68SSai Prakash Ranjan				port@4 {
195395c31e68SSai Prakash Ranjan					reg = <4>;
195495c31e68SSai Prakash Ranjan					apss_funnel_in4: endpoint {
195595c31e68SSai Prakash Ranjan						remote-endpoint = <&etm4_out>;
195695c31e68SSai Prakash Ranjan					};
195795c31e68SSai Prakash Ranjan				};
195895c31e68SSai Prakash Ranjan
195995c31e68SSai Prakash Ranjan				port@5 {
196095c31e68SSai Prakash Ranjan					reg = <5>;
196195c31e68SSai Prakash Ranjan					apss_funnel_in5: endpoint {
196295c31e68SSai Prakash Ranjan						remote-endpoint = <&etm5_out>;
196395c31e68SSai Prakash Ranjan					};
196495c31e68SSai Prakash Ranjan				};
196595c31e68SSai Prakash Ranjan
196695c31e68SSai Prakash Ranjan				port@6 {
196795c31e68SSai Prakash Ranjan					reg = <6>;
196895c31e68SSai Prakash Ranjan					apss_funnel_in6: endpoint {
196995c31e68SSai Prakash Ranjan						remote-endpoint = <&etm6_out>;
197095c31e68SSai Prakash Ranjan					};
197195c31e68SSai Prakash Ranjan				};
197295c31e68SSai Prakash Ranjan
197395c31e68SSai Prakash Ranjan				port@7 {
197495c31e68SSai Prakash Ranjan					reg = <7>;
197595c31e68SSai Prakash Ranjan					apss_funnel_in7: endpoint {
197695c31e68SSai Prakash Ranjan						remote-endpoint = <&etm7_out>;
197795c31e68SSai Prakash Ranjan					};
197895c31e68SSai Prakash Ranjan				};
197995c31e68SSai Prakash Ranjan			};
198095c31e68SSai Prakash Ranjan		};
198195c31e68SSai Prakash Ranjan
198295c31e68SSai Prakash Ranjan		funnel@7810000 {
198395c31e68SSai Prakash Ranjan			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
198495c31e68SSai Prakash Ranjan			reg = <0 0x07810000 0 0x1000>;
198595c31e68SSai Prakash Ranjan
198695c31e68SSai Prakash Ranjan			clocks = <&aoss_qmp>;
198795c31e68SSai Prakash Ranjan			clock-names = "apb_pclk";
198895c31e68SSai Prakash Ranjan
198995c31e68SSai Prakash Ranjan			out-ports {
199095c31e68SSai Prakash Ranjan				port {
199195c31e68SSai Prakash Ranjan					apss_merge_funnel_out: endpoint {
199295c31e68SSai Prakash Ranjan						remote-endpoint = <&funnel1_in4>;
199395c31e68SSai Prakash Ranjan					};
199495c31e68SSai Prakash Ranjan				};
199595c31e68SSai Prakash Ranjan			};
199695c31e68SSai Prakash Ranjan
199795c31e68SSai Prakash Ranjan			in-ports {
199895c31e68SSai Prakash Ranjan				port {
199995c31e68SSai Prakash Ranjan					apss_merge_funnel_in: endpoint {
200095c31e68SSai Prakash Ranjan						remote-endpoint = <&apss_funnel_out>;
200195c31e68SSai Prakash Ranjan					};
200295c31e68SSai Prakash Ranjan				};
200395c31e68SSai Prakash Ranjan			};
200495c31e68SSai Prakash Ranjan		};
200595c31e68SSai Prakash Ranjan
2006e14a15ebSSibi Sankar		remoteproc_mpss: remoteproc@4080000 {
2007e14a15ebSSibi Sankar			compatible = "qcom,sc7180-mpss-pas";
2008bec71ba2SSibi Sankar			reg = <0 0x04080000 0 0x4040>, <0 0x04180000 0 0x48>;
2009bec71ba2SSibi Sankar			reg-names = "qdsp6", "rmb";
2010e14a15ebSSibi Sankar
2011e14a15ebSSibi Sankar			interrupts-extended = <&intc GIC_SPI 266 IRQ_TYPE_EDGE_RISING>,
2012e14a15ebSSibi Sankar					      <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
2013e14a15ebSSibi Sankar					      <&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
2014e14a15ebSSibi Sankar					      <&modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
2015e14a15ebSSibi Sankar					      <&modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING>,
2016e14a15ebSSibi Sankar					      <&modem_smp2p_in 7 IRQ_TYPE_EDGE_RISING>;
2017e14a15ebSSibi Sankar			interrupt-names = "wdog", "fatal", "ready", "handover",
2018e14a15ebSSibi Sankar					  "stop-ack", "shutdown-ack";
2019e14a15ebSSibi Sankar
2020bec71ba2SSibi Sankar			clocks = <&gcc GCC_MSS_CFG_AHB_CLK>,
2021bec71ba2SSibi Sankar				 <&gcc GCC_MSS_Q6_MEMNOC_AXI_CLK>,
2022bec71ba2SSibi Sankar				 <&gcc GCC_MSS_NAV_AXI_CLK>,
2023bec71ba2SSibi Sankar				 <&gcc GCC_MSS_SNOC_AXI_CLK>,
2024bec71ba2SSibi Sankar				 <&gcc GCC_MSS_MFAB_AXIS_CLK>,
2025bec71ba2SSibi Sankar				 <&rpmhcc RPMH_CXO_CLK>;
2026bec71ba2SSibi Sankar			clock-names = "iface", "bus", "nav", "snoc_axi",
2027bec71ba2SSibi Sankar				      "mnoc_axi", "xo";
2028e14a15ebSSibi Sankar
2029e14a15ebSSibi Sankar			power-domains = <&aoss_qmp AOSS_QMP_LS_MODEM>,
2030e14a15ebSSibi Sankar					<&rpmhpd SC7180_CX>,
2031bec71ba2SSibi Sankar					<&rpmhpd SC7180_MX>,
2032e14a15ebSSibi Sankar					<&rpmhpd SC7180_MSS>;
2033bec71ba2SSibi Sankar			power-domain-names = "load_state", "cx", "mx", "mss";
2034e14a15ebSSibi Sankar
2035e14a15ebSSibi Sankar			memory-region = <&mpss_mem>;
2036e14a15ebSSibi Sankar
2037e14a15ebSSibi Sankar			qcom,smem-states = <&modem_smp2p_out 0>;
2038e14a15ebSSibi Sankar			qcom,smem-state-names = "stop";
2039e14a15ebSSibi Sankar
2040bec71ba2SSibi Sankar			resets = <&aoss_reset AOSS_CC_MSS_RESTART>,
2041bec71ba2SSibi Sankar				 <&pdc_reset PDC_MODEM_SYNC_RESET>;
2042bec71ba2SSibi Sankar			reset-names = "mss_restart", "pdc_reset";
2043bec71ba2SSibi Sankar
2044bec71ba2SSibi Sankar			qcom,halt-regs = <&tcsr_mutex_regs 0x23000 0x25000 0x24000>;
2045bec71ba2SSibi Sankar			qcom,spare-regs = <&tcsr_regs 0xb3e4>;
2046bec71ba2SSibi Sankar
2047e14a15ebSSibi Sankar			status = "disabled";
2048e14a15ebSSibi Sankar
2049e14a15ebSSibi Sankar			glink-edge {
2050e14a15ebSSibi Sankar				interrupts = <GIC_SPI 449 IRQ_TYPE_EDGE_RISING>;
2051e14a15ebSSibi Sankar				label = "modem";
2052e14a15ebSSibi Sankar				qcom,remote-pid = <1>;
2053e14a15ebSSibi Sankar				mboxes = <&apss_shared 12>;
2054e14a15ebSSibi Sankar			};
2055e14a15ebSSibi Sankar		};
2056e14a15ebSSibi Sankar
205724254a8eSVeerabhadrarao Badiganti		sdhc_2: sdhci@8804000 {
205824254a8eSVeerabhadrarao Badiganti			compatible = "qcom,sc7180-sdhci", "qcom,sdhci-msm-v5";
205924254a8eSVeerabhadrarao Badiganti			reg = <0 0x08804000 0 0x1000>;
206024254a8eSVeerabhadrarao Badiganti
206124254a8eSVeerabhadrarao Badiganti			iommus = <&apps_smmu 0x80 0>;
206224254a8eSVeerabhadrarao Badiganti			interrupts = <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
206324254a8eSVeerabhadrarao Badiganti					<GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>;
206424254a8eSVeerabhadrarao Badiganti			interrupt-names = "hc_irq", "pwr_irq";
206524254a8eSVeerabhadrarao Badiganti
206624254a8eSVeerabhadrarao Badiganti			clocks = <&gcc GCC_SDCC2_APPS_CLK>,
206724254a8eSVeerabhadrarao Badiganti					<&gcc GCC_SDCC2_AHB_CLK>;
206824254a8eSVeerabhadrarao Badiganti			clock-names = "core", "iface";
206924254a8eSVeerabhadrarao Badiganti
207024254a8eSVeerabhadrarao Badiganti			bus-width = <4>;
207124254a8eSVeerabhadrarao Badiganti
207224254a8eSVeerabhadrarao Badiganti			status = "disabled";
2073ba3fc649SRoja Rani Yarubandi		};
2074ba3fc649SRoja Rani Yarubandi
2075ba3fc649SRoja Rani Yarubandi		qspi: spi@88dc000 {
2076ba3fc649SRoja Rani Yarubandi			compatible = "qcom,qspi-v1";
2077ba3fc649SRoja Rani Yarubandi			reg = <0 0x088dc000 0 0x600>;
2078ba3fc649SRoja Rani Yarubandi			#address-cells = <1>;
2079ba3fc649SRoja Rani Yarubandi			#size-cells = <0>;
2080ba3fc649SRoja Rani Yarubandi			interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
2081ba3fc649SRoja Rani Yarubandi			clocks = <&gcc GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
2082ba3fc649SRoja Rani Yarubandi				 <&gcc GCC_QSPI_CORE_CLK>;
2083ba3fc649SRoja Rani Yarubandi			clock-names = "iface", "core";
2084ba3fc649SRoja Rani Yarubandi			status = "disabled";
208590db71e4SRajendra Nayak		};
208690db71e4SRajendra Nayak
20870b766e7fSSandeep Maheswaram		usb_1_hsphy: phy@88e3000 {
20880fa007c1SSandeep Maheswaram			compatible = "qcom,sc7180-qusb2-phy", "qcom,qusb2-v2-phy";
20890b766e7fSSandeep Maheswaram			reg = <0 0x088e3000 0 0x400>;
20900b766e7fSSandeep Maheswaram			status = "disabled";
20910b766e7fSSandeep Maheswaram			#phy-cells = <0>;
20920b766e7fSSandeep Maheswaram			clocks = <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
20930b766e7fSSandeep Maheswaram				 <&rpmhcc RPMH_CXO_CLK>;
20940b766e7fSSandeep Maheswaram			clock-names = "cfg_ahb", "ref";
20950b766e7fSSandeep Maheswaram			resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
20960b766e7fSSandeep Maheswaram
20970b766e7fSSandeep Maheswaram			nvmem-cells = <&qusb2p_hstx_trim>;
20980b766e7fSSandeep Maheswaram		};
20990b766e7fSSandeep Maheswaram
2100fd916516SDouglas Anderson		usb_1_qmpphy: phy-wrapper@88e9000 {
21010b766e7fSSandeep Maheswaram			compatible = "qcom,sc7180-qmp-usb3-phy";
21020b766e7fSSandeep Maheswaram			reg = <0 0x088e9000 0 0x18c>,
21030b766e7fSSandeep Maheswaram			      <0 0x088e8000 0 0x38>;
21040b766e7fSSandeep Maheswaram			reg-names = "reg-base", "dp_com";
21050b766e7fSSandeep Maheswaram			status = "disabled";
21060b766e7fSSandeep Maheswaram			#clock-cells = <1>;
21070b766e7fSSandeep Maheswaram			#address-cells = <2>;
21080b766e7fSSandeep Maheswaram			#size-cells = <2>;
21090b766e7fSSandeep Maheswaram			ranges;
21100b766e7fSSandeep Maheswaram
21110b766e7fSSandeep Maheswaram			clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>,
21120b766e7fSSandeep Maheswaram				 <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
21130b766e7fSSandeep Maheswaram				 <&gcc GCC_USB3_PRIM_CLKREF_CLK>,
21140b766e7fSSandeep Maheswaram				 <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>;
21150b766e7fSSandeep Maheswaram			clock-names = "aux", "cfg_ahb", "ref", "com_aux";
21160b766e7fSSandeep Maheswaram
2117129ff51dSSandeep Maheswaram			resets = <&gcc GCC_USB3_PHY_PRIM_BCR>,
2118129ff51dSSandeep Maheswaram				 <&gcc GCC_USB3_DP_PHY_PRIM_BCR>;
21190b766e7fSSandeep Maheswaram			reset-names = "phy", "common";
21200b766e7fSSandeep Maheswaram
2121fd916516SDouglas Anderson			usb_1_ssphy: phy@88e9200 {
21220b766e7fSSandeep Maheswaram				reg = <0 0x088e9200 0 0x128>,
21230b766e7fSSandeep Maheswaram				      <0 0x088e9400 0 0x200>,
21240b766e7fSSandeep Maheswaram				      <0 0x088e9c00 0 0x218>,
21250b766e7fSSandeep Maheswaram				      <0 0x088e9600 0 0x128>,
21260b766e7fSSandeep Maheswaram				      <0 0x088e9800 0 0x200>,
21270b766e7fSSandeep Maheswaram				      <0 0x088e9a00 0 0x18>;
21286e369727SDouglas Anderson				#clock-cells = <0>;
21290b766e7fSSandeep Maheswaram				#phy-cells = <0>;
21300b766e7fSSandeep Maheswaram				clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
21310b766e7fSSandeep Maheswaram				clock-names = "pipe0";
21320b766e7fSSandeep Maheswaram				clock-output-names = "usb3_phy_pipe_clk_src";
21330b766e7fSSandeep Maheswaram			};
21340b766e7fSSandeep Maheswaram		};
21350b766e7fSSandeep Maheswaram
2136b1b24dd7SOdelu Kukatla		dc_noc: interconnect@9160000 {
2137b1b24dd7SOdelu Kukatla			compatible = "qcom,sc7180-dc-noc";
2138b1b24dd7SOdelu Kukatla			reg = <0 0x09160000 0 0x03200>;
2139b1b24dd7SOdelu Kukatla			#interconnect-cells = <1>;
2140b1b24dd7SOdelu Kukatla			qcom,bcm-voters = <&apps_bcm_voter>;
2141b1b24dd7SOdelu Kukatla		};
2142b1b24dd7SOdelu Kukatla
21437cee5c74SMatthias Kaehlcke		system-cache-controller@9200000 {
21447cee5c74SMatthias Kaehlcke			compatible = "qcom,sc7180-llcc";
21457cee5c74SMatthias Kaehlcke			reg = <0 0x09200000 0 0x200000>, <0 0x09600000 0 0x50000>;
21467cee5c74SMatthias Kaehlcke			reg-names = "llcc_base", "llcc_broadcast_base";
21477cee5c74SMatthias Kaehlcke			interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>;
21487cee5c74SMatthias Kaehlcke		};
21497cee5c74SMatthias Kaehlcke
2150b1b24dd7SOdelu Kukatla		gem_noc: interconnect@9680000 {
2151b1b24dd7SOdelu Kukatla			compatible = "qcom,sc7180-gem-noc";
2152b1b24dd7SOdelu Kukatla			reg = <0 0x09680000 0 0x3e200>;
2153b1b24dd7SOdelu Kukatla			#interconnect-cells = <1>;
2154b1b24dd7SOdelu Kukatla			qcom,bcm-voters = <&apps_bcm_voter>;
2155b1b24dd7SOdelu Kukatla		};
2156b1b24dd7SOdelu Kukatla
2157b1b24dd7SOdelu Kukatla		npu_noc: interconnect@9990000 {
2158b1b24dd7SOdelu Kukatla			compatible = "qcom,sc7180-npu-noc";
2159b1b24dd7SOdelu Kukatla			reg = <0 0x09990000 0 0x1600>;
2160b1b24dd7SOdelu Kukatla			#interconnect-cells = <1>;
2161b1b24dd7SOdelu Kukatla			qcom,bcm-voters = <&apps_bcm_voter>;
2162b1b24dd7SOdelu Kukatla		};
2163b1b24dd7SOdelu Kukatla
21640b766e7fSSandeep Maheswaram		usb_1: usb@a6f8800 {
21650b766e7fSSandeep Maheswaram			compatible = "qcom,sc7180-dwc3", "qcom,dwc3";
21660b766e7fSSandeep Maheswaram			reg = <0 0x0a6f8800 0 0x400>;
21670b766e7fSSandeep Maheswaram			status = "disabled";
21680b766e7fSSandeep Maheswaram			#address-cells = <2>;
21690b766e7fSSandeep Maheswaram			#size-cells = <2>;
21700b766e7fSSandeep Maheswaram			ranges;
21710b766e7fSSandeep Maheswaram			dma-ranges;
21720b766e7fSSandeep Maheswaram
21730b766e7fSSandeep Maheswaram			clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>,
21740b766e7fSSandeep Maheswaram				 <&gcc GCC_USB30_PRIM_MASTER_CLK>,
21750b766e7fSSandeep Maheswaram				 <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>,
21760b766e7fSSandeep Maheswaram				 <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
21770b766e7fSSandeep Maheswaram				 <&gcc GCC_USB30_PRIM_SLEEP_CLK>;
21780b766e7fSSandeep Maheswaram			clock-names = "cfg_noc", "core", "iface", "mock_utmi",
21790b766e7fSSandeep Maheswaram				      "sleep";
21800b766e7fSSandeep Maheswaram
21810b766e7fSSandeep Maheswaram			assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
21820b766e7fSSandeep Maheswaram					  <&gcc GCC_USB30_PRIM_MASTER_CLK>;
21830b766e7fSSandeep Maheswaram			assigned-clock-rates = <19200000>, <150000000>;
21840b766e7fSSandeep Maheswaram
21850b766e7fSSandeep Maheswaram			interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
21860b766e7fSSandeep Maheswaram				     <GIC_SPI 486 IRQ_TYPE_LEVEL_HIGH>,
21870b766e7fSSandeep Maheswaram				     <GIC_SPI 488 IRQ_TYPE_LEVEL_HIGH>,
21880b766e7fSSandeep Maheswaram				     <GIC_SPI 489 IRQ_TYPE_LEVEL_HIGH>;
21890b766e7fSSandeep Maheswaram			interrupt-names = "hs_phy_irq", "ss_phy_irq",
21900b766e7fSSandeep Maheswaram					  "dm_hs_phy_irq", "dp_hs_phy_irq";
21910b766e7fSSandeep Maheswaram
21920b766e7fSSandeep Maheswaram			power-domains = <&gcc USB30_PRIM_GDSC>;
21930b766e7fSSandeep Maheswaram
21940b766e7fSSandeep Maheswaram			resets = <&gcc GCC_USB30_PRIM_BCR>;
21950b766e7fSSandeep Maheswaram
21960b766e7fSSandeep Maheswaram			usb_1_dwc3: dwc3@a600000 {
21970b766e7fSSandeep Maheswaram				compatible = "snps,dwc3";
21980b766e7fSSandeep Maheswaram				reg = <0 0x0a600000 0 0xe000>;
21990b766e7fSSandeep Maheswaram				interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
22000b766e7fSSandeep Maheswaram				iommus = <&apps_smmu 0x540 0>;
22010b766e7fSSandeep Maheswaram				snps,dis_u2_susphy_quirk;
22020b766e7fSSandeep Maheswaram				snps,dis_enblslpm_quirk;
22030b766e7fSSandeep Maheswaram				phys = <&usb_1_hsphy>, <&usb_1_ssphy>;
22040b766e7fSSandeep Maheswaram				phy-names = "usb2-phy", "usb3-phy";
22050b766e7fSSandeep Maheswaram			};
22060b766e7fSSandeep Maheswaram		};
22070b766e7fSSandeep Maheswaram
2208058bd0a6SMatthias Kaehlcke		venus: video-codec@aa00000 {
2209058bd0a6SMatthias Kaehlcke			compatible = "qcom,sc7180-venus";
2210058bd0a6SMatthias Kaehlcke			reg = <0 0x0aa00000 0 0xff000>;
2211058bd0a6SMatthias Kaehlcke			interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
2212058bd0a6SMatthias Kaehlcke			power-domains = <&videocc VENUS_GDSC>,
2213058bd0a6SMatthias Kaehlcke					<&videocc VCODEC0_GDSC>;
2214058bd0a6SMatthias Kaehlcke			power-domain-names = "venus", "vcodec0";
2215058bd0a6SMatthias Kaehlcke			clocks = <&videocc VIDEO_CC_VENUS_CTL_CORE_CLK>,
2216058bd0a6SMatthias Kaehlcke				 <&videocc VIDEO_CC_VENUS_AHB_CLK>,
2217058bd0a6SMatthias Kaehlcke				 <&videocc VIDEO_CC_VENUS_CTL_AXI_CLK>,
2218058bd0a6SMatthias Kaehlcke				 <&videocc VIDEO_CC_VCODEC0_CORE_CLK>,
2219058bd0a6SMatthias Kaehlcke				 <&videocc VIDEO_CC_VCODEC0_AXI_CLK>;
2220058bd0a6SMatthias Kaehlcke			clock-names = "core", "iface", "bus",
2221058bd0a6SMatthias Kaehlcke				      "vcodec0_core", "vcodec0_bus";
2222058bd0a6SMatthias Kaehlcke			iommus = <&apps_smmu 0x0c00 0x60>;
2223058bd0a6SMatthias Kaehlcke			memory-region = <&venus_mem>;
22245a307c66SMatthias Kaehlcke			interconnects = <&mmss_noc MASTER_VIDEO_P0 &mc_virt SLAVE_EBI1>,
22255a307c66SMatthias Kaehlcke					<&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_VENUS_CFG>;
22265a307c66SMatthias Kaehlcke			interconnect-names = "video-mem", "cpu-cfg";
2227058bd0a6SMatthias Kaehlcke
2228058bd0a6SMatthias Kaehlcke			video-decoder {
2229058bd0a6SMatthias Kaehlcke				compatible = "venus-decoder";
2230058bd0a6SMatthias Kaehlcke			};
2231058bd0a6SMatthias Kaehlcke
2232058bd0a6SMatthias Kaehlcke			video-encoder {
2233058bd0a6SMatthias Kaehlcke				compatible = "venus-encoder";
2234058bd0a6SMatthias Kaehlcke			};
2235058bd0a6SMatthias Kaehlcke		};
2236058bd0a6SMatthias Kaehlcke
2237e07f8354STaniya Das		videocc: clock-controller@ab00000 {
2238e07f8354STaniya Das			compatible = "qcom,sc7180-videocc";
2239e07f8354STaniya Das			reg = <0 0x0ab00000 0 0x10000>;
2240e07f8354STaniya Das			clocks = <&rpmhcc RPMH_CXO_CLK>;
2241e07f8354STaniya Das			clock-names = "bi_tcxo";
2242e07f8354STaniya Das			#clock-cells = <1>;
2243e07f8354STaniya Das			#reset-cells = <1>;
2244e07f8354STaniya Das			#power-domain-cells = <1>;
2245e07f8354STaniya Das		};
2246e07f8354STaniya Das
2247b1b24dd7SOdelu Kukatla		camnoc_virt: interconnect@ac00000 {
2248b1b24dd7SOdelu Kukatla			compatible = "qcom,sc7180-camnoc-virt";
2249b1b24dd7SOdelu Kukatla			reg = <0 0x0ac00000 0 0x1000>;
2250b1b24dd7SOdelu Kukatla			#interconnect-cells = <1>;
2251b1b24dd7SOdelu Kukatla			qcom,bcm-voters = <&apps_bcm_voter>;
2252b1b24dd7SOdelu Kukatla		};
2253b1b24dd7SOdelu Kukatla
2254a3db7ad1SHarigovindan P		mdss: mdss@ae00000 {
2255a3db7ad1SHarigovindan P			compatible = "qcom,sc7180-mdss";
2256a3db7ad1SHarigovindan P			reg = <0 0x0ae00000 0 0x1000>;
2257a3db7ad1SHarigovindan P			reg-names = "mdss";
2258a3db7ad1SHarigovindan P
2259a3db7ad1SHarigovindan P			power-domains = <&dispcc MDSS_GDSC>;
2260a3db7ad1SHarigovindan P
2261a3db7ad1SHarigovindan P			clocks = <&gcc GCC_DISP_AHB_CLK>,
2262a3db7ad1SHarigovindan P				 <&gcc GCC_DISP_HF_AXI_CLK>,
2263a3db7ad1SHarigovindan P				 <&dispcc DISP_CC_MDSS_AHB_CLK>,
2264a3db7ad1SHarigovindan P				 <&dispcc DISP_CC_MDSS_MDP_CLK>;
2265a3db7ad1SHarigovindan P			clock-names = "iface", "bus", "ahb", "core";
2266a3db7ad1SHarigovindan P
2267a3db7ad1SHarigovindan P			assigned-clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>;
2268a3db7ad1SHarigovindan P			assigned-clock-rates = <300000000>;
2269a3db7ad1SHarigovindan P
2270a3db7ad1SHarigovindan P			interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
2271a3db7ad1SHarigovindan P			interrupt-controller;
2272a3db7ad1SHarigovindan P			#interrupt-cells = <1>;
2273a3db7ad1SHarigovindan P
2274a3db7ad1SHarigovindan P			iommus = <&apps_smmu 0x800 0x2>;
2275a3db7ad1SHarigovindan P
2276a3db7ad1SHarigovindan P			#address-cells = <2>;
2277a3db7ad1SHarigovindan P			#size-cells = <2>;
2278a3db7ad1SHarigovindan P			ranges;
2279a3db7ad1SHarigovindan P
2280a3db7ad1SHarigovindan P			status = "disabled";
2281a3db7ad1SHarigovindan P
2282a3db7ad1SHarigovindan P			mdp: mdp@ae01000 {
2283a3db7ad1SHarigovindan P				compatible = "qcom,sc7180-dpu";
2284a3db7ad1SHarigovindan P				reg = <0 0x0ae01000 0 0x8f000>,
2285a3db7ad1SHarigovindan P				      <0 0x0aeb0000 0 0x2008>;
2286a3db7ad1SHarigovindan P				reg-names = "mdp", "vbif";
2287a3db7ad1SHarigovindan P
2288a3db7ad1SHarigovindan P				clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
2289a3db7ad1SHarigovindan P					 <&dispcc DISP_CC_MDSS_ROT_CLK>,
2290a3db7ad1SHarigovindan P					 <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>,
2291a3db7ad1SHarigovindan P					 <&dispcc DISP_CC_MDSS_MDP_CLK>,
2292a3db7ad1SHarigovindan P					 <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
2293a3db7ad1SHarigovindan P				clock-names = "iface", "rot", "lut", "core",
2294a3db7ad1SHarigovindan P					      "vsync";
2295a3db7ad1SHarigovindan P				assigned-clocks = <&dispcc DISP_CC_MDSS_MDP_CLK>,
2296eccdac07SKrishna Manikandan						  <&dispcc DISP_CC_MDSS_VSYNC_CLK>,
2297eccdac07SKrishna Manikandan						  <&dispcc DISP_CC_MDSS_ROT_CLK>,
2298eccdac07SKrishna Manikandan						  <&dispcc DISP_CC_MDSS_AHB_CLK>;
2299a3db7ad1SHarigovindan P				assigned-clock-rates = <300000000>,
2300eccdac07SKrishna Manikandan						       <19200000>,
2301eccdac07SKrishna Manikandan						       <19200000>,
2302a3db7ad1SHarigovindan P						       <19200000>;
2303a3db7ad1SHarigovindan P
2304a3db7ad1SHarigovindan P				interrupt-parent = <&mdss>;
2305a3db7ad1SHarigovindan P				interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
2306a3db7ad1SHarigovindan P
2307a3db7ad1SHarigovindan P				status = "disabled";
2308a3db7ad1SHarigovindan P
2309a3db7ad1SHarigovindan P				ports {
2310a3db7ad1SHarigovindan P					#address-cells = <1>;
2311a3db7ad1SHarigovindan P					#size-cells = <0>;
2312a3db7ad1SHarigovindan P
2313a3db7ad1SHarigovindan P					port@0 {
2314a3db7ad1SHarigovindan P						reg = <0>;
2315a3db7ad1SHarigovindan P						dpu_intf1_out: endpoint {
2316a3db7ad1SHarigovindan P							remote-endpoint = <&dsi0_in>;
2317a3db7ad1SHarigovindan P						};
2318a3db7ad1SHarigovindan P					};
2319a3db7ad1SHarigovindan P				};
2320a3db7ad1SHarigovindan P			};
2321a3db7ad1SHarigovindan P
2322a3db7ad1SHarigovindan P			dsi0: dsi@ae94000 {
2323a3db7ad1SHarigovindan P				compatible = "qcom,mdss-dsi-ctrl";
2324a3db7ad1SHarigovindan P				reg = <0 0x0ae94000 0 0x400>;
2325a3db7ad1SHarigovindan P				reg-names = "dsi_ctrl";
2326a3db7ad1SHarigovindan P
2327a3db7ad1SHarigovindan P				interrupt-parent = <&mdss>;
2328a3db7ad1SHarigovindan P				interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
2329a3db7ad1SHarigovindan P
2330a3db7ad1SHarigovindan P				clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>,
2331a3db7ad1SHarigovindan P					 <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>,
2332a3db7ad1SHarigovindan P					 <&dispcc DISP_CC_MDSS_PCLK0_CLK>,
2333a3db7ad1SHarigovindan P					 <&dispcc DISP_CC_MDSS_ESC0_CLK>,
2334a3db7ad1SHarigovindan P					 <&dispcc DISP_CC_MDSS_AHB_CLK>,
2335a3db7ad1SHarigovindan P					 <&gcc GCC_DISP_HF_AXI_CLK>;
2336a3db7ad1SHarigovindan P				clock-names = "byte",
2337a3db7ad1SHarigovindan P					      "byte_intf",
2338a3db7ad1SHarigovindan P					      "pixel",
2339a3db7ad1SHarigovindan P					      "core",
2340a3db7ad1SHarigovindan P					      "iface",
2341a3db7ad1SHarigovindan P					      "bus";
2342a3db7ad1SHarigovindan P
2343a3db7ad1SHarigovindan P				phys = <&dsi_phy>;
2344a3db7ad1SHarigovindan P				phy-names = "dsi";
2345a3db7ad1SHarigovindan P
2346a3db7ad1SHarigovindan P				#address-cells = <1>;
2347a3db7ad1SHarigovindan P				#size-cells = <0>;
2348a3db7ad1SHarigovindan P
2349a3db7ad1SHarigovindan P				status = "disabled";
2350a3db7ad1SHarigovindan P
2351a3db7ad1SHarigovindan P				ports {
2352a3db7ad1SHarigovindan P					#address-cells = <1>;
2353a3db7ad1SHarigovindan P					#size-cells = <0>;
2354a3db7ad1SHarigovindan P
2355a3db7ad1SHarigovindan P					port@0 {
2356a3db7ad1SHarigovindan P						reg = <0>;
2357a3db7ad1SHarigovindan P						dsi0_in: endpoint {
2358a3db7ad1SHarigovindan P							remote-endpoint = <&dpu_intf1_out>;
2359a3db7ad1SHarigovindan P						};
2360a3db7ad1SHarigovindan P					};
2361a3db7ad1SHarigovindan P
2362a3db7ad1SHarigovindan P					port@1 {
2363a3db7ad1SHarigovindan P						reg = <1>;
2364a3db7ad1SHarigovindan P						dsi0_out: endpoint {
2365a3db7ad1SHarigovindan P						};
2366a3db7ad1SHarigovindan P					};
2367a3db7ad1SHarigovindan P				};
2368a3db7ad1SHarigovindan P			};
2369a3db7ad1SHarigovindan P
2370a3db7ad1SHarigovindan P			dsi_phy: dsi-phy@ae94400 {
2371a3db7ad1SHarigovindan P				compatible = "qcom,dsi-phy-10nm";
2372a3db7ad1SHarigovindan P				reg = <0 0x0ae94400 0 0x200>,
2373a3db7ad1SHarigovindan P				      <0 0x0ae94600 0 0x280>,
2374a3db7ad1SHarigovindan P				      <0 0x0ae94a00 0 0x1e0>;
2375a3db7ad1SHarigovindan P				reg-names = "dsi_phy",
2376a3db7ad1SHarigovindan P					    "dsi_phy_lane",
2377a3db7ad1SHarigovindan P					    "dsi_pll";
2378a3db7ad1SHarigovindan P
2379a3db7ad1SHarigovindan P				#clock-cells = <1>;
2380a3db7ad1SHarigovindan P				#phy-cells = <0>;
2381a3db7ad1SHarigovindan P
2382a3db7ad1SHarigovindan P				clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
2383a3db7ad1SHarigovindan P					 <&rpmhcc RPMH_CXO_CLK>;
2384a3db7ad1SHarigovindan P				clock-names = "iface", "ref";
2385a3db7ad1SHarigovindan P
2386a3db7ad1SHarigovindan P				status = "disabled";
2387a3db7ad1SHarigovindan P			};
2388a3db7ad1SHarigovindan P		};
2389a3db7ad1SHarigovindan P
2390e07f8354STaniya Das		dispcc: clock-controller@af00000 {
2391e07f8354STaniya Das			compatible = "qcom,sc7180-dispcc";
2392e07f8354STaniya Das			reg = <0 0x0af00000 0 0x200000>;
2393e07f8354STaniya Das			clocks = <&rpmhcc RPMH_CXO_CLK>,
2394e07f8354STaniya Das				 <&gcc GCC_DISP_GPLL0_CLK_SRC>,
2395a3db7ad1SHarigovindan P				 <&dsi_phy 0>,
2396a3db7ad1SHarigovindan P				 <&dsi_phy 1>,
2397e07f8354STaniya Das				 <0>,
2398e07f8354STaniya Das				 <0>;
2399e07f8354STaniya Das			clock-names = "bi_tcxo",
2400e07f8354STaniya Das				      "gcc_disp_gpll0_clk_src",
2401e07f8354STaniya Das				      "dsi0_phy_pll_out_byteclk",
2402e07f8354STaniya Das				      "dsi0_phy_pll_out_dsiclk",
2403e07f8354STaniya Das				      "dp_phy_pll_link_clk",
2404e07f8354STaniya Das				      "dp_phy_pll_vco_div_clk";
2405e07f8354STaniya Das			#clock-cells = <1>;
2406e07f8354STaniya Das			#reset-cells = <1>;
2407e07f8354STaniya Das			#power-domain-cells = <1>;
2408e07f8354STaniya Das		};
2409e07f8354STaniya Das
24107cee5c74SMatthias Kaehlcke		pdc: interrupt-controller@b220000 {
24117cee5c74SMatthias Kaehlcke			compatible = "qcom,sc7180-pdc", "qcom,pdc";
24127cee5c74SMatthias Kaehlcke			reg = <0 0x0b220000 0 0x30000>;
24137cee5c74SMatthias Kaehlcke			qcom,pdc-ranges = <0 480 15>, <17 497 98>,
24147cee5c74SMatthias Kaehlcke					  <119 634 4>, <124 639 1>;
24157cee5c74SMatthias Kaehlcke			#interrupt-cells = <2>;
24167cee5c74SMatthias Kaehlcke			interrupt-parent = <&intc>;
24177cee5c74SMatthias Kaehlcke			interrupt-controller;
24187cee5c74SMatthias Kaehlcke		};
24197cee5c74SMatthias Kaehlcke
2420f5ab220dSSibi Sankar		pdc_reset: reset-controller@b2e0000 {
2421f5ab220dSSibi Sankar			compatible = "qcom,sc7180-pdc-global", "qcom,sdm845-pdc-global";
2422f5ab220dSSibi Sankar			reg = <0 0x0b2e0000 0 0x20000>;
2423f5ab220dSSibi Sankar			#reset-cells = <1>;
2424f5ab220dSSibi Sankar		};
2425f5ab220dSSibi Sankar
24267cee5c74SMatthias Kaehlcke		tsens0: thermal-sensor@c263000 {
24277cee5c74SMatthias Kaehlcke			compatible = "qcom,sc7180-tsens","qcom,tsens-v2";
24287cee5c74SMatthias Kaehlcke			reg = <0 0x0c263000 0 0x1ff>, /* TM */
24297cee5c74SMatthias Kaehlcke				<0 0x0c222000 0 0x1ff>; /* SROT */
24307cee5c74SMatthias Kaehlcke			#qcom,sensors = <15>;
24312552c123SRajeshwari			interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>,
24322552c123SRajeshwari				     <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>;
24332552c123SRajeshwari			interrupt-names = "uplow","critical";
24347cee5c74SMatthias Kaehlcke			#thermal-sensor-cells = <1>;
24357cee5c74SMatthias Kaehlcke		};
24367cee5c74SMatthias Kaehlcke
24377cee5c74SMatthias Kaehlcke		tsens1: thermal-sensor@c265000 {
24387cee5c74SMatthias Kaehlcke			compatible = "qcom,sc7180-tsens","qcom,tsens-v2";
24397cee5c74SMatthias Kaehlcke			reg = <0 0x0c265000 0 0x1ff>, /* TM */
24407cee5c74SMatthias Kaehlcke				<0 0x0c223000 0 0x1ff>; /* SROT */
24417cee5c74SMatthias Kaehlcke			#qcom,sensors = <10>;
24422552c123SRajeshwari			interrupts = <GIC_SPI 507 IRQ_TYPE_LEVEL_HIGH>,
24432552c123SRajeshwari				     <GIC_SPI 509 IRQ_TYPE_LEVEL_HIGH>;
24442552c123SRajeshwari			interrupt-names = "uplow","critical";
24457cee5c74SMatthias Kaehlcke			#thermal-sensor-cells = <1>;
24467cee5c74SMatthias Kaehlcke		};
24477cee5c74SMatthias Kaehlcke
2448f5ab220dSSibi Sankar		aoss_reset: reset-controller@c2a0000 {
2449f5ab220dSSibi Sankar			compatible = "qcom,sc7180-aoss-cc", "qcom,sdm845-aoss-cc";
2450f5ab220dSSibi Sankar			reg = <0 0x0c2a0000 0 0x31000>;
2451f5ab220dSSibi Sankar			#reset-cells = <1>;
2452f5ab220dSSibi Sankar		};
2453f5ab220dSSibi Sankar
2454f5ab220dSSibi Sankar		aoss_qmp: qmp@c300000 {
2455f5ab220dSSibi Sankar			compatible = "qcom,sc7180-aoss-qmp";
2456f5ab220dSSibi Sankar			reg = <0 0x0c300000 0 0x100000>;
2457f5ab220dSSibi Sankar			interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>;
2458f5ab220dSSibi Sankar			mboxes = <&apss_shared 0>;
2459f5ab220dSSibi Sankar
2460f5ab220dSSibi Sankar			#clock-cells = <0>;
2461f5ab220dSSibi Sankar			#power-domain-cells = <1>;
2462f5ab220dSSibi Sankar		};
2463f5ab220dSSibi Sankar
24640f9dc5f0SKiran Gunda		spmi_bus: spmi@c440000 {
24650f9dc5f0SKiran Gunda			compatible = "qcom,spmi-pmic-arb";
24660f9dc5f0SKiran Gunda			reg = <0 0x0c440000 0 0x1100>,
24670f9dc5f0SKiran Gunda			      <0 0x0c600000 0 0x2000000>,
24680f9dc5f0SKiran Gunda			      <0 0x0e600000 0 0x100000>,
24690f9dc5f0SKiran Gunda			      <0 0x0e700000 0 0xa0000>,
24700f9dc5f0SKiran Gunda			      <0 0x0c40a000 0 0x26000>;
24710f9dc5f0SKiran Gunda			reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
24720f9dc5f0SKiran Gunda			interrupt-names = "periph_irq";
24730f9dc5f0SKiran Gunda			interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;
24740f9dc5f0SKiran Gunda			qcom,ee = <0>;
24750f9dc5f0SKiran Gunda			qcom,channel = <0>;
24760f9dc5f0SKiran Gunda			#address-cells = <1>;
24770f9dc5f0SKiran Gunda			#size-cells = <1>;
24780f9dc5f0SKiran Gunda			interrupt-controller;
24790f9dc5f0SKiran Gunda			#interrupt-cells = <4>;
24800f9dc5f0SKiran Gunda			cell-index = <0>;
24810f9dc5f0SKiran Gunda		};
24820f9dc5f0SKiran Gunda
2483d66df624SVivek Gautam		apps_smmu: iommu@15000000 {
2484d66df624SVivek Gautam			compatible = "qcom,sc7180-smmu-500", "arm,mmu-500";
2485d66df624SVivek Gautam			reg = <0 0x15000000 0 0x100000>;
2486d66df624SVivek Gautam			#iommu-cells = <2>;
2487d66df624SVivek Gautam			#global-interrupts = <1>;
2488d66df624SVivek Gautam			interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
2489d66df624SVivek Gautam				     <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>,
2490d66df624SVivek Gautam				     <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
2491d66df624SVivek Gautam				     <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
2492d66df624SVivek Gautam				     <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
2493d66df624SVivek Gautam				     <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
2494d66df624SVivek Gautam				     <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
2495d66df624SVivek Gautam				     <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
2496d66df624SVivek Gautam				     <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
2497d66df624SVivek Gautam				     <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
2498d66df624SVivek Gautam				     <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
2499d66df624SVivek Gautam				     <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
2500d66df624SVivek Gautam				     <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
2501d66df624SVivek Gautam				     <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
2502d66df624SVivek Gautam				     <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
2503d66df624SVivek Gautam				     <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
2504d66df624SVivek Gautam				     <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
2505d66df624SVivek Gautam				     <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
2506d66df624SVivek Gautam				     <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
2507d66df624SVivek Gautam				     <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
2508d66df624SVivek Gautam				     <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
2509d66df624SVivek Gautam				     <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
2510d66df624SVivek Gautam				     <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
2511d66df624SVivek Gautam				     <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2512d66df624SVivek Gautam				     <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2513d66df624SVivek Gautam				     <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
2514d66df624SVivek Gautam				     <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>,
2515d66df624SVivek Gautam				     <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>,
2516d66df624SVivek Gautam				     <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>,
2517d66df624SVivek Gautam				     <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>,
2518d66df624SVivek Gautam				     <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,
2519d66df624SVivek Gautam				     <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>,
2520d66df624SVivek Gautam				     <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>,
2521d66df624SVivek Gautam				     <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>,
2522d66df624SVivek Gautam				     <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>,
2523d66df624SVivek Gautam				     <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>,
2524d66df624SVivek Gautam				     <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>,
2525d66df624SVivek Gautam				     <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>,
2526d66df624SVivek Gautam				     <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
2527d66df624SVivek Gautam				     <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
2528d66df624SVivek Gautam				     <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
2529d66df624SVivek Gautam				     <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
2530d66df624SVivek Gautam				     <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>,
2531d66df624SVivek Gautam				     <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
2532d66df624SVivek Gautam				     <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
2533d66df624SVivek Gautam				     <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
2534d66df624SVivek Gautam				     <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
2535d66df624SVivek Gautam				     <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
2536d66df624SVivek Gautam				     <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
2537d66df624SVivek Gautam				     <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
2538d66df624SVivek Gautam				     <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
2539d66df624SVivek Gautam				     <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
2540d66df624SVivek Gautam				     <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
2541d66df624SVivek Gautam				     <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
2542d66df624SVivek Gautam				     <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
2543d66df624SVivek Gautam				     <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
2544d66df624SVivek Gautam				     <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
2545d66df624SVivek Gautam				     <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
2546d66df624SVivek Gautam				     <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
2547d66df624SVivek Gautam				     <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
2548d66df624SVivek Gautam				     <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
2549d66df624SVivek Gautam				     <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
2550d66df624SVivek Gautam				     <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
2551d66df624SVivek Gautam				     <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
2552d66df624SVivek Gautam				     <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
2553d66df624SVivek Gautam				     <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
2554d66df624SVivek Gautam				     <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
2555d66df624SVivek Gautam				     <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
2556d66df624SVivek Gautam				     <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
2557d66df624SVivek Gautam				     <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
2558d66df624SVivek Gautam				     <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
2559d66df624SVivek Gautam				     <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
2560d66df624SVivek Gautam				     <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
2561d66df624SVivek Gautam				     <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>,
2562d66df624SVivek Gautam				     <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
2563d66df624SVivek Gautam				     <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
2564d66df624SVivek Gautam				     <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>,
2565d66df624SVivek Gautam				     <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>,
2566d66df624SVivek Gautam				     <GIC_SPI 410 IRQ_TYPE_LEVEL_HIGH>,
2567d66df624SVivek Gautam				     <GIC_SPI 411 IRQ_TYPE_LEVEL_HIGH>,
2568d66df624SVivek Gautam				     <GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>;
2569d66df624SVivek Gautam		};
2570d66df624SVivek Gautam
257190db71e4SRajendra Nayak		intc: interrupt-controller@17a00000 {
257290db71e4SRajendra Nayak			compatible = "arm,gic-v3";
257390db71e4SRajendra Nayak			#address-cells = <2>;
257490db71e4SRajendra Nayak			#size-cells = <2>;
257590db71e4SRajendra Nayak			ranges;
257690db71e4SRajendra Nayak			#interrupt-cells = <3>;
257790db71e4SRajendra Nayak			interrupt-controller;
257890db71e4SRajendra Nayak			reg = <0 0x17a00000 0 0x10000>,     /* GICD */
257990db71e4SRajendra Nayak			      <0 0x17a60000 0 0x100000>;    /* GICR * 8 */
258090db71e4SRajendra Nayak			interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
258190db71e4SRajendra Nayak
2582ac00546aSDouglas Anderson			msi-controller@17a40000 {
258390db71e4SRajendra Nayak				compatible = "arm,gic-v3-its";
258490db71e4SRajendra Nayak				msi-controller;
258590db71e4SRajendra Nayak				#msi-cells = <1>;
258690db71e4SRajendra Nayak				reg = <0 0x17a40000 0 0x20000>;
258790db71e4SRajendra Nayak				status = "disabled";
258890db71e4SRajendra Nayak			};
258990db71e4SRajendra Nayak		};
259090db71e4SRajendra Nayak
2591f5ab220dSSibi Sankar		apss_shared: mailbox@17c00000 {
2592f5ab220dSSibi Sankar			compatible = "qcom,sc7180-apss-shared";
2593f5ab220dSSibi Sankar			reg = <0 0x17c00000 0 0x10000>;
2594f5ab220dSSibi Sankar			#mbox-cells = <1>;
2595f5ab220dSSibi Sankar		};
2596f5ab220dSSibi Sankar
25974722f956SSai Prakash Ranjan		watchdog@17c10000 {
25984722f956SSai Prakash Ranjan			compatible = "qcom,apss-wdt-sc7180", "qcom,kpss-wdt";
25994722f956SSai Prakash Ranjan			reg = <0 0x17c10000 0 0x1000>;
26004722f956SSai Prakash Ranjan			clocks = <&sleep_clk>;
26014722f956SSai Prakash Ranjan		};
26024722f956SSai Prakash Ranjan
260390db71e4SRajendra Nayak		timer@17c20000{
260490db71e4SRajendra Nayak			#address-cells = <2>;
260590db71e4SRajendra Nayak			#size-cells = <2>;
260690db71e4SRajendra Nayak			ranges;
260790db71e4SRajendra Nayak			compatible = "arm,armv7-timer-mem";
260890db71e4SRajendra Nayak			reg = <0 0x17c20000 0 0x1000>;
260990db71e4SRajendra Nayak
261090db71e4SRajendra Nayak			frame@17c21000 {
261190db71e4SRajendra Nayak				frame-number = <0>;
261290db71e4SRajendra Nayak				interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
261390db71e4SRajendra Nayak					     <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
261490db71e4SRajendra Nayak				reg = <0 0x17c21000 0 0x1000>,
261590db71e4SRajendra Nayak				      <0 0x17c22000 0 0x1000>;
261690db71e4SRajendra Nayak			};
261790db71e4SRajendra Nayak
261890db71e4SRajendra Nayak			frame@17c23000 {
261990db71e4SRajendra Nayak				frame-number = <1>;
262090db71e4SRajendra Nayak				interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
262190db71e4SRajendra Nayak				reg = <0 0x17c23000 0 0x1000>;
262290db71e4SRajendra Nayak				status = "disabled";
262390db71e4SRajendra Nayak			};
262490db71e4SRajendra Nayak
262590db71e4SRajendra Nayak			frame@17c25000 {
262690db71e4SRajendra Nayak				frame-number = <2>;
262790db71e4SRajendra Nayak				interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
262890db71e4SRajendra Nayak				reg = <0 0x17c25000 0 0x1000>;
262990db71e4SRajendra Nayak				status = "disabled";
263090db71e4SRajendra Nayak			};
263190db71e4SRajendra Nayak
263290db71e4SRajendra Nayak			frame@17c27000 {
263390db71e4SRajendra Nayak				frame-number = <3>;
263490db71e4SRajendra Nayak				interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
263590db71e4SRajendra Nayak				reg = <0 0x17c27000 0 0x1000>;
263690db71e4SRajendra Nayak				status = "disabled";
263790db71e4SRajendra Nayak			};
263890db71e4SRajendra Nayak
263990db71e4SRajendra Nayak			frame@17c29000 {
264090db71e4SRajendra Nayak				frame-number = <4>;
264190db71e4SRajendra Nayak				interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
264290db71e4SRajendra Nayak				reg = <0 0x17c29000 0 0x1000>;
264390db71e4SRajendra Nayak				status = "disabled";
264490db71e4SRajendra Nayak			};
264590db71e4SRajendra Nayak
264690db71e4SRajendra Nayak			frame@17c2b000 {
264790db71e4SRajendra Nayak				frame-number = <5>;
264890db71e4SRajendra Nayak				interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
264990db71e4SRajendra Nayak				reg = <0 0x17c2b000 0 0x1000>;
265090db71e4SRajendra Nayak				status = "disabled";
265190db71e4SRajendra Nayak			};
265290db71e4SRajendra Nayak
265390db71e4SRajendra Nayak			frame@17c2d000 {
265490db71e4SRajendra Nayak				frame-number = <6>;
265590db71e4SRajendra Nayak				interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
265690db71e4SRajendra Nayak				reg = <0 0x17c2d000 0 0x1000>;
265790db71e4SRajendra Nayak				status = "disabled";
265890db71e4SRajendra Nayak			};
265990db71e4SRajendra Nayak		};
2660fec6359cSMaulik Shah
2661fec6359cSMaulik Shah		apps_rsc: rsc@18200000 {
2662fec6359cSMaulik Shah			compatible = "qcom,rpmh-rsc";
2663fec6359cSMaulik Shah			reg = <0 0x18200000 0 0x10000>,
2664fec6359cSMaulik Shah			      <0 0x18210000 0 0x10000>,
2665fec6359cSMaulik Shah			      <0 0x18220000 0 0x10000>;
2666fec6359cSMaulik Shah			reg-names = "drv-0", "drv-1", "drv-2";
2667fec6359cSMaulik Shah			interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
2668fec6359cSMaulik Shah				     <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
2669fec6359cSMaulik Shah				     <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
2670fec6359cSMaulik Shah			qcom,tcs-offset = <0xd00>;
2671fec6359cSMaulik Shah			qcom,drv-id = <2>;
2672fec6359cSMaulik Shah			qcom,tcs-config = <ACTIVE_TCS  2>,
2673fec6359cSMaulik Shah					  <SLEEP_TCS   3>,
2674fec6359cSMaulik Shah					  <WAKE_TCS    3>,
2675fec6359cSMaulik Shah					  <CONTROL_TCS 1>;
26760def3f14STaniya Das
26770def3f14STaniya Das			rpmhcc: clock-controller {
26780def3f14STaniya Das				compatible = "qcom,sc7180-rpmh-clk";
26790def3f14STaniya Das				clocks = <&xo_board>;
26800def3f14STaniya Das				clock-names = "xo";
26810def3f14STaniya Das				#clock-cells = <1>;
26820def3f14STaniya Das			};
2683a16f862fSSibi Sankar
2684a16f862fSSibi Sankar			rpmhpd: power-controller {
2685a16f862fSSibi Sankar				compatible = "qcom,sc7180-rpmhpd";
2686a16f862fSSibi Sankar				#power-domain-cells = <1>;
2687a16f862fSSibi Sankar				operating-points-v2 = <&rpmhpd_opp_table>;
2688a16f862fSSibi Sankar
2689a16f862fSSibi Sankar				rpmhpd_opp_table: opp-table {
2690a16f862fSSibi Sankar					compatible = "operating-points-v2";
2691a16f862fSSibi Sankar
2692a16f862fSSibi Sankar					rpmhpd_opp_ret: opp1 {
2693a16f862fSSibi Sankar						opp-level = <RPMH_REGULATOR_LEVEL_RETENTION>;
2694a16f862fSSibi Sankar					};
2695a16f862fSSibi Sankar
2696a16f862fSSibi Sankar					rpmhpd_opp_min_svs: opp2 {
2697a16f862fSSibi Sankar						opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>;
2698a16f862fSSibi Sankar					};
2699a16f862fSSibi Sankar
2700a16f862fSSibi Sankar					rpmhpd_opp_low_svs: opp3 {
2701a16f862fSSibi Sankar						opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
2702a16f862fSSibi Sankar					};
2703a16f862fSSibi Sankar
2704a16f862fSSibi Sankar					rpmhpd_opp_svs: opp4 {
2705a16f862fSSibi Sankar						opp-level = <RPMH_REGULATOR_LEVEL_SVS>;
2706a16f862fSSibi Sankar					};
2707a16f862fSSibi Sankar
2708a16f862fSSibi Sankar					rpmhpd_opp_svs_l1: opp5 {
2709a16f862fSSibi Sankar						opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
2710a16f862fSSibi Sankar					};
2711a16f862fSSibi Sankar
2712a16f862fSSibi Sankar					rpmhpd_opp_svs_l2: opp6 {
2713a16f862fSSibi Sankar						opp-level = <224>;
2714a16f862fSSibi Sankar					};
2715a16f862fSSibi Sankar
2716a16f862fSSibi Sankar					rpmhpd_opp_nom: opp7 {
2717a16f862fSSibi Sankar						opp-level = <RPMH_REGULATOR_LEVEL_NOM>;
2718a16f862fSSibi Sankar					};
2719a16f862fSSibi Sankar
2720a16f862fSSibi Sankar					rpmhpd_opp_nom_l1: opp8 {
2721a16f862fSSibi Sankar						opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
2722a16f862fSSibi Sankar					};
2723a16f862fSSibi Sankar
2724a16f862fSSibi Sankar					rpmhpd_opp_nom_l2: opp9 {
2725a16f862fSSibi Sankar						opp-level = <RPMH_REGULATOR_LEVEL_NOM_L2>;
2726a16f862fSSibi Sankar					};
2727a16f862fSSibi Sankar
2728a16f862fSSibi Sankar					rpmhpd_opp_turbo: opp10 {
2729a16f862fSSibi Sankar						opp-level = <RPMH_REGULATOR_LEVEL_TURBO>;
2730a16f862fSSibi Sankar					};
2731a16f862fSSibi Sankar
2732a16f862fSSibi Sankar					rpmhpd_opp_turbo_l1: opp11 {
2733a16f862fSSibi Sankar						opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>;
2734a16f862fSSibi Sankar					};
2735a16f862fSSibi Sankar				};
2736a16f862fSSibi Sankar			};
2737b1b24dd7SOdelu Kukatla
2738b1b24dd7SOdelu Kukatla			apps_bcm_voter: bcm_voter {
2739b1b24dd7SOdelu Kukatla				compatible = "qcom,bcm-voter";
2740b1b24dd7SOdelu Kukatla			};
2741fec6359cSMaulik Shah		};
274286899d82STaniya Das
2743b21bb61dSSibi Sankar		osm_l3: interconnect@18321000 {
2744b21bb61dSSibi Sankar			compatible = "qcom,sc7180-osm-l3";
2745b21bb61dSSibi Sankar			reg = <0 0x18321000 0 0x1400>;
2746b21bb61dSSibi Sankar
2747b21bb61dSSibi Sankar			clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;
2748b21bb61dSSibi Sankar			clock-names = "xo", "alternate";
2749b21bb61dSSibi Sankar
2750b21bb61dSSibi Sankar			#interconnect-cells = <1>;
2751b21bb61dSSibi Sankar		};
2752b21bb61dSSibi Sankar
275386899d82STaniya Das		cpufreq_hw: cpufreq@18323000 {
275486899d82STaniya Das			compatible = "qcom,cpufreq-hw";
275586899d82STaniya Das			reg = <0 0x18323000 0 0x1400>, <0 0x18325800 0 0x1400>;
275686899d82STaniya Das			reg-names = "freq-domain0", "freq-domain1";
275786899d82STaniya Das
275886899d82STaniya Das			clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;
275986899d82STaniya Das			clock-names = "xo", "alternate";
276086899d82STaniya Das
276186899d82STaniya Das			#freq-domain-cells = <1>;
276286899d82STaniya Das		};
276390db71e4SRajendra Nayak	};
276490db71e4SRajendra Nayak
276582bdc939SRajeshwari	thermal-zones {
276682bdc939SRajeshwari		cpu0-thermal {
276722337b91SRajeshwari			polling-delay-passive = <0>;
276822337b91SRajeshwari			polling-delay = <0>;
276982bdc939SRajeshwari
277082bdc939SRajeshwari			thermal-sensors = <&tsens0 1>;
277182bdc939SRajeshwari
277282bdc939SRajeshwari			trips {
277382bdc939SRajeshwari				cpu0_alert0: trip-point0 {
277482bdc939SRajeshwari					temperature = <90000>;
277582bdc939SRajeshwari					hysteresis = <2000>;
277682bdc939SRajeshwari					type = "passive";
277782bdc939SRajeshwari				};
277882bdc939SRajeshwari
277982bdc939SRajeshwari				cpu0_alert1: trip-point1 {
278082bdc939SRajeshwari					temperature = <95000>;
278182bdc939SRajeshwari					hysteresis = <2000>;
278282bdc939SRajeshwari					type = "passive";
278382bdc939SRajeshwari				};
278482bdc939SRajeshwari
278582bdc939SRajeshwari				cpu0_crit: cpu_crit {
278682bdc939SRajeshwari					temperature = <110000>;
278782bdc939SRajeshwari					hysteresis = <1000>;
278882bdc939SRajeshwari					type = "critical";
278982bdc939SRajeshwari				};
279082bdc939SRajeshwari			};
27912552c123SRajeshwari
27922552c123SRajeshwari			cooling-maps {
27932552c123SRajeshwari				map0 {
27942552c123SRajeshwari					trip = <&cpu0_alert0>;
27952552c123SRajeshwari					cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
27962552c123SRajeshwari							 <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
27972552c123SRajeshwari							 <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
27982552c123SRajeshwari							 <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
27992552c123SRajeshwari							 <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
28002552c123SRajeshwari							 <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
28012552c123SRajeshwari				};
28022552c123SRajeshwari				map1 {
28032552c123SRajeshwari					trip = <&cpu0_alert1>;
28042552c123SRajeshwari					cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
28052552c123SRajeshwari							 <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
28062552c123SRajeshwari							 <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
28072552c123SRajeshwari							 <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
28082552c123SRajeshwari							 <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
28092552c123SRajeshwari							 <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
28102552c123SRajeshwari				};
28112552c123SRajeshwari			};
281282bdc939SRajeshwari		};
281382bdc939SRajeshwari
281482bdc939SRajeshwari		cpu1-thermal {
281522337b91SRajeshwari			polling-delay-passive = <0>;
281622337b91SRajeshwari			polling-delay = <0>;
281782bdc939SRajeshwari
281882bdc939SRajeshwari			thermal-sensors = <&tsens0 2>;
281982bdc939SRajeshwari
282082bdc939SRajeshwari			trips {
282182bdc939SRajeshwari				cpu1_alert0: trip-point0 {
282282bdc939SRajeshwari					temperature = <90000>;
282382bdc939SRajeshwari					hysteresis = <2000>;
282482bdc939SRajeshwari					type = "passive";
282582bdc939SRajeshwari				};
282682bdc939SRajeshwari
282782bdc939SRajeshwari				cpu1_alert1: trip-point1 {
282882bdc939SRajeshwari					temperature = <95000>;
282982bdc939SRajeshwari					hysteresis = <2000>;
283082bdc939SRajeshwari					type = "passive";
283182bdc939SRajeshwari				};
283282bdc939SRajeshwari
283382bdc939SRajeshwari				cpu1_crit: cpu_crit {
283482bdc939SRajeshwari					temperature = <110000>;
283582bdc939SRajeshwari					hysteresis = <1000>;
283682bdc939SRajeshwari					type = "critical";
283782bdc939SRajeshwari				};
283882bdc939SRajeshwari			};
28392552c123SRajeshwari
28402552c123SRajeshwari			cooling-maps {
28412552c123SRajeshwari				map0 {
28422552c123SRajeshwari					trip = <&cpu1_alert0>;
28432552c123SRajeshwari					cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
28442552c123SRajeshwari							 <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
28452552c123SRajeshwari							 <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
28462552c123SRajeshwari							 <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
28472552c123SRajeshwari							 <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
28482552c123SRajeshwari							 <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
28492552c123SRajeshwari				};
28502552c123SRajeshwari				map1 {
28512552c123SRajeshwari					trip = <&cpu1_alert1>;
28522552c123SRajeshwari					cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
28532552c123SRajeshwari							 <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
28542552c123SRajeshwari							 <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
28552552c123SRajeshwari							 <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
28562552c123SRajeshwari							 <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
28572552c123SRajeshwari							 <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
28582552c123SRajeshwari				};
28592552c123SRajeshwari			};
286082bdc939SRajeshwari		};
286182bdc939SRajeshwari
286282bdc939SRajeshwari		cpu2-thermal {
286322337b91SRajeshwari			polling-delay-passive = <0>;
286422337b91SRajeshwari			polling-delay = <0>;
286582bdc939SRajeshwari
286682bdc939SRajeshwari			thermal-sensors = <&tsens0 3>;
286782bdc939SRajeshwari
286882bdc939SRajeshwari			trips {
286982bdc939SRajeshwari				cpu2_alert0: trip-point0 {
287082bdc939SRajeshwari					temperature = <90000>;
287182bdc939SRajeshwari					hysteresis = <2000>;
287282bdc939SRajeshwari					type = "passive";
287382bdc939SRajeshwari				};
287482bdc939SRajeshwari
287582bdc939SRajeshwari				cpu2_alert1: trip-point1 {
287682bdc939SRajeshwari					temperature = <95000>;
287782bdc939SRajeshwari					hysteresis = <2000>;
287882bdc939SRajeshwari					type = "passive";
287982bdc939SRajeshwari				};
288082bdc939SRajeshwari
288182bdc939SRajeshwari				cpu2_crit: cpu_crit {
288282bdc939SRajeshwari					temperature = <110000>;
288382bdc939SRajeshwari					hysteresis = <1000>;
288482bdc939SRajeshwari					type = "critical";
288582bdc939SRajeshwari				};
288682bdc939SRajeshwari			};
28872552c123SRajeshwari
28882552c123SRajeshwari			cooling-maps {
28892552c123SRajeshwari				map0 {
28902552c123SRajeshwari					trip = <&cpu2_alert0>;
28912552c123SRajeshwari					cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
28922552c123SRajeshwari							 <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
28932552c123SRajeshwari							 <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
28942552c123SRajeshwari							 <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
28952552c123SRajeshwari							 <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
28962552c123SRajeshwari							 <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
28972552c123SRajeshwari				};
28982552c123SRajeshwari				map1 {
28992552c123SRajeshwari					trip = <&cpu2_alert1>;
29002552c123SRajeshwari					cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
29012552c123SRajeshwari							 <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
29022552c123SRajeshwari							 <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
29032552c123SRajeshwari							 <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
29042552c123SRajeshwari							 <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
29052552c123SRajeshwari							 <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
29062552c123SRajeshwari				};
29072552c123SRajeshwari			};
290882bdc939SRajeshwari		};
290982bdc939SRajeshwari
291082bdc939SRajeshwari		cpu3-thermal {
291122337b91SRajeshwari			polling-delay-passive = <0>;
291222337b91SRajeshwari			polling-delay = <0>;
291382bdc939SRajeshwari
291482bdc939SRajeshwari			thermal-sensors = <&tsens0 4>;
291582bdc939SRajeshwari
291682bdc939SRajeshwari			trips {
291782bdc939SRajeshwari				cpu3_alert0: trip-point0 {
291882bdc939SRajeshwari					temperature = <90000>;
291982bdc939SRajeshwari					hysteresis = <2000>;
292082bdc939SRajeshwari					type = "passive";
292182bdc939SRajeshwari				};
292282bdc939SRajeshwari
292382bdc939SRajeshwari				cpu3_alert1: trip-point1 {
292482bdc939SRajeshwari					temperature = <95000>;
292582bdc939SRajeshwari					hysteresis = <2000>;
292682bdc939SRajeshwari					type = "passive";
292782bdc939SRajeshwari				};
292882bdc939SRajeshwari
292982bdc939SRajeshwari				cpu3_crit: cpu_crit {
293082bdc939SRajeshwari					temperature = <110000>;
293182bdc939SRajeshwari					hysteresis = <1000>;
293282bdc939SRajeshwari					type = "critical";
293382bdc939SRajeshwari				};
293482bdc939SRajeshwari			};
29352552c123SRajeshwari
29362552c123SRajeshwari			cooling-maps {
29372552c123SRajeshwari				map0 {
29382552c123SRajeshwari					trip = <&cpu3_alert0>;
29392552c123SRajeshwari					cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
29402552c123SRajeshwari							 <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
29412552c123SRajeshwari							 <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
29422552c123SRajeshwari							 <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
29432552c123SRajeshwari							 <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
29442552c123SRajeshwari							 <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
29452552c123SRajeshwari				};
29462552c123SRajeshwari				map1 {
29472552c123SRajeshwari					trip = <&cpu3_alert1>;
29482552c123SRajeshwari					cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
29492552c123SRajeshwari							 <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
29502552c123SRajeshwari							 <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
29512552c123SRajeshwari							 <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
29522552c123SRajeshwari							 <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
29532552c123SRajeshwari							 <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
29542552c123SRajeshwari				};
29552552c123SRajeshwari			};
295682bdc939SRajeshwari		};
295782bdc939SRajeshwari
295882bdc939SRajeshwari		cpu4-thermal {
295922337b91SRajeshwari			polling-delay-passive = <0>;
296022337b91SRajeshwari			polling-delay = <0>;
296182bdc939SRajeshwari
296282bdc939SRajeshwari			thermal-sensors = <&tsens0 5>;
296382bdc939SRajeshwari
296482bdc939SRajeshwari			trips {
296582bdc939SRajeshwari				cpu4_alert0: trip-point0 {
296682bdc939SRajeshwari					temperature = <90000>;
296782bdc939SRajeshwari					hysteresis = <2000>;
296882bdc939SRajeshwari					type = "passive";
296982bdc939SRajeshwari				};
297082bdc939SRajeshwari
297182bdc939SRajeshwari				cpu4_alert1: trip-point1 {
297282bdc939SRajeshwari					temperature = <95000>;
297382bdc939SRajeshwari					hysteresis = <2000>;
297482bdc939SRajeshwari					type = "passive";
297582bdc939SRajeshwari				};
297682bdc939SRajeshwari
297782bdc939SRajeshwari				cpu4_crit: cpu_crit {
297882bdc939SRajeshwari					temperature = <110000>;
297982bdc939SRajeshwari					hysteresis = <1000>;
298082bdc939SRajeshwari					type = "critical";
298182bdc939SRajeshwari				};
298282bdc939SRajeshwari			};
29832552c123SRajeshwari
29842552c123SRajeshwari			cooling-maps {
29852552c123SRajeshwari				map0 {
29862552c123SRajeshwari					trip = <&cpu4_alert0>;
29872552c123SRajeshwari					cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
29882552c123SRajeshwari							 <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
29892552c123SRajeshwari							 <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
29902552c123SRajeshwari							 <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
29912552c123SRajeshwari							 <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
29922552c123SRajeshwari							 <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
29932552c123SRajeshwari				};
29942552c123SRajeshwari				map1 {
29952552c123SRajeshwari					trip = <&cpu4_alert1>;
29962552c123SRajeshwari					cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
29972552c123SRajeshwari							 <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
29982552c123SRajeshwari							 <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
29992552c123SRajeshwari							 <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
30002552c123SRajeshwari							 <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
30012552c123SRajeshwari							 <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
30022552c123SRajeshwari				};
30032552c123SRajeshwari			};
300482bdc939SRajeshwari		};
300582bdc939SRajeshwari
300682bdc939SRajeshwari		cpu5-thermal {
300722337b91SRajeshwari			polling-delay-passive = <0>;
300822337b91SRajeshwari			polling-delay = <0>;
300982bdc939SRajeshwari
301082bdc939SRajeshwari			thermal-sensors = <&tsens0 6>;
301182bdc939SRajeshwari
301282bdc939SRajeshwari			trips {
301382bdc939SRajeshwari				cpu5_alert0: trip-point0 {
301482bdc939SRajeshwari					temperature = <90000>;
301582bdc939SRajeshwari					hysteresis = <2000>;
301682bdc939SRajeshwari					type = "passive";
301782bdc939SRajeshwari				};
301882bdc939SRajeshwari
301982bdc939SRajeshwari				cpu5_alert1: trip-point1 {
302082bdc939SRajeshwari					temperature = <95000>;
302182bdc939SRajeshwari					hysteresis = <2000>;
302282bdc939SRajeshwari					type = "passive";
302382bdc939SRajeshwari				};
302482bdc939SRajeshwari
302582bdc939SRajeshwari				cpu5_crit: cpu_crit {
302682bdc939SRajeshwari					temperature = <110000>;
302782bdc939SRajeshwari					hysteresis = <1000>;
302882bdc939SRajeshwari					type = "critical";
302982bdc939SRajeshwari				};
303082bdc939SRajeshwari			};
30312552c123SRajeshwari
30322552c123SRajeshwari			cooling-maps {
30332552c123SRajeshwari				map0 {
30342552c123SRajeshwari					trip = <&cpu5_alert0>;
30352552c123SRajeshwari					cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
30362552c123SRajeshwari							 <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
30372552c123SRajeshwari							 <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
30382552c123SRajeshwari							 <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
30392552c123SRajeshwari							 <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
30402552c123SRajeshwari							 <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
30412552c123SRajeshwari				};
30422552c123SRajeshwari				map1 {
30432552c123SRajeshwari					trip = <&cpu5_alert1>;
30442552c123SRajeshwari					cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
30452552c123SRajeshwari							 <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
30462552c123SRajeshwari							 <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
30472552c123SRajeshwari							 <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
30482552c123SRajeshwari							 <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
30492552c123SRajeshwari							 <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
30502552c123SRajeshwari				};
30512552c123SRajeshwari			};
305282bdc939SRajeshwari		};
305382bdc939SRajeshwari
305482bdc939SRajeshwari		cpu6-thermal {
305522337b91SRajeshwari			polling-delay-passive = <0>;
305622337b91SRajeshwari			polling-delay = <0>;
305782bdc939SRajeshwari
305882bdc939SRajeshwari			thermal-sensors = <&tsens0 9>;
305982bdc939SRajeshwari
306082bdc939SRajeshwari			trips {
306182bdc939SRajeshwari				cpu6_alert0: trip-point0 {
306282bdc939SRajeshwari					temperature = <90000>;
306382bdc939SRajeshwari					hysteresis = <2000>;
306482bdc939SRajeshwari					type = "passive";
306582bdc939SRajeshwari				};
306682bdc939SRajeshwari
306782bdc939SRajeshwari				cpu6_alert1: trip-point1 {
306882bdc939SRajeshwari					temperature = <95000>;
306982bdc939SRajeshwari					hysteresis = <2000>;
307082bdc939SRajeshwari					type = "passive";
307182bdc939SRajeshwari				};
307282bdc939SRajeshwari
307382bdc939SRajeshwari				cpu6_crit: cpu_crit {
307482bdc939SRajeshwari					temperature = <110000>;
307582bdc939SRajeshwari					hysteresis = <1000>;
307682bdc939SRajeshwari					type = "critical";
307782bdc939SRajeshwari				};
307882bdc939SRajeshwari			};
30792552c123SRajeshwari
30802552c123SRajeshwari			cooling-maps {
30812552c123SRajeshwari				map0 {
30822552c123SRajeshwari					trip = <&cpu6_alert0>;
30832552c123SRajeshwari					cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
30842552c123SRajeshwari							 <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
30852552c123SRajeshwari				};
30862552c123SRajeshwari				map1 {
30872552c123SRajeshwari					trip = <&cpu6_alert1>;
30882552c123SRajeshwari					cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
30892552c123SRajeshwari							 <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
30902552c123SRajeshwari				};
30912552c123SRajeshwari			};
309282bdc939SRajeshwari		};
309382bdc939SRajeshwari
309482bdc939SRajeshwari		cpu7-thermal {
309522337b91SRajeshwari			polling-delay-passive = <0>;
309622337b91SRajeshwari			polling-delay = <0>;
309782bdc939SRajeshwari
309882bdc939SRajeshwari			thermal-sensors = <&tsens0 10>;
309982bdc939SRajeshwari
310082bdc939SRajeshwari			trips {
310182bdc939SRajeshwari				cpu7_alert0: trip-point0 {
310282bdc939SRajeshwari					temperature = <90000>;
310382bdc939SRajeshwari					hysteresis = <2000>;
310482bdc939SRajeshwari					type = "passive";
310582bdc939SRajeshwari				};
310682bdc939SRajeshwari
310782bdc939SRajeshwari				cpu7_alert1: trip-point1 {
310882bdc939SRajeshwari					temperature = <95000>;
310982bdc939SRajeshwari					hysteresis = <2000>;
311082bdc939SRajeshwari					type = "passive";
311182bdc939SRajeshwari				};
311282bdc939SRajeshwari
311382bdc939SRajeshwari				cpu7_crit: cpu_crit {
311482bdc939SRajeshwari					temperature = <110000>;
311582bdc939SRajeshwari					hysteresis = <1000>;
311682bdc939SRajeshwari					type = "critical";
311782bdc939SRajeshwari				};
311882bdc939SRajeshwari			};
31192552c123SRajeshwari
31202552c123SRajeshwari			cooling-maps {
31212552c123SRajeshwari				map0 {
31222552c123SRajeshwari					trip = <&cpu7_alert0>;
31232552c123SRajeshwari					cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
31242552c123SRajeshwari							 <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
31252552c123SRajeshwari				};
31262552c123SRajeshwari				map1 {
31272552c123SRajeshwari					trip = <&cpu7_alert1>;
31282552c123SRajeshwari					cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
31292552c123SRajeshwari							 <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
31302552c123SRajeshwari				};
31312552c123SRajeshwari			};
313282bdc939SRajeshwari		};
313382bdc939SRajeshwari
313482bdc939SRajeshwari		cpu8-thermal {
313522337b91SRajeshwari			polling-delay-passive = <0>;
313622337b91SRajeshwari			polling-delay = <0>;
313782bdc939SRajeshwari
313882bdc939SRajeshwari			thermal-sensors = <&tsens0 11>;
313982bdc939SRajeshwari
314082bdc939SRajeshwari			trips {
314182bdc939SRajeshwari				cpu8_alert0: trip-point0 {
314282bdc939SRajeshwari					temperature = <90000>;
314382bdc939SRajeshwari					hysteresis = <2000>;
314482bdc939SRajeshwari					type = "passive";
314582bdc939SRajeshwari				};
314682bdc939SRajeshwari
314782bdc939SRajeshwari				cpu8_alert1: trip-point1 {
314882bdc939SRajeshwari					temperature = <95000>;
314982bdc939SRajeshwari					hysteresis = <2000>;
315082bdc939SRajeshwari					type = "passive";
315182bdc939SRajeshwari				};
315282bdc939SRajeshwari
315382bdc939SRajeshwari				cpu8_crit: cpu_crit {
315482bdc939SRajeshwari					temperature = <110000>;
315582bdc939SRajeshwari					hysteresis = <1000>;
315682bdc939SRajeshwari					type = "critical";
315782bdc939SRajeshwari				};
315882bdc939SRajeshwari			};
31592552c123SRajeshwari
31602552c123SRajeshwari			cooling-maps {
31612552c123SRajeshwari				map0 {
31622552c123SRajeshwari					trip = <&cpu8_alert0>;
31632552c123SRajeshwari					cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
31642552c123SRajeshwari							 <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
31652552c123SRajeshwari				};
31662552c123SRajeshwari				map1 {
31672552c123SRajeshwari					trip = <&cpu8_alert1>;
31682552c123SRajeshwari					cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
31692552c123SRajeshwari							 <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
31702552c123SRajeshwari				};
31712552c123SRajeshwari			};
317282bdc939SRajeshwari		};
317382bdc939SRajeshwari
317482bdc939SRajeshwari		cpu9-thermal {
317522337b91SRajeshwari			polling-delay-passive = <0>;
317622337b91SRajeshwari			polling-delay = <0>;
317782bdc939SRajeshwari
317882bdc939SRajeshwari			thermal-sensors = <&tsens0 12>;
317982bdc939SRajeshwari
318082bdc939SRajeshwari			trips {
318182bdc939SRajeshwari				cpu9_alert0: trip-point0 {
318282bdc939SRajeshwari					temperature = <90000>;
318382bdc939SRajeshwari					hysteresis = <2000>;
318482bdc939SRajeshwari					type = "passive";
318582bdc939SRajeshwari				};
318682bdc939SRajeshwari
318782bdc939SRajeshwari				cpu9_alert1: trip-point1 {
318882bdc939SRajeshwari					temperature = <95000>;
318982bdc939SRajeshwari					hysteresis = <2000>;
319082bdc939SRajeshwari					type = "passive";
319182bdc939SRajeshwari				};
319282bdc939SRajeshwari
319382bdc939SRajeshwari				cpu9_crit: cpu_crit {
319482bdc939SRajeshwari					temperature = <110000>;
319582bdc939SRajeshwari					hysteresis = <1000>;
319682bdc939SRajeshwari					type = "critical";
319782bdc939SRajeshwari				};
319882bdc939SRajeshwari			};
31992552c123SRajeshwari
32002552c123SRajeshwari			cooling-maps {
32012552c123SRajeshwari				map0 {
32022552c123SRajeshwari					trip = <&cpu9_alert0>;
32032552c123SRajeshwari					cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
32042552c123SRajeshwari							 <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
32052552c123SRajeshwari				};
32062552c123SRajeshwari				map1 {
32072552c123SRajeshwari					trip = <&cpu9_alert1>;
32082552c123SRajeshwari					cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
32092552c123SRajeshwari							 <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
32102552c123SRajeshwari				};
32112552c123SRajeshwari			};
321282bdc939SRajeshwari		};
321382bdc939SRajeshwari
321482bdc939SRajeshwari		aoss0-thermal {
321522337b91SRajeshwari			polling-delay-passive = <0>;
321622337b91SRajeshwari			polling-delay = <0>;
321782bdc939SRajeshwari
321882bdc939SRajeshwari			thermal-sensors = <&tsens0 0>;
321982bdc939SRajeshwari
322082bdc939SRajeshwari			trips {
322182bdc939SRajeshwari				aoss0_alert0: trip-point0 {
322282bdc939SRajeshwari					temperature = <90000>;
322382bdc939SRajeshwari					hysteresis = <2000>;
322482bdc939SRajeshwari					type = "hot";
322582bdc939SRajeshwari				};
322654c22ae5SRajeshwari
322754c22ae5SRajeshwari				aoss0_crit: aoss0_crit {
322854c22ae5SRajeshwari					temperature = <110000>;
322954c22ae5SRajeshwari					hysteresis = <2000>;
323054c22ae5SRajeshwari					type = "critical";
323154c22ae5SRajeshwari				};
323282bdc939SRajeshwari			};
323382bdc939SRajeshwari		};
323482bdc939SRajeshwari
323582bdc939SRajeshwari		cpuss0-thermal {
323622337b91SRajeshwari			polling-delay-passive = <0>;
323722337b91SRajeshwari			polling-delay = <0>;
323882bdc939SRajeshwari
323982bdc939SRajeshwari			thermal-sensors = <&tsens0 7>;
324082bdc939SRajeshwari
324182bdc939SRajeshwari			trips {
324282bdc939SRajeshwari				cpuss0_alert0: trip-point0 {
324382bdc939SRajeshwari					temperature = <90000>;
324482bdc939SRajeshwari					hysteresis = <2000>;
324582bdc939SRajeshwari					type = "hot";
324682bdc939SRajeshwari				};
324782bdc939SRajeshwari				cpuss0_crit: cluster0_crit {
324882bdc939SRajeshwari					temperature = <110000>;
324982bdc939SRajeshwari					hysteresis = <2000>;
325082bdc939SRajeshwari					type = "critical";
325182bdc939SRajeshwari				};
325282bdc939SRajeshwari			};
325382bdc939SRajeshwari		};
325482bdc939SRajeshwari
325582bdc939SRajeshwari		cpuss1-thermal {
325622337b91SRajeshwari			polling-delay-passive = <0>;
325722337b91SRajeshwari			polling-delay = <0>;
325882bdc939SRajeshwari
325982bdc939SRajeshwari			thermal-sensors = <&tsens0 8>;
326082bdc939SRajeshwari
326182bdc939SRajeshwari			trips {
326282bdc939SRajeshwari				cpuss1_alert0: trip-point0 {
326382bdc939SRajeshwari					temperature = <90000>;
326482bdc939SRajeshwari					hysteresis = <2000>;
326582bdc939SRajeshwari					type = "hot";
326682bdc939SRajeshwari				};
326782bdc939SRajeshwari				cpuss1_crit: cluster0_crit {
326882bdc939SRajeshwari					temperature = <110000>;
326982bdc939SRajeshwari					hysteresis = <2000>;
327082bdc939SRajeshwari					type = "critical";
327182bdc939SRajeshwari				};
327282bdc939SRajeshwari			};
327382bdc939SRajeshwari		};
327482bdc939SRajeshwari
327582bdc939SRajeshwari		gpuss0-thermal {
327622337b91SRajeshwari			polling-delay-passive = <0>;
327722337b91SRajeshwari			polling-delay = <0>;
327882bdc939SRajeshwari
327982bdc939SRajeshwari			thermal-sensors = <&tsens0 13>;
328082bdc939SRajeshwari
328182bdc939SRajeshwari			trips {
328282bdc939SRajeshwari				gpuss0_alert0: trip-point0 {
328382bdc939SRajeshwari					temperature = <90000>;
328482bdc939SRajeshwari					hysteresis = <2000>;
328582bdc939SRajeshwari					type = "hot";
328682bdc939SRajeshwari				};
328754c22ae5SRajeshwari
328854c22ae5SRajeshwari				gpuss0_crit: gpuss0_crit {
328954c22ae5SRajeshwari					temperature = <110000>;
329054c22ae5SRajeshwari					hysteresis = <2000>;
329154c22ae5SRajeshwari					type = "critical";
329254c22ae5SRajeshwari				};
329382bdc939SRajeshwari			};
329482bdc939SRajeshwari		};
329582bdc939SRajeshwari
329682bdc939SRajeshwari		gpuss1-thermal {
329722337b91SRajeshwari			polling-delay-passive = <0>;
329822337b91SRajeshwari			polling-delay = <0>;
329982bdc939SRajeshwari
330082bdc939SRajeshwari			thermal-sensors = <&tsens0 14>;
330182bdc939SRajeshwari
330282bdc939SRajeshwari			trips {
330382bdc939SRajeshwari				gpuss1_alert0: trip-point0 {
330482bdc939SRajeshwari					temperature = <90000>;
330582bdc939SRajeshwari					hysteresis = <2000>;
330682bdc939SRajeshwari					type = "hot";
330782bdc939SRajeshwari				};
330854c22ae5SRajeshwari
330954c22ae5SRajeshwari				gpuss1_crit: gpuss1_crit {
331054c22ae5SRajeshwari					temperature = <110000>;
331154c22ae5SRajeshwari					hysteresis = <2000>;
331254c22ae5SRajeshwari					type = "critical";
331354c22ae5SRajeshwari				};
331482bdc939SRajeshwari			};
331582bdc939SRajeshwari		};
331682bdc939SRajeshwari
331782bdc939SRajeshwari		aoss1-thermal {
331822337b91SRajeshwari			polling-delay-passive = <0>;
331922337b91SRajeshwari			polling-delay = <0>;
332082bdc939SRajeshwari
332182bdc939SRajeshwari			thermal-sensors = <&tsens1 0>;
332282bdc939SRajeshwari
332382bdc939SRajeshwari			trips {
332482bdc939SRajeshwari				aoss1_alert0: trip-point0 {
332582bdc939SRajeshwari					temperature = <90000>;
332682bdc939SRajeshwari					hysteresis = <2000>;
332782bdc939SRajeshwari					type = "hot";
332882bdc939SRajeshwari				};
332954c22ae5SRajeshwari
333054c22ae5SRajeshwari				aoss1_crit: aoss1_crit {
333154c22ae5SRajeshwari					temperature = <110000>;
333254c22ae5SRajeshwari					hysteresis = <2000>;
333354c22ae5SRajeshwari					type = "critical";
333454c22ae5SRajeshwari				};
333582bdc939SRajeshwari			};
333682bdc939SRajeshwari		};
333782bdc939SRajeshwari
333882bdc939SRajeshwari		cwlan-thermal {
333922337b91SRajeshwari			polling-delay-passive = <0>;
334022337b91SRajeshwari			polling-delay = <0>;
334182bdc939SRajeshwari
334282bdc939SRajeshwari			thermal-sensors = <&tsens1 1>;
334382bdc939SRajeshwari
334482bdc939SRajeshwari			trips {
334582bdc939SRajeshwari				cwlan_alert0: trip-point0 {
334682bdc939SRajeshwari					temperature = <90000>;
334782bdc939SRajeshwari					hysteresis = <2000>;
334882bdc939SRajeshwari					type = "hot";
334982bdc939SRajeshwari				};
335054c22ae5SRajeshwari
335154c22ae5SRajeshwari				cwlan_crit: cwlan_crit {
335254c22ae5SRajeshwari					temperature = <110000>;
335354c22ae5SRajeshwari					hysteresis = <2000>;
335454c22ae5SRajeshwari					type = "critical";
335554c22ae5SRajeshwari				};
335682bdc939SRajeshwari			};
335782bdc939SRajeshwari		};
335882bdc939SRajeshwari
335982bdc939SRajeshwari		audio-thermal {
336022337b91SRajeshwari			polling-delay-passive = <0>;
336122337b91SRajeshwari			polling-delay = <0>;
336282bdc939SRajeshwari
336382bdc939SRajeshwari			thermal-sensors = <&tsens1 2>;
336482bdc939SRajeshwari
336582bdc939SRajeshwari			trips {
336682bdc939SRajeshwari				audio_alert0: trip-point0 {
336782bdc939SRajeshwari					temperature = <90000>;
336882bdc939SRajeshwari					hysteresis = <2000>;
336982bdc939SRajeshwari					type = "hot";
337082bdc939SRajeshwari				};
337154c22ae5SRajeshwari
337254c22ae5SRajeshwari				audio_crit: audio_crit {
337354c22ae5SRajeshwari					temperature = <110000>;
337454c22ae5SRajeshwari					hysteresis = <2000>;
337554c22ae5SRajeshwari					type = "critical";
337654c22ae5SRajeshwari				};
337782bdc939SRajeshwari			};
337882bdc939SRajeshwari		};
337982bdc939SRajeshwari
338082bdc939SRajeshwari		ddr-thermal {
338122337b91SRajeshwari			polling-delay-passive = <0>;
338222337b91SRajeshwari			polling-delay = <0>;
338382bdc939SRajeshwari
338482bdc939SRajeshwari			thermal-sensors = <&tsens1 3>;
338582bdc939SRajeshwari
338682bdc939SRajeshwari			trips {
338782bdc939SRajeshwari				ddr_alert0: trip-point0 {
338882bdc939SRajeshwari					temperature = <90000>;
338982bdc939SRajeshwari					hysteresis = <2000>;
339082bdc939SRajeshwari					type = "hot";
339182bdc939SRajeshwari				};
339254c22ae5SRajeshwari
339354c22ae5SRajeshwari				ddr_crit: ddr_crit {
339454c22ae5SRajeshwari					temperature = <110000>;
339554c22ae5SRajeshwari					hysteresis = <2000>;
339654c22ae5SRajeshwari					type = "critical";
339754c22ae5SRajeshwari				};
339882bdc939SRajeshwari			};
339982bdc939SRajeshwari		};
340082bdc939SRajeshwari
340182bdc939SRajeshwari		q6-hvx-thermal {
340222337b91SRajeshwari			polling-delay-passive = <0>;
340322337b91SRajeshwari			polling-delay = <0>;
340482bdc939SRajeshwari
340582bdc939SRajeshwari			thermal-sensors = <&tsens1 4>;
340682bdc939SRajeshwari
340782bdc939SRajeshwari			trips {
340882bdc939SRajeshwari				q6_hvx_alert0: trip-point0 {
340982bdc939SRajeshwari					temperature = <90000>;
341082bdc939SRajeshwari					hysteresis = <2000>;
341182bdc939SRajeshwari					type = "hot";
341282bdc939SRajeshwari				};
341354c22ae5SRajeshwari
341454c22ae5SRajeshwari				q6_hvx_crit: q6_hvx_crit {
341554c22ae5SRajeshwari					temperature = <110000>;
341654c22ae5SRajeshwari					hysteresis = <2000>;
341754c22ae5SRajeshwari					type = "critical";
341854c22ae5SRajeshwari				};
341982bdc939SRajeshwari			};
342082bdc939SRajeshwari		};
342182bdc939SRajeshwari
342282bdc939SRajeshwari		camera-thermal {
342322337b91SRajeshwari			polling-delay-passive = <0>;
342422337b91SRajeshwari			polling-delay = <0>;
342582bdc939SRajeshwari
342682bdc939SRajeshwari			thermal-sensors = <&tsens1 5>;
342782bdc939SRajeshwari
342882bdc939SRajeshwari			trips {
342982bdc939SRajeshwari				camera_alert0: trip-point0 {
343082bdc939SRajeshwari					temperature = <90000>;
343182bdc939SRajeshwari					hysteresis = <2000>;
343282bdc939SRajeshwari					type = "hot";
343382bdc939SRajeshwari				};
343454c22ae5SRajeshwari
343554c22ae5SRajeshwari				camera_crit: camera_crit {
343654c22ae5SRajeshwari					temperature = <110000>;
343754c22ae5SRajeshwari					hysteresis = <2000>;
343854c22ae5SRajeshwari					type = "critical";
343954c22ae5SRajeshwari				};
344082bdc939SRajeshwari			};
344182bdc939SRajeshwari		};
344282bdc939SRajeshwari
344382bdc939SRajeshwari		mdm-core-thermal {
344422337b91SRajeshwari			polling-delay-passive = <0>;
344522337b91SRajeshwari			polling-delay = <0>;
344682bdc939SRajeshwari
344782bdc939SRajeshwari			thermal-sensors = <&tsens1 6>;
344882bdc939SRajeshwari
344982bdc939SRajeshwari			trips {
345082bdc939SRajeshwari				mdm_alert0: trip-point0 {
345182bdc939SRajeshwari					temperature = <90000>;
345282bdc939SRajeshwari					hysteresis = <2000>;
345382bdc939SRajeshwari					type = "hot";
345482bdc939SRajeshwari				};
345554c22ae5SRajeshwari
345654c22ae5SRajeshwari				mdm_crit: mdm_crit {
345754c22ae5SRajeshwari					temperature = <110000>;
345854c22ae5SRajeshwari					hysteresis = <2000>;
345954c22ae5SRajeshwari					type = "critical";
346054c22ae5SRajeshwari				};
346182bdc939SRajeshwari			};
346282bdc939SRajeshwari		};
346382bdc939SRajeshwari
346482bdc939SRajeshwari		mdm-dsp-thermal {
346522337b91SRajeshwari			polling-delay-passive = <0>;
346622337b91SRajeshwari			polling-delay = <0>;
346782bdc939SRajeshwari
346882bdc939SRajeshwari			thermal-sensors = <&tsens1 7>;
346982bdc939SRajeshwari
347082bdc939SRajeshwari			trips {
347182bdc939SRajeshwari				mdm_dsp_alert0: trip-point0 {
347282bdc939SRajeshwari					temperature = <90000>;
347382bdc939SRajeshwari					hysteresis = <2000>;
347482bdc939SRajeshwari					type = "hot";
347582bdc939SRajeshwari				};
347654c22ae5SRajeshwari
347754c22ae5SRajeshwari				mdm_dsp_crit: mdm_dsp_crit {
347854c22ae5SRajeshwari					temperature = <110000>;
347954c22ae5SRajeshwari					hysteresis = <2000>;
348054c22ae5SRajeshwari					type = "critical";
348154c22ae5SRajeshwari				};
348282bdc939SRajeshwari			};
348382bdc939SRajeshwari		};
348482bdc939SRajeshwari
348582bdc939SRajeshwari		npu-thermal {
348622337b91SRajeshwari			polling-delay-passive = <0>;
348722337b91SRajeshwari			polling-delay = <0>;
348882bdc939SRajeshwari
348982bdc939SRajeshwari			thermal-sensors = <&tsens1 8>;
349082bdc939SRajeshwari
349182bdc939SRajeshwari			trips {
349282bdc939SRajeshwari				npu_alert0: trip-point0 {
349382bdc939SRajeshwari					temperature = <90000>;
349482bdc939SRajeshwari					hysteresis = <2000>;
349582bdc939SRajeshwari					type = "hot";
349682bdc939SRajeshwari				};
349754c22ae5SRajeshwari
349854c22ae5SRajeshwari				npu_crit: npu_crit {
349954c22ae5SRajeshwari					temperature = <110000>;
350054c22ae5SRajeshwari					hysteresis = <2000>;
350154c22ae5SRajeshwari					type = "critical";
350254c22ae5SRajeshwari				};
350382bdc939SRajeshwari			};
350482bdc939SRajeshwari		};
350582bdc939SRajeshwari
350682bdc939SRajeshwari		video-thermal {
350722337b91SRajeshwari			polling-delay-passive = <0>;
350822337b91SRajeshwari			polling-delay = <0>;
350982bdc939SRajeshwari
351082bdc939SRajeshwari			thermal-sensors = <&tsens1 9>;
351182bdc939SRajeshwari
351282bdc939SRajeshwari			trips {
351382bdc939SRajeshwari				video_alert0: trip-point0 {
351482bdc939SRajeshwari					temperature = <90000>;
351582bdc939SRajeshwari					hysteresis = <2000>;
351682bdc939SRajeshwari					type = "hot";
351782bdc939SRajeshwari				};
351854c22ae5SRajeshwari
351954c22ae5SRajeshwari				video_crit: video_crit {
352054c22ae5SRajeshwari					temperature = <110000>;
352154c22ae5SRajeshwari					hysteresis = <2000>;
352254c22ae5SRajeshwari					type = "critical";
352354c22ae5SRajeshwari				};
352482bdc939SRajeshwari			};
352582bdc939SRajeshwari		};
352682bdc939SRajeshwari	};
352782bdc939SRajeshwari
352890db71e4SRajendra Nayak	timer {
352990db71e4SRajendra Nayak		compatible = "arm,armv8-timer";
353090db71e4SRajendra Nayak		interrupts = <GIC_PPI 1 IRQ_TYPE_LEVEL_LOW>,
353190db71e4SRajendra Nayak			     <GIC_PPI 2 IRQ_TYPE_LEVEL_LOW>,
353290db71e4SRajendra Nayak			     <GIC_PPI 3 IRQ_TYPE_LEVEL_LOW>,
353390db71e4SRajendra Nayak			     <GIC_PPI 0 IRQ_TYPE_LEVEL_LOW>;
353490db71e4SRajendra Nayak	};
353590db71e4SRajendra Nayak};
3536