xref: /linux/arch/arm64/boot/dts/qcom/sa8775p-ride.dts (revision 561add0da6d3d07c9bccb0832fb6ed5619167d26)
1// SPDX-License-Identifier: BSD-3-Clause
2/*
3 * Copyright (c) 2023, Linaro Limited
4 */
5
6/dts-v1/;
7
8#include <dt-bindings/gpio/gpio.h>
9#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
10
11#include "sa8775p.dtsi"
12#include "sa8775p-pmics.dtsi"
13
14/ {
15	model = "Qualcomm SA8775P Ride";
16	compatible = "qcom,sa8775p-ride", "qcom,sa8775p";
17
18	aliases {
19		ethernet0 = &ethernet0;
20		ethernet1 = &ethernet1;
21		i2c11 = &i2c11;
22		i2c18 = &i2c18;
23		serial0 = &uart10;
24		serial1 = &uart12;
25		serial2 = &uart17;
26		spi16 = &spi16;
27		ufshc1 = &ufs_mem_hc;
28	};
29
30	chosen {
31		stdout-path = "serial0:115200n8";
32	};
33};
34
35&apps_rsc {
36	regulators-0 {
37		compatible = "qcom,pmm8654au-rpmh-regulators";
38		qcom,pmic-id = "a";
39
40		vreg_s4a: smps4 {
41			regulator-name = "vreg_s4a";
42			regulator-min-microvolt = <1800000>;
43			regulator-max-microvolt = <1816000>;
44			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
45		};
46
47		vreg_s5a: smps5 {
48			regulator-name = "vreg_s5a";
49			regulator-min-microvolt = <1850000>;
50			regulator-max-microvolt = <1996000>;
51			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
52		};
53
54		vreg_s9a: smps9 {
55			regulator-name = "vreg_s9a";
56			regulator-min-microvolt = <535000>;
57			regulator-max-microvolt = <1120000>;
58			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
59		};
60
61		vreg_l4a: ldo4 {
62			regulator-name = "vreg_l4a";
63			regulator-min-microvolt = <788000>;
64			regulator-max-microvolt = <1050000>;
65			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
66			regulator-allow-set-load;
67			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
68						   RPMH_REGULATOR_MODE_HPM>;
69		};
70
71		vreg_l5a: ldo5 {
72			regulator-name = "vreg_l5a";
73			regulator-min-microvolt = <870000>;
74			regulator-max-microvolt = <950000>;
75			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
76			regulator-allow-set-load;
77			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
78						   RPMH_REGULATOR_MODE_HPM>;
79		};
80
81		vreg_l6a: ldo6 {
82			regulator-name = "vreg_l6a";
83			regulator-min-microvolt = <870000>;
84			regulator-max-microvolt = <970000>;
85			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
86			regulator-allow-set-load;
87			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
88						   RPMH_REGULATOR_MODE_HPM>;
89		};
90
91		vreg_l7a: ldo7 {
92			regulator-name = "vreg_l7a";
93			regulator-min-microvolt = <720000>;
94			regulator-max-microvolt = <950000>;
95			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
96			regulator-allow-set-load;
97			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
98						   RPMH_REGULATOR_MODE_HPM>;
99		};
100
101		vreg_l8a: ldo8 {
102			regulator-name = "vreg_l8a";
103			regulator-min-microvolt = <2504000>;
104			regulator-max-microvolt = <3300000>;
105			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
106			regulator-allow-set-load;
107			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
108						   RPMH_REGULATOR_MODE_HPM>;
109		};
110
111		vreg_l9a: ldo9 {
112			regulator-name = "vreg_l9a";
113			regulator-min-microvolt = <2970000>;
114			regulator-max-microvolt = <3544000>;
115			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
116			regulator-allow-set-load;
117			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
118						   RPMH_REGULATOR_MODE_HPM>;
119		};
120	};
121
122	regulators-1 {
123		compatible = "qcom,pmm8654au-rpmh-regulators";
124		qcom,pmic-id = "c";
125
126		vreg_l1c: ldo1 {
127			regulator-name = "vreg_l1c";
128			regulator-min-microvolt = <1140000>;
129			regulator-max-microvolt = <1260000>;
130			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
131			regulator-allow-set-load;
132			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
133						   RPMH_REGULATOR_MODE_HPM>;
134		};
135
136		vreg_l2c: ldo2 {
137			regulator-name = "vreg_l2c";
138			regulator-min-microvolt = <900000>;
139			regulator-max-microvolt = <1100000>;
140			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
141			regulator-allow-set-load;
142			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
143						   RPMH_REGULATOR_MODE_HPM>;
144		};
145
146		vreg_l3c: ldo3 {
147			regulator-name = "vreg_l3c";
148			regulator-min-microvolt = <1100000>;
149			regulator-max-microvolt = <1300000>;
150			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
151			regulator-allow-set-load;
152			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
153						   RPMH_REGULATOR_MODE_HPM>;
154		};
155
156		vreg_l4c: ldo4 {
157			regulator-name = "vreg_l4c";
158			regulator-min-microvolt = <1200000>;
159			regulator-max-microvolt = <1200000>;
160			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
161			/*
162			 * FIXME: This should have regulator-allow-set-load but
163			 * we're getting an over-current fault from the PMIC
164			 * when switching to LPM.
165			 */
166		};
167
168		vreg_l5c: ldo5 {
169			regulator-name = "vreg_l5c";
170			regulator-min-microvolt = <1100000>;
171			regulator-max-microvolt = <1300000>;
172			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
173			regulator-allow-set-load;
174			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
175						   RPMH_REGULATOR_MODE_HPM>;
176		};
177
178		vreg_l6c: ldo6 {
179			regulator-name = "vreg_l6c";
180			regulator-min-microvolt = <1620000>;
181			regulator-max-microvolt = <1980000>;
182			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
183			regulator-allow-set-load;
184			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
185						   RPMH_REGULATOR_MODE_HPM>;
186		};
187
188		vreg_l7c: ldo7 {
189			regulator-name = "vreg_l7c";
190			regulator-min-microvolt = <1620000>;
191			regulator-max-microvolt = <2000000>;
192			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
193			regulator-allow-set-load;
194			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
195						   RPMH_REGULATOR_MODE_HPM>;
196		};
197
198		vreg_l8c: ldo8 {
199			regulator-name = "vreg_l8c";
200			regulator-min-microvolt = <2400000>;
201			regulator-max-microvolt = <3300000>;
202			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
203			regulator-allow-set-load;
204			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
205						   RPMH_REGULATOR_MODE_HPM>;
206		};
207
208		vreg_l9c: ldo9 {
209			regulator-name = "vreg_l9c";
210			regulator-min-microvolt = <1650000>;
211			regulator-max-microvolt = <2700000>;
212			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
213			regulator-allow-set-load;
214			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
215						   RPMH_REGULATOR_MODE_HPM>;
216		};
217	};
218
219	regulators-2 {
220		compatible = "qcom,pmm8654au-rpmh-regulators";
221		qcom,pmic-id = "e";
222
223		vreg_s4e: smps4 {
224			regulator-name = "vreg_s4e";
225			regulator-min-microvolt = <970000>;
226			regulator-max-microvolt = <1520000>;
227			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
228		};
229
230		vreg_s7e: smps7 {
231			regulator-name = "vreg_s7e";
232			regulator-min-microvolt = <1010000>;
233			regulator-max-microvolt = <1170000>;
234			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
235		};
236
237		vreg_s9e: smps9 {
238			regulator-name = "vreg_s9e";
239			regulator-min-microvolt = <300000>;
240			regulator-max-microvolt = <570000>;
241			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
242		};
243
244		vreg_l6e: ldo6 {
245			regulator-name = "vreg_l6e";
246			regulator-min-microvolt = <1280000>;
247			regulator-max-microvolt = <1450000>;
248			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
249			regulator-allow-set-load;
250			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
251						   RPMH_REGULATOR_MODE_HPM>;
252		};
253
254		vreg_l8e: ldo8 {
255			regulator-name = "vreg_l8e";
256			regulator-min-microvolt = <1800000>;
257			regulator-max-microvolt = <1950000>;
258			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
259			regulator-allow-set-load;
260			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
261						   RPMH_REGULATOR_MODE_HPM>;
262		};
263	};
264};
265
266&ethernet0 {
267	phy-mode = "sgmii";
268	phy-handle = <&sgmii_phy0>;
269
270	pinctrl-0 = <&ethernet0_default>;
271	pinctrl-names = "default";
272
273	snps,mtl-rx-config = <&mtl_rx_setup>;
274	snps,mtl-tx-config = <&mtl_tx_setup>;
275	snps,ps-speed = <1000>;
276
277	status = "okay";
278
279	mdio {
280		compatible = "snps,dwmac-mdio";
281		#address-cells = <1>;
282		#size-cells = <0>;
283
284		sgmii_phy0: phy@8 {
285			compatible = "ethernet-phy-id0141.0dd4";
286			reg = <0x8>;
287			device_type = "ethernet-phy";
288			reset-gpios = <&pmm8654au_2_gpios 8 GPIO_ACTIVE_LOW>;
289			reset-assert-us = <11000>;
290			reset-deassert-us = <70000>;
291		};
292
293		sgmii_phy1: phy@a {
294			compatible = "ethernet-phy-id0141.0dd4";
295			reg = <0xa>;
296			device_type = "ethernet-phy";
297			reset-gpios = <&pmm8654au_2_gpios 9 GPIO_ACTIVE_LOW>;
298			reset-assert-us = <11000>;
299			reset-deassert-us = <70000>;
300		};
301	};
302
303	mtl_rx_setup: rx-queues-config {
304		snps,rx-queues-to-use = <4>;
305		snps,rx-sched-sp;
306
307		queue0 {
308			snps,dcb-algorithm;
309			snps,map-to-dma-channel = <0x0>;
310			snps,route-up;
311			snps,priority = <0x1>;
312		};
313
314		queue1 {
315			snps,dcb-algorithm;
316			snps,map-to-dma-channel = <0x1>;
317			snps,route-ptp;
318		};
319
320		queue2 {
321			snps,avb-algorithm;
322			snps,map-to-dma-channel = <0x2>;
323			snps,route-avcp;
324		};
325
326		queue3 {
327			snps,avb-algorithm;
328			snps,map-to-dma-channel = <0x3>;
329			snps,priority = <0xc>;
330		};
331	};
332
333	mtl_tx_setup: tx-queues-config {
334		snps,tx-queues-to-use = <4>;
335		snps,tx-sched-sp;
336
337		queue0 {
338			snps,dcb-algorithm;
339		};
340
341		queue1 {
342			snps,dcb-algorithm;
343		};
344
345		queue2 {
346			snps,avb-algorithm;
347			snps,send_slope = <0x1000>;
348			snps,idle_slope = <0x1000>;
349			snps,high_credit = <0x3e800>;
350			snps,low_credit = <0xffc18000>;
351		};
352
353		queue3 {
354			snps,avb-algorithm;
355			snps,send_slope = <0x1000>;
356			snps,idle_slope = <0x1000>;
357			snps,high_credit = <0x3e800>;
358			snps,low_credit = <0xffc18000>;
359		};
360	};
361};
362
363&ethernet1 {
364	phy-mode = "sgmii";
365	phy-handle = <&sgmii_phy1>;
366
367	snps,mtl-rx-config = <&mtl_rx_setup1>;
368	snps,mtl-tx-config = <&mtl_tx_setup1>;
369	snps,ps-speed = <1000>;
370
371	status = "okay";
372
373	mtl_rx_setup1: rx-queues-config {
374		snps,rx-queues-to-use = <4>;
375		snps,rx-sched-sp;
376
377		queue0 {
378			snps,dcb-algorithm;
379			snps,map-to-dma-channel = <0x0>;
380			snps,route-up;
381			snps,priority = <0x1>;
382		};
383
384		queue1 {
385			snps,dcb-algorithm;
386			snps,map-to-dma-channel = <0x1>;
387			snps,route-ptp;
388		};
389
390		queue2 {
391			snps,avb-algorithm;
392			snps,map-to-dma-channel = <0x2>;
393			snps,route-avcp;
394		};
395
396		queue3 {
397			snps,avb-algorithm;
398			snps,map-to-dma-channel = <0x3>;
399			snps,priority = <0xc>;
400		};
401	};
402
403	mtl_tx_setup1: tx-queues-config {
404		snps,tx-queues-to-use = <4>;
405		snps,tx-sched-sp;
406
407		queue0 {
408			snps,dcb-algorithm;
409		};
410
411		queue1 {
412			snps,dcb-algorithm;
413		};
414
415		queue2 {
416			snps,avb-algorithm;
417			snps,send_slope = <0x1000>;
418			snps,idle_slope = <0x1000>;
419			snps,high_credit = <0x3e800>;
420			snps,low_credit = <0xffc18000>;
421		};
422
423		queue3 {
424			snps,avb-algorithm;
425			snps,send_slope = <0x1000>;
426			snps,idle_slope = <0x1000>;
427			snps,high_credit = <0x3e800>;
428			snps,low_credit = <0xffc18000>;
429		};
430	};
431};
432
433&i2c11 {
434	clock-frequency = <400000>;
435	pinctrl-0 = <&qup_i2c11_default>;
436	pinctrl-names = "default";
437	status = "okay";
438};
439
440&i2c18 {
441	clock-frequency = <400000>;
442	pinctrl-0 = <&qup_i2c18_default>;
443	pinctrl-names = "default";
444	status = "okay";
445};
446
447&pmm8654au_0_gpios {
448	gpio-line-names = "DS_EN",
449			  "POFF_COMPLETE",
450			  "UFS0_VER_ID",
451			  "FAST_POFF",
452			  "DBU1_PON_DONE",
453			  "AOSS_SLEEP",
454			  "CAM_DES0_EN",
455			  "CAM_DES1_EN",
456			  "CAM_DES2_EN",
457			  "CAM_DES3_EN",
458			  "UEFI",
459			  "ANALOG_PON_OPT";
460};
461
462&pmm8654au_1_gpios {
463	gpio-line-names = "PMIC_C_ID0",
464			  "PMIC_C_ID1",
465			  "UFS1_VER_ID",
466			  "IPA_PWR",
467			  "",
468			  "WLAN_DBU4_EN",
469			  "WLAN_EN",
470			  "BT_EN",
471			  "USB2_PWR_EN",
472			  "USB2_FAULT";
473
474	usb2_en_state: usb2-en-state {
475		pins = "gpio9";
476		function = "normal";
477		output-high;
478		power-source = <0>;
479	};
480};
481
482&pmm8654au_2_gpios {
483	gpio-line-names = "PMIC_E_ID0",
484			  "PMIC_E_ID1",
485			  "USB0_PWR_EN",
486			  "USB0_FAULT",
487			  "SENSOR_IRQ_1",
488			  "SENSOR_IRQ_2",
489			  "SENSOR_RST",
490			  "SGMIIO0_RST",
491			  "SGMIIO1_RST",
492			  "USB1_PWR_ENABLE",
493			  "USB1_FAULT",
494			  "VMON_SPX8";
495
496	usb0_en_state: usb0-en-state {
497		pins = "gpio3";
498		function = "normal";
499		output-high;
500		power-source = <0>;
501	};
502
503	usb1_en_state: usb1-en-state {
504		pins = "gpio10";
505		function = "normal";
506		output-high;
507		power-source = <0>;
508	};
509};
510
511&pmm8654au_3_gpios {
512	gpio-line-names = "PMIC_G_ID0",
513			  "PMIC_G_ID1",
514			  "GNSS_RST",
515			  "GNSS_EN",
516			  "GNSS_BOOT_MODE";
517};
518
519&qupv3_id_1 {
520	status = "okay";
521};
522
523&qupv3_id_2 {
524	status = "okay";
525};
526
527&serdes0 {
528	phy-supply = <&vreg_l5a>;
529	status = "okay";
530};
531
532&serdes1 {
533	phy-supply = <&vreg_l5a>;
534	status = "okay";
535};
536
537&sleep_clk {
538	clock-frequency = <32764>;
539};
540
541&spi16 {
542	pinctrl-0 = <&qup_spi16_default>;
543	pinctrl-names = "default";
544	status = "okay";
545};
546
547&tlmm {
548	ethernet0_default: ethernet0-default-state {
549		ethernet0_mdc: ethernet0-mdc-pins {
550			pins = "gpio8";
551			function = "emac0_mdc";
552			drive-strength = <16>;
553			bias-pull-up;
554		};
555
556		ethernet0_mdio: ethernet0-mdio-pins {
557			pins = "gpio9";
558			function = "emac0_mdio";
559			drive-strength = <16>;
560			bias-pull-up;
561		};
562	};
563
564	qup_uart10_default: qup-uart10-state {
565		pins = "gpio46", "gpio47";
566		function = "qup1_se3";
567	};
568
569	qup_spi16_default: qup-spi16-state {
570		pins = "gpio86", "gpio87", "gpio88", "gpio89";
571		function = "qup2_se2";
572		drive-strength = <6>;
573		bias-disable;
574	};
575
576	qup_i2c11_default: qup-i2c11-state {
577		pins = "gpio48", "gpio49";
578		function = "qup1_se4";
579		drive-strength = <2>;
580		bias-pull-up;
581	};
582
583	qup_i2c18_default: qup-i2c18-state {
584		pins = "gpio95", "gpio96";
585		function = "qup2_se4";
586		drive-strength = <2>;
587		bias-pull-up;
588	};
589
590	qup_uart12_default: qup-uart12-state {
591		qup_uart12_cts: qup-uart12-cts-pins {
592			pins = "gpio52";
593			function = "qup1_se5";
594			bias-disable;
595		};
596
597		qup_uart12_rts: qup-uart12-rts-pins {
598			pins = "gpio53";
599			function = "qup1_se5";
600			bias-pull-down;
601		};
602
603		qup_uart12_tx: qup-uart12-tx-pins {
604			pins = "gpio54";
605			function = "qup1_se5";
606			bias-pull-up;
607		};
608
609		qup_uart12_rx: qup-uart12-rx-pins {
610			pins = "gpio55";
611			function = "qup1_se5";
612			bias-pull-down;
613		};
614	};
615
616	qup_uart17_default: qup-uart17-state {
617		qup_uart17_cts: qup-uart17-cts-pins {
618			pins = "gpio91";
619			function = "qup2_se3";
620			bias-disable;
621		};
622
623		qup_uart17_rts: qup0-uart17-rts-pins {
624			pins = "gpio92";
625			function = "qup2_se3";
626			bias-pull-down;
627		};
628
629		qup_uart17_tx: qup0-uart17-tx-pins {
630			pins = "gpio93";
631			function = "qup2_se3";
632			bias-pull-up;
633		};
634
635		qup_uart17_rx: qup0-uart17-rx-pins {
636			pins = "gpio94";
637			function = "qup2_se3";
638			bias-pull-down;
639		};
640	};
641
642	pcie0_default_state: pcie0-default-state {
643		perst-pins {
644			pins = "gpio2";
645			function = "gpio";
646			drive-strength = <2>;
647			bias-pull-down;
648		};
649
650		clkreq-pins {
651			pins = "gpio1";
652			function = "pcie0_clkreq";
653			drive-strength = <2>;
654			bias-pull-up;
655		};
656
657		wake-pins {
658			pins = "gpio0";
659			function = "gpio";
660			drive-strength = <2>;
661			bias-pull-up;
662		};
663	};
664
665	pcie1_default_state: pcie1-default-state {
666		perst-pins {
667			pins = "gpio4";
668			function = "gpio";
669			drive-strength = <2>;
670			bias-pull-down;
671		};
672
673		clkreq-pins {
674			pins = "gpio3";
675			function = "pcie1_clkreq";
676			drive-strength = <2>;
677			bias-pull-up;
678		};
679
680		wake-pins {
681			pins = "gpio5";
682			function = "gpio";
683			drive-strength = <2>;
684			bias-pull-up;
685		};
686	};
687};
688
689&pcie0 {
690	perst-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
691	wake-gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
692
693	pinctrl-names = "default";
694	pinctrl-0 = <&pcie0_default_state>;
695
696	status = "okay";
697};
698
699&pcie1 {
700	perst-gpios = <&tlmm 4 GPIO_ACTIVE_LOW>;
701	wake-gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>;
702
703	pinctrl-names = "default";
704	pinctrl-0 = <&pcie1_default_state>;
705
706	status = "okay";
707};
708
709&pcie0_phy {
710	vdda-phy-supply = <&vreg_l5a>;
711	vdda-pll-supply = <&vreg_l1c>;
712
713	status = "okay";
714};
715
716&pcie1_phy {
717	vdda-phy-supply = <&vreg_l5a>;
718	vdda-pll-supply = <&vreg_l1c>;
719
720	status = "okay";
721};
722
723&uart10 {
724	compatible = "qcom,geni-debug-uart";
725	pinctrl-0 = <&qup_uart10_default>;
726	pinctrl-names = "default";
727	status = "okay";
728};
729
730&uart12 {
731	pinctrl-0 = <&qup_uart12_default>;
732	pinctrl-names = "default";
733	status = "okay";
734};
735
736&uart17 {
737	pinctrl-0 = <&qup_uart17_default>;
738	pinctrl-names = "default";
739	status = "okay";
740};
741
742&ufs_mem_hc {
743	reset-gpios = <&tlmm 149 GPIO_ACTIVE_LOW>;
744	vcc-supply = <&vreg_l8a>;
745	vcc-max-microamp = <1100000>;
746	vccq-supply = <&vreg_l4c>;
747	vccq-max-microamp = <1200000>;
748
749	status = "okay";
750};
751
752&ufs_mem_phy {
753	vdda-phy-supply = <&vreg_l4a>;
754	vdda-pll-supply = <&vreg_l1c>;
755
756	status = "okay";
757};
758
759&usb_0 {
760	pinctrl-names = "default";
761	pinctrl-0 = <&usb0_en_state>;
762
763	status = "okay";
764};
765
766&usb_0_dwc3 {
767	dr_mode = "peripheral";
768};
769
770&usb_0_hsphy {
771	vdda-pll-supply = <&vreg_l7a>;
772	vdda18-supply = <&vreg_l6c>;
773	vdda33-supply = <&vreg_l9a>;
774
775	status = "okay";
776};
777
778&usb_0_qmpphy {
779	vdda-phy-supply = <&vreg_l1c>;
780	vdda-pll-supply = <&vreg_l7a>;
781
782	status = "okay";
783};
784
785&usb_1 {
786	pinctrl-names = "default";
787	pinctrl-0 = <&usb1_en_state>;
788
789	status = "okay";
790};
791
792&usb_1_dwc3 {
793	dr_mode = "host";
794};
795
796&usb_1_hsphy {
797	vdda-pll-supply = <&vreg_l7a>;
798	vdda18-supply = <&vreg_l6c>;
799	vdda33-supply = <&vreg_l9a>;
800
801	status = "okay";
802};
803
804&usb_1_qmpphy {
805	vdda-phy-supply = <&vreg_l1c>;
806	vdda-pll-supply = <&vreg_l7a>;
807
808	status = "okay";
809};
810
811&usb_2 {
812	pinctrl-names = "default";
813	pinctrl-0 = <&usb2_en_state>;
814
815	status = "okay";
816};
817
818&usb_2_dwc3 {
819	dr_mode = "host";
820};
821
822&usb_2_hsphy {
823	vdda-pll-supply = <&vreg_l7a>;
824	vdda18-supply = <&vreg_l6c>;
825	vdda33-supply = <&vreg_l9a>;
826
827	status = "okay";
828};
829
830&xo_board_clk {
831	clock-frequency = <38400000>;
832};
833