xref: /linux/arch/arm64/boot/dts/qcom/sa8775p-ride.dts (revision 24168c5e6dfbdd5b414f048f47f75d64533296ca)
1// SPDX-License-Identifier: BSD-3-Clause
2/*
3 * Copyright (c) 2023, Linaro Limited
4 */
5
6/dts-v1/;
7
8#include <dt-bindings/gpio/gpio.h>
9#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
10
11#include "sa8775p.dtsi"
12#include "sa8775p-pmics.dtsi"
13
14/ {
15	model = "Qualcomm SA8775P Ride";
16	compatible = "qcom,sa8775p-ride", "qcom,sa8775p";
17
18	aliases {
19		ethernet0 = &ethernet0;
20		ethernet1 = &ethernet1;
21		i2c11 = &i2c11;
22		i2c18 = &i2c18;
23		serial0 = &uart10;
24		serial1 = &uart12;
25		serial2 = &uart17;
26		spi16 = &spi16;
27		ufshc1 = &ufs_mem_hc;
28	};
29
30	chosen {
31		stdout-path = "serial0:115200n8";
32	};
33};
34
35&apps_rsc {
36	regulators-0 {
37		compatible = "qcom,pmm8654au-rpmh-regulators";
38		qcom,pmic-id = "a";
39
40		vreg_s4a: smps4 {
41			regulator-name = "vreg_s4a";
42			regulator-min-microvolt = <1800000>;
43			regulator-max-microvolt = <1816000>;
44			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
45		};
46
47		vreg_s5a: smps5 {
48			regulator-name = "vreg_s5a";
49			regulator-min-microvolt = <1850000>;
50			regulator-max-microvolt = <1996000>;
51			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
52		};
53
54		vreg_s9a: smps9 {
55			regulator-name = "vreg_s9a";
56			regulator-min-microvolt = <535000>;
57			regulator-max-microvolt = <1120000>;
58			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
59		};
60
61		vreg_l4a: ldo4 {
62			regulator-name = "vreg_l4a";
63			regulator-min-microvolt = <788000>;
64			regulator-max-microvolt = <1050000>;
65			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
66			regulator-allow-set-load;
67			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
68						   RPMH_REGULATOR_MODE_HPM>;
69		};
70
71		vreg_l5a: ldo5 {
72			regulator-name = "vreg_l5a";
73			regulator-min-microvolt = <870000>;
74			regulator-max-microvolt = <950000>;
75			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
76			regulator-allow-set-load;
77			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
78						   RPMH_REGULATOR_MODE_HPM>;
79		};
80
81		vreg_l6a: ldo6 {
82			regulator-name = "vreg_l6a";
83			regulator-min-microvolt = <870000>;
84			regulator-max-microvolt = <970000>;
85			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
86			regulator-allow-set-load;
87			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
88						   RPMH_REGULATOR_MODE_HPM>;
89		};
90
91		vreg_l7a: ldo7 {
92			regulator-name = "vreg_l7a";
93			regulator-min-microvolt = <720000>;
94			regulator-max-microvolt = <950000>;
95			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
96			regulator-allow-set-load;
97			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
98						   RPMH_REGULATOR_MODE_HPM>;
99		};
100
101		vreg_l8a: ldo8 {
102			regulator-name = "vreg_l8a";
103			regulator-min-microvolt = <2504000>;
104			regulator-max-microvolt = <3300000>;
105			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
106			regulator-allow-set-load;
107			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
108						   RPMH_REGULATOR_MODE_HPM>;
109		};
110
111		vreg_l9a: ldo9 {
112			regulator-name = "vreg_l9a";
113			regulator-min-microvolt = <2970000>;
114			regulator-max-microvolt = <3544000>;
115			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
116			regulator-allow-set-load;
117			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
118						   RPMH_REGULATOR_MODE_HPM>;
119		};
120	};
121
122	regulators-1 {
123		compatible = "qcom,pmm8654au-rpmh-regulators";
124		qcom,pmic-id = "c";
125
126		vreg_l1c: ldo1 {
127			regulator-name = "vreg_l1c";
128			regulator-min-microvolt = <1140000>;
129			regulator-max-microvolt = <1260000>;
130			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
131			regulator-allow-set-load;
132			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
133						   RPMH_REGULATOR_MODE_HPM>;
134		};
135
136		vreg_l2c: ldo2 {
137			regulator-name = "vreg_l2c";
138			regulator-min-microvolt = <900000>;
139			regulator-max-microvolt = <1100000>;
140			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
141			regulator-allow-set-load;
142			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
143						   RPMH_REGULATOR_MODE_HPM>;
144		};
145
146		vreg_l3c: ldo3 {
147			regulator-name = "vreg_l3c";
148			regulator-min-microvolt = <1100000>;
149			regulator-max-microvolt = <1300000>;
150			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
151			regulator-allow-set-load;
152			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
153						   RPMH_REGULATOR_MODE_HPM>;
154		};
155
156		vreg_l4c: ldo4 {
157			regulator-name = "vreg_l4c";
158			regulator-min-microvolt = <1200000>;
159			regulator-max-microvolt = <1200000>;
160			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
161			/*
162			 * FIXME: This should have regulator-allow-set-load but
163			 * we're getting an over-current fault from the PMIC
164			 * when switching to LPM.
165			 */
166		};
167
168		vreg_l5c: ldo5 {
169			regulator-name = "vreg_l5c";
170			regulator-min-microvolt = <1100000>;
171			regulator-max-microvolt = <1300000>;
172			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
173			regulator-allow-set-load;
174			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
175						   RPMH_REGULATOR_MODE_HPM>;
176		};
177
178		vreg_l6c: ldo6 {
179			regulator-name = "vreg_l6c";
180			regulator-min-microvolt = <1620000>;
181			regulator-max-microvolt = <1980000>;
182			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
183			regulator-allow-set-load;
184			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
185						   RPMH_REGULATOR_MODE_HPM>;
186		};
187
188		vreg_l7c: ldo7 {
189			regulator-name = "vreg_l7c";
190			regulator-min-microvolt = <1620000>;
191			regulator-max-microvolt = <2000000>;
192			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
193			regulator-allow-set-load;
194			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
195						   RPMH_REGULATOR_MODE_HPM>;
196		};
197
198		vreg_l8c: ldo8 {
199			regulator-name = "vreg_l8c";
200			regulator-min-microvolt = <2400000>;
201			regulator-max-microvolt = <3300000>;
202			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
203			regulator-allow-set-load;
204			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
205						   RPMH_REGULATOR_MODE_HPM>;
206		};
207
208		vreg_l9c: ldo9 {
209			regulator-name = "vreg_l9c";
210			regulator-min-microvolt = <1650000>;
211			regulator-max-microvolt = <2700000>;
212			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
213			regulator-allow-set-load;
214			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
215						   RPMH_REGULATOR_MODE_HPM>;
216		};
217	};
218
219	regulators-2 {
220		compatible = "qcom,pmm8654au-rpmh-regulators";
221		qcom,pmic-id = "e";
222
223		vreg_s4e: smps4 {
224			regulator-name = "vreg_s4e";
225			regulator-min-microvolt = <970000>;
226			regulator-max-microvolt = <1520000>;
227			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
228		};
229
230		vreg_s7e: smps7 {
231			regulator-name = "vreg_s7e";
232			regulator-min-microvolt = <1010000>;
233			regulator-max-microvolt = <1170000>;
234			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
235		};
236
237		vreg_s9e: smps9 {
238			regulator-name = "vreg_s9e";
239			regulator-min-microvolt = <300000>;
240			regulator-max-microvolt = <570000>;
241			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
242		};
243
244		vreg_l6e: ldo6 {
245			regulator-name = "vreg_l6e";
246			regulator-min-microvolt = <1280000>;
247			regulator-max-microvolt = <1450000>;
248			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
249			regulator-allow-set-load;
250			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
251						   RPMH_REGULATOR_MODE_HPM>;
252		};
253
254		vreg_l8e: ldo8 {
255			regulator-name = "vreg_l8e";
256			regulator-min-microvolt = <1800000>;
257			regulator-max-microvolt = <1950000>;
258			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
259			regulator-allow-set-load;
260			regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
261						   RPMH_REGULATOR_MODE_HPM>;
262		};
263	};
264};
265
266&ethernet0 {
267	phy-mode = "sgmii";
268	phy-handle = <&sgmii_phy0>;
269
270	pinctrl-0 = <&ethernet0_default>;
271	pinctrl-names = "default";
272
273	snps,mtl-rx-config = <&mtl_rx_setup>;
274	snps,mtl-tx-config = <&mtl_tx_setup>;
275	snps,ps-speed = <1000>;
276
277	status = "okay";
278
279	mdio {
280		compatible = "snps,dwmac-mdio";
281		#address-cells = <1>;
282		#size-cells = <0>;
283
284		sgmii_phy0: phy@8 {
285			compatible = "ethernet-phy-id0141.0dd4";
286			reg = <0x8>;
287			device_type = "ethernet-phy";
288			interrupts-extended = <&tlmm 7 IRQ_TYPE_EDGE_FALLING>;
289			reset-gpios = <&pmm8654au_2_gpios 8 GPIO_ACTIVE_LOW>;
290			reset-assert-us = <11000>;
291			reset-deassert-us = <70000>;
292		};
293
294		sgmii_phy1: phy@a {
295			compatible = "ethernet-phy-id0141.0dd4";
296			reg = <0xa>;
297			device_type = "ethernet-phy";
298			interrupts-extended = <&tlmm 26 IRQ_TYPE_EDGE_FALLING>;
299			reset-gpios = <&pmm8654au_2_gpios 9 GPIO_ACTIVE_LOW>;
300			reset-assert-us = <11000>;
301			reset-deassert-us = <70000>;
302		};
303	};
304
305	mtl_rx_setup: rx-queues-config {
306		snps,rx-queues-to-use = <4>;
307		snps,rx-sched-sp;
308
309		queue0 {
310			snps,dcb-algorithm;
311			snps,map-to-dma-channel = <0x0>;
312			snps,route-up;
313			snps,priority = <0x1>;
314		};
315
316		queue1 {
317			snps,dcb-algorithm;
318			snps,map-to-dma-channel = <0x1>;
319			snps,route-ptp;
320		};
321
322		queue2 {
323			snps,avb-algorithm;
324			snps,map-to-dma-channel = <0x2>;
325			snps,route-avcp;
326		};
327
328		queue3 {
329			snps,avb-algorithm;
330			snps,map-to-dma-channel = <0x3>;
331			snps,priority = <0xc>;
332		};
333	};
334
335	mtl_tx_setup: tx-queues-config {
336		snps,tx-queues-to-use = <4>;
337		snps,tx-sched-sp;
338
339		queue0 {
340			snps,dcb-algorithm;
341		};
342
343		queue1 {
344			snps,dcb-algorithm;
345		};
346
347		queue2 {
348			snps,avb-algorithm;
349			snps,send_slope = <0x1000>;
350			snps,idle_slope = <0x1000>;
351			snps,high_credit = <0x3e800>;
352			snps,low_credit = <0xffc18000>;
353		};
354
355		queue3 {
356			snps,avb-algorithm;
357			snps,send_slope = <0x1000>;
358			snps,idle_slope = <0x1000>;
359			snps,high_credit = <0x3e800>;
360			snps,low_credit = <0xffc18000>;
361		};
362	};
363};
364
365&ethernet1 {
366	phy-mode = "sgmii";
367	phy-handle = <&sgmii_phy1>;
368
369	snps,mtl-rx-config = <&mtl_rx_setup1>;
370	snps,mtl-tx-config = <&mtl_tx_setup1>;
371	snps,ps-speed = <1000>;
372
373	status = "okay";
374
375	mtl_rx_setup1: rx-queues-config {
376		snps,rx-queues-to-use = <4>;
377		snps,rx-sched-sp;
378
379		queue0 {
380			snps,dcb-algorithm;
381			snps,map-to-dma-channel = <0x0>;
382			snps,route-up;
383			snps,priority = <0x1>;
384		};
385
386		queue1 {
387			snps,dcb-algorithm;
388			snps,map-to-dma-channel = <0x1>;
389			snps,route-ptp;
390		};
391
392		queue2 {
393			snps,avb-algorithm;
394			snps,map-to-dma-channel = <0x2>;
395			snps,route-avcp;
396		};
397
398		queue3 {
399			snps,avb-algorithm;
400			snps,map-to-dma-channel = <0x3>;
401			snps,priority = <0xc>;
402		};
403	};
404
405	mtl_tx_setup1: tx-queues-config {
406		snps,tx-queues-to-use = <4>;
407		snps,tx-sched-sp;
408
409		queue0 {
410			snps,dcb-algorithm;
411		};
412
413		queue1 {
414			snps,dcb-algorithm;
415		};
416
417		queue2 {
418			snps,avb-algorithm;
419			snps,send_slope = <0x1000>;
420			snps,idle_slope = <0x1000>;
421			snps,high_credit = <0x3e800>;
422			snps,low_credit = <0xffc18000>;
423		};
424
425		queue3 {
426			snps,avb-algorithm;
427			snps,send_slope = <0x1000>;
428			snps,idle_slope = <0x1000>;
429			snps,high_credit = <0x3e800>;
430			snps,low_credit = <0xffc18000>;
431		};
432	};
433};
434
435&i2c11 {
436	clock-frequency = <400000>;
437	pinctrl-0 = <&qup_i2c11_default>;
438	pinctrl-names = "default";
439	status = "okay";
440};
441
442&i2c18 {
443	clock-frequency = <400000>;
444	pinctrl-0 = <&qup_i2c18_default>;
445	pinctrl-names = "default";
446	status = "okay";
447};
448
449&pmm8654au_0_gpios {
450	gpio-line-names = "DS_EN",
451			  "POFF_COMPLETE",
452			  "UFS0_VER_ID",
453			  "FAST_POFF",
454			  "DBU1_PON_DONE",
455			  "AOSS_SLEEP",
456			  "CAM_DES0_EN",
457			  "CAM_DES1_EN",
458			  "CAM_DES2_EN",
459			  "CAM_DES3_EN",
460			  "UEFI",
461			  "ANALOG_PON_OPT";
462};
463
464&pmm8654au_0_pon_resin {
465	linux,code = <KEY_VOLUMEDOWN>;
466	status = "okay";
467};
468
469&pmm8654au_1_gpios {
470	gpio-line-names = "PMIC_C_ID0",
471			  "PMIC_C_ID1",
472			  "UFS1_VER_ID",
473			  "IPA_PWR",
474			  "",
475			  "WLAN_DBU4_EN",
476			  "WLAN_EN",
477			  "BT_EN",
478			  "USB2_PWR_EN",
479			  "USB2_FAULT";
480
481	usb2_en_state: usb2-en-state {
482		pins = "gpio9";
483		function = "normal";
484		output-high;
485		power-source = <0>;
486	};
487};
488
489&pmm8654au_2_gpios {
490	gpio-line-names = "PMIC_E_ID0",
491			  "PMIC_E_ID1",
492			  "USB0_PWR_EN",
493			  "USB0_FAULT",
494			  "SENSOR_IRQ_1",
495			  "SENSOR_IRQ_2",
496			  "SENSOR_RST",
497			  "SGMIIO0_RST",
498			  "SGMIIO1_RST",
499			  "USB1_PWR_ENABLE",
500			  "USB1_FAULT",
501			  "VMON_SPX8";
502
503	usb0_en_state: usb0-en-state {
504		pins = "gpio3";
505		function = "normal";
506		output-high;
507		power-source = <0>;
508	};
509
510	usb1_en_state: usb1-en-state {
511		pins = "gpio10";
512		function = "normal";
513		output-high;
514		power-source = <0>;
515	};
516};
517
518&pmm8654au_3_gpios {
519	gpio-line-names = "PMIC_G_ID0",
520			  "PMIC_G_ID1",
521			  "GNSS_RST",
522			  "GNSS_EN",
523			  "GNSS_BOOT_MODE";
524};
525
526&qupv3_id_1 {
527	status = "okay";
528};
529
530&qupv3_id_2 {
531	status = "okay";
532};
533
534&serdes0 {
535	phy-supply = <&vreg_l5a>;
536	status = "okay";
537};
538
539&serdes1 {
540	phy-supply = <&vreg_l5a>;
541	status = "okay";
542};
543
544&sleep_clk {
545	clock-frequency = <32764>;
546};
547
548&spi16 {
549	pinctrl-0 = <&qup_spi16_default>;
550	pinctrl-names = "default";
551	status = "okay";
552};
553
554&tlmm {
555	ethernet0_default: ethernet0-default-state {
556		ethernet0_mdc: ethernet0-mdc-pins {
557			pins = "gpio8";
558			function = "emac0_mdc";
559			drive-strength = <16>;
560			bias-pull-up;
561		};
562
563		ethernet0_mdio: ethernet0-mdio-pins {
564			pins = "gpio9";
565			function = "emac0_mdio";
566			drive-strength = <16>;
567			bias-pull-up;
568		};
569	};
570
571	qup_uart10_default: qup-uart10-state {
572		pins = "gpio46", "gpio47";
573		function = "qup1_se3";
574	};
575
576	qup_spi16_default: qup-spi16-state {
577		pins = "gpio86", "gpio87", "gpio88", "gpio89";
578		function = "qup2_se2";
579		drive-strength = <6>;
580		bias-disable;
581	};
582
583	qup_i2c11_default: qup-i2c11-state {
584		pins = "gpio48", "gpio49";
585		function = "qup1_se4";
586		drive-strength = <2>;
587		bias-pull-up;
588	};
589
590	qup_i2c18_default: qup-i2c18-state {
591		pins = "gpio95", "gpio96";
592		function = "qup2_se4";
593		drive-strength = <2>;
594		bias-pull-up;
595	};
596
597	qup_uart12_default: qup-uart12-state {
598		qup_uart12_cts: qup-uart12-cts-pins {
599			pins = "gpio52";
600			function = "qup1_se5";
601			bias-disable;
602		};
603
604		qup_uart12_rts: qup-uart12-rts-pins {
605			pins = "gpio53";
606			function = "qup1_se5";
607			bias-pull-down;
608		};
609
610		qup_uart12_tx: qup-uart12-tx-pins {
611			pins = "gpio54";
612			function = "qup1_se5";
613			bias-pull-up;
614		};
615
616		qup_uart12_rx: qup-uart12-rx-pins {
617			pins = "gpio55";
618			function = "qup1_se5";
619			bias-pull-down;
620		};
621	};
622
623	qup_uart17_default: qup-uart17-state {
624		qup_uart17_cts: qup-uart17-cts-pins {
625			pins = "gpio91";
626			function = "qup2_se3";
627			bias-disable;
628		};
629
630		qup_uart17_rts: qup0-uart17-rts-pins {
631			pins = "gpio92";
632			function = "qup2_se3";
633			bias-pull-down;
634		};
635
636		qup_uart17_tx: qup0-uart17-tx-pins {
637			pins = "gpio93";
638			function = "qup2_se3";
639			bias-pull-up;
640		};
641
642		qup_uart17_rx: qup0-uart17-rx-pins {
643			pins = "gpio94";
644			function = "qup2_se3";
645			bias-pull-down;
646		};
647	};
648
649	pcie0_default_state: pcie0-default-state {
650		perst-pins {
651			pins = "gpio2";
652			function = "gpio";
653			drive-strength = <2>;
654			bias-pull-down;
655		};
656
657		clkreq-pins {
658			pins = "gpio1";
659			function = "pcie0_clkreq";
660			drive-strength = <2>;
661			bias-pull-up;
662		};
663
664		wake-pins {
665			pins = "gpio0";
666			function = "gpio";
667			drive-strength = <2>;
668			bias-pull-up;
669		};
670	};
671
672	pcie1_default_state: pcie1-default-state {
673		perst-pins {
674			pins = "gpio4";
675			function = "gpio";
676			drive-strength = <2>;
677			bias-pull-down;
678		};
679
680		clkreq-pins {
681			pins = "gpio3";
682			function = "pcie1_clkreq";
683			drive-strength = <2>;
684			bias-pull-up;
685		};
686
687		wake-pins {
688			pins = "gpio5";
689			function = "gpio";
690			drive-strength = <2>;
691			bias-pull-up;
692		};
693	};
694};
695
696&pcie0 {
697	perst-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
698	wake-gpios = <&tlmm 0 GPIO_ACTIVE_HIGH>;
699
700	pinctrl-names = "default";
701	pinctrl-0 = <&pcie0_default_state>;
702
703	status = "okay";
704};
705
706&pcie1 {
707	perst-gpios = <&tlmm 4 GPIO_ACTIVE_LOW>;
708	wake-gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>;
709
710	pinctrl-names = "default";
711	pinctrl-0 = <&pcie1_default_state>;
712
713	status = "okay";
714};
715
716&pcie0_phy {
717	vdda-phy-supply = <&vreg_l5a>;
718	vdda-pll-supply = <&vreg_l1c>;
719
720	status = "okay";
721};
722
723&pcie1_phy {
724	vdda-phy-supply = <&vreg_l5a>;
725	vdda-pll-supply = <&vreg_l1c>;
726
727	status = "okay";
728};
729
730&uart10 {
731	compatible = "qcom,geni-debug-uart";
732	pinctrl-0 = <&qup_uart10_default>;
733	pinctrl-names = "default";
734	status = "okay";
735};
736
737&uart12 {
738	pinctrl-0 = <&qup_uart12_default>;
739	pinctrl-names = "default";
740	status = "okay";
741};
742
743&uart17 {
744	pinctrl-0 = <&qup_uart17_default>;
745	pinctrl-names = "default";
746	status = "okay";
747};
748
749&ufs_mem_hc {
750	reset-gpios = <&tlmm 149 GPIO_ACTIVE_LOW>;
751	vcc-supply = <&vreg_l8a>;
752	vcc-max-microamp = <1100000>;
753	vccq-supply = <&vreg_l4c>;
754	vccq-max-microamp = <1200000>;
755
756	status = "okay";
757};
758
759&ufs_mem_phy {
760	vdda-phy-supply = <&vreg_l4a>;
761	vdda-pll-supply = <&vreg_l1c>;
762
763	status = "okay";
764};
765
766&usb_0 {
767	pinctrl-names = "default";
768	pinctrl-0 = <&usb0_en_state>;
769
770	status = "okay";
771};
772
773&usb_0_dwc3 {
774	dr_mode = "peripheral";
775};
776
777&usb_0_hsphy {
778	vdda-pll-supply = <&vreg_l7a>;
779	vdda18-supply = <&vreg_l6c>;
780	vdda33-supply = <&vreg_l9a>;
781
782	status = "okay";
783};
784
785&usb_0_qmpphy {
786	vdda-phy-supply = <&vreg_l1c>;
787	vdda-pll-supply = <&vreg_l7a>;
788
789	status = "okay";
790};
791
792&usb_1 {
793	pinctrl-names = "default";
794	pinctrl-0 = <&usb1_en_state>;
795
796	status = "okay";
797};
798
799&usb_1_dwc3 {
800	dr_mode = "host";
801};
802
803&usb_1_hsphy {
804	vdda-pll-supply = <&vreg_l7a>;
805	vdda18-supply = <&vreg_l6c>;
806	vdda33-supply = <&vreg_l9a>;
807
808	status = "okay";
809};
810
811&usb_1_qmpphy {
812	vdda-phy-supply = <&vreg_l1c>;
813	vdda-pll-supply = <&vreg_l7a>;
814
815	status = "okay";
816};
817
818&usb_2 {
819	pinctrl-names = "default";
820	pinctrl-0 = <&usb2_en_state>;
821
822	status = "okay";
823};
824
825&usb_2_dwc3 {
826	dr_mode = "host";
827};
828
829&usb_2_hsphy {
830	vdda-pll-supply = <&vreg_l7a>;
831	vdda18-supply = <&vreg_l6c>;
832	vdda33-supply = <&vreg_l9a>;
833
834	status = "okay";
835};
836
837&xo_board_clk {
838	clock-frequency = <38400000>;
839};
840