1// SPDX-License-Identifier: BSD-3-Clause 2/* 3 * Copyright (c) 2021, The Linux Foundation. All rights reserved. 4 * Copyright (c) 2022, Linaro Limited 5 */ 6 7/dts-v1/; 8 9#include <dt-bindings/gpio/gpio.h> 10#include <dt-bindings/regulator/qcom,rpmh-regulator.h> 11#include <dt-bindings/spmi/spmi.h> 12#include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 13 14#include "sa8540p.dtsi" 15#include "sa8540p-pmics.dtsi" 16 17/ { 18 model = "Qualcomm SA8295P ADP"; 19 compatible = "qcom,sa8295p-adp", "qcom,sa8540p"; 20 21 aliases { 22 serial0 = &uart17; 23 }; 24 25 chosen { 26 stdout-path = "serial0:115200n8"; 27 }; 28 29 dp2-connector { 30 compatible = "dp-connector"; 31 label = "DP2"; 32 type = "mini"; 33 34 hpd-gpios = <&tlmm 20 GPIO_ACTIVE_HIGH>; 35 36 port { 37 dp2_connector_in: endpoint { 38 remote-endpoint = <&mdss1_dp0_phy_out>; 39 }; 40 }; 41 }; 42 43 dp3-connector { 44 compatible = "dp-connector"; 45 label = "DP3"; 46 type = "mini"; 47 48 hpd-gpios = <&tlmm 45 GPIO_ACTIVE_HIGH>; 49 50 port { 51 dp3_connector_in: endpoint { 52 remote-endpoint = <&mdss1_dp1_phy_out>; 53 }; 54 }; 55 }; 56 57 edp0-connector { 58 compatible = "dp-connector"; 59 label = "EDP0"; 60 type = "mini"; 61 62 hpd-gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>; 63 64 port { 65 edp0_connector_in: endpoint { 66 remote-endpoint = <&mdss0_dp2_phy_out>; 67 }; 68 }; 69 }; 70 71 edp1-connector { 72 compatible = "dp-connector"; 73 label = "EDP1"; 74 type = "mini"; 75 76 hpd-gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>; 77 78 port { 79 edp1_connector_in: endpoint { 80 remote-endpoint = <&mdss0_dp3_phy_out>; 81 }; 82 }; 83 }; 84 85 edp2-connector { 86 compatible = "dp-connector"; 87 label = "EDP2"; 88 type = "mini"; 89 90 hpd-gpios = <&tlmm 7 GPIO_ACTIVE_HIGH>; 91 92 port { 93 edp2_connector_in: endpoint { 94 remote-endpoint = <&mdss1_dp2_phy_out>; 95 }; 96 }; 97 }; 98 99 edp3-connector { 100 compatible = "dp-connector"; 101 label = "EDP3"; 102 type = "mini"; 103 104 hpd-gpios = <&tlmm 6 GPIO_ACTIVE_HIGH>; 105 106 port { 107 edp3_connector_in: endpoint { 108 remote-endpoint = <&mdss1_dp3_phy_out>; 109 }; 110 }; 111 }; 112 113 regulator-usb2-vbus { 114 compatible = "regulator-fixed"; 115 regulator-name = "USB2_VBUS"; 116 gpio = <&pmm8540c_gpios 9 GPIO_ACTIVE_HIGH>; 117 pinctrl-0 = <&usb2_en>; 118 pinctrl-names = "default"; 119 enable-active-high; 120 regulator-always-on; 121 }; 122 123 regulator-usb3-vbus { 124 compatible = "regulator-fixed"; 125 regulator-name = "USB3_VBUS"; 126 gpio = <&pmm8540e_gpios 5 GPIO_ACTIVE_HIGH>; 127 pinctrl-0 = <&usb3_en>; 128 pinctrl-names = "default"; 129 enable-active-high; 130 regulator-always-on; 131 }; 132 133 regulator-usb4-vbus { 134 compatible = "regulator-fixed"; 135 regulator-name = "USB4_VBUS"; 136 gpio = <&pmm8540g_gpios 5 GPIO_ACTIVE_HIGH>; 137 pinctrl-0 = <&usb4_en>; 138 pinctrl-names = "default"; 139 enable-active-high; 140 regulator-always-on; 141 }; 142 143 regulator-usb5-vbus { 144 compatible = "regulator-fixed"; 145 regulator-name = "USB5_VBUS"; 146 gpio = <&pmm8540g_gpios 9 GPIO_ACTIVE_HIGH>; 147 pinctrl-0 = <&usb5_en>; 148 pinctrl-names = "default"; 149 enable-active-high; 150 regulator-always-on; 151 }; 152 153 reserved-memory { 154 gpu_mem: gpu-mem@8bf00000 { 155 reg = <0 0x8bf00000 0 0x2000>; 156 no-map; 157 }; 158 }; 159}; 160 161&apps_rsc { 162 regulators-0 { 163 compatible = "qcom,pm8150-rpmh-regulators"; 164 qcom,pmic-id = "a"; 165 166 vreg_l3a: ldo3 { 167 regulator-name = "vreg_l3a"; 168 regulator-min-microvolt = <1200000>; 169 regulator-max-microvolt = <1208000>; 170 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 171 }; 172 173 vreg_l5a: ldo5 { 174 regulator-name = "vreg_l5a"; 175 regulator-min-microvolt = <912000>; 176 regulator-max-microvolt = <912000>; 177 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 178 }; 179 180 vreg_l7a: ldo7 { 181 regulator-name = "vreg_l7a"; 182 regulator-min-microvolt = <1800000>; 183 regulator-max-microvolt = <1800000>; 184 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 185 }; 186 187 vreg_l13a: ldo13 { 188 regulator-name = "vreg_l13a"; 189 regulator-min-microvolt = <3072000>; 190 regulator-max-microvolt = <3072000>; 191 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 192 }; 193 194 vreg_l11a: ldo11 { 195 regulator-name = "vreg_l11a"; 196 regulator-min-microvolt = <880000>; 197 regulator-max-microvolt = <880000>; 198 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 199 }; 200 }; 201 202 regulators-1 { 203 compatible = "qcom,pm8150-rpmh-regulators"; 204 qcom,pmic-id = "c"; 205 206 vreg_l1c: ldo1 { 207 regulator-name = "vreg_l1c"; 208 regulator-min-microvolt = <912000>; 209 regulator-max-microvolt = <912000>; 210 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 211 }; 212 213 vreg_l2c: ldo2 { 214 regulator-name = "vreg_l2c"; 215 regulator-min-microvolt = <3072000>; 216 regulator-max-microvolt = <3072000>; 217 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 218 }; 219 220 vreg_l3c: ldo3 { 221 regulator-name = "vreg_l3c"; 222 regulator-min-microvolt = <1200000>; 223 regulator-max-microvolt = <1200000>; 224 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 225 regulator-allow-set-load; 226 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 227 RPMH_REGULATOR_MODE_HPM>; 228 }; 229 230 vreg_l4c: ldo4 { 231 regulator-name = "vreg_l4c"; 232 regulator-min-microvolt = <1200000>; 233 regulator-max-microvolt = <1208000>; 234 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 235 }; 236 237 vreg_l6c: ldo6 { 238 regulator-name = "vreg_l6c"; 239 regulator-min-microvolt = <1200000>; 240 regulator-max-microvolt = <1200000>; 241 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 242 regulator-allow-set-load; 243 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 244 RPMH_REGULATOR_MODE_HPM>; 245 }; 246 247 vreg_l7c: ldo7 { 248 regulator-name = "vreg_l7c"; 249 regulator-min-microvolt = <1800000>; 250 regulator-max-microvolt = <1800000>; 251 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 252 }; 253 254 vreg_l10c: ldo10 { 255 regulator-name = "vreg_l10c"; 256 regulator-min-microvolt = <2504000>; 257 regulator-max-microvolt = <2504000>; 258 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 259 regulator-allow-set-load; 260 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 261 RPMH_REGULATOR_MODE_HPM>; 262 }; 263 264 vreg_l17c: ldo17 { 265 regulator-name = "vreg_l17c"; 266 regulator-min-microvolt = <2504000>; 267 regulator-max-microvolt = <2504000>; 268 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 269 regulator-allow-set-load; 270 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 271 RPMH_REGULATOR_MODE_HPM>; 272 }; 273 }; 274 275 regulators-2 { 276 compatible = "qcom,pm8150-rpmh-regulators"; 277 qcom,pmic-id = "g"; 278 279 vreg_l3g: ldo3 { 280 regulator-name = "vreg_l3g"; 281 regulator-min-microvolt = <1200000>; 282 regulator-max-microvolt = <1200000>; 283 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 284 }; 285 286 vreg_l7g: ldo7 { 287 regulator-name = "vreg_l7g"; 288 regulator-min-microvolt = <1800000>; 289 regulator-max-microvolt = <1800000>; 290 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 291 }; 292 293 vreg_l8g: ldo8 { 294 regulator-name = "vreg_l8g"; 295 regulator-min-microvolt = <912000>; 296 regulator-max-microvolt = <912000>; 297 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 298 }; 299 300 vreg_l11g: ldo11 { 301 regulator-name = "vreg_l11g"; 302 regulator-min-microvolt = <912000>; 303 regulator-max-microvolt = <912000>; 304 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 305 }; 306 }; 307}; 308 309&dispcc0 { 310 status = "okay"; 311}; 312 313&dispcc1 { 314 status = "okay"; 315}; 316 317&i2c12 { 318 pinctrl-0 = <&qup1_i2c4_state>; 319 pinctrl-names = "default"; 320 321 status = "okay"; 322 323 vdd_gfx: regulator@39 { 324 compatible = "maxim,max20411"; 325 reg = <0x39>; 326 327 regulator-min-microvolt = <800000>; 328 regulator-max-microvolt = <800000>; 329 330 enable-gpios = <&pmm8540a_gpios 2 GPIO_ACTIVE_HIGH>; 331 332 pinctrl-0 = <&max20411_en>; 333 pinctrl-names = "default"; 334 }; 335}; 336 337&gpucc { 338 vdd-gfx-supply = <&vdd_gfx>; 339 status = "okay"; 340}; 341 342&gmu { 343 status = "okay"; 344}; 345 346&gpu { 347 status = "okay"; 348 349 zap-shader { 350 memory-region = <&gpu_mem>; 351 firmware-name = "qcom/sa8295p/a690_zap.mbn"; 352 }; 353}; 354 355&gpu_smmu { 356 status = "okay"; 357}; 358 359&mdss0 { 360 status = "okay"; 361}; 362 363&mdss0_dp2 { 364 data-lanes = <0 1 2 3>; 365 366 status = "okay"; 367 368 ports { 369 port@1 { 370 reg = <1>; 371 mdss0_dp2_phy_out: endpoint { 372 remote-endpoint = <&edp0_connector_in>; 373 }; 374 }; 375 }; 376}; 377 378&mdss0_dp2_phy { 379 vdda-phy-supply = <&vreg_l8g>; 380 vdda-pll-supply = <&vreg_l3g>; 381 382 status = "okay"; 383}; 384 385&mdss0_dp3 { 386 data-lanes = <0 1 2 3>; 387 388 status = "okay"; 389 390 ports { 391 port@1 { 392 reg = <1>; 393 mdss0_dp3_phy_out: endpoint { 394 remote-endpoint = <&edp1_connector_in>; 395 }; 396 }; 397 }; 398}; 399 400&mdss0_dp3_phy { 401 vdda-phy-supply = <&vreg_l8g>; 402 vdda-pll-supply = <&vreg_l3g>; 403 404 status = "okay"; 405}; 406 407&mdss1 { 408 status = "okay"; 409}; 410 411&mdss1_dp0 { 412 data-lanes = <0 1 2 3>; 413 414 status = "okay"; 415 416 ports { 417 port@1 { 418 reg = <1>; 419 mdss1_dp0_phy_out: endpoint { 420 remote-endpoint = <&dp2_connector_in>; 421 }; 422 }; 423 }; 424}; 425 426&mdss1_dp0_phy { 427 vdda-phy-supply = <&vreg_l11g>; 428 vdda-pll-supply = <&vreg_l3g>; 429 430 status = "okay"; 431}; 432 433&mdss1_dp1 { 434 data-lanes = <0 1 2 3>; 435 436 status = "okay"; 437 438 ports { 439 port@1 { 440 reg = <1>; 441 mdss1_dp1_phy_out: endpoint { 442 remote-endpoint = <&dp3_connector_in>; 443 }; 444 }; 445 }; 446}; 447 448&mdss1_dp1_phy { 449 vdda-phy-supply = <&vreg_l11g>; 450 vdda-pll-supply = <&vreg_l3g>; 451 452 status = "okay"; 453}; 454 455&mdss1_dp2 { 456 data-lanes = <0 1 2 3>; 457 458 status = "okay"; 459 460 ports { 461 port@1 { 462 reg = <1>; 463 mdss1_dp2_phy_out: endpoint { 464 remote-endpoint = <&edp2_connector_in>; 465 }; 466 }; 467 }; 468}; 469 470&mdss1_dp2_phy { 471 vdda-phy-supply = <&vreg_l11g>; 472 vdda-pll-supply = <&vreg_l3g>; 473 474 status = "okay"; 475}; 476 477&mdss1_dp3 { 478 data-lanes = <0 1 2 3>; 479 480 status = "okay"; 481 482 ports { 483 port@1 { 484 reg = <1>; 485 mdss1_dp3_phy_out: endpoint { 486 remote-endpoint = <&edp3_connector_in>; 487 }; 488 }; 489 }; 490}; 491 492&mdss1_dp3_phy { 493 vdda-phy-supply = <&vreg_l11g>; 494 vdda-pll-supply = <&vreg_l3g>; 495 496 status = "okay"; 497}; 498 499&pcie2a { 500 perst-gpios = <&tlmm 143 GPIO_ACTIVE_LOW>; 501 wake-gpios = <&tlmm 145 GPIO_ACTIVE_LOW>; 502 503 pinctrl-names = "default"; 504 pinctrl-0 = <&pcie2a_default>; 505 506 status = "okay"; 507}; 508 509&pcie2a_phy { 510 vdda-phy-supply = <&vreg_l11a>; 511 vdda-pll-supply = <&vreg_l3a>; 512 513 status = "okay"; 514}; 515 516&pcie3a { 517 num-lanes = <2>; 518 519 perst-gpios = <&tlmm 151 GPIO_ACTIVE_LOW>; 520 wake-gpios = <&tlmm 56 GPIO_ACTIVE_LOW>; 521 522 pinctrl-names = "default"; 523 pinctrl-0 = <&pcie3a_default>; 524 525 status = "okay"; 526}; 527 528&pcie3a_phy { 529 vdda-phy-supply = <&vreg_l11a>; 530 vdda-pll-supply = <&vreg_l3a>; 531 532 status = "okay"; 533}; 534 535&pcie3b { 536 perst-gpios = <&tlmm 153 GPIO_ACTIVE_LOW>; 537 wake-gpios = <&tlmm 130 GPIO_ACTIVE_LOW>; 538 539 pinctrl-names = "default"; 540 pinctrl-0 = <&pcie3b_default>; 541 542 status = "okay"; 543}; 544 545&pcie3b_phy { 546 vdda-phy-supply = <&vreg_l11a>; 547 vdda-pll-supply = <&vreg_l3a>; 548 549 status = "okay"; 550}; 551 552&pcie4 { 553 perst-gpios = <&tlmm 141 GPIO_ACTIVE_LOW>; 554 wake-gpios = <&tlmm 139 GPIO_ACTIVE_LOW>; 555 556 pinctrl-names = "default"; 557 pinctrl-0 = <&pcie4_default>; 558 559 status = "okay"; 560}; 561 562&pcie4_phy { 563 vdda-phy-supply = <&vreg_l11a>; 564 vdda-pll-supply = <&vreg_l3a>; 565 566 status = "okay"; 567}; 568 569&qup1 { 570 status = "okay"; 571}; 572 573&qup2 { 574 status = "okay"; 575}; 576 577&remoteproc_adsp { 578 firmware-name = "qcom/sa8540p/adsp.mbn"; 579 status = "okay"; 580}; 581 582&remoteproc_nsp0 { 583 firmware-name = "qcom/sa8540p/cdsp.mbn"; 584 status = "okay"; 585}; 586 587&remoteproc_nsp1 { 588 firmware-name = "qcom/sa8540p/cdsp1.mbn"; 589 status = "okay"; 590}; 591 592&uart17 { 593 compatible = "qcom,geni-debug-uart"; 594 status = "okay"; 595}; 596 597&ufs_mem_hc { 598 reset-gpios = <&tlmm 228 GPIO_ACTIVE_LOW>; 599 600 vcc-supply = <&vreg_l17c>; 601 vcc-max-microamp = <800000>; 602 vccq-supply = <&vreg_l6c>; 603 vccq-max-microamp = <900000>; 604 605 status = "okay"; 606}; 607 608&ufs_mem_phy { 609 vdda-phy-supply = <&vreg_l8g>; 610 vdda-pll-supply = <&vreg_l3g>; 611 612 status = "okay"; 613}; 614 615&ufs_card_hc { 616 reset-gpios = <&tlmm 229 GPIO_ACTIVE_LOW>; 617 618 vcc-supply = <&vreg_l10c>; 619 vcc-max-microamp = <800000>; 620 vccq-supply = <&vreg_l3c>; 621 vccq-max-microamp = <900000>; 622 623 status = "okay"; 624}; 625 626&ufs_card_phy { 627 vdda-phy-supply = <&vreg_l8g>; 628 vdda-pll-supply = <&vreg_l3g>; 629 630 status = "okay"; 631}; 632 633&usb_0 { 634 status = "okay"; 635}; 636 637&usb_0_dwc3 { 638 /* TODO: Define USB-C connector properly */ 639 dr_mode = "peripheral"; 640}; 641 642&usb_0_hsphy { 643 vdda-pll-supply = <&vreg_l5a>; 644 vdda18-supply = <&vreg_l7a>; 645 vdda33-supply = <&vreg_l13a>; 646 647 status = "okay"; 648}; 649 650&usb_0_qmpphy { 651 vdda-phy-supply = <&vreg_l3a>; 652 vdda-pll-supply = <&vreg_l5a>; 653 654 status = "okay"; 655}; 656 657&usb_1 { 658 status = "okay"; 659}; 660 661&usb_1_dwc3 { 662 /* TODO: Define USB-C connector properly */ 663 dr_mode = "host"; 664}; 665 666&usb_1_hsphy { 667 vdda-pll-supply = <&vreg_l1c>; 668 vdda18-supply = <&vreg_l7c>; 669 vdda33-supply = <&vreg_l2c>; 670 671 status = "okay"; 672}; 673 674&usb_1_qmpphy { 675 vdda-phy-supply = <&vreg_l4c>; 676 vdda-pll-supply = <&vreg_l1c>; 677 678 status = "okay"; 679}; 680 681&usb_2 { 682 status = "okay"; 683}; 684 685&usb_2_hsphy0 { 686 vdda-pll-supply = <&vreg_l5a>; 687 vdda18-supply = <&vreg_l7g>; 688 vdda33-supply = <&vreg_l13a>; 689 690 status = "okay"; 691}; 692 693&usb_2_hsphy1 { 694 vdda-pll-supply = <&vreg_l5a>; 695 vdda18-supply = <&vreg_l7g>; 696 vdda33-supply = <&vreg_l13a>; 697 698 status = "okay"; 699}; 700 701&usb_2_hsphy2 { 702 vdda-pll-supply = <&vreg_l5a>; 703 vdda18-supply = <&vreg_l7g>; 704 vdda33-supply = <&vreg_l13a>; 705 706 status = "okay"; 707}; 708 709&usb_2_hsphy3 { 710 vdda-pll-supply = <&vreg_l5a>; 711 vdda18-supply = <&vreg_l7g>; 712 vdda33-supply = <&vreg_l13a>; 713 714 status = "okay"; 715}; 716 717&usb_2_qmpphy0 { 718 vdda-phy-supply = <&vreg_l3a>; 719 vdda-pll-supply = <&vreg_l5a>; 720 721 status = "okay"; 722}; 723 724&usb_2_qmpphy1 { 725 vdda-phy-supply = <&vreg_l3a>; 726 vdda-pll-supply = <&vreg_l5a>; 727 728 status = "okay"; 729}; 730 731&xo_board_clk { 732 clock-frequency = <38400000>; 733}; 734 735/* PINCTRL */ 736 737&pmm8540a_gpios { 738 max20411_en: max20411-en-state { 739 pins = "gpio2"; 740 function = "normal"; 741 output-enable; 742 }; 743}; 744 745&pmm8540c_gpios { 746 usb2_en: usb2-en-state { 747 pins = "gpio9"; 748 function = "normal"; 749 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>; 750 output-enable; 751 power-source = <0>; 752 }; 753}; 754 755&pmm8540e_gpios { 756 usb3_en: usb3-en-state { 757 pins = "gpio5"; 758 function = "normal"; 759 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>; 760 output-enable; 761 power-source = <0>; 762 }; 763}; 764 765&pmm8540g_gpios { 766 usb4_en: usb4-en-state { 767 pins = "gpio5"; 768 function = "normal"; 769 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>; 770 output-enable; 771 power-source = <0>; 772 }; 773 774 usb5_en: usb5-en-state { 775 pins = "gpio9"; 776 function = "normal"; 777 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>; 778 output-enable; 779 power-source = <0>; 780 }; 781}; 782 783&tlmm { 784 pcie2a_default: pcie2a-default-state { 785 clkreq-n-pins { 786 pins = "gpio142"; 787 function = "pcie2a_clkreq"; 788 drive-strength = <2>; 789 bias-pull-up; 790 }; 791 792 perst-n-pins { 793 pins = "gpio143"; 794 function = "gpio"; 795 drive-strength = <2>; 796 bias-pull-down; 797 }; 798 799 wake-n-pins { 800 pins = "gpio145"; 801 function = "gpio"; 802 drive-strength = <2>; 803 bias-pull-up; 804 }; 805 }; 806 807 pcie3a_default: pcie3a-default-state { 808 clkreq-n-pins { 809 pins = "gpio150"; 810 function = "pcie3a_clkreq"; 811 drive-strength = <2>; 812 bias-pull-up; 813 }; 814 815 perst-n-pins { 816 pins = "gpio151"; 817 function = "gpio"; 818 drive-strength = <2>; 819 bias-pull-down; 820 }; 821 822 wake-n-pins { 823 pins = "gpio56"; 824 function = "gpio"; 825 drive-strength = <2>; 826 bias-pull-up; 827 }; 828 }; 829 830 pcie3b_default: pcie3b-default-state { 831 clkreq-n-pins { 832 pins = "gpio152"; 833 function = "pcie3b_clkreq"; 834 drive-strength = <2>; 835 bias-pull-up; 836 }; 837 838 perst-n-pins { 839 pins = "gpio153"; 840 function = "gpio"; 841 drive-strength = <2>; 842 bias-pull-down; 843 }; 844 845 wake-n-pins { 846 pins = "gpio130"; 847 function = "gpio"; 848 drive-strength = <2>; 849 bias-pull-up; 850 }; 851 }; 852 853 pcie4_default: pcie4-default-state { 854 clkreq-n-pins { 855 pins = "gpio140"; 856 function = "pcie4_clkreq"; 857 drive-strength = <2>; 858 bias-pull-up; 859 }; 860 861 perst-n-pins { 862 pins = "gpio141"; 863 function = "gpio"; 864 drive-strength = <2>; 865 bias-pull-down; 866 }; 867 868 wake-n-pins { 869 pins = "gpio139"; 870 function = "gpio"; 871 drive-strength = <2>; 872 bias-pull-up; 873 }; 874 }; 875 876 qup1_i2c4_state: qup1-i2c4-state { 877 pins = "gpio0", "gpio1"; 878 function = "qup12"; 879 drive-strength = <2>; 880 bias-pull-up; 881 }; 882}; 883