xref: /linux/arch/arm64/boot/dts/qcom/qdu1000-idp.dts (revision 2697b79a469b68e3ad3640f55284359c1396278d)
1// SPDX-License-Identifier: BSD-3-Clause
2/*
3 * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
4 */
5
6/dts-v1/;
7
8#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
9#include "qdu1000.dtsi"
10#include "pm8150.dtsi"
11
12/ {
13	model = "Qualcomm Technologies, Inc. QDU1000 IDP";
14	compatible = "qcom,qdu1000-idp", "qcom,qdu1000";
15	chassis-type = "embedded";
16
17	aliases {
18		serial0 = &uart7;
19	};
20
21	chosen {
22		stdout-path = "serial0:115200n8";
23	};
24
25	clocks {
26		xo_board: xo-board-clk {
27			compatible = "fixed-clock";
28			clock-frequency = <19200000>;
29			#clock-cells = <0>;
30		};
31
32		sleep_clk: sleep-clk {
33			compatible = "fixed-clock";
34			clock-frequency = <32000>;
35			#clock-cells = <0>;
36		};
37	};
38
39	ppvar_sys: ppvar-sys-regulator {
40		compatible = "regulator-fixed";
41		regulator-name = "ppvar_sys";
42		regulator-min-microvolt = <4200000>;
43		regulator-max-microvolt = <4200000>;
44
45		regulator-always-on;
46		regulator-boot-on;
47	};
48
49	vph_pwr: vph-pwr-regulator {
50		compatible = "regulator-fixed";
51		regulator-name = "vph_pwr";
52		regulator-min-microvolt = <3700000>;
53		regulator-max-microvolt = <3700000>;
54
55		regulator-always-on;
56		regulator-boot-on;
57
58		vin-supply = <&ppvar_sys>;
59	};
60};
61
62&apps_rsc {
63	regulators {
64		compatible = "qcom,pm8150-rpmh-regulators";
65		qcom,pmic-id = "a";
66
67		vdd-s1-supply = <&vph_pwr>;
68		vdd-s2-supply = <&vph_pwr>;
69		vdd-s3-supply = <&vph_pwr>;
70		vdd-s4-supply = <&vph_pwr>;
71		vdd-s5-supply = <&vph_pwr>;
72		vdd-s6-supply = <&vph_pwr>;
73		vdd-s7-supply = <&vph_pwr>;
74		vdd-s8-supply = <&vph_pwr>;
75		vdd-s9-supply = <&vph_pwr>;
76		vdd-s10-supply = <&vph_pwr>;
77
78		vdd-l1-l8-l11-supply = <&vreg_s6a_0p9>;
79		vdd-l2-l10-supply = <&vph_pwr>;
80		vdd-l3-l4-l5-l18-supply = <&vreg_s5a_2p0>;
81		vdd-l6-l9-supply = <&vreg_s6a_0p9>;
82		vdd-l7-l12-l14-l15-supply = <&vreg_s4a_1p8>;
83		vdd-l13-l16-l17-supply = <&vph_pwr>;
84
85		vreg_s2a_0p5: smps2 {
86			regulator-name = "vreg_s2a_0p5";
87			regulator-min-microvolt = <320000>;
88			regulator-max-microvolt = <570000>;
89		};
90
91		vreg_s3a_1p05: smps3 {
92			regulator-name = "vreg_s3a_1p05";
93			regulator-min-microvolt = <950000>;
94			regulator-max-microvolt = <1170000>;
95		};
96
97		vreg_s4a_1p8: smps4 {
98			regulator-name = "vreg_s4a_1p8";
99			regulator-min-microvolt = <1800000>;
100			regulator-max-microvolt = <1800000>;
101		};
102
103		vreg_s5a_2p0: smps5 {
104			regulator-name = "vreg_s5a_2p0";
105			regulator-min-microvolt = <1904000>;
106			regulator-max-microvolt = <2000000>;
107		};
108
109		vreg_s6a_0p9: smps6 {
110			regulator-name = "vreg_s6a_0p9";
111			regulator-min-microvolt = <920000>;
112			regulator-max-microvolt = <1128000>;
113		};
114
115		vreg_s7a_1p2: smps7 {
116			regulator-name = "vreg_s7a_1p2";
117			regulator-min-microvolt = <1200000>;
118			regulator-max-microvolt = <1200000>;
119		};
120
121		vreg_s8a_1p3: smps8 {
122			regulator-name = "vreg_s8a_1p3";
123			regulator-min-microvolt = <1352000>;
124			regulator-max-microvolt = <1352000>;
125		};
126
127		vreg_l1a_0p91: ldo1 {
128			regulator-name = "vreg_l1a_0p91";
129			regulator-min-microvolt = <312000>;
130			regulator-max-microvolt = <1304000>;
131			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
132		};
133
134		vreg_l2a_2p3: ldo2 {
135			regulator-name = "vreg_l2a_2p3";
136			regulator-min-microvolt = <2970000>;
137			regulator-max-microvolt = <3300000>;
138			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
139		};
140
141		vreg_l3a_1p2: ldo3 {
142			regulator-name = "vreg_l3a_1p2";
143			regulator-min-microvolt = <920000>;
144			regulator-max-microvolt = <1260000>;
145			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
146		};
147
148		vreg_l5a_0p8: ldo5 {
149			regulator-name = "vreg_l5a_0p8";
150			regulator-min-microvolt = <312000>;
151			regulator-max-microvolt = <1304000>;
152			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
153		};
154
155		vreg_l6a_0p91: ldo6 {
156			regulator-name = "vreg_l6a_0p91";
157			regulator-min-microvolt = <880000>;
158			regulator-max-microvolt = <950000>;
159			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
160		};
161
162		vreg_l7a_1p8: ldo7 {
163			regulator-name = "vreg_l7a_1p8";
164			regulator-min-microvolt = <1650000>;
165			regulator-max-microvolt = <2000000>;
166			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
167
168		};
169
170		vreg_l8a_0p91: ldo8 {
171			regulator-name = "vreg_l8a_0p91";
172			regulator-min-microvolt = <888000>;
173			regulator-max-microvolt = <925000>;
174			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
175		};
176
177		vreg_l9a_0p91: ldo9 {
178			regulator-name = "vreg_l9a_0p91";
179			regulator-min-microvolt = <312000>;
180			regulator-max-microvolt = <1304000>;
181			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
182		};
183
184		vreg_l10a_2p95: ldo10 {
185			regulator-name = "vreg_l10a_2p95";
186			regulator-min-microvolt = <2700000>;
187			regulator-max-microvolt = <3544000>;
188			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
189		};
190
191		vreg_l11a_0p91: ldo11 {
192			regulator-name = "vreg_l11a_0p91";
193			regulator-min-microvolt = <800000>;
194			regulator-max-microvolt = <1000000>;
195			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
196		};
197
198		vreg_l12a_1p8: ldo12 {
199			regulator-name = "vreg_l12a_1p8";
200			regulator-min-microvolt = <1504000>;
201			regulator-max-microvolt = <1504000>;
202			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
203		};
204
205		vreg_l14a_1p8: ldo14 {
206			regulator-name = "vreg_l14a_1p8";
207			regulator-min-microvolt = <1650000>;
208			regulator-max-microvolt = <1950000>;
209			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
210		};
211
212		vreg_l15a_1p8: ldo15 {
213			regulator-name = "vreg_l15a_1p8";
214			regulator-min-microvolt = <1504000>;
215			regulator-max-microvolt = <2000000>;
216			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
217		};
218
219		vreg_l16a_1p8: ldo16 {
220			regulator-name = "vreg_l16a_1p8";
221			regulator-min-microvolt = <1710000>;
222			regulator-max-microvolt = <1890000>;
223			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
224		};
225
226		vreg_l17a_3p3: ldo17 {
227			regulator-name = "vreg_l17a_3p3";
228			regulator-min-microvolt = <3000000>;
229			regulator-max-microvolt = <3544000>;
230			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
231		};
232
233		vreg_l18a_1p2: ldo18 {
234			regulator-name = "vreg_l18a_1p2";
235			regulator-min-microvolt = <312000>;
236			regulator-max-microvolt = <1304000>;
237			regulator-initial-mode = <RPMH_REGULATOR_MODE_LPM>;
238		};
239	};
240};
241
242&qup_i2c1_data_clk {
243	drive-strength = <2>;
244	bias-pull-up;
245};
246
247&qup_i2c2_data_clk {
248	drive-strength = <2>;
249	bias-pull-up;
250};
251
252&qup_i2c3_data_clk {
253	drive-strength = <2>;
254	bias-pull-up;
255};
256
257&qup_i2c4_data_clk {
258	drive-strength = <2>;
259	bias-pull-up;
260};
261
262&qup_i2c5_data_clk {
263	drive-strength = <2>;
264	bias-pull-up;
265};
266
267&qup_i2c6_data_clk {
268	drive-strength = <2>;
269	bias-pull-up;
270};
271
272&qup_i2c9_data_clk {
273	drive-strength = <2>;
274	bias-pull-up;
275};
276
277&qup_i2c10_data_clk {
278	drive-strength = <2>;
279	bias-pull-up;
280};
281
282&qup_i2c11_data_clk {
283	drive-strength = <2>;
284	bias-pull-up;
285};
286
287&qup_i2c12_data_clk {
288	drive-strength = <2>;
289	bias-pull-up;
290};
291
292&qup_i2c13_data_clk {
293	drive-strength = <2>;
294	bias-pull-up;
295};
296
297&qup_i2c14_data_clk {
298	drive-strength = <2>;
299	bias-pull-up;
300};
301
302&qup_i2c15_data_clk {
303	drive-strength = <2>;
304	bias-pull-up;
305};
306
307&qup_spi1_cs {
308	drive-strength = <6>;
309	bias-disable;
310};
311
312&qup_spi1_data_clk {
313	drive-strength = <6>;
314	bias-disable;
315};
316
317&qup_spi2_cs {
318	drive-strength = <6>;
319	bias-disable;
320};
321
322&qup_spi2_data_clk {
323	drive-strength = <6>;
324	bias-disable;
325};
326
327&qup_spi3_cs {
328	drive-strength = <6>;
329	bias-disable;
330};
331
332&qup_spi3_data_clk {
333	drive-strength = <6>;
334	bias-disable;
335};
336
337&qup_spi4_cs {
338	drive-strength = <6>;
339	bias-disable;
340};
341
342&qup_spi4_data_clk {
343	drive-strength = <6>;
344	bias-disable;
345};
346
347&qup_spi5_cs {
348	drive-strength = <6>;
349	bias-disable;
350};
351
352&qup_spi5_data_clk {
353	drive-strength = <6>;
354	bias-disable;
355};
356
357&qup_spi6_cs {
358	drive-strength = <6>;
359	bias-disable;
360};
361
362&qup_spi6_data_clk {
363	drive-strength = <6>;
364	bias-disable;
365};
366
367&qup_spi9_cs {
368	drive-strength = <6>;
369	bias-disable;
370};
371
372&qup_spi9_data_clk {
373	drive-strength = <6>;
374	bias-disable;
375};
376
377&qup_spi10_cs {
378	drive-strength = <6>;
379	bias-disable;
380};
381
382&qup_spi10_data_clk {
383	drive-strength = <6>;
384	bias-disable;
385};
386
387&qup_spi11_cs {
388	drive-strength = <6>;
389	bias-disable;
390};
391
392&qup_spi11_data_clk {
393	drive-strength = <6>;
394	bias-disable;
395};
396
397&qup_spi12_cs {
398	drive-strength = <6>;
399	bias-disable;
400};
401
402&qup_spi12_data_clk {
403	drive-strength = <6>;
404	bias-disable;
405};
406
407&qup_spi13_cs {
408	drive-strength = <6>;
409	bias-disable;
410};
411
412&qup_spi13_data_clk {
413	drive-strength = <6>;
414	bias-disable;
415};
416
417&qup_spi14_cs {
418	drive-strength = <6>;
419	bias-disable;
420};
421
422&qup_spi14_data_clk {
423	drive-strength = <6>;
424	bias-disable;
425};
426
427&qup_spi15_cs {
428	drive-strength = <6>;
429	bias-disable;
430};
431
432&qup_spi15_data_clk {
433	drive-strength = <6>;
434	bias-disable;
435};
436
437&qup_uart7_rx {
438	drive-strength = <2>;
439	bias-disable;
440};
441
442&qup_uart7_tx {
443	drive-strength = <2>;
444	bias-disable;
445};
446
447&qupv3_id_0 {
448	status = "okay";
449};
450
451&reserved_memory {
452	ecc_meta_data_mem: ecc-meta-data@e0000000 {
453		reg = <0x0 0xe0000000 0x0 0x20000000>;
454		no-map;
455	};
456
457	harq_buffer_mem: harq-buffer@800000000 {
458		reg = <0x8 0x0 0x0 0x80000000>;
459		no-map;
460	};
461
462	tenx_sp_buffer_mem: tenx-sp-buffer@880000000 {
463		reg = <0x8 0x80000000 0x0 0x50000000>;
464		no-map;
465	};
466
467	fapi_buffer_mem: fapi-buffer@8d0000000 {
468		reg = <0x8 0xd0000000 0x0 0x20000000>;
469		no-map;
470	};
471};
472
473&sdhc {
474	pinctrl-0 = <&sdc_on_state>;
475	pinctrl-1 = <&sdc_off_state>;
476	pinctrl-names = "default", "sleep";
477
478	cap-mmc-hw-reset;
479	mmc-ddr-1_8v;
480	mmc-hs200-1_8v;
481	mmc-hs400-1_8v;
482	mmc-hs400-enhanced-strobe;
483
484	non-removable;
485	no-sd;
486	no-sdio;
487
488	supports-cqe;
489
490	vmmc-supply = <&vreg_l10a_2p95>;
491	vqmmc-supply = <&vreg_l7a_1p8>;
492
493	status = "okay";
494};
495
496&tlmm {
497	gpio-reserved-ranges = <28 2>;
498};
499
500&uart7 {
501	status = "okay";
502};
503