1// SPDX-License-Identifier: BSD-3-Clause 2/* 3 * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 4 */ 5 6/dts-v1/; 7 8/* PM7250B is configured to use SID8/9 */ 9#define PM7250B_SID 8 10#define PM7250B_SID1 9 11 12#include <dt-bindings/input/linux-event-codes.h> 13#include <dt-bindings/leds/common.h> 14#include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 15#include <dt-bindings/regulator/qcom,rpmh-regulator.h> 16#include "sc7280.dtsi" 17#include "pm7250b.dtsi" 18#include "pm7325.dtsi" 19#include "pm8350c.dtsi" 20#include "pmk8350.dtsi" 21#include "qcs6490-audioreach.dtsi" 22 23/delete-node/ &ipa_fw_mem; 24/delete-node/ &rmtfs_mem; 25/delete-node/ &adsp_mem; 26/delete-node/ &cdsp_mem; 27/delete-node/ &video_mem; 28/delete-node/ &wlan_ce_mem; 29/delete-node/ &wpss_mem; 30/delete-node/ &xbl_mem; 31 32/ { 33 model = "Qualcomm Technologies, Inc. QCM6490 IDP"; 34 compatible = "qcom,qcm6490-idp", "qcom,qcm6490"; 35 chassis-type = "embedded"; 36 37 aliases { 38 serial0 = &uart5; 39 }; 40 41 pm8350c_pwm_backlight: backlight { 42 compatible = "pwm-backlight"; 43 pwms = <&pm8350c_pwm 3 65535>; 44 enable-gpios = <&pm8350c_gpios 7 GPIO_ACTIVE_HIGH>; 45 pinctrl-0 = <&pmic_lcd_bl_en>; 46 pinctrl-names = "default"; 47 }; 48 49 chosen { 50 stdout-path = "serial0:115200n8"; 51 }; 52 53 lcd_disp_bias: regulator-lcd-disp-bias { 54 compatible = "regulator-fixed"; 55 regulator-name = "lcd_disp_bias"; 56 regulator-min-microvolt = <5500000>; 57 regulator-max-microvolt = <5500000>; 58 gpio = <&pm7250b_gpios 2 GPIO_ACTIVE_HIGH>; 59 enable-active-high; 60 pinctrl-0 = <&lcd_disp_bias_en>; 61 pinctrl-names = "default"; 62 }; 63 64 gpio-keys { 65 compatible = "gpio-keys"; 66 67 pinctrl-0 = <&key_vol_up_default>; 68 pinctrl-names = "default"; 69 70 key-volume-up { 71 label = "Volume_up"; 72 gpios = <&pm7325_gpios 6 GPIO_ACTIVE_LOW>; 73 linux,code = <KEY_VOLUMEUP>; 74 wakeup-source; 75 debounce-interval = <15>; 76 linux,can-disable; 77 }; 78 }; 79 80 reserved-memory { 81 xbl_mem: xbl@80700000 { 82 reg = <0x0 0x80700000 0x0 0x100000>; 83 no-map; 84 }; 85 86 cdsp_secure_heap_mem: cdsp-secure-heap@81800000 { 87 reg = <0x0 0x81800000 0x0 0x1e00000>; 88 no-map; 89 }; 90 91 camera_mem: camera@84300000 { 92 reg = <0x0 0x84300000 0x0 0x500000>; 93 no-map; 94 }; 95 96 wpss_mem: wpss@84800000 { 97 reg = <0x0 0x84800000 0x0 0x1900000>; 98 no-map; 99 }; 100 101 adsp_mem: adsp@86100000 { 102 reg = <0x0 0x86100000 0x0 0x2800000>; 103 no-map; 104 }; 105 106 cdsp_mem: cdsp@88900000 { 107 reg = <0x0 0x88900000 0x0 0x1e00000>; 108 no-map; 109 }; 110 111 video_mem: video@8a700000 { 112 reg = <0x0 0x8a700000 0x0 0x700000>; 113 no-map; 114 }; 115 116 cvp_mem: cvp@8ae00000 { 117 reg = <0x0 0x8ae00000 0x0 0x500000>; 118 no-map; 119 }; 120 121 ipa_fw_mem: ipa-fw@8b300000 { 122 reg = <0x0 0x8b300000 0x0 0x10000>; 123 no-map; 124 }; 125 126 ipa_gsi_mem: ipa-gsi@8b310000 { 127 reg = <0x0 0x8b310000 0x0 0xa000>; 128 no-map; 129 }; 130 131 gpu_microcode_mem: gpu-microcode@8b31a000 { 132 reg = <0x0 0x8b31a000 0x0 0x2000>; 133 no-map; 134 }; 135 136 mpss_mem: mpss@8b800000 { 137 reg = <0x0 0x8b800000 0x0 0xf600000>; 138 no-map; 139 }; 140 141 tz_stat_mem: tz-stat@c0000000 { 142 reg = <0x0 0xc0000000 0x0 0x100000>; 143 no-map; 144 }; 145 146 tags_mem: tags@c0100000 { 147 reg = <0x0 0xc0100000 0x0 0x1200000>; 148 no-map; 149 }; 150 151 qtee_mem: qtee@c1300000 { 152 reg = <0x0 0xc1300000 0x0 0x500000>; 153 no-map; 154 }; 155 156 trusted_apps_mem: trusted-apps@c1800000 { 157 reg = <0x0 0xc1800000 0x0 0x1c00000>; 158 no-map; 159 }; 160 161 debug_vm_mem: debug-vm@d0600000 { 162 reg = <0x0 0xd0600000 0x0 0x100000>; 163 no-map; 164 }; 165 }; 166 167 vph_pwr: vph-pwr-regulator { 168 compatible = "regulator-fixed"; 169 regulator-name = "vph_pwr"; 170 regulator-min-microvolt = <3700000>; 171 regulator-max-microvolt = <3700000>; 172 }; 173 174 wcd9370: audio-codec-0 { 175 compatible = "qcom,wcd9370-codec"; 176 177 pinctrl-0 = <&wcd_default>; 178 pinctrl-names = "default"; 179 180 reset-gpios = <&tlmm 83 GPIO_ACTIVE_HIGH>; 181 182 vdd-buck-supply = <&vreg_l17b_1p7>; 183 vdd-rxtx-supply = <&vreg_l18b_1p8>; 184 vdd-px-supply = <&vreg_l18b_1p8>; 185 vdd-mic-bias-supply = <&vreg_bob_3p296>; 186 187 qcom,micbias1-microvolt = <1800000>; 188 qcom,micbias2-microvolt = <1800000>; 189 qcom,micbias3-microvolt = <1800000>; 190 qcom,micbias4-microvolt = <1800000>; 191 192 qcom,rx-device = <&wcd937x_rx>; 193 qcom,tx-device = <&wcd937x_tx>; 194 195 #sound-dai-cells = <1>; 196 }; 197}; 198 199&apps_rsc { 200 regulators-0 { 201 compatible = "qcom,pm7325-rpmh-regulators"; 202 qcom,pmic-id = "b"; 203 204 vdd-s1-supply = <&vph_pwr>; 205 vdd-s2-supply = <&vph_pwr>; 206 vdd-s3-supply = <&vph_pwr>; 207 vdd-s4-supply = <&vph_pwr>; 208 vdd-s5-supply = <&vph_pwr>; 209 vdd-s6-supply = <&vph_pwr>; 210 vdd-s7-supply = <&vph_pwr>; 211 vdd-s8-supply = <&vph_pwr>; 212 vdd-l1-l4-l12-l15-supply = <&vreg_s7b_0p972>; 213 vdd-l2-l7-supply = <&vreg_bob_3p296>; 214 vdd-l3-supply = <&vreg_s2b_0p876>; 215 vdd-l5-supply = <&vreg_s2b_0p876>; 216 vdd-l6-l9-l10-supply = <&vreg_s8b_1p272>; 217 vdd-l8-supply = <&vreg_s7b_0p972>; 218 vdd-l11-l17-l18-l19-supply = <&vreg_s1b_1p872>; 219 vdd-l13-supply = <&vreg_s7b_0p972>; 220 vdd-l14-l16-supply = <&vreg_s8b_1p272>; 221 222 vreg_s1b_1p872: smps1 { 223 regulator-name = "vreg_s1b_1p872"; 224 regulator-min-microvolt = <1840000>; 225 regulator-max-microvolt = <2040000>; 226 }; 227 228 vreg_s2b_0p876: smps2 { 229 regulator-name = "vreg_s2b_0p876"; 230 regulator-min-microvolt = <570070>; 231 regulator-max-microvolt = <1050000>; 232 }; 233 234 vreg_s7b_0p972: smps7 { 235 regulator-name = "vreg_s7b_0p972"; 236 regulator-min-microvolt = <535000>; 237 regulator-max-microvolt = <1120000>; 238 }; 239 240 vreg_s8b_1p272: smps8 { 241 regulator-name = "vreg_s8b_1p272"; 242 regulator-min-microvolt = <1200000>; 243 regulator-max-microvolt = <1500000>; 244 regulator-initial-mode = <RPMH_REGULATOR_MODE_RET>; 245 }; 246 247 vreg_l1b_0p912: ldo1 { 248 regulator-name = "vreg_l1b_0p912"; 249 regulator-min-microvolt = <825000>; 250 regulator-max-microvolt = <925000>; 251 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 252 }; 253 254 vreg_l2b_3p072: ldo2 { 255 regulator-name = "vreg_l2b_3p072"; 256 regulator-min-microvolt = <2700000>; 257 regulator-max-microvolt = <3544000>; 258 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 259 }; 260 261 vreg_l3b_0p504: ldo3 { 262 regulator-name = "vreg_l3b_0p504"; 263 regulator-min-microvolt = <312000>; 264 regulator-max-microvolt = <910000>; 265 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 266 }; 267 268 vreg_l4b_0p752: ldo4 { 269 regulator-name = "vreg_l4b_0p752"; 270 regulator-min-microvolt = <752000>; 271 regulator-max-microvolt = <820000>; 272 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 273 }; 274 275 reg_l5b_0p752: ldo5 { 276 regulator-name = "reg_l5b_0p752"; 277 regulator-min-microvolt = <552000>; 278 regulator-max-microvolt = <832000>; 279 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 280 }; 281 282 vreg_l6b_1p2: ldo6 { 283 regulator-name = "vreg_l6b_1p2"; 284 regulator-min-microvolt = <1140000>; 285 regulator-max-microvolt = <1260000>; 286 regulator-allow-set-load; 287 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM RPMH_REGULATOR_MODE_HPM>; 288 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 289 }; 290 291 vreg_l7b_2p952: ldo7 { 292 regulator-name = "vreg_l7b_2p952"; 293 regulator-min-microvolt = <2400000>; 294 regulator-max-microvolt = <3544000>; 295 regulator-allow-set-load; 296 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM RPMH_REGULATOR_MODE_HPM>; 297 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 298 }; 299 300 vreg_l8b_0p904: ldo8 { 301 regulator-name = "vreg_l8b_0p904"; 302 regulator-min-microvolt = <870000>; 303 regulator-max-microvolt = <970000>; 304 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 305 }; 306 307 vreg_l9b_1p2: ldo9 { 308 regulator-name = "vreg_l9b_1p2"; 309 regulator-min-microvolt = <1200000>; 310 regulator-max-microvolt = <1304000>; 311 regulator-allow-set-load; 312 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM RPMH_REGULATOR_MODE_HPM>; 313 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 314 }; 315 316 vreg_l11b_1p504: ldo11 { 317 regulator-name = "vreg_l11b_1p504"; 318 regulator-min-microvolt = <1504000>; 319 regulator-max-microvolt = <2000000>; 320 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 321 }; 322 323 vreg_l12b_0p751: ldo12 { 324 regulator-name = "vreg_l12b_0p751"; 325 regulator-min-microvolt = <751000>; 326 regulator-max-microvolt = <824000>; 327 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 328 }; 329 330 vreg_l13b_0p53: ldo13 { 331 regulator-name = "vreg_l13b_0p53"; 332 regulator-min-microvolt = <530000>; 333 regulator-max-microvolt = <824000>; 334 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 335 }; 336 337 vreg_l14b_1p08: ldo14 { 338 regulator-name = "vreg_l14b_1p08"; 339 regulator-min-microvolt = <1080000>; 340 regulator-max-microvolt = <1304000>; 341 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 342 }; 343 344 vreg_l15b_0p765: ldo15 { 345 regulator-name = "vreg_l15b_0p765"; 346 regulator-min-microvolt = <765000>; 347 regulator-max-microvolt = <1020000>; 348 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 349 }; 350 351 vreg_l16b_1p1: ldo16 { 352 regulator-name = "vreg_l16b_1p1"; 353 regulator-min-microvolt = <1100000>; 354 regulator-max-microvolt = <1300000>; 355 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 356 }; 357 358 vreg_l17b_1p7: ldo17 { 359 regulator-name = "vreg_l17b_1p7"; 360 regulator-min-microvolt = <1700000>; 361 regulator-max-microvolt = <1900000>; 362 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 363 }; 364 365 vreg_l18b_1p8: ldo18 { 366 regulator-name = "vreg_l18b_1p8"; 367 regulator-min-microvolt = <1800000>; 368 regulator-max-microvolt = <2000000>; 369 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 370 }; 371 372 vreg_l19b_1p8: ldo19 { 373 regulator-name = "vreg_l19b_1p8"; 374 regulator-min-microvolt = <1800000>; 375 regulator-max-microvolt = <2000000>; 376 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 377 regulator-allow-set-load; 378 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 379 RPMH_REGULATOR_MODE_HPM>; 380 }; 381 }; 382 383 regulators-1 { 384 compatible = "qcom,pm8350c-rpmh-regulators"; 385 qcom,pmic-id = "c"; 386 387 vdd-s1-supply = <&vph_pwr>; 388 vdd-s2-supply = <&vph_pwr>; 389 vdd-s3-supply = <&vph_pwr>; 390 vdd-s4-supply = <&vph_pwr>; 391 vdd-s5-supply = <&vph_pwr>; 392 vdd-s6-supply = <&vph_pwr>; 393 vdd-s7-supply = <&vph_pwr>; 394 vdd-s8-supply = <&vph_pwr>; 395 vdd-s9-supply = <&vph_pwr>; 396 vdd-s10-supply = <&vph_pwr>; 397 vdd-l1-l12-supply = <&vreg_s1b_1p872>; 398 vdd-l2-l8-supply = <&vreg_s1b_1p872>; 399 vdd-l3-l4-l5-l7-l13-supply = <&vreg_bob_3p296>; 400 vdd-l6-l9-l11-supply = <&vreg_bob_3p296>; 401 vdd-l10-supply = <&vreg_s7b_0p972>; 402 vdd-bob-supply = <&vph_pwr>; 403 404 vreg_s1c_2p19: smps1 { 405 regulator-name = "vreg_s1c_2p19"; 406 regulator-min-microvolt = <2190000>; 407 regulator-max-microvolt = <2210000>; 408 }; 409 410 vreg_s2c_0p752: smps2 { 411 regulator-name = "vreg_s2c_0p752"; 412 regulator-min-microvolt = <750000>; 413 regulator-max-microvolt = <800000>; 414 }; 415 416 vreg_s5c_0p752: smps5 { 417 regulator-name = "vreg_s5c_0p752"; 418 regulator-min-microvolt = <465000>; 419 regulator-max-microvolt = <1050000>; 420 }; 421 422 vreg_s7c_0p752: smps7 { 423 regulator-name = "vreg_s7c_0p752"; 424 regulator-min-microvolt = <465000>; 425 regulator-max-microvolt = <800000>; 426 }; 427 428 vreg_s9c_1p084: smps9 { 429 regulator-name = "vreg_s9c_1p084"; 430 regulator-min-microvolt = <1010000>; 431 regulator-max-microvolt = <1170000>; 432 }; 433 434 vreg_l1c_1p8: ldo1 { 435 regulator-name = "vreg_l1c_1p8"; 436 regulator-min-microvolt = <1800000>; 437 regulator-max-microvolt = <1980000>; 438 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 439 }; 440 441 vreg_l2c_1p62: ldo2 { 442 regulator-name = "vreg_l2c_1p62"; 443 regulator-min-microvolt = <1620000>; 444 regulator-max-microvolt = <1980000>; 445 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 446 }; 447 448 vreg_l3c_2p8: ldo3 { 449 regulator-name = "vreg_l3c_2p8"; 450 regulator-min-microvolt = <2800000>; 451 regulator-max-microvolt = <3540000>; 452 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 453 }; 454 455 vreg_l4c_1p62: ldo4 { 456 regulator-name = "vreg_l4c_1p62"; 457 regulator-min-microvolt = <1620000>; 458 regulator-max-microvolt = <3300000>; 459 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 460 }; 461 462 vreg_l5c_1p62: ldo5 { 463 regulator-name = "vreg_l5c_1p62"; 464 regulator-min-microvolt = <1620000>; 465 regulator-max-microvolt = <3300000>; 466 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 467 }; 468 469 vreg_l6c_2p96: ldo6 { 470 regulator-name = "vreg_l6c_2p96"; 471 regulator-min-microvolt = <1650000>; 472 regulator-max-microvolt = <3544000>; 473 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 474 }; 475 476 vreg_l7c_3p0: ldo7 { 477 regulator-name = "vreg_l7c_3p0"; 478 regulator-min-microvolt = <3000000>; 479 regulator-max-microvolt = <3544000>; 480 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 481 }; 482 483 vreg_l8c_1p62: ldo8 { 484 regulator-name = "vreg_l8c_1p62"; 485 regulator-min-microvolt = <1620000>; 486 regulator-max-microvolt = <2000000>; 487 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 488 }; 489 490 vreg_l9c_2p96: ldo9 { 491 regulator-name = "vreg_l9c_2p96"; 492 regulator-min-microvolt = <2700000>; 493 regulator-max-microvolt = <35440000>; 494 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 495 }; 496 497 vreg_l10c_0p88: ldo10 { 498 regulator-name = "vreg_l10c_0p88"; 499 regulator-min-microvolt = <720000>; 500 regulator-max-microvolt = <1050000>; 501 regulator-allow-set-load; 502 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM RPMH_REGULATOR_MODE_HPM>; 503 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 504 }; 505 506 vreg_l11c_2p8: ldo11 { 507 regulator-name = "vreg_l11c_2p8"; 508 regulator-min-microvolt = <2800000>; 509 regulator-max-microvolt = <3544000>; 510 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 511 }; 512 513 vreg_l12c_1p65: ldo12 { 514 regulator-name = "vreg_l12c_1p65"; 515 regulator-min-microvolt = <1650000>; 516 regulator-max-microvolt = <2000000>; 517 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 518 }; 519 520 vreg_l13c_2p7: ldo13 { 521 regulator-name = "vreg_l13c_2p7"; 522 regulator-min-microvolt = <2700000>; 523 regulator-max-microvolt = <3544000>; 524 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 525 }; 526 527 vreg_bob_3p296: bob { 528 regulator-name = "vreg_bob_3p296"; 529 regulator-min-microvolt = <3008000>; 530 regulator-max-microvolt = <3960000>; 531 }; 532 }; 533}; 534 535&gcc { 536 protected-clocks = <GCC_AGGRE_NOC_PCIE_1_AXI_CLK> ,<GCC_PCIE_1_AUX_CLK>, 537 <GCC_PCIE_1_AUX_CLK_SRC>, <GCC_PCIE_1_CFG_AHB_CLK>, 538 <GCC_PCIE_1_MSTR_AXI_CLK>, <GCC_PCIE_1_PHY_RCHNG_CLK_SRC>, 539 <GCC_PCIE_1_PIPE_CLK>, <GCC_PCIE_1_PIPE_CLK_SRC>, 540 <GCC_PCIE_1_SLV_AXI_CLK>, <GCC_PCIE_1_SLV_Q2A_AXI_CLK>, 541 <GCC_QSPI_CNOC_PERIPH_AHB_CLK>, <GCC_QSPI_CORE_CLK>, 542 <GCC_QSPI_CORE_CLK_SRC>,<GCC_USB30_SEC_MASTER_CLK>, 543 <GCC_USB30_SEC_MASTER_CLK_SRC>, <GCC_USB30_SEC_MOCK_UTMI_CLK>, 544 <GCC_USB30_SEC_MOCK_UTMI_CLK_SRC>, 545 <GCC_USB30_SEC_MOCK_UTMI_POSTDIV_CLK_SRC>, <GCC_USB30_SEC_SLEEP_CLK>, 546 <GCC_USB3_SEC_PHY_AUX_CLK>, <GCC_USB3_SEC_PHY_AUX_CLK_SRC>, 547 <GCC_USB3_SEC_PHY_COM_AUX_CLK>, <GCC_USB3_SEC_PHY_PIPE_CLK>, 548 <GCC_USB3_SEC_PHY_PIPE_CLK_SRC>, <GCC_CFG_NOC_LPASS_CLK>, 549 <GCC_MSS_GPLL0_MAIN_DIV_CLK_SRC>, <GCC_MSS_CFG_AHB_CLK>, 550 <GCC_MSS_OFFLINE_AXI_CLK>, <GCC_MSS_SNOC_AXI_CLK>, 551 <GCC_MSS_Q6_MEMNOC_AXI_CLK>, <GCC_MSS_Q6SS_BOOT_CLK_SRC>, 552 <GCC_SEC_CTRL_CLK_SRC>, <GCC_WPSS_AHB_CLK>, 553 <GCC_WPSS_AHB_BDG_MST_CLK>, <GCC_WPSS_RSCP_CLK>; 554}; 555 556&gpu { 557 status = "okay"; 558}; 559 560&gpu_zap_shader { 561 firmware-name = "qcom/qcm6490/a660_zap.mbn"; 562}; 563 564&lpass_rx_macro { 565 status = "okay"; 566}; 567 568&lpass_tx_macro { 569 status = "okay"; 570}; 571 572&lpass_va_macro { 573 status = "okay"; 574}; 575 576&lpass_wsa_macro { 577 status = "okay"; 578}; 579 580&mdss { 581 status = "okay"; 582}; 583 584&mdss_dsi { 585 vdda-supply = <&vreg_l6b_1p2>; 586 status = "okay"; 587 588 panel@0 { 589 compatible = "novatek,nt36672e"; 590 reg = <0>; 591 592 reset-gpios = <&tlmm 44 GPIO_ACTIVE_HIGH>; 593 594 vddi-supply = <&vreg_l8c_1p62>; 595 avdd-supply = <&lcd_disp_bias>; 596 avee-supply = <&lcd_disp_bias>; 597 598 backlight = <&pm8350c_pwm_backlight>; 599 600 port { 601 panel0_in: endpoint { 602 remote-endpoint = <&mdss_dsi0_out>; 603 }; 604 }; 605 }; 606}; 607 608&mdss_dsi0_out { 609 remote-endpoint = <&panel0_in>; 610 data-lanes = <0 1 2 3>; 611}; 612 613&mdss_dsi_phy { 614 vdds-supply = <&vreg_l10c_0p88>; 615 status = "okay"; 616}; 617 618&pm7250b_gpios { 619 lcd_disp_bias_en: lcd-disp-bias-en-state { 620 pins = "gpio2"; 621 function = "func1"; 622 bias-disable; 623 qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>; 624 input-disable; 625 output-enable; 626 power-source = <0>; 627 }; 628}; 629 630&pm8350c_gpios { 631 pmic_lcd_bl_en: pmic-lcd-bl-en-state { 632 pins = "gpio7"; 633 function = "normal"; 634 bias-disable; 635 qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>; 636 output-low; 637 power-source = <0>; 638 }; 639 640 pmic_lcd_bl_pwm: pmic-lcd-bl-pwm-state { 641 pins = "gpio8"; 642 function = "func1"; 643 bias-disable; 644 qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>; 645 output-low; 646 power-source = <0>; 647 }; 648}; 649 650&pm7325_gpios { 651 key_vol_up_default: key-vol-up-state { 652 pins = "gpio6"; 653 function = "normal"; 654 input-enable; 655 bias-pull-up; 656 qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>; 657 }; 658}; 659 660&pm8350c_pwm { 661 pinctrl-0 = <&pmic_lcd_bl_pwm>; 662 pinctrl-names = "default"; 663 status = "okay"; 664 665 multi-led { 666 color = <LED_COLOR_ID_RGB>; 667 function = LED_FUNCTION_STATUS; 668 669 #address-cells = <1>; 670 #size-cells = <0>; 671 672 led@1 { 673 reg = <1>; 674 color = <LED_COLOR_ID_RED>; 675 }; 676 677 led@2 { 678 reg = <2>; 679 color = <LED_COLOR_ID_GREEN>; 680 }; 681 682 led@3 { 683 reg = <3>; 684 color = <LED_COLOR_ID_BLUE>; 685 }; 686 }; 687}; 688 689&pon_pwrkey { 690 status = "okay"; 691}; 692 693&pon_resin { 694 linux,code = <KEY_VOLUMEDOWN>; 695 status = "okay"; 696}; 697 698&qupv3_id_0 { 699 status = "okay"; 700}; 701 702&remoteproc_adsp { 703 firmware-name = "qcom/qcm6490/adsp.mbn"; 704 status = "okay"; 705}; 706 707&remoteproc_cdsp { 708 firmware-name = "qcom/qcm6490/cdsp.mbn"; 709 status = "okay"; 710}; 711 712&remoteproc_mpss { 713 firmware-name = "qcom/qcm6490/modem.mbn"; 714 status = "okay"; 715}; 716 717&remoteproc_wpss { 718 firmware-name = "qcom/qcm6490/wpss.mbn"; 719 status = "okay"; 720}; 721 722&sdc2_clk { 723 bias-disable; 724 drive-strength = <16>; 725}; 726 727&sdc2_cmd { 728 bias-pull-up; 729 drive-strength = <10>; 730}; 731 732&sdc2_data { 733 bias-pull-up; 734 drive-strength = <10>; 735}; 736 737&sdhc_1 { 738 non-removable; 739 no-sd; 740 no-sdio; 741 742 vmmc-supply = <&vreg_l7b_2p952>; 743 vqmmc-supply = <&vreg_l19b_1p8>; 744 745 status = "okay"; 746}; 747 748&sdhc_2 { 749 status = "okay"; 750 751 pinctrl-0 = <&sdc2_clk>, <&sdc2_cmd>, <&sdc2_data>, <&sd_cd>; 752 pinctrl-1 = <&sdc2_clk_sleep>, <&sdc2_cmd_sleep>, <&sdc2_data_sleep>, <&sd_cd>; 753 754 vmmc-supply = <&vreg_l9c_2p96>; 755 vqmmc-supply = <&vreg_l6c_2p96>; 756 757 cd-gpios = <&tlmm 91 GPIO_ACTIVE_LOW>; 758}; 759 760&sound { 761 compatible = "qcom,qcm6490-idp-sndcard"; 762 model = "QCM6490-IDP"; 763 764 audio-routing = "SpkrLeft IN", "WSA_SPK1 OUT", 765 "SpkrRight IN", "WSA_SPK2 OUT", 766 "IN1_HPHL", "HPHL_OUT", 767 "IN2_HPHR", "HPHR_OUT", 768 "AMIC2", "MIC BIAS2", 769 "TX DMIC0", "MIC BIAS1", 770 "TX DMIC1", "MIC BIAS2", 771 "TX DMIC2", "MIC BIAS3", 772 "TX SWR_ADC1", "ADC2_OUTPUT", 773 "VA DMIC0", "VA MIC BIAS3", 774 "VA DMIC1", "VA MIC BIAS3", 775 "VA DMIC2", "VA MIC BIAS1", 776 "VA DMIC3", "VA MIC BIAS1"; 777 778 wsa-dai-link { 779 link-name = "WSA Playback"; 780 781 codec { 782 sound-dai = <&left_spkr>, <&right_spkr>, 783 <&swr2 0>, <&lpass_wsa_macro 0>; 784 }; 785 786 cpu { 787 sound-dai = <&q6apmbedai WSA_CODEC_DMA_RX_0>; 788 }; 789 790 platform { 791 sound-dai = <&q6apm>; 792 }; 793 }; 794 795 wcd-playback-dai-link { 796 link-name = "WCD Playback"; 797 798 codec { 799 sound-dai = <&wcd9370 0>, <&swr0 0>, <&lpass_rx_macro 0>; 800 }; 801 802 cpu { 803 sound-dai = <&q6apmbedai RX_CODEC_DMA_RX_0>; 804 }; 805 806 platform { 807 sound-dai = <&q6apm>; 808 }; 809 }; 810 811 wcd-capture-dai-link { 812 link-name = "WCD Capture"; 813 814 codec { 815 sound-dai = <&wcd9370 1>, <&swr1 0>, <&lpass_tx_macro 0>; 816 }; 817 818 cpu { 819 sound-dai = <&q6apmbedai TX_CODEC_DMA_TX_3>; 820 }; 821 822 platform { 823 sound-dai = <&q6apm>; 824 }; 825 }; 826 827 va-dai-link { 828 link-name = "VA Capture"; 829 830 codec { 831 sound-dai = <&lpass_va_macro 0>; 832 }; 833 834 cpu { 835 sound-dai = <&q6apmbedai VA_CODEC_DMA_TX_0>; 836 }; 837 838 platform { 839 sound-dai = <&q6apm>; 840 }; 841 }; 842}; 843 844&swr0 { 845 status = "okay"; 846 847 wcd937x_rx: codec@0,4 { 848 compatible = "sdw20217010a00"; 849 reg = <0 4>; 850 851 /* 852 * WCD9370 RX Port 1 (HPH_L/R) <==> SWR1 Port 1 (HPH_L/R) 853 * WCD9370 RX Port 2 (CLSH) <==> SWR1 Port 2 (CLSH) 854 * WCD9370 RX Port 3 (COMP_L/R) <==> SWR1 Port 3 (COMP_L/R) 855 * WCD9370 RX Port 4 (LO) <==> SWR1 Port 4 (LO) 856 * WCD9370 RX Port 5 (DSD_L/R) <==> SWR1 Port 5 (DSD) 857 */ 858 qcom,rx-port-mapping = <1 2 3 4 5>; 859 860 /* 861 * Static channels mapping between slave and master rx port channels. 862 * In the order of slave port channels, which is 863 * hph_l, hph_r, clsh, comp_l, comp_r, lo, dsd_r, dsd_l. 864 */ 865 qcom,rx-channel-mapping = /bits/ 8 <1 2 1 1 2 1 1 2>; 866 }; 867}; 868 869&swr1 { 870 status = "okay"; 871 872 wcd937x_tx: codec@0,3 { 873 compatible = "sdw20217010a00"; 874 reg = <0 3>; 875 876 /* 877 * WCD9370 TX Port 1 (ADC1) <=> SWR2 Port 2 878 * WCD9370 TX Port 2 (ADC2, 3) <=> SWR2 Port 2 879 * WCD9370 TX Port 3 (DMIC0,1,2,3 & MBHC) <=> SWR2 Port 3 880 * WCD9370 TX Port 4 (DMIC4,5,6,7) <=> SWR2 Port 4 881 */ 882 qcom,tx-port-mapping = <1 1 2 3>; 883 884 /* 885 * Static channel mapping between slave and master tx port channels. 886 * In the order of slave port channels which is adc1, adc2, adc3, 887 * mic0, dmic1, mbhc, dmic2, dmic3, dmci4, dmic5, dmic6, dmic7. 888 */ 889 qcom,tx-channel-mapping = /bits/ 8 <1 2 1 1 2 3 3 4 1 2 3 4>; 890 }; 891}; 892 893&swr2 { 894 status = "okay"; 895 896 left_spkr: speaker@0,1 { 897 compatible = "sdw10217020200"; 898 reg = <0 1>; 899 powerdown-gpios = <&tlmm 63 GPIO_ACTIVE_LOW>; 900 #sound-dai-cells = <0>; 901 sound-name-prefix = "SpkrLeft"; 902 #thermal-sensor-cells = <0>; 903 vdd-supply = <&vreg_l18b_1p8>; 904 qcom,port-mapping = <1 2 3 7>; 905 }; 906 907 right_spkr: speaker@0,2 { 908 compatible = "sdw10217020200"; 909 reg = <0 2>; 910 powerdown-gpios = <&tlmm 62 GPIO_ACTIVE_LOW>; 911 #sound-dai-cells = <0>; 912 sound-name-prefix = "SpkrRight"; 913 #thermal-sensor-cells = <0>; 914 vdd-supply = <&vreg_l18b_1p8>; 915 qcom,port-mapping = <4 5 6 8>; 916 }; 917}; 918 919&tlmm { 920 gpio-reserved-ranges = <32 2>, /* ADSP */ 921 <48 4>; /* NFC */ 922 923 sd_cd: sd-cd-state { 924 pins = "gpio91"; 925 function = "gpio"; 926 bias-pull-up; 927 }; 928 929 wcd_default: wcd-reset-n-active-state { 930 pins = "gpio83"; 931 function = "gpio"; 932 drive-strength = <16>; 933 bias-disable; 934 }; 935}; 936 937&uart5 { 938 status = "okay"; 939}; 940 941&ufs_mem_hc { 942 reset-gpios = <&tlmm 175 GPIO_ACTIVE_LOW>; 943 vcc-supply = <&vreg_l7b_2p952>; 944 vcc-max-microamp = <800000>; 945 vccq-supply = <&vreg_l9b_1p2>; 946 vccq-max-microamp = <900000>; 947 vccq2-supply = <&vreg_l9b_1p2>; 948 vccq2-max-microamp = <900000>; 949 950 status = "okay"; 951}; 952 953&ufs_mem_phy { 954 vdda-phy-supply = <&vreg_l10c_0p88>; 955 vdda-pll-supply = <&vreg_l6b_1p2>; 956 957 status = "okay"; 958}; 959 960&usb_1 { 961 dr_mode = "peripheral"; 962 963 status = "okay"; 964}; 965 966&usb_1_hsphy { 967 vdda-pll-supply = <&vreg_l10c_0p88>; 968 vdda33-supply = <&vreg_l2b_3p072>; 969 vdda18-supply = <&vreg_l1c_1p8>; 970 971 status = "okay"; 972}; 973 974&usb_1_qmpphy { 975 vdda-phy-supply = <&vreg_l6b_1p2>; 976 vdda-pll-supply = <&vreg_l1b_0p912>; 977 978 status = "okay"; 979}; 980 981&wifi { 982 memory-region = <&wlan_fw_mem>; 983 qcom,calibration-variant = "Qualcomm_qcm6490idp"; 984 985 status = "okay"; 986}; 987 988&lpass_audiocc { 989 compatible = "qcom,qcm6490-lpassaudiocc"; 990 /delete-property/ power-domains; 991}; 992