xref: /linux/arch/arm64/boot/dts/qcom/pms405.dtsi (revision 92481c7d14b8030418f00c4b4ec65556565d892d)
1// SPDX-License-Identifier: GPL-2.0
2// Copyright (c) 2018, Linaro Limited
3
4#include <dt-bindings/spmi/spmi.h>
5#include <dt-bindings/input/linux-event-codes.h>
6#include <dt-bindings/iio/qcom,spmi-vadc.h>
7#include <dt-bindings/thermal/thermal.h>
8
9/ {
10	thermal-zones {
11		pms405-thermal {
12			polling-delay-passive = <250>;
13			polling-delay = <1000>;
14
15			thermal-sensors = <&pms405_temp>;
16
17			trips {
18				pms405_alert0: pms405-alert0 {
19					temperature = <105000>;
20					hysteresis = <2000>;
21					type = "passive";
22				};
23				pms405_crit: pms405-crit {
24					temperature = <125000>;
25					hysteresis = <2000>;
26					type = "critical";
27				};
28			};
29		};
30	};
31};
32
33&spmi_bus {
34	pms405_0: pms405@0 {
35		compatible = "qcom,pms405", "qcom,spmi-pmic";
36		reg = <0x0 SPMI_USID>;
37		#address-cells = <1>;
38		#size-cells = <0>;
39
40		pms405_gpios: gpio@c000 {
41			compatible = "qcom,pms405-gpio", "qcom,spmi-gpio";
42			reg = <0xc000>;
43			gpio-controller;
44			gpio-ranges = <&pms405_gpios 0 0 12>;
45			#gpio-cells = <2>;
46			interrupt-controller;
47			#interrupt-cells = <2>;
48		};
49
50		pon@800 {
51			compatible = "qcom,pms405-pon";
52			reg = <0x0800>;
53			mode-bootloader = <0x2>;
54			mode-recovery = <0x1>;
55
56			pwrkey {
57				compatible = "qcom,pm8941-pwrkey";
58				interrupts = <0x0 0x8 0 IRQ_TYPE_EDGE_BOTH>;
59				debounce = <15625>;
60				bias-pull-up;
61				linux,code = <KEY_POWER>;
62			};
63		};
64
65		pms405_temp: temp-alarm@2400 {
66			compatible = "qcom,spmi-temp-alarm";
67			reg = <0x2400>;
68			interrupts = <0 0x24 0 IRQ_TYPE_EDGE_RISING>;
69			io-channels = <&pms405_adc ADC5_DIE_TEMP>;
70			io-channel-names = "thermal";
71			#thermal-sensor-cells = <0>;
72		};
73
74		pms405_adc: adc@3100 {
75			compatible = "qcom,pms405-adc", "qcom,spmi-adc-rev2";
76			reg = <0x3100>;
77			interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
78			#address-cells = <1>;
79			#size-cells = <0>;
80			#io-channel-cells = <1>;
81
82			ref_gnd@0 {
83				reg = <ADC5_REF_GND>;
84				qcom,pre-scaling = <1 1>;
85			};
86
87			vref_1p25@1 {
88				reg = <ADC5_1P25VREF>;
89				qcom,pre-scaling = <1 1>;
90			};
91
92			pon_1: vph_pwr@131 {
93				reg = <ADC5_VPH_PWR>;
94				qcom,pre-scaling = <1 3>;
95			};
96
97			die_temp@6 {
98				reg = <ADC5_DIE_TEMP>;
99				qcom,pre-scaling = <1 1>;
100			};
101
102			pa_therm1: thermistor1@77 {
103				reg = <ADC5_AMUX_THM1_100K_PU>;
104				qcom,ratiometric;
105				qcom,hw-settle-time = <200>;
106				qcom,pre-scaling = <1 1>;
107			};
108
109			pa_therm3: thermistor3@79 {
110				reg = <ADC5_AMUX_THM3_100K_PU>;
111				qcom,ratiometric;
112				qcom,hw-settle-time = <200>;
113				qcom,pre-scaling = <1 1>;
114			};
115
116			xo_therm: xo_temp@76 {
117				reg = <ADC5_XO_THERM_100K_PU>;
118				qcom,ratiometric;
119				qcom,hw-settle-time = <200>;
120				qcom,pre-scaling = <1 1>;
121			};
122		};
123
124		rtc@6000 {
125			compatible = "qcom,pm8941-rtc";
126			reg = <0x6000>;
127			reg-names = "rtc", "alarm";
128			interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>;
129		};
130	};
131
132	pms405_1: pms405@1 {
133		compatible = "qcom,pms405", "qcom,spmi-pmic";
134		reg = <0x1 SPMI_USID>;
135
136		pms405_spmi_regulators: regulators {
137			compatible = "qcom,pms405-regulators";
138		};
139	};
140};
141