xref: /linux/arch/arm64/boot/dts/qcom/pms405.dtsi (revision 6e7fd890f1d6ac83805409e9c346240de2705584)
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (c) 2018, Linaro Limited
4 */
5
6#include <dt-bindings/spmi/spmi.h>
7#include <dt-bindings/input/linux-event-codes.h>
8#include <dt-bindings/iio/qcom,spmi-vadc.h>
9#include <dt-bindings/thermal/thermal.h>
10
11/ {
12	thermal-zones {
13		pms405-thermal {
14			polling-delay-passive = <250>;
15
16			thermal-sensors = <&pms405_temp>;
17
18			trips {
19				pms405_alert0: pms405-alert0 {
20					temperature = <105000>;
21					hysteresis = <2000>;
22					type = "passive";
23				};
24				pms405_crit: pms405-crit {
25					temperature = <125000>;
26					hysteresis = <2000>;
27					type = "critical";
28				};
29			};
30		};
31	};
32};
33
34&spmi_bus {
35	pms405_0: pms405@0 {
36		compatible = "qcom,pms405", "qcom,spmi-pmic";
37		reg = <0x0 SPMI_USID>;
38		#address-cells = <1>;
39		#size-cells = <0>;
40
41		pms405_gpios: gpio@c000 {
42			compatible = "qcom,pms405-gpio", "qcom,spmi-gpio";
43			reg = <0xc000>;
44			gpio-controller;
45			gpio-ranges = <&pms405_gpios 0 0 12>;
46			#gpio-cells = <2>;
47			interrupt-controller;
48			#interrupt-cells = <2>;
49		};
50
51		pon@800 {
52			compatible = "qcom,pms405-pon";
53			reg = <0x0800>;
54			mode-bootloader = <0x2>;
55			mode-recovery = <0x1>;
56
57			pwrkey {
58				compatible = "qcom,pm8941-pwrkey";
59				interrupts = <0x0 0x8 0 IRQ_TYPE_EDGE_BOTH>;
60				debounce = <15625>;
61				bias-pull-up;
62				linux,code = <KEY_POWER>;
63			};
64		};
65
66		pms405_temp: temp-alarm@2400 {
67			compatible = "qcom,spmi-temp-alarm";
68			reg = <0x2400>;
69			interrupts = <0 0x24 0 IRQ_TYPE_EDGE_RISING>;
70			io-channels = <&pms405_adc ADC5_DIE_TEMP>;
71			io-channel-names = "thermal";
72			#thermal-sensor-cells = <0>;
73		};
74
75		pms405_adc: adc@3100 {
76			compatible = "qcom,pms405-adc", "qcom,spmi-adc-rev2";
77			reg = <0x3100>;
78			interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
79			#address-cells = <1>;
80			#size-cells = <0>;
81			#io-channel-cells = <1>;
82
83			channel@0 {
84				reg = <ADC5_REF_GND>;
85				qcom,pre-scaling = <1 1>;
86				label = "ref_gnd";
87			};
88
89			channel@1 {
90				reg = <ADC5_1P25VREF>;
91				qcom,pre-scaling = <1 1>;
92				label = "vref_1p25";
93			};
94
95			channel@131 {
96				reg = <ADC5_VPH_PWR>;
97				qcom,pre-scaling = <1 3>;
98				label = "vph_pwr";
99			};
100
101			channel@6 {
102				reg = <ADC5_DIE_TEMP>;
103				qcom,pre-scaling = <1 1>;
104				label = "die_temp";
105			};
106
107			channel@77 {
108				reg = <ADC5_AMUX_THM1_100K_PU>;
109				qcom,ratiometric;
110				qcom,hw-settle-time = <200>;
111				qcom,pre-scaling = <1 1>;
112				label = "pa_therm1";
113			};
114
115			channel@79 {
116				reg = <ADC5_AMUX_THM3_100K_PU>;
117				qcom,ratiometric;
118				qcom,hw-settle-time = <200>;
119				qcom,pre-scaling = <1 1>;
120				label = "pa_therm3";
121			};
122
123			channel@76 {
124				reg = <ADC5_XO_THERM_100K_PU>;
125				qcom,ratiometric;
126				qcom,hw-settle-time = <200>;
127				qcom,pre-scaling = <1 1>;
128				label = "xo_therm";
129			};
130		};
131
132		rtc@6000 {
133			compatible = "qcom,pm8941-rtc";
134			reg = <0x6000>, <0x6100>;
135			reg-names = "rtc", "alarm";
136			interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>;
137		};
138	};
139
140	pms405_1: pms405@1 {
141		compatible = "qcom,pms405", "qcom,spmi-pmic";
142		reg = <0x1 SPMI_USID>;
143
144		pms405_spmi_regulators: regulators {
145			compatible = "qcom,pms405-regulators";
146		};
147	};
148};
149