xref: /linux/arch/arm64/boot/dts/qcom/pms405.dtsi (revision 22d55f02b8922a097cd4be1e2f131dfa7ef65901)
1// SPDX-License-Identifier: GPL-2.0
2// Copyright (c) 2018, Linaro Limited
3
4#include <dt-bindings/spmi/spmi.h>
5#include <dt-bindings/input/linux-event-codes.h>
6#include <dt-bindings/iio/qcom,spmi-vadc.h>
7#include <dt-bindings/thermal/thermal.h>
8
9/ {
10	thermal-zones {
11		pms405 {
12			polling-delay-passive = <250>;
13			polling-delay = <1000>;
14
15			thermal-sensors = <&pms405_temp>;
16
17			trips {
18				pms405_alert0: pms405-alert0 {
19					temperature = <105000>;
20					hysteresis = <2000>;
21					type = "passive";
22				};
23				pms405_crit: pms405-crit {
24					temperature = <125000>;
25					hysteresis = <2000>;
26					type = "critical";
27				};
28			};
29		};
30	};
31};
32
33&spmi_bus {
34	pms405_0: pms405@0 {
35		compatible = "qcom,spmi-pmic";
36		reg = <0x0 SPMI_USID>;
37		#address-cells = <1>;
38		#size-cells = <0>;
39
40		pms405_gpios: gpio@c000 {
41			compatible = "qcom,pms405-gpio";
42			reg = <0xc000>;
43			gpio-controller;
44			#gpio-cells = <2>;
45			interrupts = <0 0xc0 0 IRQ_TYPE_NONE>,
46				<0 0xc1 0 IRQ_TYPE_NONE>,
47				<0 0xc2 0 IRQ_TYPE_NONE>,
48				<0 0xc3 0 IRQ_TYPE_NONE>,
49				<0 0xc4 0 IRQ_TYPE_NONE>,
50				<0 0xc5 0 IRQ_TYPE_NONE>,
51				<0 0xc6 0 IRQ_TYPE_NONE>,
52				<0 0xc7 0 IRQ_TYPE_NONE>,
53				<0 0xc8 0 IRQ_TYPE_NONE>,
54				<0 0xc9 0 IRQ_TYPE_NONE>,
55				<0 0xca 0 IRQ_TYPE_NONE>,
56				<0 0xcb 0 IRQ_TYPE_NONE>;
57		};
58
59		pon@800 {
60			compatible = "qcom,pms405-pon";
61			reg = <0x0800>;
62			mode-bootloader = <0x2>;
63			mode-recovery = <0x1>;
64
65			pwrkey {
66				compatible = "qcom,pm8941-pwrkey";
67				interrupts = <0x0 0x8 0 IRQ_TYPE_EDGE_BOTH>;
68				debounce = <15625>;
69				bias-pull-up;
70				linux,code = <KEY_POWER>;
71			};
72		};
73
74		pms405_temp: temp-alarm@2400 {
75			compatible = "qcom,spmi-temp-alarm";
76			reg = <0x2400>;
77			interrupts = <0 0x24 0 IRQ_TYPE_EDGE_RISING>;
78			io-channels = <&pms405_adc ADC5_DIE_TEMP>;
79			io-channel-names = "thermal";
80			#thermal-sensor-cells = <0>;
81		};
82
83		pms405_adc: adc@3100 {
84			compatible = "qcom,pms405-adc", "qcom,spmi-adc-rev2";
85			reg = <0x3100>;
86			interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
87			#address-cells = <1>;
88			#size-cells = <0>;
89			#io-channel-cells = <1>;
90
91			ref_gnd {
92				reg = <ADC5_REF_GND>;
93				qcom,pre-scaling = <1 1>;
94			};
95
96			vref_1p25 {
97				reg = <ADC5_1P25VREF>;
98				qcom,pre-scaling = <1 1>;
99			};
100
101			vph_pwr {
102				reg = <ADC5_VPH_PWR>;
103				qcom,pre-scaling = <1 3>;
104			};
105
106			die_temp {
107				reg = <ADC5_DIE_TEMP>;
108				qcom,pre-scaling = <1 1>;
109			};
110
111			xo_therm_100k_pu {
112				reg = <ADC5_XO_THERM_100K_PU>;
113				qcom,pre-scaling = <1 1>;
114			};
115
116			amux_thm1_100k_pu {
117				reg = <ADC5_AMUX_THM1_100K_PU>;
118				qcom,pre-scaling = <1 1>;
119			};
120
121			amux_thm3_100k_pu {
122				reg = <ADC5_AMUX_THM3_100K_PU>;
123				qcom,pre-scaling = <1 1>;
124			};
125		};
126
127		rtc@6000 {
128			compatible = "qcom,pm8941-rtc";
129			reg = <0x6000>;
130			reg-names = "rtc", "alarm";
131			interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>;
132		};
133	};
134
135	pms405_1: pms405@1 {
136		compatible = "qcom,spmi-pmic";
137		reg = <0x1 SPMI_USID>;
138		#address-cells = <1>;
139		#size-cells = <0>;
140
141		pms405_spmi_regulators: regulators {
142			compatible = "qcom,pms405-regulators";
143		};
144	};
145};
146