xref: /linux/arch/arm64/boot/dts/qcom/pmk8350.dtsi (revision 24bce201d79807b668bf9d9e0aca801c5c0d5f78)
1// SPDX-License-Identifier: BSD-3-Clause
2/*
3 * Copyright (c) 2021, Linaro Limited
4 */
5
6#include <dt-bindings/input/input.h>
7#include <dt-bindings/input/linux-event-codes.h>
8#include <dt-bindings/interrupt-controller/irq.h>
9#include <dt-bindings/spmi/spmi.h>
10
11&spmi_bus {
12	pmk8350: pmic@0 {
13		compatible = "qcom,pmk8350", "qcom,spmi-pmic";
14		reg = <0x0 SPMI_USID>;
15		#address-cells = <1>;
16		#size-cells = <0>;
17
18		pmk8350_pon: pon@1300 {
19			compatible = "qcom,pm8998-pon";
20			reg = <0x1300>;
21
22			pon_pwrkey: pwrkey {
23				compatible = "qcom,pmk8350-pwrkey";
24				interrupts = <0x0 0x13 0x7 IRQ_TYPE_EDGE_BOTH>;
25				linux,code = <KEY_POWER>;
26				status = "disabled";
27			};
28
29			pon_resin: resin {
30				compatible = "qcom,pmk8350-resin";
31				interrupts = <0x0 0x13 0x6 IRQ_TYPE_EDGE_BOTH>;
32				status = "disabled";
33			};
34		};
35
36		pmk8350_vadc: adc@3100 {
37			compatible = "qcom,spmi-adc7";
38			reg = <0x3100>;
39			#address-cells = <1>;
40			#size-cells = <0>;
41			interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
42			interrupt-names = "eoc-int-en-set";
43			#io-channel-cells = <1>;
44			io-channel-ranges;
45		};
46
47		pmk8350_adc_tm: adc-tm@3400 {
48			compatible = "qcom,adc-tm7";
49			reg = <0x3400>;
50			interrupts = <0x0 0x34 0x0 IRQ_TYPE_EDGE_RISING>;
51			interrupt-names = "threshold";
52			#address-cells = <1>;
53			#size-cells = <0>;
54			#thermal-sensor-cells = <1>;
55			status = "disabled";
56		};
57
58		pmk8350_rtc: rtc@6100 {
59			compatible = "qcom,pmk8350-rtc";
60			reg = <0x6100>, <0x6200>;
61			reg-names = "rtc", "alarm";
62			interrupts = <0x0 0x62 0x1 IRQ_TYPE_EDGE_RISING>;
63			status = "disabled";
64		};
65
66		pmk8350_gpios: gpio@b000 {
67			compatible = "qcom,pmk8350-gpio", "qcom,spmi-gpio";
68			reg = <0xb000>;
69			gpio-controller;
70			gpio-ranges = <&pmk8350_gpios 0 0 4>;
71			#gpio-cells = <2>;
72			interrupt-controller;
73			#interrupt-cells = <2>;
74		};
75	};
76};
77