1// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 2/* 3 * IPQ9574 RDP433 board device tree source 4 * 5 * Copyright (c) 2020-2021 The Linux Foundation. All rights reserved. 6 * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 7 */ 8 9/dts-v1/; 10 11#include <dt-bindings/gpio/gpio.h> 12#include "ipq9574-rdp-common.dtsi" 13 14/ { 15 model = "Qualcomm Technologies, Inc. IPQ9574/AP-AL02-C7"; 16 compatible = "qcom,ipq9574-ap-al02-c7", "qcom,ipq9574"; 17}; 18 19&pcie1_phy { 20 status = "okay"; 21}; 22 23&pcie1 { 24 pinctrl-0 = <&pcie1_default>; 25 pinctrl-names = "default"; 26 27 perst-gpios = <&tlmm 26 GPIO_ACTIVE_LOW>; 28 wake-gpios = <&tlmm 27 GPIO_ACTIVE_LOW>; 29 status = "okay"; 30}; 31 32&pcie2_phy { 33 status = "okay"; 34}; 35 36&pcie2 { 37 pinctrl-0 = <&pcie2_default>; 38 pinctrl-names = "default"; 39 40 perst-gpios = <&tlmm 29 GPIO_ACTIVE_LOW>; 41 wake-gpios = <&tlmm 30 GPIO_ACTIVE_LOW>; 42 status = "okay"; 43}; 44 45&pcie3_phy { 46 status = "okay"; 47}; 48 49&pcie3 { 50 pinctrl-0 = <&pcie3_default>; 51 pinctrl-names = "default"; 52 53 perst-gpios = <&tlmm 32 GPIO_ACTIVE_LOW>; 54 wake-gpios = <&tlmm 33 GPIO_ACTIVE_LOW>; 55 status = "okay"; 56}; 57 58&tlmm { 59 60 pcie1_default: pcie1-default-state { 61 clkreq-n-pins { 62 pins = "gpio25"; 63 function = "pcie1_clk"; 64 drive-strength = <6>; 65 bias-pull-up; 66 }; 67 68 perst-n-pins { 69 pins = "gpio26"; 70 function = "gpio"; 71 drive-strength = <8>; 72 bias-pull-down; 73 output-low; 74 }; 75 76 wake-n-pins { 77 pins = "gpio27"; 78 function = "pcie1_wake"; 79 drive-strength = <6>; 80 bias-pull-up; 81 }; 82 }; 83 84 pcie2_default: pcie2-default-state { 85 clkreq-n-pins { 86 pins = "gpio28"; 87 function = "pcie2_clk"; 88 drive-strength = <6>; 89 bias-pull-up; 90 }; 91 92 perst-n-pins { 93 pins = "gpio29"; 94 function = "gpio"; 95 drive-strength = <8>; 96 bias-pull-down; 97 output-low; 98 }; 99 100 wake-n-pins { 101 pins = "gpio30"; 102 function = "pcie2_wake"; 103 drive-strength = <6>; 104 bias-pull-up; 105 }; 106 }; 107 108 pcie3_default: pcie3-default-state { 109 clkreq-n-pins { 110 pins = "gpio31"; 111 function = "pcie3_clk"; 112 drive-strength = <6>; 113 bias-pull-up; 114 }; 115 116 perst-n-pins { 117 pins = "gpio32"; 118 function = "gpio"; 119 drive-strength = <8>; 120 bias-pull-up; 121 output-low; 122 }; 123 124 wake-n-pins { 125 pins = "gpio33"; 126 function = "pcie3_wake"; 127 drive-strength = <6>; 128 bias-pull-up; 129 }; 130 }; 131}; 132