xref: /linux/arch/arm64/boot/dts/qcom/ipq5332-rdp474.dts (revision a36e9f5cfe9eb3a1dce8769c7058251c42705357)
1// SPDX-License-Identifier: BSD-3-Clause
2/*
3 * IPQ5332 RDP474 board device tree source
4 *
5 * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
6 */
7
8/dts-v1/;
9
10#include "ipq5332-rdp-common.dtsi"
11
12/ {
13	model = "Qualcomm Technologies, Inc. IPQ5332 MI01.9";
14	compatible = "qcom,ipq5332-ap-mi01.9", "qcom,ipq5332";
15};
16
17&blsp1_i2c1 {
18	clock-frequency = <400000>;
19	pinctrl-0 = <&i2c_1_pins>;
20	pinctrl-names = "default";
21	status = "okay";
22};
23
24&sdhc {
25	bus-width = <4>;
26	max-frequency = <192000000>;
27	mmc-ddr-1_8v;
28	mmc-hs200-1_8v;
29	non-removable;
30	pinctrl-0 = <&sdc_default_state>;
31	pinctrl-names = "default";
32	status = "okay";
33};
34
35/* PINCTRL */
36
37&tlmm {
38	i2c_1_pins: i2c-1-state {
39		pins = "gpio29", "gpio30";
40		function = "blsp1_i2c0";
41		drive-strength = <8>;
42		bias-pull-up;
43	};
44
45	sdc_default_state: sdc-default-state {
46		clk-pins {
47			pins = "gpio13";
48			function = "sdc_clk";
49			drive-strength = <8>;
50			bias-disable;
51		};
52
53		cmd-pins {
54			pins = "gpio12";
55			function = "sdc_cmd";
56			drive-strength = <8>;
57			bias-pull-up;
58		};
59
60		data-pins {
61			pins = "gpio8", "gpio9", "gpio10", "gpio11";
62			function = "sdc_data";
63			drive-strength = <8>;
64			bias-pull-up;
65		};
66	};
67};
68