1// SPDX-License-Identifier: BSD-3-Clause 2/* 3 * IPQ5332 AP-MI01.2 board device tree source 4 * 5 * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. 6 */ 7 8/dts-v1/; 9 10#include "ipq5332.dtsi" 11 12/ { 13 model = "Qualcomm Technologies, Inc. IPQ5332 MI01.2"; 14 compatible = "qcom,ipq5332-ap-mi01.2", "qcom,ipq5332"; 15 16 aliases { 17 serial0 = &blsp1_uart0; 18 }; 19 20 chosen { 21 stdout-path = "serial0"; 22 }; 23}; 24 25&blsp1_uart0 { 26 pinctrl-0 = <&serial_0_pins>; 27 pinctrl-names = "default"; 28 status = "okay"; 29}; 30 31&blsp1_i2c1 { 32 clock-frequency = <400000>; 33 pinctrl-0 = <&i2c_1_pins>; 34 pinctrl-names = "default"; 35 status = "okay"; 36}; 37 38&sdhc { 39 bus-width = <4>; 40 max-frequency = <192000000>; 41 mmc-ddr-1_8v; 42 mmc-hs200-1_8v; 43 non-removable; 44 pinctrl-0 = <&sdc_default_state>; 45 pinctrl-names = "default"; 46 status = "okay"; 47}; 48 49&sleep_clk { 50 clock-frequency = <32000>; 51}; 52 53&xo_board { 54 clock-frequency = <24000000>; 55}; 56 57/* PINCTRL */ 58 59&tlmm { 60 i2c_1_pins: i2c-1-state { 61 pins = "gpio29", "gpio30"; 62 function = "blsp1_i2c0"; 63 drive-strength = <8>; 64 bias-pull-up; 65 }; 66 67 sdc_default_state: sdc-default-state { 68 clk-pins { 69 pins = "gpio13"; 70 function = "sdc_clk"; 71 drive-strength = <8>; 72 bias-disable; 73 }; 74 75 cmd-pins { 76 pins = "gpio12"; 77 function = "sdc_cmd"; 78 drive-strength = <8>; 79 bias-pull-up; 80 }; 81 82 data-pins { 83 pins = "gpio8", "gpio9", "gpio10", "gpio11"; 84 function = "sdc_data"; 85 drive-strength = <8>; 86 bias-pull-up; 87 }; 88 }; 89}; 90