xref: /linux/arch/arm64/boot/dts/qcom/ipq5332-rdp441.dts (revision c532de5a67a70f8533d495f8f2aaa9a0491c3ad0)
1// SPDX-License-Identifier: BSD-3-Clause
2/*
3 * IPQ5332 AP-MI01.2 board device tree source
4 *
5 * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
6 */
7
8/dts-v1/;
9
10#include "ipq5332-rdp-common.dtsi"
11
12/ {
13	model = "Qualcomm Technologies, Inc. IPQ5332 MI01.2";
14	compatible = "qcom,ipq5332-ap-mi01.2", "qcom,ipq5332";
15};
16
17&blsp1_i2c1 {
18	clock-frequency = <400000>;
19	pinctrl-0 = <&i2c_1_pins>;
20	pinctrl-names = "default";
21	status = "okay";
22};
23
24&sdhc {
25	bus-width = <4>;
26	max-frequency = <192000000>;
27	mmc-ddr-1_8v;
28	mmc-hs200-1_8v;
29	non-removable;
30	pinctrl-0 = <&sdc_default_state>;
31	pinctrl-names = "default";
32	status = "okay";
33};
34
35&tlmm {
36	i2c_1_pins: i2c-1-state {
37		pins = "gpio29", "gpio30";
38		function = "blsp1_i2c0";
39		drive-strength = <8>;
40		bias-pull-up;
41	};
42
43	sdc_default_state: sdc-default-state {
44		clk-pins {
45			pins = "gpio13";
46			function = "sdc_clk";
47			drive-strength = <8>;
48			bias-disable;
49		};
50
51		cmd-pins {
52			pins = "gpio12";
53			function = "sdc_cmd";
54			drive-strength = <8>;
55			bias-pull-up;
56		};
57
58		data-pins {
59			pins = "gpio8", "gpio9", "gpio10", "gpio11";
60			function = "sdc_data";
61			drive-strength = <8>;
62			bias-pull-up;
63		};
64	};
65};
66