1// SPDX-License-Identifier: GPL-2.0 2 3/ { 4 compatible = "nvidia,p3701", "nvidia,tegra234"; 5 6 aliases { 7 mmc0 = "/bus@0/mmc@3460000"; 8 mmc1 = "/bus@0/mmc@3400000"; 9 }; 10 11 bus@0 { 12 aconnect@2900000 { 13 status = "okay"; 14 15 ahub@2900800 { 16 status = "okay"; 17 18 i2s@2901000 { 19 status = "okay"; 20 }; 21 22 i2s@2901100 { 23 status = "okay"; 24 }; 25 26 i2s@2901300 { 27 status = "okay"; 28 }; 29 30 i2s@2901500 { 31 status = "okay"; 32 }; 33 34 dmic@2904200 { 35 status = "okay"; 36 }; 37 }; 38 39 dma-controller@2930000 { 40 status = "okay"; 41 }; 42 43 interrupt-controller@2a40000 { 44 status = "okay"; 45 }; 46 }; 47 48 i2c@c240000 { 49 status = "okay"; 50 51 power-sensor@40 { 52 compatible = "ti,ina3221"; 53 reg = <0x40>; 54 #address-cells = <1>; 55 #size-cells = <0>; 56 57 input@0 { 58 reg = <0x0>; 59 label = "VDD_GPU_SOC"; 60 shunt-resistor-micro-ohms = <2000>; 61 }; 62 63 input@1 { 64 reg = <0x1>; 65 label = "VDD_CPU_CV"; 66 shunt-resistor-micro-ohms = <2000>; 67 }; 68 69 input@2 { 70 reg = <0x2>; 71 label = "VIN_SYS_5V0"; 72 shunt-resistor-micro-ohms = <2000>; 73 ti,summation-disable; 74 }; 75 }; 76 77 power-sensor@41 { 78 compatible = "ti,ina3221"; 79 reg = <0x41>; 80 #address-cells = <1>; 81 #size-cells = <0>; 82 83 input@0 { 84 reg = <0x0>; 85 status = "disabled"; 86 }; 87 88 input@1 { 89 reg = <0x1>; 90 label = "VDDQ_VDD2_1V8AO"; 91 shunt-resistor-micro-ohms = <2000>; 92 }; 93 94 input@2 { 95 reg = <0x2>; 96 status = "disabled"; 97 }; 98 }; 99 }; 100 }; 101}; 102