1// SPDX-License-Identifier: GPL-2.0 2/dts-v1/; 3 4#include <dt-bindings/input/input.h> 5#include <dt-bindings/mfd/max77620.h> 6#include <dt-bindings/pinctrl/pinctrl-tegra.h> 7 8#include "tegra210.dtsi" 9 10/ { 11 model = "Google Pixel C"; 12 compatible = "google,smaug-rev8", "google,smaug-rev7", 13 "google,smaug-rev6", "google,smaug-rev5", 14 "google,smaug-rev4", "google,smaug-rev3", 15 "google,smaug-rev2", "google,smaug-rev1", 16 "google,smaug", "nvidia,tegra210"; 17 18 aliases { 19 serial0 = &uarta; 20 serial3 = &uartd; 21 }; 22 23 chosen { 24 bootargs = "earlycon"; 25 stdout-path = "serial0:115200n8"; 26 }; 27 28 memory@80000000 { 29 device_type = "memory"; 30 reg = <0x0 0x80000000 0x0 0xc0000000>; 31 }; 32 33 host1x@50000000 { 34 dpaux1: dpaux@54040000 { 35 vdd-supply = <&pp3300>; 36 status = "okay"; 37 }; 38 39 dsia: dsi@54300000 { 40 avdd-dsi-csi-supply = <&vdd_dsi_csi>; 41 status = "okay"; 42 43 link2: panel@0 { 44 compatible = "jdi,lpm102a188a"; 45 reg = <0>; 46 }; 47 }; 48 49 dsib: dsi@54400000 { 50 avdd-dsi-csi-supply = <&vdd_dsi_csi>; 51 nvidia,ganged-mode = <&dsia>; 52 status = "okay"; 53 54 link1: panel@0 { 55 compatible = "jdi,lpm102a188a"; 56 reg = <0>; 57 power-supply = <&pplcd_vdd>; 58 ddi-supply = <&pp1800_lcdio>; 59 enable-gpios = <&gpio TEGRA_GPIO(V, 1) GPIO_ACTIVE_HIGH>; 60 reset-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>; 61 link2 = <&link2>; 62 backlight = <&backlight>; 63 }; 64 }; 65 66 sor1: sor@54580000 { 67 avdd-io-hdmi-dp-supply = <&pp1800>; 68 vdd-hdmi-dp-pll-supply = <&avddio_1v05>; 69 nvidia,dpaux = <&dpaux1>; 70 status = "okay"; 71 }; 72 73 dpaux: dpaux@545c0000 { 74 status = "okay"; 75 }; 76 }; 77 78 gpu@57000000 { 79 vdd-supply = <&max77621_gpu>; 80 status = "okay"; 81 }; 82 83 pinmux: pinmux@700008d4 { 84 pinctrl-names = "boot"; 85 pinctrl-0 = <&state_boot>; 86 87 state_boot: pinmux { 88 pex_l0_rst_n_pa0 { 89 nvidia,pins = "pex_l0_rst_n_pa0"; 90 nvidia,function = "rsvd1"; 91 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 92 nvidia,tristate = <TEGRA_PIN_ENABLE>; 93 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 94 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 95 nvidia,io-hv = <TEGRA_PIN_DISABLE>; 96 }; 97 pex_l0_clkreq_n_pa1 { 98 nvidia,pins = "pex_l0_clkreq_n_pa1"; 99 nvidia,function = "rsvd1"; 100 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 101 nvidia,tristate = <TEGRA_PIN_ENABLE>; 102 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 103 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 104 nvidia,io-hv = <TEGRA_PIN_DISABLE>; 105 }; 106 pex_wake_n_pa2 { 107 nvidia,pins = "pex_wake_n_pa2"; 108 nvidia,function = "rsvd1"; 109 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 110 nvidia,tristate = <TEGRA_PIN_ENABLE>; 111 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 112 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 113 nvidia,io-hv = <TEGRA_PIN_DISABLE>; 114 }; 115 pex_l1_rst_n_pa3 { 116 nvidia,pins = "pex_l1_rst_n_pa3"; 117 nvidia,function = "rsvd1"; 118 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 119 nvidia,tristate = <TEGRA_PIN_ENABLE>; 120 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 121 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 122 nvidia,io-hv = <TEGRA_PIN_DISABLE>; 123 }; 124 pex_l1_clkreq_n_pa4 { 125 nvidia,pins = "pex_l1_clkreq_n_pa4"; 126 nvidia,function = "rsvd1"; 127 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 128 nvidia,tristate = <TEGRA_PIN_ENABLE>; 129 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 130 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 131 nvidia,io-hv = <TEGRA_PIN_DISABLE>; 132 }; 133 sata_led_active_pa5 { 134 nvidia,pins = "sata_led_active_pa5"; 135 nvidia,function = "rsvd1"; 136 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 137 nvidia,tristate = <TEGRA_PIN_ENABLE>; 138 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 139 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 140 }; 141 pa6 { 142 nvidia,pins = "pa6"; 143 nvidia,function = "rsvd1"; 144 nvidia,pull = <TEGRA_PIN_PULL_UP>; 145 nvidia,tristate = <TEGRA_PIN_DISABLE>; 146 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 147 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 148 }; 149 dap1_fs_pb0 { 150 nvidia,pins = "dap1_fs_pb0"; 151 nvidia,function = "i2s1"; 152 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 153 nvidia,tristate = <TEGRA_PIN_DISABLE>; 154 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 155 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 156 }; 157 dap1_din_pb1 { 158 nvidia,pins = "dap1_din_pb1"; 159 nvidia,function = "i2s1"; 160 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 161 nvidia,tristate = <TEGRA_PIN_DISABLE>; 162 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 163 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 164 }; 165 dap1_dout_pb2 { 166 nvidia,pins = "dap1_dout_pb2"; 167 nvidia,function = "i2s1"; 168 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 169 nvidia,tristate = <TEGRA_PIN_DISABLE>; 170 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 171 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 172 }; 173 dap1_sclk_pb3 { 174 nvidia,pins = "dap1_sclk_pb3"; 175 nvidia,function = "i2s1"; 176 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 177 nvidia,tristate = <TEGRA_PIN_DISABLE>; 178 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 179 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 180 }; 181 spi2_mosi_pb4 { 182 nvidia,pins = "spi2_mosi_pb4"; 183 nvidia,pull = <TEGRA_PIN_PULL_UP>; 184 nvidia,tristate = <TEGRA_PIN_DISABLE>; 185 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 186 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 187 }; 188 spi2_miso_pb5 { 189 nvidia,pins = "spi2_miso_pb5"; 190 nvidia,function = "rsvd2"; 191 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 192 nvidia,tristate = <TEGRA_PIN_ENABLE>; 193 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 194 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 195 }; 196 spi2_sck_pb6 { 197 nvidia,pins = "spi2_sck_pb6"; 198 nvidia,function = "rsvd2"; 199 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 200 nvidia,tristate = <TEGRA_PIN_ENABLE>; 201 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 202 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 203 }; 204 spi2_cs0_pb7 { 205 nvidia,pins = "spi2_cs0_pb7"; 206 nvidia,function = "rsvd2"; 207 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 208 nvidia,tristate = <TEGRA_PIN_ENABLE>; 209 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 210 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 211 }; 212 spi1_mosi_pc0 { 213 nvidia,pins = "spi1_mosi_pc0"; 214 nvidia,function = "spi1"; 215 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 216 nvidia,tristate = <TEGRA_PIN_DISABLE>; 217 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 218 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 219 }; 220 spi1_miso_pc1 { 221 nvidia,pins = "spi1_miso_pc1"; 222 nvidia,function = "spi1"; 223 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 224 nvidia,tristate = <TEGRA_PIN_DISABLE>; 225 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 226 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 227 }; 228 spi1_sck_pc2 { 229 nvidia,pins = "spi1_sck_pc2"; 230 nvidia,function = "spi1"; 231 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 232 nvidia,tristate = <TEGRA_PIN_DISABLE>; 233 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 234 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 235 }; 236 spi1_cs0_pc3 { 237 nvidia,pins = "spi1_cs0_pc3"; 238 nvidia,function = "spi1"; 239 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 240 nvidia,tristate = <TEGRA_PIN_DISABLE>; 241 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 242 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 243 }; 244 spi1_cs1_pc4 { 245 nvidia,pins = "spi1_cs1_pc4"; 246 nvidia,function = "rsvd1"; 247 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 248 nvidia,tristate = <TEGRA_PIN_ENABLE>; 249 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 250 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 251 }; 252 spi4_sck_pc5 { 253 nvidia,pins = "spi4_sck_pc5"; 254 nvidia,function = "rsvd1"; 255 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 256 nvidia,tristate = <TEGRA_PIN_ENABLE>; 257 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 258 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 259 }; 260 spi4_cs0_pc6 { 261 nvidia,pins = "spi4_cs0_pc6"; 262 nvidia,function = "rsvd1"; 263 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 264 nvidia,tristate = <TEGRA_PIN_ENABLE>; 265 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 266 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 267 }; 268 spi4_mosi_pc7 { 269 nvidia,pins = "spi4_mosi_pc7"; 270 nvidia,function = "rsvd1"; 271 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 272 nvidia,tristate = <TEGRA_PIN_ENABLE>; 273 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 274 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 275 }; 276 spi4_miso_pd0 { 277 nvidia,pins = "spi4_miso_pd0"; 278 nvidia,function = "rsvd1"; 279 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 280 nvidia,tristate = <TEGRA_PIN_ENABLE>; 281 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 282 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 283 }; 284 uart3_tx_pd1 { 285 nvidia,pins = "uart3_tx_pd1"; 286 nvidia,function = "uartc"; 287 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 288 nvidia,tristate = <TEGRA_PIN_DISABLE>; 289 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 290 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 291 }; 292 uart3_rx_pd2 { 293 nvidia,pins = "uart3_rx_pd2"; 294 nvidia,function = "uartc"; 295 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 296 nvidia,tristate = <TEGRA_PIN_DISABLE>; 297 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 298 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 299 }; 300 uart3_rts_pd3 { 301 nvidia,pins = "uart3_rts_pd3"; 302 nvidia,function = "uartc"; 303 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 304 nvidia,tristate = <TEGRA_PIN_DISABLE>; 305 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 306 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 307 }; 308 uart3_cts_pd4 { 309 nvidia,pins = "uart3_cts_pd4"; 310 nvidia,function = "uartc"; 311 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 312 nvidia,tristate = <TEGRA_PIN_DISABLE>; 313 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 314 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 315 }; 316 dmic1_clk_pe0 { 317 nvidia,pins = "dmic1_clk_pe0"; 318 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 319 nvidia,tristate = <TEGRA_PIN_DISABLE>; 320 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 321 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 322 }; 323 dmic1_dat_pe1 { 324 nvidia,pins = "dmic1_dat_pe1"; 325 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 326 nvidia,tristate = <TEGRA_PIN_DISABLE>; 327 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 328 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 329 }; 330 dmic2_clk_pe2 { 331 nvidia,pins = "dmic2_clk_pe2"; 332 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 333 nvidia,tristate = <TEGRA_PIN_DISABLE>; 334 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 335 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 336 }; 337 dmic2_dat_pe3 { 338 nvidia,pins = "dmic2_dat_pe3"; 339 nvidia,pull = <TEGRA_PIN_PULL_UP>; 340 nvidia,tristate = <TEGRA_PIN_DISABLE>; 341 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 342 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 343 }; 344 dmic3_clk_pe4 { 345 nvidia,pins = "dmic3_clk_pe4"; 346 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 347 nvidia,tristate = <TEGRA_PIN_DISABLE>; 348 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 349 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 350 }; 351 dmic3_dat_pe5 { 352 nvidia,pins = "dmic3_dat_pe5"; 353 nvidia,function = "rsvd2"; 354 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 355 nvidia,tristate = <TEGRA_PIN_ENABLE>; 356 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 357 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 358 }; 359 pe6 { 360 nvidia,pins = "pe6"; 361 nvidia,pull = <TEGRA_PIN_PULL_UP>; 362 nvidia,tristate = <TEGRA_PIN_DISABLE>; 363 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 364 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 365 }; 366 pe7 { 367 nvidia,pins = "pe7"; 368 nvidia,pull = <TEGRA_PIN_PULL_UP>; 369 nvidia,tristate = <TEGRA_PIN_DISABLE>; 370 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 371 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 372 }; 373 gen3_i2c_scl_pf0 { 374 nvidia,pins = "gen3_i2c_scl_pf0"; 375 nvidia,function = "i2c3"; 376 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 377 nvidia,tristate = <TEGRA_PIN_DISABLE>; 378 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 379 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 380 nvidia,io-hv = <TEGRA_PIN_DISABLE>; 381 }; 382 gen3_i2c_sda_pf1 { 383 nvidia,pins = "gen3_i2c_sda_pf1"; 384 nvidia,function = "i2c3"; 385 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 386 nvidia,tristate = <TEGRA_PIN_DISABLE>; 387 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 388 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 389 nvidia,io-hv = <TEGRA_PIN_DISABLE>; 390 }; 391 uart2_tx_pg0 { 392 nvidia,pins = "uart2_tx_pg0"; 393 nvidia,function = "uartb"; 394 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 395 nvidia,tristate = <TEGRA_PIN_ENABLE>; 396 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 397 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 398 }; 399 uart2_rx_pg1 { 400 nvidia,pins = "uart2_rx_pg1"; 401 nvidia,function = "uartb"; 402 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 403 nvidia,tristate = <TEGRA_PIN_ENABLE>; 404 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 405 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 406 }; 407 uart2_rts_pg2 { 408 nvidia,pins = "uart2_rts_pg2"; 409 nvidia,function = "rsvd2"; 410 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 411 nvidia,tristate = <TEGRA_PIN_ENABLE>; 412 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 413 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 414 }; 415 uart2_cts_pg3 { 416 nvidia,pins = "uart2_cts_pg3"; 417 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 418 nvidia,tristate = <TEGRA_PIN_DISABLE>; 419 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 420 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 421 }; 422 wifi_en_ph0 { 423 nvidia,pins = "wifi_en_ph0"; 424 nvidia,pull = <TEGRA_PIN_PULL_UP>; 425 nvidia,tristate = <TEGRA_PIN_DISABLE>; 426 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 427 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 428 }; 429 wifi_rst_ph1 { 430 nvidia,pins = "wifi_rst_ph1"; 431 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 432 nvidia,tristate = <TEGRA_PIN_DISABLE>; 433 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 434 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 435 }; 436 wifi_wake_ap_ph2 { 437 nvidia,pins = "wifi_wake_ap_ph2"; 438 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 439 nvidia,tristate = <TEGRA_PIN_DISABLE>; 440 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 441 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 442 }; 443 ap_wake_bt_ph3 { 444 nvidia,pins = "ap_wake_bt_ph3"; 445 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 446 nvidia,tristate = <TEGRA_PIN_DISABLE>; 447 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 448 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 449 }; 450 bt_rst_ph4 { 451 nvidia,pins = "bt_rst_ph4"; 452 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 453 nvidia,tristate = <TEGRA_PIN_DISABLE>; 454 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 455 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 456 }; 457 bt_wake_ap_ph5 { 458 nvidia,pins = "bt_wake_ap_ph5"; 459 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 460 nvidia,tristate = <TEGRA_PIN_DISABLE>; 461 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 462 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 463 }; 464 ph6 { 465 nvidia,pins = "ph6"; 466 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 467 nvidia,tristate = <TEGRA_PIN_DISABLE>; 468 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 469 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 470 }; 471 ap_wake_nfc_ph7 { 472 nvidia,pins = "ap_wake_nfc_ph7"; 473 nvidia,function = "rsvd0"; 474 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 475 nvidia,tristate = <TEGRA_PIN_ENABLE>; 476 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 477 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 478 }; 479 nfc_en_pi0 { 480 nvidia,pins = "nfc_en_pi0"; 481 nvidia,function = "rsvd0"; 482 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 483 nvidia,tristate = <TEGRA_PIN_ENABLE>; 484 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 485 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 486 }; 487 nfc_int_pi1 { 488 nvidia,pins = "nfc_int_pi1"; 489 nvidia,function = "rsvd0"; 490 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 491 nvidia,tristate = <TEGRA_PIN_ENABLE>; 492 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 493 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 494 }; 495 gps_en_pi2 { 496 nvidia,pins = "gps_en_pi2"; 497 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 498 nvidia,tristate = <TEGRA_PIN_DISABLE>; 499 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 500 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 501 }; 502 gps_rst_pi3 { 503 nvidia,pins = "gps_rst_pi3"; 504 nvidia,function = "rsvd0"; 505 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 506 nvidia,tristate = <TEGRA_PIN_ENABLE>; 507 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 508 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 509 }; 510 uart4_tx_pi4 { 511 nvidia,pins = "uart4_tx_pi4"; 512 nvidia,function = "uartd"; 513 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 514 nvidia,tristate = <TEGRA_PIN_DISABLE>; 515 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 516 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 517 }; 518 uart4_rx_pi5 { 519 nvidia,pins = "uart4_rx_pi5"; 520 nvidia,function = "uartd"; 521 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 522 nvidia,tristate = <TEGRA_PIN_DISABLE>; 523 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 524 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 525 }; 526 uart4_rts_pi6 { 527 nvidia,pins = "uart4_rts_pi6"; 528 nvidia,function = "uartd"; 529 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 530 nvidia,tristate = <TEGRA_PIN_DISABLE>; 531 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 532 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 533 }; 534 uart4_cts_pi7 { 535 nvidia,pins = "uart4_cts_pi7"; 536 nvidia,function = "uartd"; 537 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 538 nvidia,tristate = <TEGRA_PIN_DISABLE>; 539 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 540 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 541 }; 542 gen1_i2c_sda_pj0 { 543 nvidia,pins = "gen1_i2c_sda_pj0"; 544 nvidia,function = "i2c1"; 545 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 546 nvidia,tristate = <TEGRA_PIN_DISABLE>; 547 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 548 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 549 nvidia,io-hv = <TEGRA_PIN_DISABLE>; 550 }; 551 gen1_i2c_scl_pj1 { 552 nvidia,pins = "gen1_i2c_scl_pj1"; 553 nvidia,function = "i2c1"; 554 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 555 nvidia,tristate = <TEGRA_PIN_DISABLE>; 556 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 557 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 558 nvidia,io-hv = <TEGRA_PIN_DISABLE>; 559 }; 560 gen2_i2c_scl_pj2 { 561 nvidia,pins = "gen2_i2c_scl_pj2"; 562 nvidia,function = "i2c2"; 563 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 564 nvidia,tristate = <TEGRA_PIN_DISABLE>; 565 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 566 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 567 nvidia,io-hv = <TEGRA_PIN_ENABLE>; 568 }; 569 gen2_i2c_sda_pj3 { 570 nvidia,pins = "gen2_i2c_sda_pj3"; 571 nvidia,function = "i2c2"; 572 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 573 nvidia,tristate = <TEGRA_PIN_DISABLE>; 574 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 575 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 576 nvidia,io-hv = <TEGRA_PIN_ENABLE>; 577 }; 578 dap4_fs_pj4 { 579 nvidia,pins = "dap4_fs_pj4"; 580 nvidia,function = "rsvd1"; 581 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 582 nvidia,tristate = <TEGRA_PIN_ENABLE>; 583 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 584 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 585 }; 586 dap4_din_pj5 { 587 nvidia,pins = "dap4_din_pj5"; 588 nvidia,function = "rsvd1"; 589 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 590 nvidia,tristate = <TEGRA_PIN_ENABLE>; 591 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 592 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 593 }; 594 dap4_dout_pj6 { 595 nvidia,pins = "dap4_dout_pj6"; 596 nvidia,function = "rsvd1"; 597 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 598 nvidia,tristate = <TEGRA_PIN_ENABLE>; 599 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 600 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 601 }; 602 dap4_sclk_pj7 { 603 nvidia,pins = "dap4_sclk_pj7"; 604 nvidia,function = "rsvd1"; 605 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 606 nvidia,tristate = <TEGRA_PIN_ENABLE>; 607 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 608 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 609 }; 610 pk0 { 611 nvidia,pins = "pk0"; 612 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 613 nvidia,tristate = <TEGRA_PIN_DISABLE>; 614 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 615 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 616 }; 617 pk1 { 618 nvidia,pins = "pk1"; 619 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 620 nvidia,tristate = <TEGRA_PIN_DISABLE>; 621 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 622 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 623 }; 624 pk2 { 625 nvidia,pins = "pk2"; 626 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 627 nvidia,tristate = <TEGRA_PIN_DISABLE>; 628 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 629 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 630 }; 631 pk3 { 632 nvidia,pins = "pk3"; 633 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 634 nvidia,tristate = <TEGRA_PIN_DISABLE>; 635 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 636 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 637 }; 638 pk4 { 639 nvidia,pins = "pk4"; 640 nvidia,function = "rsvd1"; 641 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 642 nvidia,tristate = <TEGRA_PIN_ENABLE>; 643 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 644 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 645 }; 646 pk5 { 647 nvidia,pins = "pk5"; 648 nvidia,function = "rsvd1"; 649 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 650 nvidia,tristate = <TEGRA_PIN_ENABLE>; 651 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 652 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 653 }; 654 pk6 { 655 nvidia,pins = "pk6"; 656 nvidia,function = "rsvd1"; 657 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 658 nvidia,tristate = <TEGRA_PIN_ENABLE>; 659 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 660 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 661 }; 662 pk7 { 663 nvidia,pins = "pk7"; 664 nvidia,function = "rsvd1"; 665 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 666 nvidia,tristate = <TEGRA_PIN_ENABLE>; 667 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 668 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 669 }; 670 pl0 { 671 nvidia,pins = "pl0"; 672 nvidia,function = "rsvd0"; 673 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 674 nvidia,tristate = <TEGRA_PIN_ENABLE>; 675 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 676 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 677 }; 678 pl1 { 679 nvidia,pins = "pl1"; 680 nvidia,function = "rsvd1"; 681 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 682 nvidia,tristate = <TEGRA_PIN_ENABLE>; 683 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 684 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 685 }; 686 sdmmc1_clk_pm0 { 687 nvidia,pins = "sdmmc1_clk_pm0"; 688 nvidia,function = "rsvd1"; 689 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 690 nvidia,tristate = <TEGRA_PIN_ENABLE>; 691 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 692 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 693 }; 694 sdmmc1_cmd_pm1 { 695 nvidia,pins = "sdmmc1_cmd_pm1"; 696 nvidia,function = "rsvd2"; 697 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 698 nvidia,tristate = <TEGRA_PIN_ENABLE>; 699 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 700 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 701 }; 702 sdmmc1_dat3_pm2 { 703 nvidia,pins = "sdmmc1_dat3_pm2"; 704 nvidia,function = "rsvd2"; 705 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 706 nvidia,tristate = <TEGRA_PIN_ENABLE>; 707 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 708 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 709 }; 710 sdmmc1_dat2_pm3 { 711 nvidia,pins = "sdmmc1_dat2_pm3"; 712 nvidia,function = "rsvd2"; 713 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 714 nvidia,tristate = <TEGRA_PIN_ENABLE>; 715 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 716 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 717 }; 718 sdmmc1_dat1_pm4 { 719 nvidia,pins = "sdmmc1_dat1_pm4"; 720 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 721 nvidia,tristate = <TEGRA_PIN_DISABLE>; 722 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 723 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 724 }; 725 sdmmc1_dat0_pm5 { 726 nvidia,pins = "sdmmc1_dat0_pm5"; 727 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 728 nvidia,tristate = <TEGRA_PIN_DISABLE>; 729 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 730 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 731 }; 732 sdmmc3_clk_pp0 { 733 nvidia,pins = "sdmmc3_clk_pp0"; 734 nvidia,function = "rsvd1"; 735 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 736 nvidia,tristate = <TEGRA_PIN_ENABLE>; 737 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 738 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 739 }; 740 sdmmc3_cmd_pp1 { 741 nvidia,pins = "sdmmc3_cmd_pp1"; 742 nvidia,function = "rsvd1"; 743 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 744 nvidia,tristate = <TEGRA_PIN_ENABLE>; 745 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 746 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 747 }; 748 sdmmc3_dat3_pp2 { 749 nvidia,pins = "sdmmc3_dat3_pp2"; 750 nvidia,function = "rsvd1"; 751 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 752 nvidia,tristate = <TEGRA_PIN_ENABLE>; 753 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 754 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 755 }; 756 sdmmc3_dat2_pp3 { 757 nvidia,pins = "sdmmc3_dat2_pp3"; 758 nvidia,function = "rsvd1"; 759 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 760 nvidia,tristate = <TEGRA_PIN_ENABLE>; 761 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 762 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 763 }; 764 sdmmc3_dat1_pp4 { 765 nvidia,pins = "sdmmc3_dat1_pp4"; 766 nvidia,function = "rsvd1"; 767 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 768 nvidia,tristate = <TEGRA_PIN_ENABLE>; 769 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 770 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 771 }; 772 sdmmc3_dat0_pp5 { 773 nvidia,pins = "sdmmc3_dat0_pp5"; 774 nvidia,function = "rsvd1"; 775 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 776 nvidia,tristate = <TEGRA_PIN_ENABLE>; 777 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 778 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 779 }; 780 cam1_mclk_ps0 { 781 nvidia,pins = "cam1_mclk_ps0"; 782 nvidia,function = "extperiph3"; 783 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 784 nvidia,tristate = <TEGRA_PIN_DISABLE>; 785 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 786 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 787 }; 788 cam2_mclk_ps1 { 789 nvidia,pins = "cam2_mclk_ps1"; 790 nvidia,function = "extperiph3"; 791 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 792 nvidia,tristate = <TEGRA_PIN_DISABLE>; 793 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 794 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 795 }; 796 cam_i2c_scl_ps2 { 797 nvidia,pins = "cam_i2c_scl_ps2"; 798 nvidia,function = "i2cvi"; 799 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 800 nvidia,tristate = <TEGRA_PIN_DISABLE>; 801 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 802 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 803 nvidia,io-hv = <TEGRA_PIN_DISABLE>; 804 }; 805 cam_i2c_sda_ps3 { 806 nvidia,pins = "cam_i2c_sda_ps3"; 807 nvidia,function = "i2cvi"; 808 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 809 nvidia,tristate = <TEGRA_PIN_DISABLE>; 810 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 811 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 812 nvidia,io-hv = <TEGRA_PIN_DISABLE>; 813 }; 814 cam_rst_ps4 { 815 nvidia,pins = "cam_rst_ps4"; 816 nvidia,function = "rsvd1"; 817 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 818 nvidia,tristate = <TEGRA_PIN_ENABLE>; 819 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 820 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 821 }; 822 cam_af_en_ps5 { 823 nvidia,pins = "cam_af_en_ps5"; 824 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 825 nvidia,tristate = <TEGRA_PIN_DISABLE>; 826 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 827 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 828 }; 829 cam_flash_en_ps6 { 830 nvidia,pins = "cam_flash_en_ps6"; 831 nvidia,function = "rsvd2"; 832 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 833 nvidia,tristate = <TEGRA_PIN_ENABLE>; 834 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 835 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 836 }; 837 cam1_pwdn_ps7 { 838 nvidia,pins = "cam1_pwdn_ps7"; 839 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 840 nvidia,tristate = <TEGRA_PIN_DISABLE>; 841 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 842 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 843 }; 844 cam2_pwdn_pt0 { 845 nvidia,pins = "cam2_pwdn_pt0"; 846 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 847 nvidia,tristate = <TEGRA_PIN_DISABLE>; 848 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 849 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 850 }; 851 cam1_strobe_pt1 { 852 nvidia,pins = "cam1_strobe_pt1"; 853 nvidia,function = "rsvd1"; 854 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 855 nvidia,tristate = <TEGRA_PIN_ENABLE>; 856 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 857 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 858 }; 859 uart1_tx_pu0 { 860 nvidia,pins = "uart1_tx_pu0"; 861 nvidia,function = "uarta"; 862 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 863 nvidia,tristate = <TEGRA_PIN_DISABLE>; 864 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 865 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 866 }; 867 uart1_rx_pu1 { 868 nvidia,pins = "uart1_rx_pu1"; 869 nvidia,function = "uarta"; 870 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 871 nvidia,tristate = <TEGRA_PIN_DISABLE>; 872 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 873 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 874 }; 875 uart1_rts_pu2 { 876 nvidia,pins = "uart1_rts_pu2"; 877 nvidia,function = "rsvd1"; 878 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 879 nvidia,tristate = <TEGRA_PIN_ENABLE>; 880 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 881 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 882 }; 883 uart1_cts_pu3 { 884 nvidia,pins = "uart1_cts_pu3"; 885 nvidia,function = "rsvd1"; 886 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 887 nvidia,tristate = <TEGRA_PIN_ENABLE>; 888 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 889 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 890 }; 891 lcd_bl_pwm_pv0 { 892 nvidia,pins = "lcd_bl_pwm_pv0"; 893 nvidia,function = "rsvd3"; 894 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 895 nvidia,tristate = <TEGRA_PIN_ENABLE>; 896 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 897 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 898 }; 899 lcd_bl_en_pv1 { 900 nvidia,pins = "lcd_bl_en_pv1"; 901 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 902 nvidia,tristate = <TEGRA_PIN_DISABLE>; 903 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 904 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 905 }; 906 lcd_rst_pv2 { 907 nvidia,pins = "lcd_rst_pv2"; 908 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 909 nvidia,tristate = <TEGRA_PIN_DISABLE>; 910 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 911 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 912 }; 913 lcd_gpio1_pv3 { 914 nvidia,pins = "lcd_gpio1_pv3"; 915 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 916 nvidia,tristate = <TEGRA_PIN_DISABLE>; 917 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 918 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 919 }; 920 lcd_gpio2_pv4 { 921 nvidia,pins = "lcd_gpio2_pv4"; 922 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 923 nvidia,tristate = <TEGRA_PIN_DISABLE>; 924 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 925 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 926 }; 927 ap_ready_pv5 { 928 nvidia,pins = "ap_ready_pv5"; 929 nvidia,function = "rsvd0"; 930 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 931 nvidia,tristate = <TEGRA_PIN_ENABLE>; 932 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 933 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 934 }; 935 touch_rst_pv6 { 936 nvidia,pins = "touch_rst_pv6"; 937 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 938 nvidia,tristate = <TEGRA_PIN_DISABLE>; 939 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 940 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 941 }; 942 touch_clk_pv7 { 943 nvidia,pins = "touch_clk_pv7"; 944 nvidia,function = "touch"; 945 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 946 nvidia,tristate = <TEGRA_PIN_DISABLE>; 947 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 948 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 949 }; 950 modem_wake_ap_px0 { 951 nvidia,pins = "modem_wake_ap_px0"; 952 nvidia,function = "rsvd0"; 953 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 954 nvidia,tristate = <TEGRA_PIN_ENABLE>; 955 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 956 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 957 }; 958 touch_int_px1 { 959 nvidia,pins = "touch_int_px1"; 960 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 961 nvidia,tristate = <TEGRA_PIN_DISABLE>; 962 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 963 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 964 }; 965 motion_int_px2 { 966 nvidia,pins = "motion_int_px2"; 967 nvidia,function = "rsvd0"; 968 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 969 nvidia,tristate = <TEGRA_PIN_ENABLE>; 970 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 971 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 972 }; 973 als_prox_int_px3 { 974 nvidia,pins = "als_prox_int_px3"; 975 nvidia,function = "rsvd0"; 976 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 977 nvidia,tristate = <TEGRA_PIN_ENABLE>; 978 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 979 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 980 }; 981 temp_alert_px4 { 982 nvidia,pins = "temp_alert_px4"; 983 nvidia,pull = <TEGRA_PIN_PULL_UP>; 984 nvidia,tristate = <TEGRA_PIN_DISABLE>; 985 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 986 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 987 }; 988 button_power_on_px5 { 989 nvidia,pins = "button_power_on_px5"; 990 nvidia,pull = <TEGRA_PIN_PULL_UP>; 991 nvidia,tristate = <TEGRA_PIN_DISABLE>; 992 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 993 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 994 }; 995 button_vol_up_px6 { 996 nvidia,pins = "button_vol_up_px6"; 997 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 998 nvidia,tristate = <TEGRA_PIN_DISABLE>; 999 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1000 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1001 }; 1002 button_vol_down_px7 { 1003 nvidia,pins = "button_vol_down_px7"; 1004 nvidia,pull = <TEGRA_PIN_PULL_UP>; 1005 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1006 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1007 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1008 }; 1009 button_slide_sw_py0 { 1010 nvidia,pins = "button_slide_sw_py0"; 1011 nvidia,pull = <TEGRA_PIN_PULL_UP>; 1012 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1013 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1014 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1015 }; 1016 button_home_py1 { 1017 nvidia,pins = "button_home_py1"; 1018 nvidia,pull = <TEGRA_PIN_PULL_UP>; 1019 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1020 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1021 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1022 }; 1023 lcd_te_py2 { 1024 nvidia,pins = "lcd_te_py2"; 1025 nvidia,function = "displaya"; 1026 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1027 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1028 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1029 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1030 }; 1031 pwr_i2c_scl_py3 { 1032 nvidia,pins = "pwr_i2c_scl_py3"; 1033 nvidia,function = "i2cpmu"; 1034 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1035 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1036 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1037 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1038 nvidia,io-hv = <TEGRA_PIN_DISABLE>; 1039 }; 1040 pwr_i2c_sda_py4 { 1041 nvidia,pins = "pwr_i2c_sda_py4"; 1042 nvidia,function = "i2cpmu"; 1043 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1044 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1045 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1046 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1047 nvidia,io-hv = <TEGRA_PIN_DISABLE>; 1048 }; 1049 clk_32k_out_py5 { 1050 nvidia,pins = "clk_32k_out_py5"; 1051 nvidia,function = "soc"; 1052 nvidia,pull = <TEGRA_PIN_PULL_UP>; 1053 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1054 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1055 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1056 }; 1057 pz0 { 1058 nvidia,pins = "pz0"; 1059 nvidia,pull = <TEGRA_PIN_PULL_UP>; 1060 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1061 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1062 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1063 }; 1064 pz1 { 1065 nvidia,pins = "pz1"; 1066 nvidia,pull = <TEGRA_PIN_PULL_UP>; 1067 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1068 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1069 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1070 }; 1071 pz2 { 1072 nvidia,pins = "pz2"; 1073 nvidia,pull = <TEGRA_PIN_PULL_UP>; 1074 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1075 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1076 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1077 }; 1078 pz3 { 1079 nvidia,pins = "pz3"; 1080 nvidia,function = "rsvd1"; 1081 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1082 nvidia,tristate = <TEGRA_PIN_ENABLE>; 1083 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1084 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1085 }; 1086 pz4 { 1087 nvidia,pins = "pz4"; 1088 nvidia,function = "rsvd1"; 1089 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1090 nvidia,tristate = <TEGRA_PIN_ENABLE>; 1091 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1092 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1093 }; 1094 pz5 { 1095 nvidia,pins = "pz5"; 1096 nvidia,function = "soc"; 1097 nvidia,pull = <TEGRA_PIN_PULL_UP>; 1098 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1099 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1100 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1101 }; 1102 dap2_fs_paa0 { 1103 nvidia,pins = "dap2_fs_paa0"; 1104 nvidia,function = "i2s2"; 1105 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1106 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1107 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1108 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1109 }; 1110 dap2_sclk_paa1 { 1111 nvidia,pins = "dap2_sclk_paa1"; 1112 nvidia,function = "i2s2"; 1113 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1114 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1115 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1116 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1117 }; 1118 dap2_din_paa2 { 1119 nvidia,pins = "dap2_din_paa2"; 1120 nvidia,function = "i2s2"; 1121 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1122 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1123 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1124 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1125 }; 1126 dap2_dout_paa3 { 1127 nvidia,pins = "dap2_dout_paa3"; 1128 nvidia,function = "i2s2"; 1129 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1130 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1131 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1132 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1133 }; 1134 aud_mclk_pbb0 { 1135 nvidia,pins = "aud_mclk_pbb0"; 1136 nvidia,function = "aud"; 1137 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1138 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1139 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1140 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1141 }; 1142 dvfs_pwm_pbb1 { 1143 nvidia,pins = "dvfs_pwm_pbb1"; 1144 nvidia,function = "rsvd0"; 1145 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1146 nvidia,tristate = <TEGRA_PIN_ENABLE>; 1147 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1148 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1149 }; 1150 dvfs_clk_pbb2 { 1151 nvidia,pins = "dvfs_clk_pbb2"; 1152 nvidia,function = "rsvd0"; 1153 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1154 nvidia,tristate = <TEGRA_PIN_ENABLE>; 1155 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1156 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1157 }; 1158 gpio_x1_aud_pbb3 { 1159 nvidia,pins = "gpio_x1_aud_pbb3"; 1160 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1161 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1162 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1163 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1164 }; 1165 gpio_x3_aud_pbb4 { 1166 nvidia,pins = "gpio_x3_aud_pbb4"; 1167 nvidia,pull = <TEGRA_PIN_PULL_UP>; 1168 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1169 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1170 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1171 }; 1172 hdmi_cec_pcc0 { 1173 nvidia,pins = "hdmi_cec_pcc0"; 1174 nvidia,function = "rsvd1"; 1175 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1176 nvidia,tristate = <TEGRA_PIN_ENABLE>; 1177 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1178 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1179 nvidia,io-hv = <TEGRA_PIN_DISABLE>; 1180 }; 1181 hdmi_int_dp_hpd_pcc1 { 1182 nvidia,pins = "hdmi_int_dp_hpd_pcc1"; 1183 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1184 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1185 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1186 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1187 nvidia,io-hv = <TEGRA_PIN_DISABLE>; 1188 }; 1189 spdif_out_pcc2 { 1190 nvidia,pins = "spdif_out_pcc2"; 1191 nvidia,function = "rsvd1"; 1192 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1193 nvidia,tristate = <TEGRA_PIN_ENABLE>; 1194 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1195 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1196 }; 1197 spdif_in_pcc3 { 1198 nvidia,pins = "spdif_in_pcc3"; 1199 nvidia,function = "rsvd1"; 1200 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1201 nvidia,tristate = <TEGRA_PIN_ENABLE>; 1202 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1203 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1204 }; 1205 usb_vbus_en0_pcc4 { 1206 nvidia,pins = "usb_vbus_en0_pcc4"; 1207 nvidia,function = "rsvd1"; 1208 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1209 nvidia,tristate = <TEGRA_PIN_ENABLE>; 1210 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1211 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1212 nvidia,io-hv = <TEGRA_PIN_DISABLE>; 1213 }; 1214 usb_vbus_en1_pcc5 { 1215 nvidia,pins = "usb_vbus_en1_pcc5"; 1216 nvidia,function = "rsvd1"; 1217 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1218 nvidia,tristate = <TEGRA_PIN_ENABLE>; 1219 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1220 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1221 nvidia,io-hv = <TEGRA_PIN_DISABLE>; 1222 }; 1223 dp_hpd0_pcc6 { 1224 nvidia,pins = "dp_hpd0_pcc6"; 1225 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1226 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1227 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1228 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1229 }; 1230 pcc7 { 1231 nvidia,pins = "pcc7"; 1232 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1233 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1234 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1235 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1236 nvidia,io-hv = <TEGRA_PIN_DISABLE>; 1237 }; 1238 spi2_cs1_pdd0 { 1239 nvidia,pins = "spi2_cs1_pdd0"; 1240 nvidia,function = "rsvd1"; 1241 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1242 nvidia,tristate = <TEGRA_PIN_ENABLE>; 1243 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1244 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1245 }; 1246 qspi_sck_pee0 { 1247 nvidia,pins = "qspi_sck_pee0"; 1248 nvidia,function = "qspi"; 1249 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1250 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1251 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1252 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1253 }; 1254 qspi_cs_n_pee1 { 1255 nvidia,pins = "qspi_cs_n_pee1"; 1256 nvidia,function = "qspi"; 1257 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1258 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1259 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1260 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1261 }; 1262 qspi_io0_pee2 { 1263 nvidia,pins = "qspi_io0_pee2"; 1264 nvidia,function = "qspi"; 1265 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1266 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1267 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1268 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1269 }; 1270 qspi_io1_pee3 { 1271 nvidia,pins = "qspi_io1_pee3"; 1272 nvidia,function = "qspi"; 1273 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1274 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1275 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1276 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1277 }; 1278 qspi_io2_pee4 { 1279 nvidia,pins = "qspi_io2_pee4"; 1280 nvidia,function = "rsvd1"; 1281 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1282 nvidia,tristate = <TEGRA_PIN_ENABLE>; 1283 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1284 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1285 }; 1286 qspi_io3_pee5 { 1287 nvidia,pins = "qspi_io3_pee5"; 1288 nvidia,function = "rsvd1"; 1289 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1290 nvidia,tristate = <TEGRA_PIN_ENABLE>; 1291 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1292 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1293 }; 1294 core_pwr_req { 1295 nvidia,pins = "core_pwr_req"; 1296 nvidia,function = "core"; 1297 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1298 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1299 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1300 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1301 }; 1302 cpu_pwr_req { 1303 nvidia,pins = "cpu_pwr_req"; 1304 nvidia,function = "cpu"; 1305 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1306 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1307 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1308 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1309 }; 1310 pwr_int_n { 1311 nvidia,pins = "pwr_int_n"; 1312 nvidia,function = "pmi"; 1313 nvidia,pull = <TEGRA_PIN_PULL_UP>; 1314 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1315 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1316 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1317 }; 1318 clk_32k_in { 1319 nvidia,pins = "clk_32k_in"; 1320 nvidia,function = "clk"; 1321 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1322 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1323 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1324 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1325 }; 1326 jtag_rtck { 1327 nvidia,pins = "jtag_rtck"; 1328 nvidia,function = "jtag"; 1329 nvidia,pull = <TEGRA_PIN_PULL_UP>; 1330 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1331 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1332 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1333 }; 1334 clk_req { 1335 nvidia,pins = "clk_req"; 1336 nvidia,function = "rsvd1"; 1337 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1338 nvidia,tristate = <TEGRA_PIN_ENABLE>; 1339 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1340 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1341 }; 1342 shutdown { 1343 nvidia,pins = "shutdown"; 1344 nvidia,function = "shutdown"; 1345 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1346 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1347 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1348 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1349 }; 1350 }; 1351 }; 1352 1353 serial@70006000 { 1354 /delete-property/ dmas; 1355 /delete-property/ dma-names; 1356 status = "okay"; 1357 }; 1358 1359 uartd: serial@70006300 { 1360 compatible = "nvidia,tegra30-hsuart"; 1361 reset-names = "serial"; 1362 /delete-property/ reg-shift; 1363 status = "okay"; 1364 1365 bluetooth { 1366 compatible = "brcm,bcm43540-bt"; 1367 max-speed = <4000000>; 1368 brcm,bt-pcm-int-params = [01 02 00 01 01]; 1369 device-wakeup-gpios = <&gpio TEGRA_GPIO(H, 3) GPIO_ACTIVE_HIGH>; 1370 shutdown-gpios = <&gpio TEGRA_GPIO(H, 4) GPIO_ACTIVE_HIGH>; 1371 interrupt-parent = <&gpio>; 1372 interrupts = <TEGRA_GPIO(H, 5) IRQ_TYPE_LEVEL_LOW>; 1373 interrupt-names = "host-wakeup"; 1374 }; 1375 }; 1376 1377 i2c@7000c000 { 1378 status = "okay"; 1379 clock-frequency = <1000000>; 1380 1381 touchscreen: i2c-hid-dev@20 { 1382 compatible = "hid-over-i2c"; 1383 reg = <0x20>; 1384 hid-descr-addr = <0x0020>; 1385 interrupt-parent = <&gpio>; 1386 interrupts = <TEGRA_GPIO(X, 1) IRQ_TYPE_EDGE_FALLING>; 1387 }; 1388 }; 1389 1390 i2c@7000c400 { 1391 status = "okay"; 1392 clock-frequency = <1000000>; 1393 1394 ec@1e { 1395 compatible = "google,cros-ec-i2c"; 1396 reg = <0x1e>; 1397 interrupt-parent = <&gpio>; 1398 interrupts = <TEGRA_GPIO(Z, 1) IRQ_TYPE_LEVEL_LOW>; 1399 wakeup-source; 1400 1401 ec_i2c_0: i2c-tunnel { 1402 compatible = "google,cros-ec-i2c-tunnel"; 1403 #address-cells = <1>; 1404 #size-cells = <0>; 1405 1406 google,remote-bus = <0>; 1407 1408 battery: bq27742@55 { 1409 compatible = "ti,bq27742"; 1410 reg = <0x55>; 1411 }; 1412 }; 1413 1414 usbc_extcon0: extcon0 { 1415 compatible = "google,extcon-usbc-cros-ec"; 1416 google,usb-port-id = <0>; 1417 }; 1418 }; 1419 }; 1420 1421 i2c@7000d000 { 1422 status = "okay"; 1423 clock-frequency = <1000000>; 1424 1425 max77621_cpu: max77621@1b { 1426 compatible = "maxim,max77621"; 1427 reg = <0x1b>; 1428 interrupt-parent = <&gpio>; 1429 interrupts = <TEGRA_GPIO(Y, 1) IRQ_TYPE_LEVEL_LOW>; 1430 regulator-always-on; 1431 regulator-boot-on; 1432 regulator-min-microvolt = <800000>; 1433 regulator-max-microvolt = <1231250>; 1434 regulator-name = "PPVAR_CPU"; 1435 regulator-ramp-delay = <12500>; 1436 maxim,dvs-default-state = <1>; 1437 maxim,enable-active-discharge; 1438 maxim,enable-bias-control; 1439 maxim,enable-gpio = <&pmic 5 0>; 1440 maxim,externally-enable; 1441 }; 1442 1443 max77621_gpu: regulator@1c { 1444 compatible = "maxim,max77621"; 1445 reg = <0x1c>; 1446 interrupt-parent = <&gpio>; 1447 interrupts = <TEGRA_GPIO(A, 6) IRQ_TYPE_LEVEL_LOW>; 1448 regulator-min-microvolt = <840000>; 1449 regulator-max-microvolt = <1150000>; 1450 regulator-name = "PPVAR_GPU"; 1451 regulator-ramp-delay = <12500>; 1452 maxim,dvs-default-state = <1>; 1453 maxim,enable-active-discharge; 1454 maxim,enable-bias-control; 1455 maxim,enable-gpio = <&pmic 6 GPIO_ACTIVE_HIGH>; 1456 maxim,externally-enable; 1457 }; 1458 1459 pmic: pmic@3c { 1460 compatible = "maxim,max77620"; 1461 reg = <0x3c>; 1462 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; 1463 1464 #interrupt-cells = <2>; 1465 interrupt-controller; 1466 1467 gpio-controller; 1468 #gpio-cells = <2>; 1469 1470 pinctrl-names = "default"; 1471 pinctrl-0 = <&max77620_default>; 1472 1473 fps { 1474 fps0 { 1475 maxim,shutdown-fps-time-period-us = <5120>; 1476 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>; 1477 }; 1478 1479 fps1 { 1480 maxim,shutdown-fps-time-period-us = <5120>; 1481 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>; 1482 maxim,device-state-on-disabled-event = <MAX77620_FPS_INACTIVE_STATE_SLEEP>; 1483 }; 1484 1485 fps2 { 1486 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>; 1487 }; 1488 }; 1489 1490 max77620_default: pinmux { 1491 gpio0_1_2_7 { 1492 pins = "gpio0", "gpio1", "gpio2", "gpio7"; 1493 function = "gpio"; 1494 }; 1495 1496 /* 1497 * GPIO3 is used to en_pp3300, and it is part of power 1498 * sequence, So it must be sequenced up (automatically 1499 * set by OTP) and down properly. 1500 */ 1501 gpio3 { 1502 pins = "gpio3"; 1503 function = "fps-out"; 1504 drive-open-drain = <1>; 1505 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 1506 maxim,active-fps-power-up-slot = <4>; 1507 maxim,active-fps-power-down-slot = <2>; 1508 }; 1509 1510 gpio4 { 1511 pins = "gpio4"; 1512 function = "32k-out1"; 1513 }; 1514 1515 gpio5_6 { 1516 pins = "gpio5", "gpio6"; 1517 function = "gpio"; 1518 drive-push-pull = <1>; 1519 }; 1520 }; 1521 1522 regulators { 1523 in-ldo0-1-supply = <&pp1350>; 1524 in-ldo2-supply = <&pp3300>; 1525 in-ldo3-5-supply = <&pp3300>; 1526 in-ldo7-8-supply = <&pp1350>; 1527 1528 ppvar_soc: sd0 { 1529 regulator-name = "PPVAR_SOC"; 1530 regulator-min-microvolt = <825000>; 1531 regulator-max-microvolt = <1125000>; 1532 regulator-always-on; 1533 regulator-boot-on; 1534 maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 1535 maxim,active-fps-power-up-slot = <1>; 1536 maxim,active-fps-power-down-slot = <7>; 1537 }; 1538 1539 pp1100_sd1: sd1 { 1540 regulator-name = "PP1100"; 1541 regulator-min-microvolt = <1125000>; 1542 regulator-max-microvolt = <1125000>; 1543 regulator-always-on; 1544 regulator-boot-on; 1545 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 1546 maxim,active-fps-power-up-slot = <5>; 1547 maxim,active-fps-power-down-slot = <1>; 1548 }; 1549 1550 pp1350: sd2 { 1551 regulator-name = "PP1350"; 1552 regulator-min-microvolt = <1350000>; 1553 regulator-max-microvolt = <1350000>; 1554 regulator-always-on; 1555 regulator-boot-on; 1556 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 1557 maxim,active-fps-power-up-slot = <2>; 1558 maxim,active-fps-power-down-slot = <5>; 1559 }; 1560 1561 pp1800: sd3 { 1562 regulator-name = "PP1800"; 1563 regulator-min-microvolt = <1800000>; 1564 regulator-max-microvolt = <1800000>; 1565 regulator-always-on; 1566 regulator-boot-on; 1567 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 1568 maxim,active-fps-power-up-slot = <3>; 1569 maxim,active-fps-power-down-slot = <3>; 1570 }; 1571 1572 pp1200_avdd: ldo0 { 1573 regulator-name = "PP1200_AVDD"; 1574 regulator-min-microvolt = <1200000>; 1575 regulator-max-microvolt = <1200000>; 1576 regulator-enable-ramp-delay = <26>; 1577 regulator-ramp-delay = <100000>; 1578 regulator-boot-on; 1579 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 1580 maxim,active-fps-power-up-slot = <0>; 1581 maxim,active-fps-power-down-slot = <7>; 1582 }; 1583 1584 pp1200_rcam: ldo1 { 1585 regulator-name = "PP1200_RCAM"; 1586 regulator-min-microvolt = <1200000>; 1587 regulator-max-microvolt = <1200000>; 1588 regulator-enable-ramp-delay = <22>; 1589 regulator-ramp-delay = <100000>; 1590 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 1591 maxim,active-fps-power-up-slot = <0>; 1592 maxim,active-fps-power-down-slot = <7>; 1593 }; 1594 1595 pp_ldo2: ldo2 { 1596 regulator-name = "PP_LDO2"; 1597 regulator-min-microvolt = <1800000>; 1598 regulator-max-microvolt = <1800000>; 1599 regulator-enable-ramp-delay = <62>; 1600 regulator-ramp-delay = <11000>; 1601 regulator-always-on; 1602 regulator-boot-on; 1603 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 1604 maxim,active-fps-power-up-slot = <0>; 1605 maxim,active-fps-power-down-slot = <7>; 1606 }; 1607 1608 pp2800l_rcam: ldo3 { 1609 regulator-name = "PP2800L_RCAM"; 1610 regulator-min-microvolt = <2800000>; 1611 regulator-max-microvolt = <2800000>; 1612 regulator-enable-ramp-delay = <50>; 1613 regulator-ramp-delay = <100000>; 1614 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 1615 maxim,active-fps-power-up-slot = <0>; 1616 maxim,active-fps-power-down-slot = <7>; 1617 }; 1618 1619 pp100_soc_rtc: ldo4 { 1620 regulator-name = "PP1100_SOC_RTC"; 1621 regulator-min-microvolt = <850000>; 1622 regulator-max-microvolt = <850000>; 1623 regulator-enable-ramp-delay = <22>; 1624 regulator-ramp-delay = <100000>; 1625 regulator-always-on; /* Check this */ 1626 regulator-boot-on; 1627 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 1628 maxim,active-fps-power-up-slot = <1>; 1629 maxim,active-fps-power-down-slot = <7>; 1630 }; 1631 1632 pp2800l_fcam: ldo5 { 1633 regulator-name = "PP2800L_FCAM"; 1634 regulator-min-microvolt = <2800000>; 1635 regulator-max-microvolt = <2800000>; 1636 regulator-enable-ramp-delay = <62>; 1637 regulator-ramp-delay = <100000>; 1638 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 1639 maxim,active-fps-power-up-slot = <0>; 1640 maxim,active-fps-power-down-slot = <7>; 1641 }; 1642 1643 ldo6 { 1644 /* Unused. */ 1645 regulator-name = "PP_LDO6"; 1646 regulator-min-microvolt = <1800000>; 1647 regulator-max-microvolt = <1800000>; 1648 regulator-enable-ramp-delay = <36>; 1649 regulator-ramp-delay = <100000>; 1650 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 1651 maxim,active-fps-power-up-slot = <0>; 1652 maxim,active-fps-power-down-slot = <7>; 1653 }; 1654 1655 pp1050_avdd: ldo7 { 1656 regulator-name = "PP1050_AVDD"; 1657 regulator-min-microvolt = <1050000>; 1658 regulator-max-microvolt = <1050000>; 1659 regulator-enable-ramp-delay = <24>; 1660 regulator-ramp-delay = <100000>; 1661 regulator-always-on; 1662 regulator-boot-on; 1663 maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 1664 maxim,active-fps-power-up-slot = <3>; 1665 maxim,active-fps-power-down-slot = <4>; 1666 }; 1667 1668 avddio_1v05: ldo8 { 1669 regulator-name = "AVDDIO_1V05"; 1670 regulator-min-microvolt = <1050000>; 1671 regulator-max-microvolt = <1050000>; 1672 regulator-enable-ramp-delay = <22>; 1673 regulator-ramp-delay = <100000>; 1674 regulator-boot-on; 1675 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 1676 maxim,active-fps-power-up-slot = <0>; 1677 maxim,active-fps-power-down-slot = <7>; 1678 }; 1679 }; 1680 }; 1681 }; 1682 1683 i2c@7000d100 { 1684 status = "okay"; 1685 clock-frequency = <400000>; 1686 1687 nau8825@1a { 1688 compatible = "nuvoton,nau8825"; 1689 reg = <0x1a>; 1690 interrupt-parent = <&gpio>; 1691 interrupts = <TEGRA_GPIO(E, 6) IRQ_TYPE_LEVEL_LOW>; 1692 clocks = <&tegra_pmc TEGRA_PMC_CLK_OUT_2>; 1693 clock-names = "mclk"; 1694 1695 nuvoton,jkdet-enable; 1696 nuvoton,jkdet-polarity = <GPIO_ACTIVE_LOW>; 1697 nuvoton,vref-impedance = <2>; 1698 nuvoton,micbias-voltage = <6>; 1699 nuvoton,sar-threshold-num = <4>; 1700 nuvoton,sar-threshold = <0xc 0x1e 0x38 0x60>; 1701 nuvoton,sar-hysteresis = <1>; 1702 nuvoton,sar-voltage = <0>; 1703 nuvoton,sar-compare-time = <0>; 1704 nuvoton,sar-sampling-time = <0>; 1705 nuvoton,short-key-debounce = <2>; 1706 nuvoton,jack-insert-debounce = <7>; 1707 nuvoton,jack-eject-debounce = <7>; 1708 status = "okay"; 1709 }; 1710 1711 backlight: backlight@2c { 1712 compatible = "ti,lp8557"; 1713 reg = <0x2c>; 1714 power-supply = <&pplcd_vdd>; 1715 enable-supply = <&pp1800_lcdio>; 1716 bl-name = "lp8557-backlight"; 1717 dev-ctrl = /bits/ 8 <0x01>; 1718 init-brt = /bits/ 8 <0x80>; 1719 1720 /* Full scale current, 20mA */ 1721 rom-11h { 1722 rom-addr = /bits/ 8 <0x11>; 1723 rom-val = /bits/ 8 <0x05>; 1724 }; 1725 /* Frequency = 4.9kHz, magic undocumented val */ 1726 rom-12h { 1727 rom-addr = /bits/ 8 <0x12>; 1728 rom-val = /bits/ 8 <0x29>; 1729 }; 1730 /* Boost freq = 1MHz, BComp option = 1 */ 1731 rom-13h { 1732 rom-addr = /bits/ 8 <0x13>; 1733 rom-val = /bits/ 8 <0x03>; 1734 }; 1735 /* 4V OV, 6 output LED string enabled */ 1736 rom-14h { 1737 rom-addr = /bits/ 8 <0x14>; 1738 rom-val = /bits/ 8 <0xbf>; 1739 }; 1740 }; 1741 1742 audio-codec@2d { 1743 compatible = "realtek,rt5677"; 1744 reg = <0x2d>; 1745 interrupt-parent = <&gpio>; 1746 interrupts = <TEGRA_GPIO(X, 0) IRQ_TYPE_LEVEL_HIGH>; 1747 realtek,reset-gpio = <&gpio TEGRA_GPIO(BB, 3) GPIO_ACTIVE_LOW>; 1748 gpio-controller; 1749 #gpio-cells = <2>; 1750 status = "okay"; 1751 }; 1752 1753 tmp451: temperature-sensor@4c { 1754 compatible = "ti,tmp451"; 1755 reg = <0x4c>; 1756 interrupt-parent = <&gpio>; 1757 interrupts = <TEGRA_GPIO(X, 4) IRQ_TYPE_LEVEL_LOW>; 1758 vcc-supply = <&pp1800>; 1759 #thermal-sensor-cells = <1>; 1760 }; 1761 }; 1762 1763 pmc@7000e400 { 1764 nvidia,invert-interrupt; 1765 nvidia,suspend-mode = <0>; 1766 nvidia,cpu-pwr-good-time = <0>; 1767 nvidia,cpu-pwr-off-time = <0>; 1768 nvidia,core-pwr-good-time = <12000 6000>; 1769 nvidia,core-pwr-off-time = <39053>; 1770 nvidia,core-power-req-active-high; 1771 nvidia,sys-clock-req-active-high; 1772 status = "okay"; 1773 }; 1774 1775 usb@70090000 { 1776 phys = <&{/padctl@7009f000/pads/usb2/lanes/usb2-0}>, 1777 <&{/padctl@7009f000/pads/pcie/lanes/pcie-6}>; 1778 phy-names = "usb2-0", "usb3-0"; 1779 1780 dvddio-pex-supply = <&avddio_1v05>; 1781 hvddio-pex-supply = <&pp1800>; 1782 avdd-usb-supply = <&pp3300>; 1783 1784 status = "okay"; 1785 }; 1786 1787 padctl@7009f000 { 1788 status = "okay"; 1789 1790 avdd-pll-utmip-supply = <&pp1800>; 1791 avdd-pll-uerefe-supply = <&pp1050_avdd>; 1792 dvdd-pex-pll-supply = <&avddio_1v05>; 1793 hvdd-pex-pll-e-supply = <&pp1800>; 1794 1795 pads { 1796 usb2 { 1797 status = "okay"; 1798 1799 lanes { 1800 usb2-0 { 1801 nvidia,function = "xusb"; 1802 status = "okay"; 1803 }; 1804 }; 1805 }; 1806 1807 pcie { 1808 status = "okay"; 1809 1810 lanes { 1811 pcie-6 { 1812 nvidia,function = "usb3-ss"; 1813 status = "okay"; 1814 }; 1815 }; 1816 }; 1817 }; 1818 1819 ports { 1820 usb2-0 { 1821 status = "okay"; 1822 vbus-supply = <&usbc_vbus>; 1823 mode = "otg"; 1824 usb-role-switch; 1825 role-switch-default-mode = "host"; 1826 }; 1827 1828 usb3-0 { 1829 nvidia,usb2-companion = <0>; 1830 status = "okay"; 1831 }; 1832 }; 1833 }; 1834 1835 mmc@700b0200 { 1836 power-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>; 1837 bus-width = <4>; 1838 non-removable; 1839 vqmmc-supply = <&pp1800>; 1840 vmmc-supply = <&pp3300>; 1841 #address-cells = <1>; 1842 #size-cells = <0>; 1843 status = "okay"; 1844 1845 wifi@1 { 1846 compatible = "brcm,bcm4354-fmac", "brcm,bcm4329-fmac"; 1847 reg = <1>; 1848 interrupt-parent = <&gpio>; 1849 interrupts = <TEGRA_GPIO(H, 2) IRQ_TYPE_LEVEL_HIGH>; 1850 interrupt-names = "host-wake"; 1851 }; 1852 }; 1853 1854 mmc@700b0600 { 1855 bus-width = <8>; 1856 non-removable; 1857 status = "okay"; 1858 }; 1859 1860 usb@700d0000 { 1861 phys = <&{/padctl@7009f000/pads/usb2/lanes/usb2-0}>, 1862 <&{/padctl@7009f000/pads/pcie/lanes/pcie-6}>; 1863 phy-names = "usb2-0", "usb3-0"; 1864 1865 avddio-usb-supply = <&avddio_1v05>; 1866 hvdd-usb-supply = <&pp3300>; 1867 1868 status = "okay"; 1869 }; 1870 1871 clock@70110000 { 1872 status = "okay"; 1873 nvidia,cf = <6>; 1874 nvidia,ci = <0>; 1875 nvidia,cg = <2>; 1876 nvidia,droop-ctrl = <0x00000f00>; 1877 nvidia,force-mode = <1>; 1878 nvidia,i2c-fs-rate = <400000>; 1879 nvidia,sample-rate = <12500>; 1880 vdd-cpu-supply = <&max77621_cpu>; 1881 }; 1882 1883 aconnect@702c0000 { 1884 status = "okay"; 1885 1886 dma-controller@702e2000 { 1887 status = "okay"; 1888 }; 1889 1890 interrupt-controller@702f9000 { 1891 status = "okay"; 1892 }; 1893 }; 1894 1895 spi@70410000 { 1896 status = "okay"; 1897 1898 flash@0 { 1899 compatible = "jedec,spi-nor"; 1900 reg = <0>; 1901 spi-max-frequency = <104000000>; 1902 spi-tx-bus-width = <2>; 1903 spi-rx-bus-width = <2>; 1904 }; 1905 }; 1906 1907 clk32k_in: clock-32k { 1908 compatible = "fixed-clock"; 1909 clock-frequency = <32768>; 1910 #clock-cells = <0>; 1911 }; 1912 1913 cpus { 1914 cpu@0 { 1915 enable-method = "psci"; 1916 }; 1917 1918 cpu@1 { 1919 enable-method = "psci"; 1920 }; 1921 1922 cpu@2 { 1923 enable-method = "psci"; 1924 }; 1925 1926 cpu@3 { 1927 enable-method = "psci"; 1928 }; 1929 1930 idle-states { 1931 cpu-sleep { 1932 arm,psci-suspend-param = <0x00010007>; 1933 status = "okay"; 1934 }; 1935 }; 1936 }; 1937 1938 gpio-keys { 1939 compatible = "gpio-keys"; 1940 1941 key-power { 1942 label = "Power"; 1943 gpios = <&gpio TEGRA_GPIO(X, 5) GPIO_ACTIVE_LOW>; 1944 linux,code = <KEY_POWER>; 1945 debounce-interval = <30>; 1946 wakeup-source; 1947 }; 1948 1949 key-volume-down { 1950 label = "Volume Down"; 1951 gpios = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_LOW>; 1952 linux,code = <KEY_VOLUMEDOWN>; 1953 }; 1954 1955 key-volume-up { 1956 label = "Volume Up"; 1957 gpios = <&gpio TEGRA_GPIO(M, 4) GPIO_ACTIVE_LOW>; 1958 linux,code = <KEY_VOLUMEUP>; 1959 }; 1960 1961 switch-lid { 1962 label = "Lid"; 1963 gpios = <&gpio TEGRA_GPIO(B, 4) GPIO_ACTIVE_LOW>; 1964 linux,input-type = <EV_SW>; 1965 linux,code = <SW_LID>; 1966 wakeup-source; 1967 }; 1968 1969 switch-tablet-mode { 1970 label = "Tablet Mode"; 1971 gpios = <&gpio TEGRA_GPIO(Z, 2) GPIO_ACTIVE_HIGH>; 1972 linux,input-type = <EV_SW>; 1973 linux,code = <SW_TABLET_MODE>; 1974 wakeup-source; 1975 }; 1976 }; 1977 1978 max98357a { 1979 compatible = "maxim,max98357a"; 1980 status = "okay"; 1981 }; 1982 1983 psci { 1984 compatible = "arm,psci-1.0"; 1985 method = "smc"; 1986 }; 1987 1988 ppvar_sys: regulator-ppvar-sys { 1989 compatible = "regulator-fixed"; 1990 regulator-name = "PPVAR_SYS"; 1991 regulator-min-microvolt = <4400000>; 1992 regulator-max-microvolt = <4400000>; 1993 regulator-always-on; 1994 }; 1995 1996 pplcd_vdd: regulator-pplcd-vdd { 1997 compatible = "regulator-fixed"; 1998 regulator-name = "PPLCD_VDD"; 1999 regulator-min-microvolt = <4400000>; 2000 regulator-max-microvolt = <4400000>; 2001 gpio = <&gpio TEGRA_GPIO(V, 4) 0>; 2002 enable-active-high; 2003 regulator-boot-on; 2004 }; 2005 2006 pp3000_always: regulator-pp3000-always { 2007 compatible = "regulator-fixed"; 2008 regulator-name = "PP3000_ALWAYS"; 2009 regulator-min-microvolt = <3000000>; 2010 regulator-max-microvolt = <3000000>; 2011 regulator-always-on; 2012 }; 2013 2014 pp3300: regulator-pp3000 { 2015 compatible = "regulator-fixed"; 2016 regulator-name = "PP3300"; 2017 regulator-min-microvolt = <3300000>; 2018 regulator-max-microvolt = <3300000>; 2019 regulator-boot-on; 2020 regulator-always-on; 2021 enable-active-high; 2022 }; 2023 2024 pp5000: regulator-pp5000 { 2025 compatible = "regulator-fixed"; 2026 regulator-name = "PP5000"; 2027 regulator-min-microvolt = <5000000>; 2028 regulator-max-microvolt = <5000000>; 2029 regulator-always-on; 2030 }; 2031 2032 pp1800_lcdio: regulator-pp1800-lcdio { 2033 compatible = "regulator-fixed"; 2034 regulator-name = "PP1800_LCDIO"; 2035 regulator-min-microvolt = <1800000>; 2036 regulator-max-microvolt = <1800000>; 2037 gpio = <&gpio TEGRA_GPIO(V, 3) 0>; 2038 enable-active-high; 2039 regulator-boot-on; 2040 }; 2041 2042 pp1800_cam: regulator-pp1800-cam { 2043 compatible = "regulator-fixed"; 2044 regulator-name = "PP1800_CAM"; 2045 regulator-min-microvolt = <1800000>; 2046 regulator-max-microvolt = <1800000>; 2047 gpio = <&gpio TEGRA_GPIO(K, 3) 0>; 2048 enable-active-high; 2049 }; 2050 2051 usbc_vbus: regulator-usbc-vbus { 2052 compatible = "regulator-fixed"; 2053 regulator-name = "USBC_VBUS"; 2054 regulator-min-microvolt = <5000000>; 2055 regulator-max-microvolt = <5000000>; 2056 }; 2057 2058 vdd_dsi_csi: regulator-vdd-dsi-csi { 2059 compatible = "regulator-fixed"; 2060 regulator-name = "AVDD_DSI_CSI_1V2"; 2061 regulator-min-microvolt = <1200000>; 2062 regulator-max-microvolt = <1200000>; 2063 vin-supply = <&pp1200_avdd>; 2064 }; 2065}; 2066