1/dts-v1/; 2 3#include <dt-bindings/input/input.h> 4#include "tegra132.dtsi" 5 6/ { 7 model = "NVIDIA Tegra132 Norrin"; 8 compatible = "nvidia,norrin", "nvidia,tegra132", "nvidia,tegra124"; 9 10 aliases { 11 rtc0 = "/i2c@7000d000/as3722@40"; 12 rtc1 = "/rtc@7000e000"; 13 serial0 = &uarta; 14 }; 15 16 chosen { 17 stdout-path = "serial0:115200n8"; 18 }; 19 20 memory { 21 device_type = "memory"; 22 reg = <0x0 0x80000000 0x0 0x80000000>; 23 }; 24 25 host1x@50000000 { 26 hdmi@54280000 { 27 status = "disabled"; 28 29 vdd-supply = <&vdd_3v3_hdmi>; 30 pll-supply = <&vdd_hdmi_pll>; 31 hdmi-supply = <&vdd_5v0_hdmi>; 32 33 nvidia,ddc-i2c-bus = <&hdmi_ddc>; 34 nvidia,hpd-gpio = 35 <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>; 36 }; 37 38 sor@54540000 { 39 status = "okay"; 40 41 nvidia,dpaux = <&dpaux>; 42 nvidia,panel = <&panel>; 43 }; 44 45 dpaux: dpaux@545c0000 { 46 vdd-supply = <&vdd_3v3_panel>; 47 status = "okay"; 48 }; 49 }; 50 51 gpu@57000000 { 52 status = "okay"; 53 54 vdd-supply = <&vdd_gpu>; 55 }; 56 57 pinmux@70000868 { 58 pinctrl-names = "default"; 59 pinctrl-0 = <&pinmux_default>; 60 61 pinmux_default: pinmux@0 { 62 dap_mclk1_pw4 { 63 nvidia,pins = "dap_mclk1_pw4"; 64 nvidia,function = "extperiph1"; 65 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 66 nvidia,tristate = <TEGRA_PIN_DISABLE>; 67 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 68 }; 69 dap2_din_pa4 { 70 nvidia,pins = "dap2_din_pa4"; 71 nvidia,function = "i2s1"; 72 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 73 nvidia,tristate = <TEGRA_PIN_DISABLE>; 74 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 75 }; 76 dap2_dout_pa5 { 77 nvidia,pins = "dap2_dout_pa5", 78 "dap2_fs_pa2", 79 "dap2_sclk_pa3"; 80 nvidia,function = "i2s1"; 81 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 82 nvidia,tristate = <TEGRA_PIN_DISABLE>; 83 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 84 }; 85 dap3_dout_pp2 { 86 nvidia,pins = "dap3_dout_pp2"; 87 nvidia,function = "i2s2"; 88 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 89 nvidia,tristate = <TEGRA_PIN_DISABLE>; 90 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 91 }; 92 dvfs_pwm_px0 { 93 nvidia,pins = "dvfs_pwm_px0", 94 "dvfs_clk_px2"; 95 nvidia,function = "cldvfs"; 96 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 97 nvidia,tristate = <TEGRA_PIN_DISABLE>; 98 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 99 }; 100 ulpi_clk_py0 { 101 nvidia,pins = "ulpi_clk_py0", 102 "ulpi_nxt_py2", 103 "ulpi_stp_py3"; 104 nvidia,function = "spi1"; 105 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 106 nvidia,tristate = <TEGRA_PIN_DISABLE>; 107 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 108 }; 109 ulpi_dir_py1 { 110 nvidia,pins = "ulpi_dir_py1"; 111 nvidia,function = "spi1"; 112 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 113 nvidia,tristate = <TEGRA_PIN_DISABLE>; 114 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 115 }; 116 cam_i2c_scl_pbb1 { 117 nvidia,pins = "cam_i2c_scl_pbb1", 118 "cam_i2c_sda_pbb2"; 119 nvidia,function = "i2c3"; 120 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 121 nvidia,tristate = <TEGRA_PIN_DISABLE>; 122 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 123 nvidia,lock = <TEGRA_PIN_DISABLE>; 124 nvidia,open-drain = <TEGRA_PIN_ENABLE>; 125 }; 126 gen2_i2c_scl_pt5 { 127 nvidia,pins = "gen2_i2c_scl_pt5", 128 "gen2_i2c_sda_pt6"; 129 nvidia,function = "i2c2"; 130 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 131 nvidia,tristate = <TEGRA_PIN_DISABLE>; 132 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 133 nvidia,lock = <TEGRA_PIN_DISABLE>; 134 nvidia,open-drain = <TEGRA_PIN_ENABLE>; 135 }; 136 pj7 { 137 nvidia,pins = "pj7"; 138 nvidia,function = "uartd"; 139 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 140 nvidia,tristate = <TEGRA_PIN_DISABLE>; 141 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 142 }; 143 spdif_in_pk6 { 144 nvidia,pins = "spdif_in_pk6"; 145 nvidia,function = "spdif"; 146 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 147 nvidia,tristate = <TEGRA_PIN_DISABLE>; 148 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 149 }; 150 pk7 { 151 nvidia,pins = "pk7"; 152 nvidia,function = "uartd"; 153 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 154 nvidia,tristate = <TEGRA_PIN_DISABLE>; 155 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 156 }; 157 pg4 { 158 nvidia,pins = "pg4", 159 "pg5", 160 "pg6", 161 "pi3"; 162 nvidia,function = "spi4"; 163 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 164 nvidia,tristate = <TEGRA_PIN_DISABLE>; 165 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 166 }; 167 pg7 { 168 nvidia,pins = "pg7"; 169 nvidia,function = "spi4"; 170 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 171 nvidia,tristate = <TEGRA_PIN_DISABLE>; 172 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 173 }; 174 ph1 { 175 nvidia,pins = "ph1"; 176 nvidia,function = "pwm1"; 177 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 178 nvidia,tristate = <TEGRA_PIN_DISABLE>; 179 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 180 }; 181 pk0 { 182 nvidia,pins = "pk0", 183 "kb_row15_ps7", 184 "clk_32k_out_pa0"; 185 nvidia,function = "soc"; 186 nvidia,pull = <TEGRA_PIN_PULL_UP>; 187 nvidia,tristate = <TEGRA_PIN_DISABLE>; 188 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 189 }; 190 sdmmc1_clk_pz0 { 191 nvidia,pins = "sdmmc1_clk_pz0"; 192 nvidia,function = "sdmmc1"; 193 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 194 nvidia,tristate = <TEGRA_PIN_DISABLE>; 195 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 196 }; 197 sdmmc1_cmd_pz1 { 198 nvidia,pins = "sdmmc1_cmd_pz1", 199 "sdmmc1_dat0_py7", 200 "sdmmc1_dat1_py6", 201 "sdmmc1_dat2_py5", 202 "sdmmc1_dat3_py4"; 203 nvidia,function = "sdmmc1"; 204 nvidia,pull = <TEGRA_PIN_PULL_UP>; 205 nvidia,tristate = <TEGRA_PIN_DISABLE>; 206 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 207 }; 208 sdmmc3_clk_pa6 { 209 nvidia,pins = "sdmmc3_clk_pa6"; 210 nvidia,function = "sdmmc3"; 211 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 212 nvidia,tristate = <TEGRA_PIN_DISABLE>; 213 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 214 }; 215 sdmmc3_cmd_pa7 { 216 nvidia,pins = "sdmmc3_cmd_pa7", 217 "sdmmc3_dat0_pb7", 218 "sdmmc3_dat1_pb6", 219 "sdmmc3_dat2_pb5", 220 "sdmmc3_dat3_pb4", 221 "kb_col4_pq4", 222 "sdmmc3_clk_lb_out_pee4", 223 "sdmmc3_clk_lb_in_pee5", 224 "sdmmc3_cd_n_pv2"; 225 nvidia,function = "sdmmc3"; 226 nvidia,pull = <TEGRA_PIN_PULL_UP>; 227 nvidia,tristate = <TEGRA_PIN_DISABLE>; 228 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 229 }; 230 sdmmc4_clk_pcc4 { 231 nvidia,pins = "sdmmc4_clk_pcc4"; 232 nvidia,function = "sdmmc4"; 233 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 234 nvidia,tristate = <TEGRA_PIN_DISABLE>; 235 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 236 }; 237 sdmmc4_cmd_pt7 { 238 nvidia,pins = "sdmmc4_cmd_pt7", 239 "sdmmc4_dat0_paa0", 240 "sdmmc4_dat1_paa1", 241 "sdmmc4_dat2_paa2", 242 "sdmmc4_dat3_paa3", 243 "sdmmc4_dat4_paa4", 244 "sdmmc4_dat5_paa5", 245 "sdmmc4_dat6_paa6", 246 "sdmmc4_dat7_paa7"; 247 nvidia,function = "sdmmc4"; 248 nvidia,pull = <TEGRA_PIN_PULL_UP>; 249 nvidia,tristate = <TEGRA_PIN_DISABLE>; 250 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 251 }; 252 mic_det_l { 253 nvidia,pins = "kb_row7_pr7"; 254 nvidia,function = "rsvd2"; 255 nvidia,pull = <TEGRA_PIN_PULL_UP>; 256 nvidia,tristate = <TEGRA_PIN_DISABLE>; 257 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 258 }; 259 kb_row10_ps2 { 260 nvidia,pins = "kb_row10_ps2"; 261 nvidia,function = "uarta"; 262 nvidia,pull = <TEGRA_PIN_PULL_UP>; 263 nvidia,tristate = <TEGRA_PIN_DISABLE>; 264 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 265 }; 266 kb_row9_ps1 { 267 nvidia,pins = "kb_row9_ps1"; 268 nvidia,function = "uarta"; 269 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 270 nvidia,tristate = <TEGRA_PIN_DISABLE>; 271 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 272 }; 273 pwr_i2c_scl_pz6 { 274 nvidia,pins = "pwr_i2c_scl_pz6", 275 "pwr_i2c_sda_pz7"; 276 nvidia,function = "i2cpwr"; 277 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 278 nvidia,tristate = <TEGRA_PIN_DISABLE>; 279 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 280 nvidia,lock = <TEGRA_PIN_DISABLE>; 281 nvidia,open-drain = <TEGRA_PIN_ENABLE>; 282 }; 283 jtag_rtck { 284 nvidia,pins = "jtag_rtck"; 285 nvidia,function = "rtck"; 286 nvidia,pull = <TEGRA_PIN_PULL_UP>; 287 nvidia,tristate = <TEGRA_PIN_DISABLE>; 288 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 289 }; 290 clk_32k_in { 291 nvidia,pins = "clk_32k_in"; 292 nvidia,function = "clk"; 293 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 294 nvidia,tristate = <TEGRA_PIN_DISABLE>; 295 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 296 }; 297 core_pwr_req { 298 nvidia,pins = "core_pwr_req"; 299 nvidia,function = "pwron"; 300 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 301 nvidia,tristate = <TEGRA_PIN_DISABLE>; 302 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 303 }; 304 cpu_pwr_req { 305 nvidia,pins = "cpu_pwr_req"; 306 nvidia,function = "cpu"; 307 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 308 nvidia,tristate = <TEGRA_PIN_DISABLE>; 309 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 310 }; 311 kb_col0_ap { 312 nvidia,pins = "kb_col0_pq0"; 313 nvidia,function = "rsvd4"; 314 nvidia,pull = <TEGRA_PIN_PULL_UP>; 315 nvidia,tristate = <TEGRA_PIN_DISABLE>; 316 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 317 }; 318 en_vdd_sd { 319 nvidia,pins = "kb_row0_pr0"; 320 nvidia,function = "rsvd4"; 321 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 322 nvidia,tristate = <TEGRA_PIN_DISABLE>; 323 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 324 }; 325 lid_open { 326 nvidia,pins = "kb_row4_pr4"; 327 nvidia,function = "rsvd3"; 328 nvidia,pull = <TEGRA_PIN_PULL_UP>; 329 nvidia,tristate = <TEGRA_PIN_DISABLE>; 330 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 331 }; 332 pwr_int_n { 333 nvidia,pins = "pwr_int_n"; 334 nvidia,function = "pmi"; 335 nvidia,pull = <TEGRA_PIN_PULL_UP>; 336 nvidia,tristate = <TEGRA_PIN_DISABLE>; 337 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 338 }; 339 reset_out_n { 340 nvidia,pins = "reset_out_n"; 341 nvidia,function = "reset_out_n"; 342 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 343 nvidia,tristate = <TEGRA_PIN_DISABLE>; 344 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 345 }; 346 clk3_out_pee0 { 347 nvidia,pins = "clk3_out_pee0"; 348 nvidia,function = "extperiph3"; 349 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 350 nvidia,tristate = <TEGRA_PIN_DISABLE>; 351 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 352 }; 353 gen1_i2c_scl_pc4 { 354 nvidia,pins = "gen1_i2c_scl_pc4", 355 "gen1_i2c_sda_pc5"; 356 nvidia,function = "i2c1"; 357 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 358 nvidia,tristate = <TEGRA_PIN_DISABLE>; 359 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 360 nvidia,lock = <TEGRA_PIN_DISABLE>; 361 nvidia,open-drain = <TEGRA_PIN_ENABLE>; 362 }; 363 hdmi_cec_pee3 { 364 nvidia,pins = "hdmi_cec_pee3"; 365 nvidia,function = "cec"; 366 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 367 nvidia,tristate = <TEGRA_PIN_DISABLE>; 368 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 369 nvidia,lock = <TEGRA_PIN_DISABLE>; 370 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 371 }; 372 hdmi_int_pn7 { 373 nvidia,pins = "hdmi_int_pn7"; 374 nvidia,function = "rsvd1"; 375 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 376 nvidia,tristate = <TEGRA_PIN_DISABLE>; 377 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 378 }; 379 ddc_scl_pv4 { 380 nvidia,pins = "ddc_scl_pv4", 381 "ddc_sda_pv5"; 382 nvidia,function = "i2c4"; 383 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 384 nvidia,tristate = <TEGRA_PIN_DISABLE>; 385 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 386 nvidia,lock = <TEGRA_PIN_DISABLE>; 387 nvidia,rcv-sel = <TEGRA_PIN_ENABLE>; 388 }; 389 usb_vbus_en0_pn4 { 390 nvidia,pins = "usb_vbus_en0_pn4", 391 "usb_vbus_en1_pn5", 392 "usb_vbus_en2_pff1"; 393 nvidia,function = "usb"; 394 nvidia,pull = <TEGRA_PIN_PULL_UP>; 395 nvidia,tristate = <TEGRA_PIN_ENABLE>; 396 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 397 nvidia,lock = <TEGRA_PIN_DISABLE>; 398 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 399 }; 400 drive_sdio1 { 401 nvidia,pins = "drive_sdio1"; 402 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>; 403 nvidia,schmitt = <TEGRA_PIN_DISABLE>; 404 nvidia,pull-down-strength = <36>; 405 nvidia,pull-up-strength = <20>; 406 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOW>; 407 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOW>; 408 }; 409 drive_sdio3 { 410 nvidia,pins = "drive_sdio3"; 411 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>; 412 nvidia,schmitt = <TEGRA_PIN_DISABLE>; 413 nvidia,pull-down-strength = <22>; 414 nvidia,pull-up-strength = <36>; 415 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>; 416 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>; 417 }; 418 drive_gma { 419 nvidia,pins = "drive_gma"; 420 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>; 421 nvidia,schmitt = <TEGRA_PIN_DISABLE>; 422 nvidia,pull-down-strength = <2>; 423 nvidia,pull-up-strength = <1>; 424 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>; 425 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>; 426 nvidia,drive-type = <1>; 427 }; 428 ac_ok { 429 nvidia,pins = "pj0"; 430 nvidia,function = "gmi"; 431 nvidia,pull = <TEGRA_PIN_PULL_UP>; 432 nvidia,tristate = <TEGRA_PIN_ENABLE>; 433 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 434 }; 435 codec_irq_l { 436 nvidia,pins = "ph4"; 437 nvidia,function = "gmi"; 438 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 439 nvidia,tristate = <TEGRA_PIN_DISABLE>; 440 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 441 }; 442 lcd_bl_en { 443 nvidia,pins = "ph2"; 444 nvidia,function = "gmi"; 445 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 446 nvidia,tristate = <TEGRA_PIN_DISABLE>; 447 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 448 }; 449 touch_irq_l { 450 nvidia,pins = "gpio_w3_aud_pw3"; 451 nvidia,function = "spi6"; 452 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 453 nvidia,tristate = <TEGRA_PIN_DISABLE>; 454 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 455 }; 456 tpm_davint_l { 457 nvidia,pins = "ph6"; 458 nvidia,function = "gmi"; 459 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 460 nvidia,tristate = <TEGRA_PIN_DISABLE>; 461 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 462 }; 463 ts_irq_l { 464 nvidia,pins = "pk2"; 465 nvidia,function = "gmi"; 466 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 467 nvidia,tristate = <TEGRA_PIN_DISABLE>; 468 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 469 }; 470 ts_reset_l { 471 nvidia,pins = "pk4"; 472 nvidia,function = "gmi"; 473 nvidia,pull = <1>; 474 nvidia,tristate = <TEGRA_PIN_DISABLE>; 475 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 476 }; 477 ts_shdn_l { 478 nvidia,pins = "pk1"; 479 nvidia,function = "gmi"; 480 nvidia,pull = <TEGRA_PIN_PULL_UP>; 481 nvidia,tristate = <TEGRA_PIN_DISABLE>; 482 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 483 }; 484 ph7 { 485 nvidia,pins = "ph7"; 486 nvidia,function = "gmi"; 487 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 488 nvidia,tristate = <TEGRA_PIN_DISABLE>; 489 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 490 }; 491 sensor_irq_l { 492 nvidia,pins = "pi6"; 493 nvidia,function = "gmi"; 494 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 495 nvidia,tristate = <TEGRA_PIN_DISABLE>; 496 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 497 }; 498 wifi_en { 499 nvidia,pins = "gpio_x7_aud_px7"; 500 nvidia,function = "rsvd4"; 501 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 502 nvidia,tristate = <TEGRA_PIN_DISABLE>; 503 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 504 }; 505 chromeos_write_protect { 506 nvidia,pins = "kb_row1_pr1"; 507 nvidia,function = "rsvd4"; 508 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 509 nvidia,tristate = <TEGRA_PIN_DISABLE>; 510 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 511 }; 512 hp_det_l { 513 nvidia,pins = "pi7"; 514 nvidia,function = "rsvd1"; 515 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 516 nvidia,tristate = <TEGRA_PIN_DISABLE>; 517 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 518 }; 519 soc_warm_reset_l { 520 nvidia,pins = "pi5"; 521 nvidia,function = "gmi"; 522 nvidia,pull = <TEGRA_PIN_PULL_UP>; 523 nvidia,tristate = <TEGRA_PIN_DISABLE>; 524 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 525 }; 526 }; 527 }; 528 529 serial@70006000 { 530 status = "okay"; 531 }; 532 533 pwm: pwm@7000a000 { 534 status = "okay"; 535 }; 536 537 /* HDMI DDC */ 538 hdmi_ddc: i2c@7000c700 { 539 status = "okay"; 540 clock-frequency = <100000>; 541 }; 542 543 i2c@7000d000 { 544 status = "okay"; 545 clock-frequency = <400000>; 546 547 as3722: pmic@40 { 548 compatible = "ams,as3722"; 549 reg = <0x40>; 550 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; 551 552 ams,system-power-controller; 553 554 #interrupt-cells = <2>; 555 interrupt-controller; 556 557 #gpio-cells = <2>; 558 gpio-controller; 559 560 pinctrl-names = "default"; 561 pinctrl-0 = <&as3722_default>; 562 563 as3722_default: pinmux@0 { 564 gpio0 { 565 pins = "gpio0"; 566 function = "gpio"; 567 bias-pull-down; 568 }; 569 570 gpio1 { 571 pins = "gpio1"; 572 function = "gpio"; 573 bias-pull-up; 574 }; 575 576 gpio2_4_7 { 577 pins = "gpio2", "gpio4", "gpio7"; 578 function = "gpio"; 579 bias-pull-up; 580 }; 581 582 gpio3 { 583 pins = "gpio3"; 584 function = "gpio"; 585 bias-high-impedance; 586 }; 587 588 gpio5 { 589 pins = "gpio5"; 590 function = "clk32k-out"; 591 bias-pull-down; 592 }; 593 594 gpio6 { 595 pins = "gpio6"; 596 function = "clk32k-out"; 597 bias-pull-down; 598 }; 599 }; 600 601 regulators { 602 vsup-sd2-supply = <&vdd_5v0_sys>; 603 vsup-sd3-supply = <&vdd_5v0_sys>; 604 vsup-sd4-supply = <&vdd_5v0_sys>; 605 vsup-sd5-supply = <&vdd_5v0_sys>; 606 vin-ldo0-supply = <&vdd_1v35_lp0>; 607 vin-ldo1-6-supply = <&vdd_3v3_sys>; 608 vin-ldo2-5-7-supply = <&vddio_1v8>; 609 vin-ldo3-4-supply = <&vdd_3v3_sys>; 610 vin-ldo9-10-supply = <&vdd_5v0_sys>; 611 vin-ldo11-supply = <&vdd_3v3_run>; 612 613 sd0 { 614 regulator-name = "+VDD_CPU_AP"; 615 regulator-min-microvolt = <700000>; 616 regulator-max-microvolt = <1350000>; 617 regulator-max-microamp = <3500000>; 618 regulator-always-on; 619 regulator-boot-on; 620 ams,ext-control = <2>; 621 }; 622 623 sd1 { 624 regulator-name = "+VDD_CORE"; 625 regulator-min-microvolt = <700000>; 626 regulator-max-microvolt = <1350000>; 627 regulator-max-microamp = <4000000>; 628 regulator-always-on; 629 regulator-boot-on; 630 ams,ext-control = <1>; 631 }; 632 633 vdd_1v35_lp0: sd2 { 634 regulator-name = "+1.35V_LP0(sd2)"; 635 regulator-min-microvolt = <1350000>; 636 regulator-max-microvolt = <1350000>; 637 regulator-always-on; 638 regulator-boot-on; 639 }; 640 641 sd3 { 642 regulator-name = "+1.35V_LP0(sd3)"; 643 regulator-min-microvolt = <1350000>; 644 regulator-max-microvolt = <1350000>; 645 regulator-always-on; 646 regulator-boot-on; 647 }; 648 649 vdd_1v05_run: sd4 { 650 regulator-name = "+1.05V_RUN"; 651 regulator-min-microvolt = <1050000>; 652 regulator-max-microvolt = <1050000>; 653 }; 654 655 vddio_1v8: sd5 { 656 regulator-name = "+1.8V_VDDIO"; 657 regulator-min-microvolt = <1800000>; 658 regulator-max-microvolt = <1800000>; 659 regulator-always-on; 660 regulator-boot-on; 661 }; 662 663 vdd_gpu: sd6 { 664 regulator-name = "+VDD_GPU_AP"; 665 regulator-min-microvolt = <800000>; 666 regulator-max-microvolt = <1200000>; 667 regulator-min-microamp = <3500000>; 668 regulator-max-microamp = <3500000>; 669 regulator-always-on; 670 regulator-boot-on; 671 }; 672 673 ldo0 { 674 regulator-name = "+1.05_RUN_AVDD"; 675 regulator-min-microvolt = <1050000>; 676 regulator-max-microvolt = <1050000>; 677 regulator-always-on; 678 regulator-boot-on; 679 ams,ext-control = <1>; 680 }; 681 682 ldo1 { 683 regulator-name = "+1.8V_RUN_CAM"; 684 regulator-min-microvolt = <1800000>; 685 regulator-max-microvolt = <1800000>; 686 }; 687 688 ldo2 { 689 regulator-name = "+1.2V_GEN_AVDD"; 690 regulator-min-microvolt = <1200000>; 691 regulator-max-microvolt = <1200000>; 692 regulator-always-on; 693 regulator-boot-on; 694 }; 695 696 ldo3 { 697 regulator-name = "+1.00V_LP0_VDD_RTC"; 698 regulator-min-microvolt = <1000000>; 699 regulator-max-microvolt = <1000000>; 700 regulator-always-on; 701 regulator-boot-on; 702 ams,enable-tracking; 703 }; 704 705 vdd_run_cam: ldo4 { 706 regulator-name = "+2.8V_RUN_CAM"; 707 regulator-min-microvolt = <2800000>; 708 regulator-max-microvolt = <2800000>; 709 }; 710 711 ldo5 { 712 regulator-name = "+1.2V_RUN_CAM_FRONT"; 713 regulator-min-microvolt = <1200000>; 714 regulator-max-microvolt = <1200000>; 715 }; 716 717 vddio_sdmmc3: ldo6 { 718 regulator-name = "+VDDIO_SDMMC3"; 719 regulator-min-microvolt = <1800000>; 720 regulator-max-microvolt = <3300000>; 721 }; 722 723 ldo7 { 724 regulator-name = "+1.05V_RUN_CAM_REAR"; 725 regulator-min-microvolt = <1050000>; 726 regulator-max-microvolt = <1050000>; 727 }; 728 729 ldo9 { 730 regulator-name = "+2.8V_RUN_TOUCH"; 731 regulator-min-microvolt = <2800000>; 732 regulator-max-microvolt = <2800000>; 733 }; 734 735 ldo10 { 736 regulator-name = "+2.8V_RUN_CAM_AF"; 737 regulator-min-microvolt = <2800000>; 738 regulator-max-microvolt = <2800000>; 739 }; 740 741 ldo11 { 742 regulator-name = "+1.8V_RUN_VPP_FUSE"; 743 regulator-min-microvolt = <1800000>; 744 regulator-max-microvolt = <1800000>; 745 }; 746 }; 747 }; 748 }; 749 750 spi@7000d400 { 751 status = "okay"; 752 753 ec: cros-ec@0 { 754 compatible = "google,cros-ec-spi"; 755 spi-max-frequency = <3000000>; 756 interrupt-parent = <&gpio>; 757 interrupts = <TEGRA_GPIO(C, 7) IRQ_TYPE_LEVEL_LOW>; 758 reg = <0>; 759 760 google,cros-ec-spi-msg-delay = <2000>; 761 762 i2c_20: i2c-tunnel { 763 compatible = "google,cros-ec-i2c-tunnel"; 764 #address-cells = <1>; 765 #size-cells = <0>; 766 767 google,remote-bus = <0>; 768 769 charger: bq24735 { 770 compatible = "ti,bq24735"; 771 reg = <0x9>; 772 interrupt-parent = <&gpio>; 773 interrupts = <TEGRA_GPIO(J, 0) 774 GPIO_ACTIVE_HIGH>; 775 ti,ac-detect-gpios = <&gpio 776 TEGRA_GPIO(J, 0) 777 GPIO_ACTIVE_HIGH>; 778 }; 779 780 battery: smart-battery { 781 compatible = "sbs,sbs-battery"; 782 reg = <0xb>; 783 battery-name = "battery"; 784 sbs,i2c-retry-count = <2>; 785 sbs,poll-retry-count = <10>; 786 /* power-supplies = <&charger>; */ 787 }; 788 }; 789 790 keyboard-controller { 791 compatible = "google,cros-ec-keyb"; 792 keypad,num-rows = <8>; 793 keypad,num-columns = <13>; 794 google,needs-ghost-filter; 795 linux,keymap = 796 <MATRIX_KEY(0x00, 0x01, KEY_LEFTMETA) 797 MATRIX_KEY(0x00, 0x02, KEY_F1) 798 MATRIX_KEY(0x00, 0x03, KEY_B) 799 MATRIX_KEY(0x00, 0x04, KEY_F10) 800 MATRIX_KEY(0x00, 0x06, KEY_N) 801 MATRIX_KEY(0x00, 0x08, KEY_EQUAL) 802 MATRIX_KEY(0x00, 0x0a, KEY_RIGHTALT) 803 804 MATRIX_KEY(0x01, 0x01, KEY_ESC) 805 MATRIX_KEY(0x01, 0x02, KEY_F4) 806 MATRIX_KEY(0x01, 0x03, KEY_G) 807 MATRIX_KEY(0x01, 0x04, KEY_F7) 808 MATRIX_KEY(0x01, 0x06, KEY_H) 809 MATRIX_KEY(0x01, 0x08, KEY_APOSTROPHE) 810 MATRIX_KEY(0x01, 0x09, KEY_F9) 811 MATRIX_KEY(0x01, 0x0b, KEY_BACKSPACE) 812 813 MATRIX_KEY(0x02, 0x00, KEY_LEFTCTRL) 814 MATRIX_KEY(0x02, 0x01, KEY_TAB) 815 MATRIX_KEY(0x02, 0x02, KEY_F3) 816 MATRIX_KEY(0x02, 0x03, KEY_T) 817 MATRIX_KEY(0x02, 0x04, KEY_F6) 818 MATRIX_KEY(0x02, 0x05, KEY_RIGHTBRACE) 819 MATRIX_KEY(0x02, 0x06, KEY_Y) 820 MATRIX_KEY(0x02, 0x07, KEY_102ND) 821 MATRIX_KEY(0x02, 0x08, KEY_LEFTBRACE) 822 MATRIX_KEY(0x02, 0x09, KEY_F8) 823 824 MATRIX_KEY(0x03, 0x01, KEY_GRAVE) 825 MATRIX_KEY(0x03, 0x02, KEY_F2) 826 MATRIX_KEY(0x03, 0x03, KEY_5) 827 MATRIX_KEY(0x03, 0x04, KEY_F5) 828 MATRIX_KEY(0x03, 0x06, KEY_6) 829 MATRIX_KEY(0x03, 0x08, KEY_MINUS) 830 MATRIX_KEY(0x03, 0x0b, KEY_BACKSLASH) 831 832 MATRIX_KEY(0x04, 0x00, KEY_RIGHTCTRL) 833 MATRIX_KEY(0x04, 0x01, KEY_A) 834 MATRIX_KEY(0x04, 0x02, KEY_D) 835 MATRIX_KEY(0x04, 0x03, KEY_F) 836 MATRIX_KEY(0x04, 0x04, KEY_S) 837 MATRIX_KEY(0x04, 0x05, KEY_K) 838 MATRIX_KEY(0x04, 0x06, KEY_J) 839 MATRIX_KEY(0x04, 0x08, KEY_SEMICOLON) 840 MATRIX_KEY(0x04, 0x09, KEY_L) 841 MATRIX_KEY(0x04, 0x0a, KEY_BACKSLASH) 842 MATRIX_KEY(0x04, 0x0b, KEY_ENTER) 843 844 MATRIX_KEY(0x05, 0x01, KEY_Z) 845 MATRIX_KEY(0x05, 0x02, KEY_C) 846 MATRIX_KEY(0x05, 0x03, KEY_V) 847 MATRIX_KEY(0x05, 0x04, KEY_X) 848 MATRIX_KEY(0x05, 0x05, KEY_COMMA) 849 MATRIX_KEY(0x05, 0x06, KEY_M) 850 MATRIX_KEY(0x05, 0x07, KEY_LEFTSHIFT) 851 MATRIX_KEY(0x05, 0x08, KEY_SLASH) 852 MATRIX_KEY(0x05, 0x09, KEY_DOT) 853 MATRIX_KEY(0x05, 0x0b, KEY_SPACE) 854 855 MATRIX_KEY(0x06, 0x01, KEY_1) 856 MATRIX_KEY(0x06, 0x02, KEY_3) 857 MATRIX_KEY(0x06, 0x03, KEY_4) 858 MATRIX_KEY(0x06, 0x04, KEY_2) 859 MATRIX_KEY(0x06, 0x05, KEY_8) 860 MATRIX_KEY(0x06, 0x06, KEY_7) 861 MATRIX_KEY(0x06, 0x08, KEY_0) 862 MATRIX_KEY(0x06, 0x09, KEY_9) 863 MATRIX_KEY(0x06, 0x0a, KEY_LEFTALT) 864 MATRIX_KEY(0x06, 0x0b, KEY_DOWN) 865 MATRIX_KEY(0x06, 0x0c, KEY_RIGHT) 866 867 MATRIX_KEY(0x07, 0x01, KEY_Q) 868 MATRIX_KEY(0x07, 0x02, KEY_E) 869 MATRIX_KEY(0x07, 0x03, KEY_R) 870 MATRIX_KEY(0x07, 0x04, KEY_W) 871 MATRIX_KEY(0x07, 0x05, KEY_I) 872 MATRIX_KEY(0x07, 0x06, KEY_U) 873 MATRIX_KEY(0x07, 0x07, KEY_RIGHTSHIFT) 874 MATRIX_KEY(0x07, 0x08, KEY_P) 875 MATRIX_KEY(0x07, 0x09, KEY_O) 876 MATRIX_KEY(0x07, 0x0b, KEY_UP) 877 MATRIX_KEY(0x07, 0x0c, KEY_LEFT)>; 878 }; 879 }; 880 }; 881 882 pmc@7000e400 { 883 nvidia,invert-interrupt; 884 nvidia,suspend-mode = <0>; 885 #wake-cells = <3>; 886 nvidia,cpu-pwr-good-time = <500>; 887 nvidia,cpu-pwr-off-time = <300>; 888 nvidia,core-pwr-good-time = <641 3845>; 889 nvidia,core-pwr-off-time = <61036>; 890 nvidia,core-power-req-active-high; 891 nvidia,sys-clock-req-active-high; 892 nvidia,reset-gpio = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>; 893 }; 894 895 /* WIFI/BT module */ 896 sdhci@700b0000 { 897 status = "disabled"; 898 }; 899 900 /* external SD/MMC */ 901 sdhci@700b0400 { 902 cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>; 903 power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>; 904 wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_HIGH>; 905 status = "okay"; 906 bus-width = <4>; 907 vqmmc-supply = <&vddio_sdmmc3>; 908 }; 909 910 /* EMMC 4.51 */ 911 sdhci@700b0600 { 912 status = "okay"; 913 bus-width = <8>; 914 non-removable; 915 }; 916 917 usb@7d000000 { 918 status = "okay"; 919 }; 920 921 usb-phy@7d000000 { 922 status = "okay"; 923 vbus-supply = <&vdd_usb1_vbus>; 924 }; 925 926 usb@7d004000 { 927 status = "okay"; 928 }; 929 930 usb-phy@7d004000 { 931 status = "okay"; 932 vbus-supply = <&vdd_run_cam>; 933 }; 934 935 usb@7d008000 { 936 status = "okay"; 937 }; 938 939 usb-phy@7d008000 { 940 status = "okay"; 941 vbus-supply = <&vdd_usb3_vbus>; 942 }; 943 944 backlight: backlight { 945 compatible = "pwm-backlight"; 946 947 enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>; 948 power-supply = <&vdd_led>; 949 pwms = <&pwm 1 1000000>; 950 951 brightness-levels = <0 4 8 16 32 64 128 255>; 952 default-brightness-level = <6>; 953 954 backlight-boot-off; 955 }; 956 957 clocks { 958 compatible = "simple-bus"; 959 #address-cells = <1>; 960 #size-cells = <0>; 961 962 clk32k_in: clock@0 { 963 compatible = "fixed-clock"; 964 reg=<0>; 965 #clock-cells = <0>; 966 clock-frequency = <32768>; 967 }; 968 }; 969 970 gpio-keys { 971 compatible = "gpio-keys"; 972 973 lid { 974 label = "Lid"; 975 gpios = <&gpio TEGRA_GPIO(R, 4) GPIO_ACTIVE_LOW>; 976 linux,input-type = <5>; 977 linux,code = <0>; 978 debounce-interval = <1>; 979 wakeup-source; 980 }; 981 982 power { 983 label = "Power"; 984 gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>; 985 linux,code = <KEY_POWER>; 986 debounce-interval = <10>; 987 wakeup-source; 988 }; 989 }; 990 991 panel: panel { 992 compatible = "innolux,n116bge", "simple-panel"; 993 backlight = <&backlight>; 994 ddc-i2c-bus = <&dpaux>; 995 }; 996 997 regulators { 998 compatible = "simple-bus"; 999 #address-cells = <1>; 1000 #size-cells = <0>; 1001 1002 vdd_mux: regulator@0 { 1003 compatible = "regulator-fixed"; 1004 reg = <0>; 1005 regulator-name = "+VDD_MUX"; 1006 regulator-min-microvolt = <19000000>; 1007 regulator-max-microvolt = <19000000>; 1008 regulator-always-on; 1009 regulator-boot-on; 1010 }; 1011 1012 vdd_5v0_sys: regulator@1 { 1013 compatible = "regulator-fixed"; 1014 reg = <1>; 1015 regulator-name = "+5V_SYS"; 1016 regulator-min-microvolt = <5000000>; 1017 regulator-max-microvolt = <5000000>; 1018 regulator-always-on; 1019 regulator-boot-on; 1020 vin-supply = <&vdd_mux>; 1021 }; 1022 1023 vdd_3v3_sys: regulator@2 { 1024 compatible = "regulator-fixed"; 1025 reg = <2>; 1026 regulator-name = "+3.3V_SYS"; 1027 regulator-min-microvolt = <3300000>; 1028 regulator-max-microvolt = <3300000>; 1029 regulator-always-on; 1030 regulator-boot-on; 1031 vin-supply = <&vdd_mux>; 1032 }; 1033 1034 vdd_3v3_run: regulator@3 { 1035 compatible = "regulator-fixed"; 1036 reg = <3>; 1037 regulator-name = "+3.3V_RUN"; 1038 regulator-min-microvolt = <3300000>; 1039 regulator-max-microvolt = <3300000>; 1040 regulator-always-on; 1041 regulator-boot-on; 1042 gpio = <&as3722 1 GPIO_ACTIVE_HIGH>; 1043 enable-active-high; 1044 vin-supply = <&vdd_3v3_sys>; 1045 }; 1046 1047 vdd_3v3_hdmi: regulator@4 { 1048 compatible = "regulator-fixed"; 1049 reg = <4>; 1050 regulator-name = "+3.3V_AVDD_HDMI_AP_GATED"; 1051 regulator-min-microvolt = <3300000>; 1052 regulator-max-microvolt = <3300000>; 1053 vin-supply = <&vdd_3v3_run>; 1054 }; 1055 1056 vdd_led: regulator@5 { 1057 compatible = "regulator-fixed"; 1058 reg = <5>; 1059 regulator-name = "+VDD_LED"; 1060 regulator-min-microvolt = <3300000>; 1061 regulator-max-microvolt = <3300000>; 1062 gpio = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>; 1063 enable-active-high; 1064 vin-supply = <&vdd_mux>; 1065 }; 1066 1067 vdd_usb1_vbus: regulator@6 { 1068 compatible = "regulator-fixed"; 1069 reg = <6>; 1070 regulator-name = "+5V_USB_HS"; 1071 regulator-min-microvolt = <5000000>; 1072 regulator-max-microvolt = <5000000>; 1073 gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>; 1074 enable-active-high; 1075 gpio-open-drain; 1076 vin-supply = <&vdd_5v0_sys>; 1077 }; 1078 1079 vdd_usb3_vbus: regulator@7 { 1080 compatible = "regulator-fixed"; 1081 reg = <7>; 1082 regulator-name = "+5V_USB_SS"; 1083 regulator-min-microvolt = <5000000>; 1084 regulator-max-microvolt = <5000000>; 1085 gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>; 1086 enable-active-high; 1087 gpio-open-drain; 1088 vin-supply = <&vdd_5v0_sys>; 1089 }; 1090 1091 vdd_3v3_panel: regulator@8 { 1092 compatible = "regulator-fixed"; 1093 reg = <8>; 1094 regulator-name = "+3.3V_PANEL"; 1095 regulator-min-microvolt = <3300000>; 1096 regulator-max-microvolt = <3300000>; 1097 gpio = <&as3722 4 GPIO_ACTIVE_HIGH>; 1098 enable-active-high; 1099 vin-supply = <&vdd_3v3_sys>; 1100 }; 1101 1102 vdd_hdmi_pll: regulator@9 { 1103 compatible = "regulator-fixed"; 1104 reg = <9>; 1105 regulator-name = "+1.05V_RUN_AVDD_HDMI_PLL_AP_GATE"; 1106 regulator-min-microvolt = <1050000>; 1107 regulator-max-microvolt = <1050000>; 1108 gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>; 1109 vin-supply = <&vdd_1v05_run>; 1110 }; 1111 1112 vdd_5v0_hdmi: regulator@10 { 1113 compatible = "regulator-fixed"; 1114 reg = <10>; 1115 regulator-name = "+5V_HDMI_CON"; 1116 regulator-min-microvolt = <5000000>; 1117 regulator-max-microvolt = <5000000>; 1118 gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>; 1119 enable-active-high; 1120 vin-supply = <&vdd_5v0_sys>; 1121 }; 1122 1123 vdd_5v0_ts: regulator@11 { 1124 compatible = "regulator-fixed"; 1125 reg = <11>; 1126 regulator-name = "+5V_VDD_TS"; 1127 regulator-min-microvolt = <5000000>; 1128 regulator-max-microvolt = <5000000>; 1129 regulator-always-on; 1130 regulator-boot-on; 1131 gpio = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>; 1132 enable-active-high; 1133 }; 1134 }; 1135}; 1136