xref: /linux/arch/arm64/boot/dts/nuvoton/ma35d1-som-256m.dts (revision c532de5a67a70f8533d495f8f2aaa9a0491c3ad0) 
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2023 Nuvoton Technology Corp.
4 * Author: Shan-Chun Hung <schung@nuvoton.com>
5 *         Jacky huang <ychuang3@nuvoton.com>
6 */
7
8/dts-v1/;
9#include "ma35d1.dtsi"
10
11/ {
12	model = "Nuvoton MA35D1-SOM";
13	compatible = "nuvoton,ma35d1-som", "nuvoton,ma35d1";
14
15	aliases {
16		serial0 = &uart0;
17		serial11 = &uart11;
18		serial12 = &uart12;
19		serial14 = &uart14;
20		serial16 = &uart16;
21	};
22
23	chosen {
24		stdout-path = "serial0:115200n8";
25	};
26
27	mem: memory@80000000 {
28		device_type = "memory";
29		reg = <0x00000000 0x80000000 0 0x10000000>; /* 256M DRAM */
30	};
31
32	clk_hxt: clock-hxt {
33		compatible = "fixed-clock";
34		#clock-cells = <0>;
35		clock-frequency = <24000000>;
36		clock-output-names = "clk_hxt";
37	};
38};
39
40&clk {
41	assigned-clocks = <&clk CAPLL>,
42			  <&clk DDRPLL>,
43			  <&clk APLL>,
44			  <&clk EPLL>,
45			  <&clk VPLL>;
46	assigned-clock-rates = <800000000>,
47			       <266000000>,
48			       <180000000>,
49			       <500000000>,
50			       <102000000>;
51	nuvoton,pll-mode = "integer",
52			   "fractional",
53			   "integer",
54			   "integer",
55			   "integer";
56};
57
58&pinctrl {
59	uart-grp {
60		pinctrl_uart0: uart0-pins {
61			nuvoton,pins = <4 14 1>,
62				       <4 15 1>;
63			bias-disable;
64			power-source = <1>;
65		};
66
67		pinctrl_uart11: uart11-pins {
68			nuvoton,pins = <11 0 2>,
69				       <11 1 2>,
70				       <11 2 2>,
71				       <11 3 2>;
72			bias-disable;
73			power-source = <1>;
74		};
75
76		pinctrl_uart12: uart12-pins {
77			nuvoton,pins = <8 1 2>,
78				       <8 2 2>,
79				       <8 3 2>;
80			bias-disable;
81			power-source = <1>;
82		};
83
84		pinctrl_uart14: uart14-pins {
85			nuvoton,pins = <8 5 2>,
86				       <8 6 2>,
87				       <8 7 2>;
88			bias-disable;
89			power-source = <1>;
90		};
91
92		pinctrl_uart16: uart16-pins {
93			nuvoton,pins = <10 0 2>,
94				       <10 1 2>,
95				       <10 2 2>,
96				       <10 3 2>;
97			bias-disable;
98			power-source = <1>;
99		};
100	};
101};
102
103&uart0 {
104	pinctrl-names = "default";
105	pinctrl-0 = <&pinctrl_uart0>;
106	status = "okay";
107};
108
109&uart11 {
110	pinctrl-names = "default";
111	pinctrl-0 = <&pinctrl_uart11>;
112	status = "okay";
113};
114
115&uart12 {
116	pinctrl-names = "default";
117	pinctrl-0 = <&pinctrl_uart12>;
118	status = "okay";
119};
120
121&uart14 {
122	pinctrl-names = "default";
123	pinctrl-0 = <&pinctrl_uart14>;
124	status = "okay";
125};
126
127&uart16 {
128	pinctrl-names = "default";
129	pinctrl-0 = <&pinctrl_uart16>;
130	status = "okay";
131};
132