1// SPDX-License-Identifier: (GPL-2.0 OR MIT) 2/* 3 * Copyright (C) 2023 MediaTek Inc. 4 * Author: Chris Chen <chris-qj.chen@mediatek.com> 5 * Pablo Sun <pablo.sun@mediatek.com> 6 * Macpaul Lin <macpaul.lin@mediatek.com> 7 * 8 * Copyright (C) 2025 Collabora Ltd. 9 * Louis-Alexis Eyraud <louisalexis.eyraud@collabora.com> 10 * AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> 11 */ 12 13#include "mt6359.dtsi" 14#include <dt-bindings/gpio/gpio.h> 15#include <dt-bindings/input/input.h> 16#include <dt-bindings/interrupt-controller/irq.h> 17#include <dt-bindings/pinctrl/mediatek,mt8188-pinfunc.h> 18#include <dt-bindings/regulator/mediatek,mt6360-regulator.h> 19#include <dt-bindings/spmi/spmi.h> 20#include <dt-bindings/usb/pd.h> 21 22/ { 23 aliases { 24 ethernet0 = ð 25 i2c0 = &i2c0; 26 i2c1 = &i2c1; 27 i2c2 = &i2c2; 28 i2c3 = &i2c3; 29 i2c4 = &i2c4; 30 i2c5 = &i2c5; 31 i2c6 = &i2c6; 32 mmc0 = &mmc0; 33 mmc1 = &mmc1; 34 serial0 = &uart0; 35 }; 36 37 chosen { 38 stdout-path = "serial0:921600n8"; 39 }; 40 41 dmic_codec: dmic-codec { 42 #sound-dai-cells = <0>; 43 compatible = "dmic-codec"; 44 num-channels = <2>; 45 wakeup-delay-ms = <30>; 46 }; 47 48 firmware { 49 optee { 50 compatible = "linaro,optee-tz"; 51 method = "smc"; 52 }; 53 }; 54 reserved-memory { 55 #address-cells = <2>; 56 #size-cells = <2>; 57 ranges; 58 59 /* 60 * 12 MiB reserved for OP-TEE (BL32) 61 * +-----------------------+ 0x43e0_0000 62 * | SHMEM 2MiB | 63 * +-----------------------+ 0x43c0_0000 64 * | | TA_RAM 8MiB | 65 * + TZDRAM +--------------+ 0x4340_0000 66 * | | TEE_RAM 2MiB | 67 * +-----------------------+ 0x4320_0000 68 */ 69 optee_reserved: optee@43200000 { 70 no-map; 71 reg = <0 0x43200000 0 0x00c00000>; 72 }; 73 74 scp_mem: memory@50000000 { 75 compatible = "shared-dma-pool"; 76 reg = <0 0x50000000 0 0x2900000>; 77 no-map; 78 }; 79 80 /* 2 MiB reserved for ARM Trusted Firmware (BL31) */ 81 bl31_secmon_reserved: memory@54600000 { 82 no-map; 83 reg = <0 0x54600000 0x0 0x200000>; 84 }; 85 86 apu_mem: memory@55000000 { 87 compatible = "shared-dma-pool"; 88 reg = <0 0x55000000 0 0x1400000>; /* 20 MB */ 89 }; 90 91 vpu_mem: memory@57000000 { 92 compatible = "shared-dma-pool"; 93 reg = <0 0x57000000 0 0x1400000>; /* 20 MB */ 94 }; 95 96 adsp_mem: memory@60000000 { 97 compatible = "shared-dma-pool"; 98 reg = <0 0x60000000 0 0xf00000>; 99 no-map; 100 }; 101 102 afe_dma_mem: memory@60f00000 { 103 compatible = "shared-dma-pool"; 104 reg = <0 0x60f00000 0 0x100000>; 105 no-map; 106 }; 107 108 adsp_dma_mem: memory@61000000 { 109 compatible = "shared-dma-pool"; 110 reg = <0 0x61000000 0 0x100000>; 111 no-map; 112 }; 113 }; 114 115 common_fixed_5v: regulator-0 { 116 compatible = "regulator-fixed"; 117 regulator-name = "vdd_5v"; 118 regulator-min-microvolt = <5000000>; 119 regulator-max-microvolt = <5000000>; 120 gpio = <&pio 10 GPIO_ACTIVE_HIGH>; 121 enable-active-high; 122 regulator-always-on; 123 vin-supply = <®_vsys>; 124 }; 125 126 edp_panel_fixed_3v3: regulator-1 { 127 compatible = "regulator-fixed"; 128 regulator-name = "vedp_3v3"; 129 regulator-min-microvolt = <3300000>; 130 regulator-max-microvolt = <3300000>; 131 enable-active-high; 132 gpio = <&pio 15 GPIO_ACTIVE_HIGH>; 133 pinctrl-names = "default"; 134 pinctrl-0 = <&edp_panel_3v3_en_pins>; 135 vin-supply = <®_vsys>; 136 }; 137 138 gpio_fixed_3v3: regulator-2 { 139 compatible = "regulator-fixed"; 140 regulator-name = "ext_3v3"; 141 regulator-min-microvolt = <3300000>; 142 regulator-max-microvolt = <3300000>; 143 gpio = <&pio 9 GPIO_ACTIVE_HIGH>; 144 enable-active-high; 145 regulator-always-on; 146 vin-supply = <®_vsys>; 147 }; 148 149 /* system wide 4.2V power rail from charger */ 150 reg_vsys: regulator-vsys { 151 compatible = "regulator-fixed"; 152 regulator-name = "vsys"; 153 regulator-always-on; 154 regulator-boot-on; 155 }; 156 157 /* used by mmc2 */ 158 sdio_fixed_1v8: regulator-3 { 159 compatible = "regulator-fixed"; 160 regulator-name = "vio18_conn"; 161 regulator-min-microvolt = <1800000>; 162 regulator-max-microvolt = <1800000>; 163 enable-active-high; 164 regulator-always-on; 165 }; 166 167 /* used by mmc2 */ 168 sdio_fixed_3v3: regulator-4 { 169 compatible = "regulator-fixed"; 170 regulator-name = "wifi_3v3"; 171 regulator-min-microvolt = <3300000>; 172 regulator-max-microvolt = <3300000>; 173 gpio = <&pio 74 GPIO_ACTIVE_HIGH>; 174 enable-active-high; 175 regulator-always-on; 176 vin-supply = <®_vsys>; 177 }; 178 179 touch0_fixed_3v3: regulator-5 { 180 compatible = "regulator-fixed"; 181 regulator-name = "vio33_tp1"; 182 regulator-min-microvolt = <3300000>; 183 regulator-max-microvolt = <3300000>; 184 gpio = <&pio 119 GPIO_ACTIVE_HIGH>; 185 enable-active-high; 186 vin-supply = <®_vsys>; 187 pinctrl-names = "default"; 188 pinctrl-0 = <&touch_vreg_pins>; 189 }; 190 191 usb_hub_fixed_3v3: regulator-6 { 192 compatible = "regulator-fixed"; 193 regulator-name = "vhub_3v3"; 194 regulator-min-microvolt = <3300000>; 195 regulator-max-microvolt = <3300000>; 196 gpio = <&pio 112 GPIO_ACTIVE_HIGH>; /* HUB_3V3_EN */ 197 startup-delay-us = <10000>; 198 enable-active-high; 199 vin-supply = <®_vsys>; 200 }; 201 202 usb_p0_vbus: regulator-7 { 203 compatible = "regulator-fixed"; 204 regulator-name = "vbus_p0"; 205 regulator-min-microvolt = <5000000>; 206 regulator-max-microvolt = <5000000>; 207 gpio = <&pio 84 GPIO_ACTIVE_HIGH>; 208 enable-active-high; 209 vin-supply = <®_vsys>; 210 }; 211 212 usb_p1_vbus: regulator-8 { 213 compatible = "regulator-fixed"; 214 regulator-name = "vbus_p1"; 215 regulator-min-microvolt = <5000000>; 216 regulator-max-microvolt = <5000000>; 217 gpio = <&pio 87 GPIO_ACTIVE_HIGH>; 218 enable-active-high; 219 vin-supply = <®_vsys>; 220 }; 221 222 /* used by ssusb2 */ 223 usb_p2_vbus: regulator-9 { 224 compatible = "regulator-fixed"; 225 regulator-name = "vbus_p2"; 226 regulator-min-microvolt = <5000000>; 227 regulator-max-microvolt = <5000000>; 228 enable-active-high; 229 }; 230}; 231 232&adsp { 233 memory-region = <&adsp_dma_mem>, <&adsp_mem>; 234 status = "okay"; 235}; 236 237&afe { 238 memory-region = <&afe_dma_mem>; 239 status = "okay"; 240}; 241 242&gpu { 243 mali-supply = <&mt6359_vproc2_buck_reg>; 244 status = "okay"; 245}; 246 247&i2c0 { 248 pinctrl-names = "default"; 249 pinctrl-0 = <&i2c0_pins>; 250 clock-frequency = <400000>; 251 status = "okay"; 252 253 touchscreen@5d { 254 compatible = "goodix,gt9271"; 255 reg = <0x5d>; 256 interrupt-parent = <&pio>; 257 interrupts-extended = <&pio 6 IRQ_TYPE_EDGE_RISING>; 258 irq-gpios = <&pio 6 GPIO_ACTIVE_HIGH>; 259 reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>; 260 AVDD28-supply = <&touch0_fixed_3v3>; 261 VDDIO-supply = <&mt6359_vio18_ldo_reg>; 262 pinctrl-names = "default"; 263 pinctrl-0 = <&touch_pins>; 264 }; 265}; 266 267&i2c1 { 268 pinctrl-names = "default"; 269 pinctrl-0 = <&i2c1_pins>; 270 clock-frequency = <400000>; 271 status = "okay"; 272 273 typec-mux@48 { 274 compatible = "ite,it5205"; 275 reg = <0x48>; 276 277 mode-switch; 278 orientation-switch; 279 280 vcc-supply = <&mt6359_vcn33_1_bt_ldo_reg>; 281 282 port { 283 it5205_sbu_mux: endpoint { 284 remote-endpoint = <&typec_sbu_out>; 285 }; 286 }; 287 }; 288}; 289 290&i2c2 { 291 pinctrl-names = "default"; 292 pinctrl-0 = <&i2c2_pins>; 293 clock-frequency = <400000>; 294 status = "okay"; 295}; 296 297&i2c3 { 298 pinctrl-names = "default"; 299 pinctrl-0 = <&i2c3_pins>; 300 clock-frequency = <400000>; 301 status = "okay"; 302}; 303 304&i2c4 { 305 pinctrl-names = "default"; 306 pinctrl-0 = <&i2c4_pins>; 307 clock-frequency = <1000000>; 308 status = "okay"; 309 310 rt1715@4e { 311 compatible = "richtek,rt1715"; 312 reg = <0x4e>; 313 interrupts-extended = <&pio 12 IRQ_TYPE_LEVEL_LOW>; 314 pinctrl-names = "default"; 315 pinctrl-0 = <&tcpci_int_pins>; 316 vbus-supply = <&usb_p1_vbus>; 317 318 connector { 319 compatible = "usb-c-connector"; 320 label = "USB-C"; 321 data-role = "dual"; 322 op-sink-microwatt = <10000000>; 323 power-role = "dual"; 324 try-power-role = "sink"; 325 pd-revision = /bits/ 8 <0x03 0x00 0x01 0x08>; 326 327 sink-pdos = <PDO_FIXED(5000, 2000, 328 PDO_FIXED_DUAL_ROLE | 329 PDO_FIXED_DATA_SWAP)>; 330 source-pdos = <PDO_FIXED(5000, 2000, 331 PDO_FIXED_DUAL_ROLE | 332 PDO_FIXED_DATA_SWAP)>; 333 334 altmodes { 335 displayport { 336 svid = /bits/ 16 <0xff01>; 337 vdo = <0x001c1c47>; 338 }; 339 }; 340 341 ports { 342 #address-cells = <1>; 343 #size-cells = <0>; 344 345 port@0 { 346 reg = <0>; 347 typec_con_hs: endpoint { 348 remote-endpoint = <&mtu3_hs1_role_sw>; 349 }; 350 }; 351 352 port@1 { 353 reg = <1>; 354 typec_con_ss: endpoint { 355 remote-endpoint = <&xhci_ss_ep>; 356 }; 357 }; 358 359 port@2 { 360 reg = <2>; 361 typec_sbu_out: endpoint { 362 remote-endpoint = <&it5205_sbu_mux>; 363 }; 364 365 }; 366 }; 367 }; 368 }; 369}; 370 371&i2c5 { 372 pinctrl-names = "default"; 373 pinctrl-0 = <&i2c5_pins>; 374 clock-frequency = <400000>; 375 status = "okay"; 376}; 377 378&i2c6 { 379 pinctrl-names = "default"; 380 pinctrl-0 = <&i2c6_pins>; 381 clock-frequency = <400000>; 382 status = "okay"; 383}; 384 385&mfg0 { 386 domain-supply = <&mt6359_vproc2_buck_reg>; 387}; 388 389&mfg1 { 390 domain-supply = <&mt6359_vsram_others_ldo_reg>; 391}; 392 393&mmc0 { 394 status = "okay"; 395 pinctrl-names = "default", "state_uhs"; 396 pinctrl-0 = <&mmc0_default_pins>; 397 pinctrl-1 = <&mmc0_uhs_pins>; 398 bus-width = <8>; 399 max-frequency = <200000000>; 400 cap-mmc-highspeed; 401 mmc-hs200-1_8v; 402 mmc-hs400-1_8v; 403 supports-cqe; 404 cap-mmc-hw-reset; 405 no-sdio; 406 no-sd; 407 hs400-ds-delay = <0x1481b>; 408 vmmc-supply = <&mt6359_vemc_1_ldo_reg>; 409 vqmmc-supply = <&mt6359_vufs_ldo_reg>; 410 non-removable; 411}; 412 413&mmc1 { 414 status = "okay"; 415 pinctrl-names = "default", "state_uhs"; 416 pinctrl-0 = <&mmc1_default_pins>; 417 pinctrl-1 = <&mmc1_uhs_pins>; 418 bus-width = <4>; 419 max-frequency = <200000000>; 420 cap-sd-highspeed; 421 sd-uhs-sdr50; 422 sd-uhs-sdr104; 423 no-mmc; 424 no-sdio; 425 cd-gpios = <&pio 2 GPIO_ACTIVE_LOW>; 426 vmmc-supply = <&mt6359_vpa_buck_reg>; 427 vqmmc-supply = <&mt6359_vsim1_ldo_reg>; 428}; 429 430&mt6359_vbbck_ldo_reg { 431 regulator-always-on; 432}; 433 434&mt6359_vcn18_ldo_reg { 435 regulator-name = "vcn18_pmu"; 436 regulator-always-on; 437}; 438 439&mt6359_vcn33_2_bt_ldo_reg { 440 regulator-name = "vcn33_2_pmu"; 441 regulator-always-on; 442}; 443 444&mt6359_vcore_buck_reg { 445 regulator-name = "dvdd_proc_l"; 446 regulator-always-on; 447}; 448 449&mt6359_vgpu11_buck_reg { 450 regulator-name = "dvdd_core"; 451 regulator-always-on; 452}; 453 454&mt6359_vpa_buck_reg { 455 regulator-name = "vpa_pmu"; 456 regulator-max-microvolt = <3100000>; 457}; 458 459&mt6359_vproc2_buck_reg { 460 /* The name "vgpu" is required by mtk-regulator-coupler */ 461 regulator-name = "vgpu"; 462 regulator-min-microvolt = <550000>; 463 regulator-max-microvolt = <800000>; 464 regulator-coupled-with = <&mt6359_vsram_others_ldo_reg>; 465 regulator-coupled-max-spread = <6250>; 466}; 467 468&mt6359_vpu_buck_reg { 469 regulator-name = "dvdd_adsp"; 470 regulator-always-on; 471}; 472 473&mt6359_vrf12_ldo_reg { 474 regulator-name = "va12_abb2_pmu"; 475 regulator-always-on; 476}; 477 478&mt6359_vsim1_ldo_reg { 479 regulator-name = "vsim1_pmu"; 480 regulator-enable-ramp-delay = <480>; 481}; 482 483&mt6359_vsram_others_ldo_reg { 484 /* The name "vsram_gpu" is required by mtk-regulator-coupler */ 485 regulator-name = "vsram_gpu"; 486 regulator-min-microvolt = <750000>; 487 regulator-max-microvolt = <800000>; 488 regulator-coupled-with = <&mt6359_vproc2_buck_reg>; 489 regulator-coupled-max-spread = <6250>; 490}; 491 492&mt6359_vufs_ldo_reg { 493 regulator-name = "vufs18_pmu"; 494 regulator-always-on; 495}; 496 497&mt6359codec { 498 mediatek,mic-type-0 = <1>; /* ACC */ 499 mediatek,mic-type-1 = <3>; /* DCC */ 500}; 501 502&pcie { 503 pinctrl-names = "default"; 504 pinctrl-0 = <&pcie_pins_default>; 505 status = "okay"; 506}; 507 508&pciephy { 509 status = "okay"; 510}; 511 512&pio { 513 audio_default_pins: audio-default-pins { 514 pins-cmd-dat { 515 pinmux = <PINMUX_GPIO101__FUNC_O_AUD_CLK_MOSI>, 516 <PINMUX_GPIO102__FUNC_O_AUD_SYNC_MOSI>, 517 <PINMUX_GPIO103__FUNC_O_AUD_DAT_MOSI0>, 518 <PINMUX_GPIO104__FUNC_O_AUD_DAT_MOSI1>, 519 <PINMUX_GPIO105__FUNC_I0_AUD_DAT_MISO0>, 520 <PINMUX_GPIO106__FUNC_I0_AUD_DAT_MISO1>, 521 <PINMUX_GPIO107__FUNC_B0_I2SIN_MCK>, 522 <PINMUX_GPIO108__FUNC_B0_I2SIN_BCK>, 523 <PINMUX_GPIO109__FUNC_B0_I2SIN_WS>, 524 <PINMUX_GPIO110__FUNC_I0_I2SIN_D0>, 525 <PINMUX_GPIO114__FUNC_O_I2SO2_MCK>, 526 <PINMUX_GPIO115__FUNC_B0_I2SO2_BCK>, 527 <PINMUX_GPIO116__FUNC_B0_I2SO2_WS>, 528 <PINMUX_GPIO117__FUNC_O_I2SO2_D0>, 529 <PINMUX_GPIO118__FUNC_O_I2SO2_D1>, 530 <PINMUX_GPIO121__FUNC_B0_PCM_CLK>, 531 <PINMUX_GPIO122__FUNC_B0_PCM_SYNC>, 532 <PINMUX_GPIO124__FUNC_I0_PCM_DI>, 533 <PINMUX_GPIO125__FUNC_O_DMIC1_CLK>, 534 <PINMUX_GPIO126__FUNC_I0_DMIC1_DAT>, 535 <PINMUX_GPIO128__FUNC_O_DMIC2_CLK>, 536 <PINMUX_GPIO129__FUNC_I0_DMIC2_DAT>; 537 }; 538 }; 539 540 dptx_pins: dptx-pins { 541 pins-cmd-dat { 542 pinmux = <PINMUX_GPIO46__FUNC_I0_DP_TX_HPD>; 543 bias-pull-up; 544 }; 545 }; 546 547 edp_panel_3v3_en_pins: edp-panel-3v3-en-pins { 548 pins1 { 549 pinmux = <PINMUX_GPIO15__FUNC_B_GPIO15>; 550 output-high; 551 }; 552 }; 553 554 eth_default_pins: eth-default-pins { 555 pins-cc { 556 pinmux = <PINMUX_GPIO139__FUNC_B0_GBE_TXC>, 557 <PINMUX_GPIO140__FUNC_I0_GBE_RXC>, 558 <PINMUX_GPIO141__FUNC_I0_GBE_RXDV>, 559 <PINMUX_GPIO142__FUNC_O_GBE_TXEN>; 560 drive-strength = <8>; 561 }; 562 563 pins-mdio { 564 pinmux = <PINMUX_GPIO143__FUNC_O_GBE_MDC>, 565 <PINMUX_GPIO144__FUNC_B1_GBE_MDIO>; 566 drive-strength = <8>; 567 input-enable; 568 }; 569 570 pins-power { 571 pinmux = <PINMUX_GPIO145__FUNC_B_GPIO145>, 572 <PINMUX_GPIO146__FUNC_B_GPIO146>; 573 output-high; 574 }; 575 576 pins-rxd { 577 pinmux = <PINMUX_GPIO135__FUNC_I0_GBE_RXD3>, 578 <PINMUX_GPIO136__FUNC_I0_GBE_RXD2>, 579 <PINMUX_GPIO137__FUNC_I0_GBE_RXD1>, 580 <PINMUX_GPIO138__FUNC_I0_GBE_RXD0>; 581 drive-strength = <8>; 582 }; 583 584 pins-txd { 585 pinmux = <PINMUX_GPIO131__FUNC_O_GBE_TXD3>, 586 <PINMUX_GPIO132__FUNC_O_GBE_TXD2>, 587 <PINMUX_GPIO133__FUNC_O_GBE_TXD1>, 588 <PINMUX_GPIO134__FUNC_O_GBE_TXD0>; 589 drive-strength = <8>; 590 }; 591 }; 592 593 eth_sleep_pins: eth-sleep-pins { 594 pins-cc { 595 pinmux = <PINMUX_GPIO139__FUNC_B_GPIO139>, 596 <PINMUX_GPIO140__FUNC_B_GPIO140>, 597 <PINMUX_GPIO141__FUNC_B_GPIO141>, 598 <PINMUX_GPIO142__FUNC_B_GPIO142>; 599 }; 600 601 pins-mdio { 602 pinmux = <PINMUX_GPIO143__FUNC_B_GPIO143>, 603 <PINMUX_GPIO144__FUNC_B_GPIO144>; 604 input-disable; 605 bias-disable; 606 }; 607 608 pins-rxd { 609 pinmux = <PINMUX_GPIO135__FUNC_B_GPIO135>, 610 <PINMUX_GPIO136__FUNC_B_GPIO136>, 611 <PINMUX_GPIO137__FUNC_B_GPIO137>, 612 <PINMUX_GPIO138__FUNC_B_GPIO138>; 613 }; 614 615 pins-txd { 616 pinmux = <PINMUX_GPIO131__FUNC_B_GPIO131>, 617 <PINMUX_GPIO132__FUNC_B_GPIO132>, 618 <PINMUX_GPIO133__FUNC_B_GPIO133>, 619 <PINMUX_GPIO134__FUNC_B_GPIO134>; 620 }; 621 }; 622 623 i2c0_pins: i2c0-pins { 624 pins { 625 pinmux = <PINMUX_GPIO56__FUNC_B1_SDA0>, 626 <PINMUX_GPIO55__FUNC_B1_SCL0>; 627 bias-pull-up = <MTK_PULL_SET_RSEL_011>; 628 drive-strength-microamp = <1000>; 629 }; 630 }; 631 632 i2c1_pins: i2c1-pins { 633 pins { 634 pinmux = <PINMUX_GPIO58__FUNC_B1_SDA1>, 635 <PINMUX_GPIO57__FUNC_B1_SCL1>; 636 bias-pull-up = <MTK_PULL_SET_RSEL_011>; 637 drive-strength-microamp = <1000>; 638 }; 639 }; 640 641 i2c2_pins: i2c2-pins { 642 pins { 643 pinmux = <PINMUX_GPIO60__FUNC_B1_SDA2>, 644 <PINMUX_GPIO59__FUNC_B1_SCL2>; 645 bias-pull-up = <MTK_PULL_SET_RSEL_011>; 646 drive-strength-microamp = <1000>; 647 }; 648 }; 649 650 i2c3_pins: i2c3-pins { 651 pins { 652 pinmux = <PINMUX_GPIO62__FUNC_B1_SDA3>, 653 <PINMUX_GPIO61__FUNC_B1_SCL3>; 654 bias-pull-up = <MTK_PULL_SET_RSEL_011>; 655 drive-strength-microamp = <1000>; 656 }; 657 }; 658 659 i2c4_pins: i2c4-pins { 660 pins { 661 pinmux = <PINMUX_GPIO64__FUNC_B1_SDA4>, 662 <PINMUX_GPIO63__FUNC_B1_SCL4>; 663 bias-pull-up = <MTK_PULL_SET_RSEL_011>; 664 drive-strength-microamp = <1000>; 665 }; 666 }; 667 668 i2c5_pins: i2c5-pins { 669 pins { 670 pinmux = <PINMUX_GPIO66__FUNC_B1_SDA5>, 671 <PINMUX_GPIO65__FUNC_B1_SCL5>; 672 bias-pull-up = <MTK_PULL_SET_RSEL_011>; 673 drive-strength-microamp = <1000>; 674 }; 675 }; 676 677 i2c6_pins: i2c6-pins { 678 pins { 679 pinmux = <PINMUX_GPIO68__FUNC_B1_SDA6>, 680 <PINMUX_GPIO67__FUNC_B1_SCL6>; 681 bias-pull-up = <MTK_PULL_SET_RSEL_011>; 682 drive-strength-microamp = <1000>; 683 }; 684 }; 685 686 gpio_key_pins: gpio-key-pins { 687 pins { 688 pinmux = <PINMUX_GPIO42__FUNC_B1_KPCOL0>, 689 <PINMUX_GPIO43__FUNC_B1_KPCOL1>, 690 <PINMUX_GPIO44__FUNC_B1_KPROW0>; 691 }; 692 }; 693 694 mmc0_default_pins: mmc0-default-pins { 695 pins-clk { 696 pinmux = <PINMUX_GPIO157__FUNC_B1_MSDC0_CLK>; 697 drive-strength = <6>; 698 bias-pull-down = <MTK_PUPD_SET_R1R0_10>; 699 }; 700 701 pins-cmd-dat { 702 pinmux = <PINMUX_GPIO161__FUNC_B1_MSDC0_DAT0>, 703 <PINMUX_GPIO160__FUNC_B1_MSDC0_DAT1>, 704 <PINMUX_GPIO159__FUNC_B1_MSDC0_DAT2>, 705 <PINMUX_GPIO158__FUNC_B1_MSDC0_DAT3>, 706 <PINMUX_GPIO154__FUNC_B1_MSDC0_DAT4>, 707 <PINMUX_GPIO153__FUNC_B1_MSDC0_DAT5>, 708 <PINMUX_GPIO152__FUNC_B1_MSDC0_DAT6>, 709 <PINMUX_GPIO151__FUNC_B1_MSDC0_DAT7>, 710 <PINMUX_GPIO156__FUNC_B1_MSDC0_CMD>; 711 input-enable; 712 drive-strength = <6>; 713 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 714 }; 715 716 pins-rst { 717 pinmux = <PINMUX_GPIO155__FUNC_O_MSDC0_RSTB>; 718 drive-strength = <6>; 719 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 720 }; 721 }; 722 723 mmc0_uhs_pins: mmc0-uhs-pins { 724 pins-clk { 725 pinmux = <PINMUX_GPIO157__FUNC_B1_MSDC0_CLK>; 726 drive-strength = <8>; 727 bias-pull-down = <MTK_PUPD_SET_R1R0_10>; 728 }; 729 730 pins-cmd-dat { 731 pinmux = <PINMUX_GPIO161__FUNC_B1_MSDC0_DAT0>, 732 <PINMUX_GPIO160__FUNC_B1_MSDC0_DAT1>, 733 <PINMUX_GPIO159__FUNC_B1_MSDC0_DAT2>, 734 <PINMUX_GPIO158__FUNC_B1_MSDC0_DAT3>, 735 <PINMUX_GPIO154__FUNC_B1_MSDC0_DAT4>, 736 <PINMUX_GPIO153__FUNC_B1_MSDC0_DAT5>, 737 <PINMUX_GPIO152__FUNC_B1_MSDC0_DAT6>, 738 <PINMUX_GPIO151__FUNC_B1_MSDC0_DAT7>, 739 <PINMUX_GPIO156__FUNC_B1_MSDC0_CMD>; 740 input-enable; 741 drive-strength = <8>; 742 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 743 }; 744 745 pins-ds { 746 pinmux = <PINMUX_GPIO162__FUNC_B0_MSDC0_DSL>; 747 drive-strength = <8>; 748 bias-pull-down = <MTK_PUPD_SET_R1R0_10>; 749 }; 750 751 pins-rst { 752 pinmux = <PINMUX_GPIO155__FUNC_O_MSDC0_RSTB>; 753 drive-strength = <8>; 754 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 755 }; 756 }; 757 758 mmc1_default_pins: mmc1-default-pins { 759 pins-clk { 760 pinmux = <PINMUX_GPIO164__FUNC_B1_MSDC1_CLK>; 761 drive-strength = <6>; 762 bias-pull-down = <MTK_PUPD_SET_R1R0_10>; 763 }; 764 765 pins-cmd-dat { 766 pinmux = <PINMUX_GPIO163__FUNC_B1_MSDC1_CMD>, 767 <PINMUX_GPIO165__FUNC_B1_MSDC1_DAT0>, 768 <PINMUX_GPIO166__FUNC_B1_MSDC1_DAT1>, 769 <PINMUX_GPIO167__FUNC_B1_MSDC1_DAT2>, 770 <PINMUX_GPIO168__FUNC_B1_MSDC1_DAT3>; 771 input-enable; 772 drive-strength = <6>; 773 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 774 }; 775 776 pins-insert { 777 pinmux = <PINMUX_GPIO2__FUNC_B_GPIO2>; 778 bias-pull-up; 779 }; 780 }; 781 782 mmc1_uhs_pins: mmc1-uhs-pins { 783 pins-clk { 784 pinmux = <PINMUX_GPIO164__FUNC_B1_MSDC1_CLK>; 785 drive-strength = <6>; 786 bias-pull-down = <MTK_PUPD_SET_R1R0_10>; 787 }; 788 789 pins-cmd-dat { 790 pinmux = <PINMUX_GPIO163__FUNC_B1_MSDC1_CMD>, 791 <PINMUX_GPIO165__FUNC_B1_MSDC1_DAT0>, 792 <PINMUX_GPIO166__FUNC_B1_MSDC1_DAT1>, 793 <PINMUX_GPIO167__FUNC_B1_MSDC1_DAT2>, 794 <PINMUX_GPIO168__FUNC_B1_MSDC1_DAT3>; 795 input-enable; 796 drive-strength = <6>; 797 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 798 }; 799 }; 800 801 mmc2_default_pins: mmc2-default-pins { 802 pins-clk { 803 pinmux = <PINMUX_GPIO170__FUNC_B1_MSDC2_CLK>; 804 drive-strength = <4>; 805 bias-pull-down = <MTK_PUPD_SET_R1R0_10>; 806 }; 807 808 pins-cmd-dat { 809 pinmux = <PINMUX_GPIO169__FUNC_B1_MSDC2_CMD>, 810 <PINMUX_GPIO171__FUNC_B1_MSDC2_DAT0>, 811 <PINMUX_GPIO172__FUNC_B1_MSDC2_DAT1>, 812 <PINMUX_GPIO173__FUNC_B1_MSDC2_DAT2>, 813 <PINMUX_GPIO174__FUNC_B1_MSDC2_DAT3>; 814 input-enable; 815 drive-strength = <6>; 816 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 817 }; 818 819 pins-pcm { 820 pinmux = <PINMUX_GPIO123__FUNC_O_PCM_DO>; 821 }; 822 }; 823 824 mmc2_uhs_pins: mmc2-uhs-pins { 825 pins-clk { 826 pinmux = <PINMUX_GPIO170__FUNC_B1_MSDC2_CLK>; 827 drive-strength = <4>; 828 bias-pull-down = <MTK_PUPD_SET_R1R0_10>; 829 }; 830 831 pins-cmd-dat { 832 pinmux = <PINMUX_GPIO169__FUNC_B1_MSDC2_CMD>, 833 <PINMUX_GPIO171__FUNC_B1_MSDC2_DAT0>, 834 <PINMUX_GPIO172__FUNC_B1_MSDC2_DAT1>, 835 <PINMUX_GPIO173__FUNC_B1_MSDC2_DAT2>, 836 <PINMUX_GPIO174__FUNC_B1_MSDC2_DAT3>; 837 input-enable; 838 drive-strength = <6>; 839 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 840 }; 841 }; 842 843 mmc2_eint_pins: mmc2-eint-pins { 844 pins-dat1 { 845 pinmux = <PINMUX_GPIO172__FUNC_B_GPIO172>; 846 input-enable; 847 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 848 }; 849 }; 850 851 mmc2_dat1_pins: mmc2-dat1-pins { 852 pins-dat1 { 853 pinmux = <PINMUX_GPIO172__FUNC_B1_MSDC2_DAT1>; 854 input-enable; 855 drive-strength = <6>; 856 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 857 }; 858 }; 859 860 panel_default_pins: panel-default-pins { 861 pins-dcdc { 862 pinmux = <PINMUX_GPIO45__FUNC_B_GPIO45>; 863 output-low; 864 }; 865 866 pins-en { 867 pinmux = <PINMUX_GPIO111__FUNC_B_GPIO111>; 868 output-low; 869 }; 870 871 pins-rst { 872 pinmux = <PINMUX_GPIO25__FUNC_B_GPIO25>; 873 output-high; 874 }; 875 }; 876 877 pcie_pins_default: pcie-default { 878 mux { 879 pinmux = <PINMUX_GPIO47__FUNC_I1_WAKEN>, 880 <PINMUX_GPIO48__FUNC_O_PERSTN>, 881 <PINMUX_GPIO49__FUNC_B1_CLKREQN>; 882 bias-pull-up; 883 }; 884 }; 885 886 rt1715_int_pins: rt1715-int-pins { 887 pins_cmd0_dat { 888 pinmux = <PINMUX_GPIO12__FUNC_B_GPIO12>; 889 bias-pull-up; 890 input-enable; 891 }; 892 }; 893 894 spi0_pins: spi0-pins { 895 pins-spi { 896 pinmux = <PINMUX_GPIO69__FUNC_O_SPIM0_CSB>, 897 <PINMUX_GPIO70__FUNC_O_SPIM0_CLK>, 898 <PINMUX_GPIO71__FUNC_B0_SPIM0_MOSI>, 899 <PINMUX_GPIO72__FUNC_B0_SPIM0_MISO>; 900 bias-disable; 901 }; 902 }; 903 904 spi1_pins: spi1-pins { 905 pins-spi { 906 pinmux = <PINMUX_GPIO75__FUNC_O_SPIM1_CSB>, 907 <PINMUX_GPIO76__FUNC_O_SPIM1_CLK>, 908 <PINMUX_GPIO77__FUNC_B0_SPIM1_MOSI>, 909 <PINMUX_GPIO78__FUNC_B0_SPIM1_MISO>; 910 bias-disable; 911 }; 912 }; 913 914 spi2_pins: spi2-pins { 915 pins-spi { 916 pinmux = <PINMUX_GPIO79__FUNC_O_SPIM2_CSB>, 917 <PINMUX_GPIO80__FUNC_O_SPIM2_CLK>, 918 <PINMUX_GPIO81__FUNC_B0_SPIM2_MOSI>, 919 <PINMUX_GPIO82__FUNC_B0_SPIM2_MISO>; 920 bias-disable; 921 }; 922 }; 923 924 touch_vreg_pins: touch-avdd-pins { 925 pins-power { 926 pinmux = <PINMUX_GPIO120__FUNC_B_GPIO120>; 927 output-high; 928 }; 929 }; 930 931 touch_pins: touch-pins { 932 pins-irq { 933 pinmux = <PINMUX_GPIO6__FUNC_B_GPIO6>; 934 input-enable; 935 bias-disable; 936 }; 937 938 pins-reset { 939 pinmux = <PINMUX_GPIO5__FUNC_B_GPIO5>; 940 output-high; 941 }; 942 }; 943 944 tcpci_int_pins: tcpci-int-pins { 945 pins-int-n { 946 pinmux = <PINMUX_GPIO12__FUNC_B_GPIO12>; 947 bias-pull-up; 948 input-enable; 949 }; 950 }; 951 952 uart0_pins: uart0-pins { 953 pins { 954 pinmux = <PINMUX_GPIO31__FUNC_O_UTXD0>, 955 <PINMUX_GPIO32__FUNC_I1_URXD0>; 956 bias-pull-up; 957 }; 958 }; 959 960 uart1_pins: uart1-pins { 961 pins { 962 pinmux = <PINMUX_GPIO33__FUNC_O_UTXD1>, 963 <PINMUX_GPIO34__FUNC_I1_URXD1>; 964 bias-pull-up; 965 }; 966 }; 967 968 uart2_pins: uart2-pins { 969 pins { 970 pinmux = <PINMUX_GPIO35__FUNC_O_UTXD2>, 971 <PINMUX_GPIO36__FUNC_I1_URXD2>; 972 bias-pull-up; 973 }; 974 }; 975 976 usb_default_pins: usb-default-pins { 977 pins-iddig { 978 pinmux = <PINMUX_GPIO83__FUNC_B_GPIO83>; 979 input-enable; 980 bias-pull-up; 981 }; 982 983 pins-valid { 984 pinmux = <PINMUX_GPIO85__FUNC_I0_VBUSVALID>; 985 input-enable; 986 }; 987 988 pins-vbus { 989 pinmux = <PINMUX_GPIO84__FUNC_O_USB_DRVVBUS>; 990 output-high; 991 }; 992 993 }; 994 995 usb1_default_pins: usb1-default-pins { 996 pins-valid { 997 pinmux = <PINMUX_GPIO88__FUNC_I0_VBUSVALID_1P>; 998 input-enable; 999 }; 1000 1001 pins-usb-hub-3v3-en { 1002 pinmux = <PINMUX_GPIO112__FUNC_B_GPIO112>; 1003 output-high; 1004 }; 1005 }; 1006 1007 usb2_default_pins: usb2-default-pins { 1008 pins-iddig { 1009 pinmux = <PINMUX_GPIO89__FUNC_B_GPIO89>; 1010 input-enable; 1011 bias-pull-up; 1012 }; 1013 }; 1014 1015 wifi_pwrseq_pins: wifi-pwrseq-pins { 1016 pins-wifi-enable { 1017 pinmux = <PINMUX_GPIO127__FUNC_B_GPIO127>; 1018 output-low; 1019 }; 1020 }; 1021}; 1022 1023ð { 1024 phy-mode ="rgmii-id"; 1025 phy-handle = <ðernet_phy0>; 1026 pinctrl-names = "default", "sleep"; 1027 pinctrl-0 = <ð_default_pins>; 1028 pinctrl-1 = <ð_sleep_pins>; 1029 mediatek,mac-wol; 1030 snps,reset-gpio = <&pio 147 GPIO_ACTIVE_HIGH>; 1031 snps,reset-delays-us = <0 10000 10000>; 1032 status = "okay"; 1033}; 1034 1035ð_mdio { 1036 ethernet_phy0: ethernet-phy@1 { 1037 compatible = "ethernet-phy-id001c.c916"; 1038 reg = <0x1>; 1039 }; 1040}; 1041 1042&pmic { 1043 interrupt-parent = <&pio>; 1044 interrupts = <222 IRQ_TYPE_LEVEL_HIGH>; 1045 1046 mt6359keys: keys { 1047 compatible = "mediatek,mt6359-keys"; 1048 mediatek,long-press-mode = <1>; 1049 power-off-time-sec = <0>; 1050 1051 power-key { 1052 linux,keycodes = <KEY_POWER>; 1053 wakeup-source; 1054 }; 1055 }; 1056}; 1057 1058&scp { 1059 memory-region = <&scp_mem>; 1060 status = "okay"; 1061}; 1062 1063&sound { 1064 compatible = "mediatek,mt8390-mt6359-evk", "mediatek,mt8188-mt6359-evb"; 1065 model = "mt8390-evk"; 1066 pinctrl-names = "default"; 1067 pinctrl-0 = <&audio_default_pins>; 1068 audio-routing = 1069 "Headphone", "Headphone L", 1070 "Headphone", "Headphone R", 1071 "DMIC_INPUT", "AP DMIC", 1072 "AP DMIC", "AUDGLB", 1073 "AP DMIC", "MIC_BIAS_0", 1074 "AP DMIC", "MIC_BIAS_2"; 1075 mediatek,adsp = <&adsp>; 1076 status = "okay"; 1077 1078 dai-link-0 { 1079 link-name = "DL_SRC_BE"; 1080 1081 codec { 1082 sound-dai = <&pmic 0>; 1083 }; 1084 }; 1085 1086 dai-link-1 { 1087 link-name = "DMIC_BE"; 1088 1089 codec { 1090 sound-dai = <&dmic_codec>; 1091 }; 1092 }; 1093}; 1094 1095&spi2 { 1096 pinctrl-0 = <&spi2_pins>; 1097 pinctrl-names = "default"; 1098 mediatek,pad-select = <0>; 1099 #address-cells = <1>; 1100 #size-cells = <0>; 1101 status = "okay"; 1102}; 1103 1104&uart0 { 1105 pinctrl-0 = <&uart0_pins>; 1106 pinctrl-names = "default"; 1107 status = "okay"; 1108}; 1109 1110&uart1 { 1111 pinctrl-0 = <&uart1_pins>; 1112 pinctrl-names = "default"; 1113 status = "okay"; 1114}; 1115 1116&uart2 { 1117 pinctrl-0 = <&uart2_pins>; 1118 pinctrl-names = "default"; 1119 status = "okay"; 1120}; 1121 1122&u3phy0 { 1123 status = "okay"; 1124}; 1125 1126&u3phy1 { 1127 status = "okay"; 1128}; 1129 1130&u3phy2 { 1131 status = "okay"; 1132}; 1133 1134&ssusb0 { 1135 dr_mode = "otg"; 1136 maximum-speed = "high-speed"; 1137 usb-role-switch; 1138 wakeup-source; 1139 vusb33-supply = <&mt6359_vusb_ldo_reg>; 1140 pinctrl-0 = <&usb_default_pins>; 1141 pinctrl-names = "default"; 1142 status = "okay"; 1143 1144 connector { 1145 compatible = "gpio-usb-b-connector", "usb-b-connector"; 1146 type = "micro"; 1147 id-gpios = <&pio 83 GPIO_ACTIVE_HIGH>; 1148 vbus-supply = <&usb_p0_vbus>; 1149 }; 1150}; 1151 1152&xhci0 { 1153 status = "okay"; 1154}; 1155 1156&ssusb1 { 1157 dr_mode = "otg"; 1158 usb-role-switch; 1159 wakeup-source; 1160 vusb33-supply = <&mt6359_vusb_ldo_reg>; 1161 pinctrl-0 = <&usb1_default_pins>; 1162 pinctrl-names = "default"; 1163 status = "okay"; 1164 1165 port { 1166 mtu3_hs1_role_sw: endpoint { 1167 remote-endpoint = <&typec_con_hs>; 1168 }; 1169 }; 1170}; 1171 1172&xhci1 { 1173 status = "okay"; 1174 vusb33-supply = <&mt6359_vusb_ldo_reg>; 1175 #address-cells = <1>; 1176 #size-cells = <0>; 1177 1178 hub_2_0: hub@1 { 1179 compatible = "usb451,8025"; 1180 reg = <1>; 1181 peer-hub = <&hub_3_0>; 1182 reset-gpios = <&pio 7 GPIO_ACTIVE_HIGH>; 1183 vdd-supply = <&usb_hub_fixed_3v3>; 1184 }; 1185 1186 hub_3_0: hub@2 { 1187 compatible = "usb451,8027"; 1188 reg = <2>; 1189 peer-hub = <&hub_2_0>; 1190 reset-gpios = <&pio 7 GPIO_ACTIVE_HIGH>; 1191 vdd-supply = <&usb_hub_fixed_3v3>; 1192 }; 1193 1194 port { 1195 xhci_ss_ep: endpoint { 1196 remote-endpoint = <&typec_con_ss>; 1197 }; 1198 }; 1199}; 1200 1201&ssusb2 { 1202 dr_mode = "otg"; 1203 maximum-speed = "high-speed"; 1204 usb-role-switch; 1205 vusb33-supply = <&mt6359_vusb_ldo_reg>; 1206 wakeup-source; 1207 pinctrl-names = "default"; 1208 pinctrl-0 = <&usb2_default_pins>; 1209 status = "okay"; 1210 1211 connector { 1212 compatible = "gpio-usb-b-connector", "usb-b-connector"; 1213 type = "micro"; 1214 id-gpios = <&pio 89 GPIO_ACTIVE_HIGH>; 1215 vbus-supply = <&usb_p2_vbus>; 1216 }; 1217}; 1218 1219&xhci2 { 1220 vusb33-supply = <&mt6359_vusb_ldo_reg>; 1221 vbus-supply = <&sdio_fixed_3v3>; /* wifi_3v3 */ 1222 status = "okay"; 1223}; 1224