1// SPDX-License-Identifier: (GPL-2.0 OR MIT) 2/* 3 * Copyright (C) 2023 MediaTek Inc. 4 * Author: Chris Chen <chris-qj.chen@mediatek.com> 5 * Pablo Sun <pablo.sun@mediatek.com> 6 * Macpaul Lin <macpaul.lin@mediatek.com> 7 */ 8/dts-v1/; 9 10#include "mt8188.dtsi" 11#include "mt6359.dtsi" 12#include <dt-bindings/gpio/gpio.h> 13#include <dt-bindings/input/input.h> 14#include <dt-bindings/interrupt-controller/irq.h> 15#include <dt-bindings/pinctrl/mediatek,mt8188-pinfunc.h> 16#include <dt-bindings/regulator/mediatek,mt6360-regulator.h> 17#include <dt-bindings/spmi/spmi.h> 18#include <dt-bindings/usb/pd.h> 19 20/ { 21 model = "MediaTek Genio-700 EVK"; 22 compatible = "mediatek,mt8390-evk", "mediatek,mt8390", 23 "mediatek,mt8188"; 24 25 aliases { 26 ethernet0 = ð 27 i2c0 = &i2c0; 28 i2c1 = &i2c1; 29 i2c2 = &i2c2; 30 i2c3 = &i2c3; 31 i2c4 = &i2c4; 32 i2c5 = &i2c5; 33 i2c6 = &i2c6; 34 mmc0 = &mmc0; 35 mmc1 = &mmc1; 36 serial0 = &uart0; 37 }; 38 39 chosen { 40 stdout-path = "serial0:921600n8"; 41 }; 42 43 firmware { 44 optee { 45 compatible = "linaro,optee-tz"; 46 method = "smc"; 47 }; 48 }; 49 50 memory@40000000 { 51 device_type = "memory"; 52 reg = <0 0x40000000 0x2 0x00000000>; 53 }; 54 55 reserved-memory { 56 #address-cells = <2>; 57 #size-cells = <2>; 58 ranges; 59 60 /* 61 * 12 MiB reserved for OP-TEE (BL32) 62 * +-----------------------+ 0x43e0_0000 63 * | SHMEM 2MiB | 64 * +-----------------------+ 0x43c0_0000 65 * | | TA_RAM 8MiB | 66 * + TZDRAM +--------------+ 0x4340_0000 67 * | | TEE_RAM 2MiB | 68 * +-----------------------+ 0x4320_0000 69 */ 70 optee_reserved: optee@43200000 { 71 no-map; 72 reg = <0 0x43200000 0 0x00c00000>; 73 }; 74 75 scp_mem: memory@50000000 { 76 compatible = "shared-dma-pool"; 77 reg = <0 0x50000000 0 0x2900000>; 78 no-map; 79 }; 80 81 /* 2 MiB reserved for ARM Trusted Firmware (BL31) */ 82 bl31_secmon_reserved: memory@54600000 { 83 no-map; 84 reg = <0 0x54600000 0x0 0x200000>; 85 }; 86 87 apu_mem: memory@55000000 { 88 compatible = "shared-dma-pool"; 89 reg = <0 0x55000000 0 0x1400000>; /* 20 MB */ 90 }; 91 92 vpu_mem: memory@57000000 { 93 compatible = "shared-dma-pool"; 94 reg = <0 0x57000000 0 0x1400000>; /* 20 MB */ 95 }; 96 }; 97 98 common_fixed_5v: regulator-0 { 99 compatible = "regulator-fixed"; 100 regulator-name = "vdd_5v"; 101 regulator-min-microvolt = <5000000>; 102 regulator-max-microvolt = <5000000>; 103 gpio = <&pio 10 GPIO_ACTIVE_HIGH>; 104 enable-active-high; 105 regulator-always-on; 106 vin-supply = <®_vsys>; 107 }; 108 109 edp_panel_fixed_3v3: regulator-1 { 110 compatible = "regulator-fixed"; 111 regulator-name = "vedp_3v3"; 112 regulator-min-microvolt = <3300000>; 113 regulator-max-microvolt = <3300000>; 114 enable-active-high; 115 gpio = <&pio 15 GPIO_ACTIVE_HIGH>; 116 pinctrl-names = "default"; 117 pinctrl-0 = <&edp_panel_3v3_en_pins>; 118 vin-supply = <®_vsys>; 119 }; 120 121 gpio_fixed_3v3: regulator-2 { 122 compatible = "regulator-fixed"; 123 regulator-name = "ext_3v3"; 124 regulator-min-microvolt = <3300000>; 125 regulator-max-microvolt = <3300000>; 126 gpio = <&pio 9 GPIO_ACTIVE_HIGH>; 127 enable-active-high; 128 regulator-always-on; 129 vin-supply = <®_vsys>; 130 }; 131 132 /* system wide 4.2V power rail from charger */ 133 reg_vsys: regulator-vsys { 134 compatible = "regulator-fixed"; 135 regulator-name = "vsys"; 136 regulator-always-on; 137 regulator-boot-on; 138 }; 139 140 /* used by mmc2 */ 141 sdio_fixed_1v8: regulator-3 { 142 compatible = "regulator-fixed"; 143 regulator-name = "vio18_conn"; 144 regulator-min-microvolt = <1800000>; 145 regulator-max-microvolt = <1800000>; 146 enable-active-high; 147 regulator-always-on; 148 }; 149 150 /* used by mmc2 */ 151 sdio_fixed_3v3: regulator-4 { 152 compatible = "regulator-fixed"; 153 regulator-name = "wifi_3v3"; 154 regulator-min-microvolt = <3300000>; 155 regulator-max-microvolt = <3300000>; 156 gpio = <&pio 74 GPIO_ACTIVE_HIGH>; 157 enable-active-high; 158 regulator-always-on; 159 vin-supply = <®_vsys>; 160 }; 161 162 touch0_fixed_3v3: regulator-5 { 163 compatible = "regulator-fixed"; 164 regulator-name = "vio33_tp1"; 165 regulator-min-microvolt = <3300000>; 166 regulator-max-microvolt = <3300000>; 167 gpio = <&pio 119 GPIO_ACTIVE_HIGH>; 168 enable-active-high; 169 vin-supply = <®_vsys>; 170 }; 171 172 usb_hub_fixed_3v3: regulator-6 { 173 compatible = "regulator-fixed"; 174 regulator-name = "vhub_3v3"; 175 regulator-min-microvolt = <3300000>; 176 regulator-max-microvolt = <3300000>; 177 gpio = <&pio 112 GPIO_ACTIVE_HIGH>; /* HUB_3V3_EN */ 178 startup-delay-us = <10000>; 179 enable-active-high; 180 vin-supply = <®_vsys>; 181 }; 182 183 usb_p0_vbus: regulator-7 { 184 compatible = "regulator-fixed"; 185 regulator-name = "vbus_p0"; 186 regulator-min-microvolt = <5000000>; 187 regulator-max-microvolt = <5000000>; 188 gpio = <&pio 84 GPIO_ACTIVE_HIGH>; 189 enable-active-high; 190 vin-supply = <®_vsys>; 191 }; 192 193 usb_p1_vbus: regulator-8 { 194 compatible = "regulator-fixed"; 195 regulator-name = "vbus_p1"; 196 regulator-min-microvolt = <5000000>; 197 regulator-max-microvolt = <5000000>; 198 gpio = <&pio 87 GPIO_ACTIVE_HIGH>; 199 enable-active-high; 200 vin-supply = <®_vsys>; 201 }; 202 203 /* used by ssusb2 */ 204 usb_p2_vbus: regulator-9 { 205 compatible = "regulator-fixed"; 206 regulator-name = "wifi_3v3"; 207 regulator-min-microvolt = <5000000>; 208 regulator-max-microvolt = <5000000>; 209 enable-active-high; 210 }; 211}; 212 213&gpu { 214 mali-supply = <&mt6359_vproc2_buck_reg>; 215 status = "okay"; 216}; 217 218&i2c0 { 219 pinctrl-names = "default"; 220 pinctrl-0 = <&i2c0_pins>; 221 clock-frequency = <400000>; 222 status = "okay"; 223 224 touchscreen@5d { 225 compatible = "goodix,gt9271"; 226 reg = <0x5d>; 227 interrupt-parent = <&pio>; 228 interrupts-extended = <&pio 6 IRQ_TYPE_EDGE_RISING>; 229 irq-gpios = <&pio 6 GPIO_ACTIVE_HIGH>; 230 reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>; 231 AVDD28-supply = <&touch0_fixed_3v3>; 232 VDDIO-supply = <&mt6359_vio18_ldo_reg>; 233 pinctrl-names = "default"; 234 pinctrl-0 = <&touch_pins>; 235 }; 236}; 237 238&i2c1 { 239 pinctrl-names = "default"; 240 pinctrl-0 = <&i2c1_pins>; 241 clock-frequency = <400000>; 242 status = "okay"; 243}; 244 245&i2c2 { 246 pinctrl-names = "default"; 247 pinctrl-0 = <&i2c2_pins>; 248 clock-frequency = <400000>; 249 status = "okay"; 250}; 251 252&i2c3 { 253 pinctrl-names = "default"; 254 pinctrl-0 = <&i2c3_pins>; 255 clock-frequency = <400000>; 256 status = "okay"; 257}; 258 259&i2c4 { 260 pinctrl-names = "default"; 261 pinctrl-0 = <&i2c4_pins>; 262 clock-frequency = <1000000>; 263 status = "okay"; 264}; 265 266&i2c5 { 267 pinctrl-names = "default"; 268 pinctrl-0 = <&i2c5_pins>; 269 clock-frequency = <400000>; 270 status = "okay"; 271}; 272 273&i2c6 { 274 pinctrl-names = "default"; 275 pinctrl-0 = <&i2c6_pins>; 276 clock-frequency = <400000>; 277 status = "okay"; 278}; 279 280&mfg0 { 281 domain-supply = <&mt6359_vproc2_buck_reg>; 282}; 283 284&mfg1 { 285 domain-supply = <&mt6359_vsram_others_ldo_reg>; 286}; 287 288&mmc0 { 289 status = "okay"; 290 pinctrl-names = "default", "state_uhs"; 291 pinctrl-0 = <&mmc0_default_pins>; 292 pinctrl-1 = <&mmc0_uhs_pins>; 293 bus-width = <8>; 294 max-frequency = <200000000>; 295 cap-mmc-highspeed; 296 mmc-hs200-1_8v; 297 mmc-hs400-1_8v; 298 supports-cqe; 299 cap-mmc-hw-reset; 300 no-sdio; 301 no-sd; 302 hs400-ds-delay = <0x1481b>; 303 vmmc-supply = <&mt6359_vemc_1_ldo_reg>; 304 vqmmc-supply = <&mt6359_vufs_ldo_reg>; 305 non-removable; 306}; 307 308&mmc1 { 309 status = "okay"; 310 pinctrl-names = "default", "state_uhs"; 311 pinctrl-0 = <&mmc1_default_pins>; 312 pinctrl-1 = <&mmc1_uhs_pins>; 313 bus-width = <4>; 314 max-frequency = <200000000>; 315 cap-sd-highspeed; 316 sd-uhs-sdr50; 317 sd-uhs-sdr104; 318 no-mmc; 319 no-sdio; 320 cd-gpios = <&pio 2 GPIO_ACTIVE_LOW>; 321 vmmc-supply = <&mt6359_vpa_buck_reg>; 322 vqmmc-supply = <&mt6359_vsim1_ldo_reg>; 323}; 324 325&mt6359_vbbck_ldo_reg { 326 regulator-always-on; 327}; 328 329&mt6359_vcn18_ldo_reg { 330 regulator-name = "vcn18_pmu"; 331 regulator-always-on; 332}; 333 334&mt6359_vcn33_2_bt_ldo_reg { 335 regulator-name = "vcn33_2_pmu"; 336 regulator-always-on; 337}; 338 339&mt6359_vcore_buck_reg { 340 regulator-name = "dvdd_proc_l"; 341 regulator-always-on; 342}; 343 344&mt6359_vgpu11_buck_reg { 345 regulator-name = "dvdd_core"; 346 regulator-always-on; 347}; 348 349&mt6359_vpa_buck_reg { 350 regulator-name = "vpa_pmu"; 351 regulator-max-microvolt = <3100000>; 352}; 353 354&mt6359_vproc2_buck_reg { 355 /* The name "vgpu" is required by mtk-regulator-coupler */ 356 regulator-name = "vgpu"; 357 regulator-min-microvolt = <550000>; 358 regulator-max-microvolt = <800000>; 359 regulator-coupled-with = <&mt6359_vsram_others_ldo_reg>; 360 regulator-coupled-max-spread = <6250>; 361}; 362 363&mt6359_vpu_buck_reg { 364 regulator-name = "dvdd_adsp"; 365 regulator-always-on; 366}; 367 368&mt6359_vrf12_ldo_reg { 369 regulator-name = "va12_abb2_pmu"; 370 regulator-always-on; 371}; 372 373&mt6359_vsim1_ldo_reg { 374 regulator-name = "vsim1_pmu"; 375 regulator-enable-ramp-delay = <480>; 376}; 377 378&mt6359_vsram_others_ldo_reg { 379 /* The name "vsram_gpu" is required by mtk-regulator-coupler */ 380 regulator-name = "vsram_gpu"; 381 regulator-min-microvolt = <750000>; 382 regulator-max-microvolt = <800000>; 383 regulator-coupled-with = <&mt6359_vproc2_buck_reg>; 384 regulator-coupled-max-spread = <6250>; 385}; 386 387&mt6359_vufs_ldo_reg { 388 regulator-name = "vufs18_pmu"; 389 regulator-always-on; 390}; 391 392&mt6359codec { 393 mediatek,mic-type-0 = <1>; /* ACC */ 394 mediatek,mic-type-1 = <3>; /* DCC */ 395}; 396 397&pcie { 398 pinctrl-names = "default"; 399 pinctrl-0 = <&pcie_pins_default>; 400 status = "okay"; 401}; 402 403&pciephy { 404 status = "okay"; 405}; 406 407&pio { 408 audio_default_pins: audio-default-pins { 409 pins-cmd-dat { 410 pinmux = <PINMUX_GPIO101__FUNC_O_AUD_CLK_MOSI>, 411 <PINMUX_GPIO102__FUNC_O_AUD_SYNC_MOSI>, 412 <PINMUX_GPIO103__FUNC_O_AUD_DAT_MOSI0>, 413 <PINMUX_GPIO104__FUNC_O_AUD_DAT_MOSI1>, 414 <PINMUX_GPIO105__FUNC_I0_AUD_DAT_MISO0>, 415 <PINMUX_GPIO106__FUNC_I0_AUD_DAT_MISO1>, 416 <PINMUX_GPIO107__FUNC_B0_I2SIN_MCK>, 417 <PINMUX_GPIO108__FUNC_B0_I2SIN_BCK>, 418 <PINMUX_GPIO109__FUNC_B0_I2SIN_WS>, 419 <PINMUX_GPIO110__FUNC_I0_I2SIN_D0>, 420 <PINMUX_GPIO114__FUNC_O_I2SO2_MCK>, 421 <PINMUX_GPIO115__FUNC_B0_I2SO2_BCK>, 422 <PINMUX_GPIO116__FUNC_B0_I2SO2_WS>, 423 <PINMUX_GPIO117__FUNC_O_I2SO2_D0>, 424 <PINMUX_GPIO118__FUNC_O_I2SO2_D1>, 425 <PINMUX_GPIO121__FUNC_B0_PCM_CLK>, 426 <PINMUX_GPIO122__FUNC_B0_PCM_SYNC>, 427 <PINMUX_GPIO124__FUNC_I0_PCM_DI>, 428 <PINMUX_GPIO125__FUNC_O_DMIC1_CLK>, 429 <PINMUX_GPIO126__FUNC_I0_DMIC1_DAT>, 430 <PINMUX_GPIO128__FUNC_O_DMIC2_CLK>, 431 <PINMUX_GPIO129__FUNC_I0_DMIC2_DAT>; 432 }; 433 }; 434 435 dptx_pins: dptx-pins { 436 pins-cmd-dat { 437 pinmux = <PINMUX_GPIO46__FUNC_I0_DP_TX_HPD>; 438 bias-pull-up; 439 }; 440 }; 441 442 edp_panel_3v3_en_pins: edp-panel-3v3-en-pins { 443 pins1 { 444 pinmux = <PINMUX_GPIO15__FUNC_B_GPIO15>; 445 output-high; 446 }; 447 }; 448 449 eth_default_pins: eth-default-pins { 450 pins-cc { 451 pinmux = <PINMUX_GPIO139__FUNC_B0_GBE_TXC>, 452 <PINMUX_GPIO140__FUNC_I0_GBE_RXC>, 453 <PINMUX_GPIO141__FUNC_I0_GBE_RXDV>, 454 <PINMUX_GPIO142__FUNC_O_GBE_TXEN>; 455 drive-strength = <8>; 456 }; 457 458 pins-mdio { 459 pinmux = <PINMUX_GPIO143__FUNC_O_GBE_MDC>, 460 <PINMUX_GPIO144__FUNC_B1_GBE_MDIO>; 461 drive-strength = <8>; 462 input-enable; 463 }; 464 465 pins-power { 466 pinmux = <PINMUX_GPIO145__FUNC_B_GPIO145>, 467 <PINMUX_GPIO146__FUNC_B_GPIO146>; 468 output-high; 469 }; 470 471 pins-rxd { 472 pinmux = <PINMUX_GPIO135__FUNC_I0_GBE_RXD3>, 473 <PINMUX_GPIO136__FUNC_I0_GBE_RXD2>, 474 <PINMUX_GPIO137__FUNC_I0_GBE_RXD1>, 475 <PINMUX_GPIO138__FUNC_I0_GBE_RXD0>; 476 drive-strength = <8>; 477 }; 478 479 pins-txd { 480 pinmux = <PINMUX_GPIO131__FUNC_O_GBE_TXD3>, 481 <PINMUX_GPIO132__FUNC_O_GBE_TXD2>, 482 <PINMUX_GPIO133__FUNC_O_GBE_TXD1>, 483 <PINMUX_GPIO134__FUNC_O_GBE_TXD0>; 484 drive-strength = <8>; 485 }; 486 }; 487 488 eth_sleep_pins: eth-sleep-pins { 489 pins-cc { 490 pinmux = <PINMUX_GPIO139__FUNC_B_GPIO139>, 491 <PINMUX_GPIO140__FUNC_B_GPIO140>, 492 <PINMUX_GPIO141__FUNC_B_GPIO141>, 493 <PINMUX_GPIO142__FUNC_B_GPIO142>; 494 }; 495 496 pins-mdio { 497 pinmux = <PINMUX_GPIO143__FUNC_B_GPIO143>, 498 <PINMUX_GPIO144__FUNC_B_GPIO144>; 499 input-disable; 500 bias-disable; 501 }; 502 503 pins-rxd { 504 pinmux = <PINMUX_GPIO135__FUNC_B_GPIO135>, 505 <PINMUX_GPIO136__FUNC_B_GPIO136>, 506 <PINMUX_GPIO137__FUNC_B_GPIO137>, 507 <PINMUX_GPIO138__FUNC_B_GPIO138>; 508 }; 509 510 pins-txd { 511 pinmux = <PINMUX_GPIO131__FUNC_B_GPIO131>, 512 <PINMUX_GPIO132__FUNC_B_GPIO132>, 513 <PINMUX_GPIO133__FUNC_B_GPIO133>, 514 <PINMUX_GPIO134__FUNC_B_GPIO134>; 515 }; 516 }; 517 518 i2c0_pins: i2c0-pins { 519 pins { 520 pinmux = <PINMUX_GPIO56__FUNC_B1_SDA0>, 521 <PINMUX_GPIO55__FUNC_B1_SCL0>; 522 bias-pull-up = <MTK_PULL_SET_RSEL_011>; 523 drive-strength-microamp = <1000>; 524 }; 525 }; 526 527 i2c1_pins: i2c1-pins { 528 pins { 529 pinmux = <PINMUX_GPIO58__FUNC_B1_SDA1>, 530 <PINMUX_GPIO57__FUNC_B1_SCL1>; 531 bias-pull-up = <MTK_PULL_SET_RSEL_011>; 532 drive-strength-microamp = <1000>; 533 }; 534 }; 535 536 i2c2_pins: i2c2-pins { 537 pins { 538 pinmux = <PINMUX_GPIO60__FUNC_B1_SDA2>, 539 <PINMUX_GPIO59__FUNC_B1_SCL2>; 540 bias-pull-up = <MTK_PULL_SET_RSEL_011>; 541 drive-strength-microamp = <1000>; 542 }; 543 }; 544 545 i2c3_pins: i2c3-pins { 546 pins { 547 pinmux = <PINMUX_GPIO62__FUNC_B1_SDA3>, 548 <PINMUX_GPIO61__FUNC_B1_SCL3>; 549 bias-pull-up = <MTK_PULL_SET_RSEL_011>; 550 drive-strength-microamp = <1000>; 551 }; 552 }; 553 554 i2c4_pins: i2c4-pins { 555 pins { 556 pinmux = <PINMUX_GPIO64__FUNC_B1_SDA4>, 557 <PINMUX_GPIO63__FUNC_B1_SCL4>; 558 bias-pull-up = <MTK_PULL_SET_RSEL_011>; 559 drive-strength-microamp = <1000>; 560 }; 561 }; 562 563 i2c5_pins: i2c5-pins { 564 pins { 565 pinmux = <PINMUX_GPIO66__FUNC_B1_SDA5>, 566 <PINMUX_GPIO65__FUNC_B1_SCL5>; 567 bias-pull-up = <MTK_PULL_SET_RSEL_011>; 568 drive-strength-microamp = <1000>; 569 }; 570 }; 571 572 i2c6_pins: i2c6-pins { 573 pins { 574 pinmux = <PINMUX_GPIO68__FUNC_B1_SDA6>, 575 <PINMUX_GPIO67__FUNC_B1_SCL6>; 576 bias-pull-up = <MTK_PULL_SET_RSEL_011>; 577 drive-strength-microamp = <1000>; 578 }; 579 }; 580 581 gpio_key_pins: gpio-key-pins { 582 pins { 583 pinmux = <PINMUX_GPIO42__FUNC_B1_KPCOL0>, 584 <PINMUX_GPIO43__FUNC_B1_KPCOL1>, 585 <PINMUX_GPIO44__FUNC_B1_KPROW0>; 586 }; 587 }; 588 589 mmc0_default_pins: mmc0-default-pins { 590 pins-clk { 591 pinmux = <PINMUX_GPIO157__FUNC_B1_MSDC0_CLK>; 592 drive-strength = <6>; 593 bias-pull-down = <MTK_PUPD_SET_R1R0_10>; 594 }; 595 596 pins-cmd-dat { 597 pinmux = <PINMUX_GPIO161__FUNC_B1_MSDC0_DAT0>, 598 <PINMUX_GPIO160__FUNC_B1_MSDC0_DAT1>, 599 <PINMUX_GPIO159__FUNC_B1_MSDC0_DAT2>, 600 <PINMUX_GPIO158__FUNC_B1_MSDC0_DAT3>, 601 <PINMUX_GPIO154__FUNC_B1_MSDC0_DAT4>, 602 <PINMUX_GPIO153__FUNC_B1_MSDC0_DAT5>, 603 <PINMUX_GPIO152__FUNC_B1_MSDC0_DAT6>, 604 <PINMUX_GPIO151__FUNC_B1_MSDC0_DAT7>, 605 <PINMUX_GPIO156__FUNC_B1_MSDC0_CMD>; 606 input-enable; 607 drive-strength = <6>; 608 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 609 }; 610 611 pins-rst { 612 pinmux = <PINMUX_GPIO155__FUNC_O_MSDC0_RSTB>; 613 drive-strength = <6>; 614 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 615 }; 616 }; 617 618 mmc0_uhs_pins: mmc0-uhs-pins { 619 pins-clk { 620 pinmux = <PINMUX_GPIO157__FUNC_B1_MSDC0_CLK>; 621 drive-strength = <8>; 622 bias-pull-down = <MTK_PUPD_SET_R1R0_10>; 623 }; 624 625 pins-cmd-dat { 626 pinmux = <PINMUX_GPIO161__FUNC_B1_MSDC0_DAT0>, 627 <PINMUX_GPIO160__FUNC_B1_MSDC0_DAT1>, 628 <PINMUX_GPIO159__FUNC_B1_MSDC0_DAT2>, 629 <PINMUX_GPIO158__FUNC_B1_MSDC0_DAT3>, 630 <PINMUX_GPIO154__FUNC_B1_MSDC0_DAT4>, 631 <PINMUX_GPIO153__FUNC_B1_MSDC0_DAT5>, 632 <PINMUX_GPIO152__FUNC_B1_MSDC0_DAT6>, 633 <PINMUX_GPIO151__FUNC_B1_MSDC0_DAT7>, 634 <PINMUX_GPIO156__FUNC_B1_MSDC0_CMD>; 635 input-enable; 636 drive-strength = <8>; 637 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 638 }; 639 640 pins-ds { 641 pinmux = <PINMUX_GPIO162__FUNC_B0_MSDC0_DSL>; 642 drive-strength = <8>; 643 bias-pull-down = <MTK_PUPD_SET_R1R0_10>; 644 }; 645 646 pins-rst { 647 pinmux = <PINMUX_GPIO155__FUNC_O_MSDC0_RSTB>; 648 drive-strength = <8>; 649 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 650 }; 651 }; 652 653 mmc1_default_pins: mmc1-default-pins { 654 pins-clk { 655 pinmux = <PINMUX_GPIO164__FUNC_B1_MSDC1_CLK>; 656 drive-strength = <6>; 657 bias-pull-down = <MTK_PUPD_SET_R1R0_10>; 658 }; 659 660 pins-cmd-dat { 661 pinmux = <PINMUX_GPIO163__FUNC_B1_MSDC1_CMD>, 662 <PINMUX_GPIO165__FUNC_B1_MSDC1_DAT0>, 663 <PINMUX_GPIO166__FUNC_B1_MSDC1_DAT1>, 664 <PINMUX_GPIO167__FUNC_B1_MSDC1_DAT2>, 665 <PINMUX_GPIO168__FUNC_B1_MSDC1_DAT3>; 666 input-enable; 667 drive-strength = <6>; 668 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 669 }; 670 671 pins-insert { 672 pinmux = <PINMUX_GPIO2__FUNC_B_GPIO2>; 673 bias-pull-up; 674 }; 675 }; 676 677 mmc1_uhs_pins: mmc1-uhs-pins { 678 pins-clk { 679 pinmux = <PINMUX_GPIO164__FUNC_B1_MSDC1_CLK>; 680 drive-strength = <6>; 681 bias-pull-down = <MTK_PUPD_SET_R1R0_10>; 682 }; 683 684 pins-cmd-dat { 685 pinmux = <PINMUX_GPIO163__FUNC_B1_MSDC1_CMD>, 686 <PINMUX_GPIO165__FUNC_B1_MSDC1_DAT0>, 687 <PINMUX_GPIO166__FUNC_B1_MSDC1_DAT1>, 688 <PINMUX_GPIO167__FUNC_B1_MSDC1_DAT2>, 689 <PINMUX_GPIO168__FUNC_B1_MSDC1_DAT3>; 690 input-enable; 691 drive-strength = <6>; 692 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 693 }; 694 }; 695 696 mmc2_default_pins: mmc2-default-pins { 697 pins-clk { 698 pinmux = <PINMUX_GPIO170__FUNC_B1_MSDC2_CLK>; 699 drive-strength = <4>; 700 bias-pull-down = <MTK_PUPD_SET_R1R0_10>; 701 }; 702 703 pins-cmd-dat { 704 pinmux = <PINMUX_GPIO169__FUNC_B1_MSDC2_CMD>, 705 <PINMUX_GPIO171__FUNC_B1_MSDC2_DAT0>, 706 <PINMUX_GPIO172__FUNC_B1_MSDC2_DAT1>, 707 <PINMUX_GPIO173__FUNC_B1_MSDC2_DAT2>, 708 <PINMUX_GPIO174__FUNC_B1_MSDC2_DAT3>; 709 input-enable; 710 drive-strength = <6>; 711 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 712 }; 713 714 pins-pcm { 715 pinmux = <PINMUX_GPIO123__FUNC_O_PCM_DO>; 716 }; 717 }; 718 719 mmc2_uhs_pins: mmc2-uhs-pins { 720 pins-clk { 721 pinmux = <PINMUX_GPIO170__FUNC_B1_MSDC2_CLK>; 722 drive-strength = <4>; 723 bias-pull-down = <MTK_PUPD_SET_R1R0_10>; 724 }; 725 726 pins-cmd-dat { 727 pinmux = <PINMUX_GPIO169__FUNC_B1_MSDC2_CMD>, 728 <PINMUX_GPIO171__FUNC_B1_MSDC2_DAT0>, 729 <PINMUX_GPIO172__FUNC_B1_MSDC2_DAT1>, 730 <PINMUX_GPIO173__FUNC_B1_MSDC2_DAT2>, 731 <PINMUX_GPIO174__FUNC_B1_MSDC2_DAT3>; 732 input-enable; 733 drive-strength = <6>; 734 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 735 }; 736 }; 737 738 mmc2_eint_pins: mmc2-eint-pins { 739 pins-dat1 { 740 pinmux = <PINMUX_GPIO172__FUNC_B_GPIO172>; 741 input-enable; 742 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 743 }; 744 }; 745 746 mmc2_dat1_pins: mmc2-dat1-pins { 747 pins-dat1 { 748 pinmux = <PINMUX_GPIO172__FUNC_B1_MSDC2_DAT1>; 749 input-enable; 750 drive-strength = <6>; 751 bias-pull-up = <MTK_PUPD_SET_R1R0_01>; 752 }; 753 }; 754 755 panel_default_pins: panel-default-pins { 756 pins-dcdc { 757 pinmux = <PINMUX_GPIO45__FUNC_B_GPIO45>; 758 output-low; 759 }; 760 761 pins-en { 762 pinmux = <PINMUX_GPIO111__FUNC_B_GPIO111>; 763 output-low; 764 }; 765 766 pins-rst { 767 pinmux = <PINMUX_GPIO25__FUNC_B_GPIO25>; 768 output-high; 769 }; 770 }; 771 772 pcie_pins_default: pcie-default { 773 mux { 774 pinmux = <PINMUX_GPIO47__FUNC_I1_WAKEN>, 775 <PINMUX_GPIO48__FUNC_O_PERSTN>, 776 <PINMUX_GPIO49__FUNC_B1_CLKREQN>; 777 bias-pull-up; 778 }; 779 }; 780 781 rt1715_int_pins: rt1715-int-pins { 782 pins_cmd0_dat { 783 pinmux = <PINMUX_GPIO12__FUNC_B_GPIO12>; 784 bias-pull-up; 785 input-enable; 786 }; 787 }; 788 789 spi0_pins: spi0-pins { 790 pins-spi { 791 pinmux = <PINMUX_GPIO69__FUNC_O_SPIM0_CSB>, 792 <PINMUX_GPIO70__FUNC_O_SPIM0_CLK>, 793 <PINMUX_GPIO71__FUNC_B0_SPIM0_MOSI>, 794 <PINMUX_GPIO72__FUNC_B0_SPIM0_MISO>; 795 bias-disable; 796 }; 797 }; 798 799 spi1_pins: spi1-pins { 800 pins-spi { 801 pinmux = <PINMUX_GPIO75__FUNC_O_SPIM1_CSB>, 802 <PINMUX_GPIO76__FUNC_O_SPIM1_CLK>, 803 <PINMUX_GPIO77__FUNC_B0_SPIM1_MOSI>, 804 <PINMUX_GPIO78__FUNC_B0_SPIM1_MISO>; 805 bias-disable; 806 }; 807 }; 808 809 spi2_pins: spi2-pins { 810 pins-spi { 811 pinmux = <PINMUX_GPIO79__FUNC_O_SPIM2_CSB>, 812 <PINMUX_GPIO80__FUNC_O_SPIM2_CLK>, 813 <PINMUX_GPIO81__FUNC_B0_SPIM2_MOSI>, 814 <PINMUX_GPIO82__FUNC_B0_SPIM2_MISO>; 815 bias-disable; 816 }; 817 }; 818 819 touch_pins: touch-pins { 820 pins-irq { 821 pinmux = <PINMUX_GPIO6__FUNC_B_GPIO6>; 822 input-enable; 823 bias-disable; 824 }; 825 826 pins-reset { 827 pinmux = <PINMUX_GPIO5__FUNC_B_GPIO5>; 828 output-high; 829 }; 830 }; 831 832 uart0_pins: uart0-pins { 833 pins { 834 pinmux = <PINMUX_GPIO31__FUNC_O_UTXD0>, 835 <PINMUX_GPIO32__FUNC_I1_URXD0>; 836 bias-pull-up; 837 }; 838 }; 839 840 uart1_pins: uart1-pins { 841 pins { 842 pinmux = <PINMUX_GPIO33__FUNC_O_UTXD1>, 843 <PINMUX_GPIO34__FUNC_I1_URXD1>; 844 bias-pull-up; 845 }; 846 }; 847 848 uart2_pins: uart2-pins { 849 pins { 850 pinmux = <PINMUX_GPIO35__FUNC_O_UTXD2>, 851 <PINMUX_GPIO36__FUNC_I1_URXD2>; 852 bias-pull-up; 853 }; 854 }; 855 856 usb_default_pins: usb-default-pins { 857 pins-iddig { 858 pinmux = <PINMUX_GPIO83__FUNC_B_GPIO83>; 859 input-enable; 860 bias-pull-up; 861 }; 862 863 pins-valid { 864 pinmux = <PINMUX_GPIO85__FUNC_I0_VBUSVALID>; 865 input-enable; 866 }; 867 868 pins-vbus { 869 pinmux = <PINMUX_GPIO84__FUNC_O_USB_DRVVBUS>; 870 output-high; 871 }; 872 873 }; 874 875 usb1_default_pins: usb1-default-pins { 876 pins-valid { 877 pinmux = <PINMUX_GPIO88__FUNC_I0_VBUSVALID_1P>; 878 input-enable; 879 }; 880 881 pins-usb-hub-3v3-en { 882 pinmux = <PINMUX_GPIO112__FUNC_B_GPIO112>; 883 output-high; 884 }; 885 }; 886 887 wifi_pwrseq_pins: wifi-pwrseq-pins { 888 pins-wifi-enable { 889 pinmux = <PINMUX_GPIO127__FUNC_B_GPIO127>; 890 output-low; 891 }; 892 }; 893}; 894 895ð { 896 phy-mode ="rgmii-id"; 897 phy-handle = <ðernet_phy0>; 898 pinctrl-names = "default", "sleep"; 899 pinctrl-0 = <ð_default_pins>; 900 pinctrl-1 = <ð_sleep_pins>; 901 mediatek,mac-wol; 902 snps,reset-gpio = <&pio 147 GPIO_ACTIVE_HIGH>; 903 snps,reset-delays-us = <0 10000 10000>; 904 status = "okay"; 905}; 906 907ð_mdio { 908 ethernet_phy0: ethernet-phy@1 { 909 compatible = "ethernet-phy-id001c.c916"; 910 reg = <0x1>; 911 }; 912}; 913 914&pmic { 915 interrupt-parent = <&pio>; 916 interrupts = <222 IRQ_TYPE_LEVEL_HIGH>; 917 918 mt6359keys: keys { 919 compatible = "mediatek,mt6359-keys"; 920 mediatek,long-press-mode = <1>; 921 power-off-time-sec = <0>; 922 923 power-key { 924 linux,keycodes = <KEY_POWER>; 925 wakeup-source; 926 }; 927 }; 928}; 929 930&scp { 931 memory-region = <&scp_mem>; 932 status = "okay"; 933}; 934 935&spi2 { 936 pinctrl-0 = <&spi2_pins>; 937 pinctrl-names = "default"; 938 mediatek,pad-select = <0>; 939 #address-cells = <1>; 940 #size-cells = <0>; 941 status = "okay"; 942}; 943 944&uart0 { 945 pinctrl-0 = <&uart0_pins>; 946 pinctrl-names = "default"; 947 status = "okay"; 948}; 949 950&uart1 { 951 pinctrl-0 = <&uart1_pins>; 952 pinctrl-names = "default"; 953 status = "okay"; 954}; 955 956&uart2 { 957 pinctrl-0 = <&uart2_pins>; 958 pinctrl-names = "default"; 959 status = "okay"; 960}; 961 962&u3phy0 { 963 status = "okay"; 964}; 965 966&u3phy1 { 967 status = "okay"; 968}; 969 970&u3phy2 { 971 status = "okay"; 972}; 973 974&xhci0 { 975 status = "okay"; 976 vusb33-supply = <&mt6359_vusb_ldo_reg>; 977}; 978 979&xhci1 { 980 status = "okay"; 981 vusb33-supply = <&mt6359_vusb_ldo_reg>; 982 #address-cells = <1>; 983 #size-cells = <0>; 984 985 hub_2_0: hub@1 { 986 compatible = "usb451,8025"; 987 reg = <1>; 988 peer-hub = <&hub_3_0>; 989 reset-gpios = <&pio 7 GPIO_ACTIVE_HIGH>; 990 vdd-supply = <&usb_hub_fixed_3v3>; 991 }; 992 993 hub_3_0: hub@2 { 994 compatible = "usb451,8027"; 995 reg = <2>; 996 peer-hub = <&hub_2_0>; 997 reset-gpios = <&pio 7 GPIO_ACTIVE_HIGH>; 998 vdd-supply = <&usb_hub_fixed_3v3>; 999 }; 1000}; 1001 1002&xhci2 { 1003 status = "okay"; 1004 vusb33-supply = <&mt6359_vusb_ldo_reg>; 1005 vbus-supply = <&sdio_fixed_3v3>; /* wifi_3v3 */ 1006}; 1007