xref: /linux/arch/arm64/boot/dts/mediatek/mt8188-evb.dts (revision 7f71507851fc7764b36a3221839607d3a45c2025) 
1// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2/*
3 * Copyright (C) 2023 MediaTek Inc.
4 */
5/dts-v1/;
6#include "mt8188.dtsi"
7#include "mt6359.dtsi"
8
9/ {
10	model = "MediaTek MT8188 evaluation board";
11	compatible = "mediatek,mt8188-evb", "mediatek,mt8188";
12
13	aliases {
14		serial0 = &uart0;
15		i2c0 = &i2c0;
16		i2c1 = &i2c1;
17		i2c2 = &i2c2;
18		i2c3 = &i2c3;
19		i2c4 = &i2c4;
20		i2c5 = &i2c5;
21		i2c6 = &i2c6;
22		mmc0 = &mmc0;
23	};
24
25	chosen: chosen {
26		stdout-path = "serial0:115200n8";
27	};
28
29	memory@40000000 {
30		device_type = "memory";
31		reg = <0 0x40000000 0 0x80000000>;
32	};
33
34	reserved_memory: reserved-memory {
35		#address-cells = <2>;
36		#size-cells = <2>;
37		ranges;
38
39		scp_mem_reserved: memory@50000000 {
40			compatible = "shared-dma-pool";
41			reg = <0 0x50000000 0 0x2900000>;
42			no-map;
43		};
44	};
45};
46
47&auxadc {
48	status = "okay";
49};
50
51&i2c0 {
52	pinctrl-names = "default";
53	pinctrl-0 = <&i2c0_pins>;
54	clock-frequency = <400000>;
55	status = "okay";
56};
57
58&i2c1 {
59	pinctrl-names = "default";
60	pinctrl-0 = <&i2c1_pins>;
61	clock-frequency = <400000>;
62	status = "okay";
63};
64
65&i2c2 {
66	pinctrl-names = "default";
67	pinctrl-0 = <&i2c2_pins>;
68	clock-frequency = <400000>;
69	status = "okay";
70};
71
72&i2c3 {
73	pinctrl-names = "default";
74	pinctrl-0 = <&i2c3_pins>;
75	clock-frequency = <400000>;
76	status = "okay";
77};
78
79&i2c4 {
80	pinctrl-names = "default";
81	pinctrl-0 = <&i2c4_pins>;
82	clock-frequency = <400000>;
83	status = "okay";
84};
85
86&i2c5 {
87	pinctrl-names = "default";
88	pinctrl-0 = <&i2c5_pins>;
89	clock-frequency = <400000>;
90	status = "okay";
91};
92
93&i2c6 {
94	pinctrl-names = "default";
95	pinctrl-0 = <&i2c6_pins>;
96	clock-frequency = <400000>;
97	status = "okay";
98};
99
100&mmc0 {
101	bus-width = <8>;
102	hs400-ds-delay = <0x1481b>;
103	max-frequency = <200000000>;
104
105	cap-mmc-highspeed;
106	mmc-hs200-1_8v;
107	mmc-hs400-1_8v;
108	supports-cqe;
109	cap-mmc-hw-reset;
110	no-sdio;
111	no-sd;
112	non-removable;
113
114	vmmc-supply = <&mt6359_vemc_1_ldo_reg>;
115	vqmmc-supply = <&mt6359_vufs_ldo_reg>;
116
117	pinctrl-names = "default", "state_uhs";
118	pinctrl-0 = <&mmc0_default_pins>;
119	pinctrl-1 = <&mmc0_uhs_pins>;
120
121	status = "okay";
122};
123
124&mt6359_vcore_buck_reg {
125	regulator-always-on;
126};
127
128&mt6359_vgpu11_buck_reg {
129	regulator-always-on;
130};
131
132&mt6359_vpu_buck_reg {
133	regulator-always-on;
134};
135
136&mt6359_vrf12_ldo_reg {
137	regulator-always-on;
138};
139
140&nor_flash {
141	pinctrl-names = "default";
142	pinctrl-0 = <&nor_pins_default>;
143	status = "okay";
144
145	flash@0 {
146		compatible = "jedec,spi-nor";
147		reg = <0>;
148		spi-max-frequency = <52000000>;
149	};
150};
151
152&pio {
153	adsp_uart_pins: adsp-uart-pins {
154		pins-tx-rx {
155			pinmux = <PINMUX_GPIO35__FUNC_O_ADSP_UTXD0>,
156				 <PINMUX_GPIO36__FUNC_I1_ADSP_URXD0>;
157		};
158	};
159
160	i2c0_pins: i2c0-pins {
161		pins-bus {
162			pinmux = <PINMUX_GPIO56__FUNC_B1_SDA0>,
163				 <PINMUX_GPIO55__FUNC_B1_SCL0>;
164			bias-pull-up = <MTK_PULL_SET_RSEL_011>;
165		};
166	};
167
168	i2c1_pins: i2c1-pins {
169		pins-bus {
170			pinmux = <PINMUX_GPIO58__FUNC_B1_SDA1>,
171				 <PINMUX_GPIO57__FUNC_B1_SCL1>;
172			bias-pull-up = <MTK_PULL_SET_RSEL_011>;
173		};
174	};
175
176	i2c2_pins: i2c2-pins {
177		pins-bus {
178			pinmux = <PINMUX_GPIO60__FUNC_B1_SDA2>,
179				 <PINMUX_GPIO59__FUNC_B1_SCL2>;
180			bias-pull-up = <MTK_PULL_SET_RSEL_011>;
181		};
182	};
183
184	i2c3_pins: i2c3-pins {
185		pins-bus {
186			pinmux = <PINMUX_GPIO62__FUNC_B1_SDA3>,
187				 <PINMUX_GPIO61__FUNC_B1_SCL3>;
188			bias-pull-up = <MTK_PULL_SET_RSEL_011>;
189		};
190	};
191
192	i2c4_pins: i2c4-pins {
193		pins-bus {
194			pinmux = <PINMUX_GPIO64__FUNC_B1_SDA4>,
195				 <PINMUX_GPIO63__FUNC_B1_SCL4>;
196			bias-pull-up = <MTK_PULL_SET_RSEL_011>;
197		};
198	};
199
200	i2c5_pins: i2c5-pins {
201		pins-bus {
202			pinmux = <PINMUX_GPIO66__FUNC_B1_SDA5>,
203				 <PINMUX_GPIO65__FUNC_B1_SCL5>;
204			bias-pull-up = <MTK_PULL_SET_RSEL_011>;
205		};
206	};
207
208	i2c6_pins: i2c6-pins {
209		pins-bus {
210			pinmux = <PINMUX_GPIO68__FUNC_B1_SDA6>,
211				 <PINMUX_GPIO67__FUNC_B1_SCL6>;
212			bias-pull-up = <MTK_PULL_SET_RSEL_011>;
213		};
214	};
215
216	mmc0_default_pins: mmc0-default-pins {
217		pins-cmd-dat {
218			pinmux = <PINMUX_GPIO161__FUNC_B1_MSDC0_DAT0>,
219				 <PINMUX_GPIO160__FUNC_B1_MSDC0_DAT1>,
220				 <PINMUX_GPIO159__FUNC_B1_MSDC0_DAT2>,
221				 <PINMUX_GPIO158__FUNC_B1_MSDC0_DAT3>,
222				 <PINMUX_GPIO154__FUNC_B1_MSDC0_DAT4>,
223				 <PINMUX_GPIO153__FUNC_B1_MSDC0_DAT5>,
224				 <PINMUX_GPIO152__FUNC_B1_MSDC0_DAT6>,
225				 <PINMUX_GPIO151__FUNC_B1_MSDC0_DAT7>,
226				 <PINMUX_GPIO156__FUNC_B1_MSDC0_CMD>;
227			input-enable;
228			drive-strength = <6>;
229			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
230		};
231
232		pins-clk {
233			pinmux = <PINMUX_GPIO157__FUNC_B1_MSDC0_CLK>;
234			drive-strength = <6>;
235			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
236		};
237
238		pins-rst {
239			pinmux = <PINMUX_GPIO155__FUNC_O_MSDC0_RSTB>;
240			drive-strength = <6>;
241			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
242		};
243	};
244
245	mmc0_uhs_pins: mmc0-uhs-pins {
246		pins-cmd-dat {
247			pinmux = <PINMUX_GPIO161__FUNC_B1_MSDC0_DAT0>,
248				 <PINMUX_GPIO160__FUNC_B1_MSDC0_DAT1>,
249				 <PINMUX_GPIO159__FUNC_B1_MSDC0_DAT2>,
250				 <PINMUX_GPIO158__FUNC_B1_MSDC0_DAT3>,
251				 <PINMUX_GPIO154__FUNC_B1_MSDC0_DAT4>,
252				 <PINMUX_GPIO153__FUNC_B1_MSDC0_DAT5>,
253				 <PINMUX_GPIO152__FUNC_B1_MSDC0_DAT6>,
254				 <PINMUX_GPIO151__FUNC_B1_MSDC0_DAT7>,
255				 <PINMUX_GPIO156__FUNC_B1_MSDC0_CMD>;
256			input-enable;
257			drive-strength = <8>;
258			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
259		};
260
261		pins-clk-ds {
262			pinmux = <PINMUX_GPIO157__FUNC_B1_MSDC0_CLK>,
263				 <PINMUX_GPIO162__FUNC_B0_MSDC0_DSL>;
264			drive-strength = <8>;
265			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
266		};
267
268		pins-rst {
269			pinmux = <PINMUX_GPIO155__FUNC_O_MSDC0_RSTB>;
270			drive-strength = <8>;
271			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
272		};
273	};
274
275	nor_pins_default: nor-pins {
276		pins-io-ck {
277			pinmux = <PINMUX_GPIO127__FUNC_B0_SPINOR_IO0>,
278				 <PINMUX_GPIO125__FUNC_O_SPINOR_CK>,
279				 <PINMUX_GPIO128__FUNC_B0_SPINOR_IO1>;
280			bias-pull-down;
281		};
282
283		pins-io-cs {
284			pinmux = <PINMUX_GPIO126__FUNC_O_SPINOR_CS>,
285				 <PINMUX_GPIO129__FUNC_B0_SPINOR_IO2>,
286				 <PINMUX_GPIO130__FUNC_B0_SPINOR_IO3>;
287			bias-pull-up;
288		};
289	};
290
291	spi0_pins: spi0-pins {
292		pins-spi {
293			pinmux = <PINMUX_GPIO69__FUNC_O_SPIM0_CSB>,
294				 <PINMUX_GPIO70__FUNC_O_SPIM0_CLK>,
295				 <PINMUX_GPIO71__FUNC_B0_SPIM0_MOSI>,
296				 <PINMUX_GPIO72__FUNC_B0_SPIM0_MISO>;
297			bias-disable;
298		};
299	};
300
301	spi1_pins: spi1-pins {
302		pins-spi {
303			pinmux = <PINMUX_GPIO75__FUNC_O_SPIM1_CSB>,
304				 <PINMUX_GPIO76__FUNC_O_SPIM1_CLK>,
305				 <PINMUX_GPIO77__FUNC_B0_SPIM1_MOSI>,
306				 <PINMUX_GPIO78__FUNC_B0_SPIM1_MISO>;
307			bias-disable;
308		};
309	};
310
311	spi2_pins: spi2-pins {
312		pins-spi {
313			pinmux = <PINMUX_GPIO79__FUNC_O_SPIM2_CSB>,
314				 <PINMUX_GPIO80__FUNC_O_SPIM2_CLK>,
315				 <PINMUX_GPIO81__FUNC_B0_SPIM2_MOSI>,
316				 <PINMUX_GPIO82__FUNC_B0_SPIM2_MISO>;
317			bias-disable;
318		};
319	};
320
321	uart0_pins: uart0-pins {
322		pins-rx-tx {
323			pinmux = <PINMUX_GPIO31__FUNC_O_UTXD0>,
324				 <PINMUX_GPIO32__FUNC_I1_URXD0>;
325			bias-pull-up;
326		};
327	};
328};
329
330&pmic {
331	interrupts-extended = <&pio 222 IRQ_TYPE_LEVEL_HIGH>;
332};
333
334&scp {
335	memory-region = <&scp_mem_reserved>;
336	status = "okay";
337};
338
339&spi0 {
340	pinctrl-names = "default";
341	pinctrl-0 = <&spi0_pins>;
342	status = "okay";
343};
344
345&spi1 {
346	pinctrl-names = "default";
347	pinctrl-0 = <&spi1_pins>;
348	status = "okay";
349};
350
351&spi2 {
352	pinctrl-names = "default";
353	pinctrl-0 = <&spi2_pins>;
354	status = "okay";
355};
356
357&u3phy0 {
358	status = "okay";
359};
360
361&u3phy1 {
362	status = "okay";
363};
364
365&u3phy2 {
366	status = "okay";
367};
368
369&uart0 {
370	pinctrl-names = "default";
371	pinctrl-0 = <&uart0_pins>;
372	status = "okay";
373};
374
375&xhci0 {
376	status = "okay";
377};
378
379&xhci1 {
380	status = "okay";
381};
382
383&xhci2 {
384	status = "okay";
385};
386