1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Copyright (c) 2021 BayLibre, SAS. 4 * Author: Fabien Parent <fparent@baylibre.com> 5 */ 6 7/dts-v1/; 8 9#include <dt-bindings/gpio/gpio.h> 10#include <dt-bindings/input/input.h> 11#include "mt8183.dtsi" 12#include "mt6358.dtsi" 13 14/ { 15 model = "Pumpkin MT8183"; 16 compatible = "mediatek,mt8183-pumpkin", "mediatek,mt8183"; 17 18 aliases { 19 serial0 = &uart0; 20 }; 21 22 memory@40000000 { 23 device_type = "memory"; 24 reg = <0 0x40000000 0 0x80000000>; 25 }; 26 27 chosen { 28 stdout-path = "serial0:921600n8"; 29 }; 30 31 reserved-memory { 32 #address-cells = <2>; 33 #size-cells = <2>; 34 ranges; 35 36 scp_mem_reserved: scp-mem@50000000 { 37 compatible = "shared-dma-pool"; 38 reg = <0 0x50000000 0 0x2900000>; 39 no-map; 40 }; 41 }; 42 43 leds { 44 compatible = "gpio-leds"; 45 46 led-red { 47 label = "red"; 48 gpios = <&pio 155 GPIO_ACTIVE_HIGH>; 49 default-state = "off"; 50 }; 51 52 led-green { 53 label = "green"; 54 gpios = <&pio 156 GPIO_ACTIVE_HIGH>; 55 default-state = "off"; 56 }; 57 }; 58 59 thermistor { 60 compatible = "murata,ncp03wf104"; 61 pullup-uv = <1800000>; 62 pullup-ohm = <390000>; 63 pulldown-ohm = <0>; 64 io-channels = <&auxadc 0>; 65 }; 66 67 connector { 68 compatible = "hdmi-connector"; 69 label = "hdmi"; 70 type = "d"; 71 72 port { 73 hdmi_connector_in: endpoint { 74 remote-endpoint = <&hdmi_connector_out>; 75 }; 76 }; 77 }; 78}; 79 80&auxadc { 81 status = "okay"; 82}; 83 84&gpu { 85 mali-supply = <&mt6358_vgpu_reg>; 86}; 87 88&i2c0 { 89 pinctrl-names = "default"; 90 pinctrl-0 = <&i2c_pins_0>; 91 status = "okay"; 92 clock-frequency = <100000>; 93}; 94 95&i2c1 { 96 pinctrl-names = "default"; 97 pinctrl-0 = <&i2c_pins_1>; 98 status = "okay"; 99 clock-frequency = <100000>; 100}; 101 102&i2c2 { 103 pinctrl-names = "default"; 104 pinctrl-0 = <&i2c_pins_2>; 105 status = "okay"; 106 clock-frequency = <100000>; 107}; 108 109&i2c3 { 110 pinctrl-names = "default"; 111 pinctrl-0 = <&i2c_pins_3>; 112 status = "okay"; 113 clock-frequency = <100000>; 114}; 115 116&i2c4 { 117 pinctrl-names = "default"; 118 pinctrl-0 = <&i2c_pins_4>; 119 status = "okay"; 120 clock-frequency = <100000>; 121}; 122 123&i2c5 { 124 pinctrl-names = "default"; 125 pinctrl-0 = <&i2c_pins_5>; 126 status = "okay"; 127 clock-frequency = <100000>; 128}; 129 130&i2c6 { 131 pinctrl-names = "default"; 132 pinctrl-0 = <&i2c6_pins>; 133 status = "okay"; 134 clock-frequency = <100000>; 135 #address-cells = <1>; 136 #size-cells = <0>; 137 138 it66121hdmitx: hdmitx@4c { 139 compatible = "ite,it66121"; 140 reg = <0x4c>; 141 pinctrl-names = "default"; 142 pinctrl-0 = <&ite_pins>; 143 reset-gpios = <&pio 160 GPIO_ACTIVE_LOW>; 144 interrupt-parent = <&pio>; 145 interrupts = <4 IRQ_TYPE_LEVEL_LOW>; 146 vcn33-supply = <&mt6358_vcn33_reg>; 147 vcn18-supply = <&mt6358_vcn18_reg>; 148 vrf12-supply = <&mt6358_vrf12_reg>; 149 150 ports { 151 #address-cells = <1>; 152 #size-cells = <0>; 153 154 port@0 { 155 reg = <0>; 156 157 it66121_in: endpoint { 158 bus-width = <12>; 159 remote-endpoint = <&dpi_out>; 160 }; 161 }; 162 163 port@1 { 164 reg = <1>; 165 166 hdmi_connector_out: endpoint { 167 remote-endpoint = <&hdmi_connector_in>; 168 }; 169 }; 170 }; 171 }; 172}; 173 174&keyboard { 175 pinctrl-names = "default"; 176 pinctrl-0 = <&keyboard_pins>; 177 status = "okay"; 178 linux,keymap = <MATRIX_KEY(0x00, 0x00, KEY_VOLUMEDOWN) 179 MATRIX_KEY(0x01, 0x00, KEY_VOLUMEUP)>; 180 keypad,num-rows = <2>; 181 keypad,num-columns = <1>; 182 debounce-delay-ms = <32>; 183 mediatek,keys-per-group = <2>; 184}; 185 186&mmc0 { 187 status = "okay"; 188 pinctrl-names = "default", "state_uhs"; 189 pinctrl-0 = <&mmc0_pins_default>; 190 pinctrl-1 = <&mmc0_pins_uhs>; 191 bus-width = <8>; 192 max-frequency = <200000000>; 193 cap-mmc-highspeed; 194 mmc-hs200-1_8v; 195 mmc-hs400-1_8v; 196 cap-mmc-hw-reset; 197 no-sdio; 198 no-sd; 199 hs400-ds-delay = <0x12814>; 200 vmmc-supply = <&mt6358_vemc_reg>; 201 vqmmc-supply = <&mt6358_vio18_reg>; 202 assigned-clocks = <&topckgen CLK_TOP_MUX_MSDC50_0>; 203 assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_CK>; 204 non-removable; 205}; 206 207&mmc1 { 208 status = "okay"; 209 pinctrl-names = "default", "state_uhs"; 210 pinctrl-0 = <&mmc1_pins_default>; 211 pinctrl-1 = <&mmc1_pins_uhs>; 212 bus-width = <4>; 213 max-frequency = <200000000>; 214 cap-sd-highspeed; 215 sd-uhs-sdr50; 216 sd-uhs-sdr104; 217 cap-sdio-irq; 218 no-mmc; 219 no-sd; 220 vmmc-supply = <&mt6358_vmch_reg>; 221 vqmmc-supply = <&mt6358_vmc_reg>; 222 keep-power-in-suspend; 223 wakeup-source; 224 non-removable; 225}; 226 227&mt6358_vgpu_reg { 228 regulator-min-microvolt = <625000>; 229 regulator-max-microvolt = <900000>; 230 231 regulator-coupled-with = <&mt6358_vsram_gpu_reg>; 232 regulator-coupled-max-spread = <100000>; 233}; 234 235&mt6358_vsram_gpu_reg { 236 regulator-min-microvolt = <850000>; 237 regulator-max-microvolt = <1000000>; 238 239 regulator-coupled-with = <&mt6358_vgpu_reg>; 240 regulator-coupled-max-spread = <100000>; 241}; 242 243&pio { 244 i2c_pins_0: i2c0 { 245 pins_i2c { 246 pinmux = <PINMUX_GPIO82__FUNC_SDA0>, 247 <PINMUX_GPIO83__FUNC_SCL0>; 248 mediatek,pull-up-adv = <3>; 249 }; 250 }; 251 252 i2c_pins_1: i2c1 { 253 pins_i2c { 254 pinmux = <PINMUX_GPIO81__FUNC_SDA1>, 255 <PINMUX_GPIO84__FUNC_SCL1>; 256 mediatek,pull-up-adv = <3>; 257 }; 258 }; 259 260 i2c_pins_2: i2c2 { 261 pins_i2c { 262 pinmux = <PINMUX_GPIO103__FUNC_SCL2>, 263 <PINMUX_GPIO104__FUNC_SDA2>; 264 mediatek,pull-up-adv = <3>; 265 }; 266 }; 267 268 i2c_pins_3: i2c3 { 269 pins_i2c { 270 pinmux = <PINMUX_GPIO50__FUNC_SCL3>, 271 <PINMUX_GPIO51__FUNC_SDA3>; 272 mediatek,pull-up-adv = <3>; 273 }; 274 }; 275 276 i2c_pins_4: i2c4 { 277 pins_i2c { 278 pinmux = <PINMUX_GPIO105__FUNC_SCL4>, 279 <PINMUX_GPIO106__FUNC_SDA4>; 280 mediatek,pull-up-adv = <3>; 281 }; 282 }; 283 284 i2c_pins_5: i2c5 { 285 pins_i2c { 286 pinmux = <PINMUX_GPIO48__FUNC_SCL5>, 287 <PINMUX_GPIO49__FUNC_SDA5>; 288 mediatek,pull-up-adv = <3>; 289 }; 290 }; 291 292 i2c6_pins: i2c6 { 293 pins_cmd_dat { 294 pinmux = <PINMUX_GPIO113__FUNC_SCL6>, 295 <PINMUX_GPIO114__FUNC_SDA6>; 296 mediatek,pull-up-adv = <3>; 297 }; 298 }; 299 300 keyboard_pins: keyboard { 301 pins_keyboard { 302 pinmux = <PINMUX_GPIO91__FUNC_KPROW1>, 303 <PINMUX_GPIO92__FUNC_KPROW0>, 304 <PINMUX_GPIO93__FUNC_KPCOL0>; 305 }; 306 }; 307 308 mmc0_pins_default: mmc0-pins-default { 309 pins_cmd_dat { 310 pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>, 311 <PINMUX_GPIO128__FUNC_MSDC0_DAT1>, 312 <PINMUX_GPIO125__FUNC_MSDC0_DAT2>, 313 <PINMUX_GPIO132__FUNC_MSDC0_DAT3>, 314 <PINMUX_GPIO126__FUNC_MSDC0_DAT4>, 315 <PINMUX_GPIO129__FUNC_MSDC0_DAT5>, 316 <PINMUX_GPIO127__FUNC_MSDC0_DAT6>, 317 <PINMUX_GPIO130__FUNC_MSDC0_DAT7>, 318 <PINMUX_GPIO122__FUNC_MSDC0_CMD>; 319 input-enable; 320 drive-strength = <MTK_DRIVE_14mA>; 321 mediatek,pull-up-adv = <01>; 322 }; 323 324 pins_clk { 325 pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>; 326 drive-strength = <MTK_DRIVE_14mA>; 327 mediatek,pull-down-adv = <10>; 328 }; 329 330 pins_rst { 331 pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>; 332 drive-strength = <MTK_DRIVE_14mA>; 333 mediatek,pull-down-adv = <01>; 334 }; 335 }; 336 337 mmc0_pins_uhs: mmc0-pins-uhs { 338 pins_cmd_dat { 339 pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>, 340 <PINMUX_GPIO128__FUNC_MSDC0_DAT1>, 341 <PINMUX_GPIO125__FUNC_MSDC0_DAT2>, 342 <PINMUX_GPIO132__FUNC_MSDC0_DAT3>, 343 <PINMUX_GPIO126__FUNC_MSDC0_DAT4>, 344 <PINMUX_GPIO129__FUNC_MSDC0_DAT5>, 345 <PINMUX_GPIO127__FUNC_MSDC0_DAT6>, 346 <PINMUX_GPIO130__FUNC_MSDC0_DAT7>, 347 <PINMUX_GPIO122__FUNC_MSDC0_CMD>; 348 input-enable; 349 drive-strength = <MTK_DRIVE_14mA>; 350 mediatek,pull-up-adv = <01>; 351 }; 352 353 pins_clk { 354 pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>; 355 drive-strength = <MTK_DRIVE_14mA>; 356 mediatek,pull-down-adv = <10>; 357 }; 358 359 pins_ds { 360 pinmux = <PINMUX_GPIO131__FUNC_MSDC0_DSL>; 361 drive-strength = <MTK_DRIVE_14mA>; 362 mediatek,pull-down-adv = <10>; 363 }; 364 365 pins_rst { 366 pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>; 367 drive-strength = <MTK_DRIVE_14mA>; 368 mediatek,pull-up-adv = <01>; 369 }; 370 }; 371 372 mmc1_pins_default: mmc1-pins-default { 373 pins_cmd_dat { 374 pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>, 375 <PINMUX_GPIO32__FUNC_MSDC1_DAT0>, 376 <PINMUX_GPIO34__FUNC_MSDC1_DAT1>, 377 <PINMUX_GPIO33__FUNC_MSDC1_DAT2>, 378 <PINMUX_GPIO30__FUNC_MSDC1_DAT3>; 379 input-enable; 380 mediatek,pull-up-adv = <10>; 381 }; 382 383 pins_clk { 384 pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>; 385 input-enable; 386 mediatek,pull-down-adv = <10>; 387 }; 388 389 pins_pmu { 390 pinmux = <PINMUX_GPIO178__FUNC_GPIO178>; 391 output-high; 392 }; 393 }; 394 395 mmc1_pins_uhs: mmc1-pins-uhs { 396 pins_cmd_dat { 397 pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>, 398 <PINMUX_GPIO32__FUNC_MSDC1_DAT0>, 399 <PINMUX_GPIO34__FUNC_MSDC1_DAT1>, 400 <PINMUX_GPIO33__FUNC_MSDC1_DAT2>, 401 <PINMUX_GPIO30__FUNC_MSDC1_DAT3>; 402 drive-strength = <6>; 403 input-enable; 404 mediatek,pull-up-adv = <10>; 405 }; 406 407 pins_clk { 408 pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>; 409 drive-strength = <8>; 410 mediatek,pull-down-adv = <10>; 411 input-enable; 412 }; 413 }; 414 415 ite_pins: ite-pins { 416 pins-irq { 417 pinmux = <PINMUX_GPIO4__FUNC_GPIO4>; 418 input-enable; 419 bias-pull-up; 420 }; 421 422 pins-rst { 423 pinmux = <PINMUX_GPIO160__FUNC_GPIO160>; 424 output-high; 425 }; 426 }; 427 428 dpi_func_pins: dpi-func-pins { 429 pins-dpi { 430 pinmux = <PINMUX_GPIO12__FUNC_I2S5_BCK>, 431 <PINMUX_GPIO46__FUNC_I2S5_LRCK>, 432 <PINMUX_GPIO47__FUNC_I2S5_DO>, 433 <PINMUX_GPIO13__FUNC_DBPI_D0>, 434 <PINMUX_GPIO14__FUNC_DBPI_D1>, 435 <PINMUX_GPIO15__FUNC_DBPI_D2>, 436 <PINMUX_GPIO16__FUNC_DBPI_D3>, 437 <PINMUX_GPIO17__FUNC_DBPI_D4>, 438 <PINMUX_GPIO18__FUNC_DBPI_D5>, 439 <PINMUX_GPIO19__FUNC_DBPI_D6>, 440 <PINMUX_GPIO20__FUNC_DBPI_D7>, 441 <PINMUX_GPIO21__FUNC_DBPI_D8>, 442 <PINMUX_GPIO22__FUNC_DBPI_D9>, 443 <PINMUX_GPIO23__FUNC_DBPI_D10>, 444 <PINMUX_GPIO24__FUNC_DBPI_D11>, 445 <PINMUX_GPIO25__FUNC_DBPI_HSYNC>, 446 <PINMUX_GPIO26__FUNC_DBPI_VSYNC>, 447 <PINMUX_GPIO27__FUNC_DBPI_DE>, 448 <PINMUX_GPIO28__FUNC_DBPI_CK>; 449 }; 450 }; 451 452 dpi_idle_pins: dpi-idle-pins { 453 pins-idle { 454 pinmux = <PINMUX_GPIO12__FUNC_GPIO12>, 455 <PINMUX_GPIO46__FUNC_GPIO46>, 456 <PINMUX_GPIO47__FUNC_GPIO47>, 457 <PINMUX_GPIO13__FUNC_GPIO13>, 458 <PINMUX_GPIO14__FUNC_GPIO14>, 459 <PINMUX_GPIO15__FUNC_GPIO15>, 460 <PINMUX_GPIO16__FUNC_GPIO16>, 461 <PINMUX_GPIO17__FUNC_GPIO17>, 462 <PINMUX_GPIO18__FUNC_GPIO18>, 463 <PINMUX_GPIO19__FUNC_GPIO19>, 464 <PINMUX_GPIO20__FUNC_GPIO20>, 465 <PINMUX_GPIO21__FUNC_GPIO21>, 466 <PINMUX_GPIO22__FUNC_GPIO22>, 467 <PINMUX_GPIO23__FUNC_GPIO23>, 468 <PINMUX_GPIO24__FUNC_GPIO24>, 469 <PINMUX_GPIO25__FUNC_GPIO25>, 470 <PINMUX_GPIO26__FUNC_GPIO26>, 471 <PINMUX_GPIO27__FUNC_GPIO27>, 472 <PINMUX_GPIO28__FUNC_GPIO28>; 473 }; 474 }; 475}; 476 477&pmic { 478 interrupts-extended = <&pio 182 IRQ_TYPE_LEVEL_HIGH>; 479}; 480 481&mfg { 482 domain-supply = <&mt6358_vgpu_reg>; 483}; 484 485&cpu0 { 486 proc-supply = <&mt6358_vproc12_reg>; 487}; 488 489&cpu1 { 490 proc-supply = <&mt6358_vproc12_reg>; 491}; 492 493&cpu2 { 494 proc-supply = <&mt6358_vproc12_reg>; 495}; 496 497&cpu3 { 498 proc-supply = <&mt6358_vproc12_reg>; 499}; 500 501&cpu4 { 502 proc-supply = <&mt6358_vproc11_reg>; 503}; 504 505&cpu5 { 506 proc-supply = <&mt6358_vproc11_reg>; 507}; 508 509&cpu6 { 510 proc-supply = <&mt6358_vproc11_reg>; 511}; 512 513&cpu7 { 514 proc-supply = <&mt6358_vproc11_reg>; 515}; 516 517&uart0 { 518 status = "okay"; 519}; 520 521&scp { 522 status = "okay"; 523}; 524 525&dsi0 { 526 status = "disabled"; 527}; 528 529&dpi0 { 530 pinctrl-names = "default", "sleep"; 531 pinctrl-0 = <&dpi_func_pins>; 532 pinctrl-1 = <&dpi_idle_pins>; 533 status = "okay"; 534 535 port { 536 dpi_out: endpoint { 537 remote-endpoint = <&it66121_in>; 538 }; 539 }; 540}; 541