xref: /linux/arch/arm64/boot/dts/mediatek/mt8183-pumpkin.dts (revision 2a906db2824b75444982f5e9df870106982afca8) 
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (c) 2021 BayLibre, SAS.
4 * Author: Fabien Parent <fparent@baylibre.com>
5 */
6
7/dts-v1/;
8
9#include <dt-bindings/gpio/gpio.h>
10#include "mt8183.dtsi"
11#include "mt6358.dtsi"
12
13/ {
14	model = "Pumpkin MT8183";
15	compatible = "mediatek,mt8183-pumpkin", "mediatek,mt8183";
16
17	aliases {
18		serial0 = &uart0;
19	};
20
21	memory@40000000 {
22		device_type = "memory";
23		reg = <0 0x40000000 0 0x80000000>;
24	};
25
26	chosen {
27		stdout-path = "serial0:921600n8";
28	};
29
30	reserved-memory {
31		#address-cells = <2>;
32		#size-cells = <2>;
33		ranges;
34
35		scp_mem_reserved: scp_mem_region@50000000 {
36			compatible = "shared-dma-pool";
37			reg = <0 0x50000000 0 0x2900000>;
38			no-map;
39		};
40	};
41
42	leds {
43		compatible = "gpio-leds";
44
45		led-red {
46			label = "red";
47			gpios = <&pio 155 GPIO_ACTIVE_HIGH>;
48			default-state = "off";
49		};
50
51		led-green {
52			label = "green";
53			gpios = <&pio 156 GPIO_ACTIVE_HIGH>;
54			default-state = "off";
55		};
56	};
57
58	thermistor {
59		compatible = "murata,ncp03wf104";
60		pullup-uv = <1800000>;
61		pullup-ohm = <390000>;
62		pulldown-ohm = <0>;
63		io-channels = <&auxadc 0>;
64	};
65};
66
67&auxadc {
68	status = "okay";
69};
70
71&gpu {
72	mali-supply = <&mt6358_vgpu_reg>;
73	sram-supply = <&mt6358_vsram_gpu_reg>;
74};
75
76&i2c0 {
77	pinctrl-names = "default";
78	pinctrl-0 = <&i2c_pins_0>;
79	status = "okay";
80	clock-frequency = <100000>;
81};
82
83&i2c1 {
84	pinctrl-names = "default";
85	pinctrl-0 = <&i2c_pins_1>;
86	status = "okay";
87	clock-frequency = <100000>;
88};
89
90&i2c2 {
91	pinctrl-names = "default";
92	pinctrl-0 = <&i2c_pins_2>;
93	status = "okay";
94	clock-frequency = <100000>;
95};
96
97&i2c3 {
98	pinctrl-names = "default";
99	pinctrl-0 = <&i2c_pins_3>;
100	status = "okay";
101	clock-frequency = <100000>;
102};
103
104&i2c4 {
105	pinctrl-names = "default";
106	pinctrl-0 = <&i2c_pins_4>;
107	status = "okay";
108	clock-frequency = <100000>;
109};
110
111&i2c5 {
112	pinctrl-names = "default";
113	pinctrl-0 = <&i2c_pins_5>;
114	status = "okay";
115	clock-frequency = <100000>;
116};
117
118&i2c6 {
119	pinctrl-names = "default";
120	pinctrl-0 = <&i2c6_pins>;
121	status = "okay";
122	clock-frequency = <100000>;
123};
124
125&mmc0 {
126	status = "okay";
127	pinctrl-names = "default", "state_uhs";
128	pinctrl-0 = <&mmc0_pins_default>;
129	pinctrl-1 = <&mmc0_pins_uhs>;
130	bus-width = <8>;
131	max-frequency = <200000000>;
132	cap-mmc-highspeed;
133	mmc-hs200-1_8v;
134	mmc-hs400-1_8v;
135	cap-mmc-hw-reset;
136	no-sdio;
137	no-sd;
138	hs400-ds-delay = <0x12814>;
139	vmmc-supply = <&mt6358_vemc_reg>;
140	vqmmc-supply = <&mt6358_vio18_reg>;
141	assigned-clocks = <&topckgen CLK_TOP_MUX_MSDC50_0>;
142	assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_CK>;
143	non-removable;
144};
145
146&mmc1 {
147	status = "okay";
148	pinctrl-names = "default", "state_uhs";
149	pinctrl-0 = <&mmc1_pins_default>;
150	pinctrl-1 = <&mmc1_pins_uhs>;
151	bus-width = <4>;
152	max-frequency = <200000000>;
153	cap-sd-highspeed;
154	sd-uhs-sdr50;
155	sd-uhs-sdr104;
156	cap-sdio-irq;
157	no-mmc;
158	no-sd;
159	vmmc-supply = <&mt6358_vmch_reg>;
160	vqmmc-supply = <&mt6358_vmc_reg>;
161	keep-power-in-suspend;
162	wakeup-source;
163	non-removable;
164};
165
166&pio {
167	i2c_pins_0: i2c0 {
168		pins_i2c{
169			pinmux = <PINMUX_GPIO82__FUNC_SDA0>,
170				 <PINMUX_GPIO83__FUNC_SCL0>;
171			mediatek,pull-up-adv = <3>;
172			mediatek,drive-strength-adv = <00>;
173		};
174	};
175
176	i2c_pins_1: i2c1 {
177		pins_i2c{
178			pinmux = <PINMUX_GPIO81__FUNC_SDA1>,
179				 <PINMUX_GPIO84__FUNC_SCL1>;
180			mediatek,pull-up-adv = <3>;
181			mediatek,drive-strength-adv = <00>;
182		};
183	};
184
185	i2c_pins_2: i2c2 {
186		pins_i2c{
187			pinmux = <PINMUX_GPIO103__FUNC_SCL2>,
188				 <PINMUX_GPIO104__FUNC_SDA2>;
189			mediatek,pull-up-adv = <3>;
190			mediatek,drive-strength-adv = <00>;
191		};
192	};
193
194	i2c_pins_3: i2c3 {
195		pins_i2c{
196			pinmux = <PINMUX_GPIO50__FUNC_SCL3>,
197				 <PINMUX_GPIO51__FUNC_SDA3>;
198			mediatek,pull-up-adv = <3>;
199			mediatek,drive-strength-adv = <00>;
200		};
201	};
202
203	i2c_pins_4: i2c4 {
204		pins_i2c{
205			pinmux = <PINMUX_GPIO105__FUNC_SCL4>,
206				 <PINMUX_GPIO106__FUNC_SDA4>;
207			mediatek,pull-up-adv = <3>;
208			mediatek,drive-strength-adv = <00>;
209		};
210	};
211
212	i2c_pins_5: i2c5 {
213		pins_i2c{
214			pinmux = <PINMUX_GPIO48__FUNC_SCL5>,
215				 <PINMUX_GPIO49__FUNC_SDA5>;
216			mediatek,pull-up-adv = <3>;
217			mediatek,drive-strength-adv = <00>;
218		};
219	};
220
221	i2c6_pins: i2c6 {
222		pins_cmd_dat {
223			pinmux = <PINMUX_GPIO113__FUNC_SCL6>,
224				 <PINMUX_GPIO114__FUNC_SDA6>;
225			mediatek,pull-up-adv = <3>;
226		};
227	};
228
229	mmc0_pins_default: mmc0-pins-default {
230		pins_cmd_dat {
231			pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>,
232				 <PINMUX_GPIO128__FUNC_MSDC0_DAT1>,
233				 <PINMUX_GPIO125__FUNC_MSDC0_DAT2>,
234				 <PINMUX_GPIO132__FUNC_MSDC0_DAT3>,
235				 <PINMUX_GPIO126__FUNC_MSDC0_DAT4>,
236				 <PINMUX_GPIO129__FUNC_MSDC0_DAT5>,
237				 <PINMUX_GPIO127__FUNC_MSDC0_DAT6>,
238				 <PINMUX_GPIO130__FUNC_MSDC0_DAT7>,
239				 <PINMUX_GPIO122__FUNC_MSDC0_CMD>;
240			input-enable;
241			drive-strength = <MTK_DRIVE_14mA>;
242			mediatek,pull-up-adv = <01>;
243		};
244
245		pins_clk {
246			pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>;
247			drive-strength = <MTK_DRIVE_14mA>;
248			mediatek,pull-down-adv = <10>;
249		};
250
251		pins_rst {
252			pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>;
253			drive-strength = <MTK_DRIVE_14mA>;
254			mediatek,pull-down-adv = <01>;
255		};
256	};
257
258	mmc0_pins_uhs: mmc0-pins-uhs {
259		pins_cmd_dat {
260			pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>,
261				 <PINMUX_GPIO128__FUNC_MSDC0_DAT1>,
262				 <PINMUX_GPIO125__FUNC_MSDC0_DAT2>,
263				 <PINMUX_GPIO132__FUNC_MSDC0_DAT3>,
264				 <PINMUX_GPIO126__FUNC_MSDC0_DAT4>,
265				 <PINMUX_GPIO129__FUNC_MSDC0_DAT5>,
266				 <PINMUX_GPIO127__FUNC_MSDC0_DAT6>,
267				 <PINMUX_GPIO130__FUNC_MSDC0_DAT7>,
268				 <PINMUX_GPIO122__FUNC_MSDC0_CMD>;
269			input-enable;
270			drive-strength = <MTK_DRIVE_14mA>;
271			mediatek,pull-up-adv = <01>;
272		};
273
274		pins_clk {
275			pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>;
276			drive-strength = <MTK_DRIVE_14mA>;
277			mediatek,pull-down-adv = <10>;
278		};
279
280		pins_ds {
281			pinmux = <PINMUX_GPIO131__FUNC_MSDC0_DSL>;
282			drive-strength = <MTK_DRIVE_14mA>;
283			mediatek,pull-down-adv = <10>;
284		};
285
286		pins_rst {
287			pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>;
288			drive-strength = <MTK_DRIVE_14mA>;
289			mediatek,pull-up-adv = <01>;
290		};
291	};
292
293	mmc1_pins_default: mmc1-pins-default {
294		pins_cmd_dat {
295			pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>,
296				 <PINMUX_GPIO32__FUNC_MSDC1_DAT0>,
297				 <PINMUX_GPIO34__FUNC_MSDC1_DAT1>,
298				 <PINMUX_GPIO33__FUNC_MSDC1_DAT2>,
299				 <PINMUX_GPIO30__FUNC_MSDC1_DAT3>;
300			input-enable;
301			mediatek,pull-up-adv = <10>;
302		};
303
304		pins_clk {
305			pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>;
306			input-enable;
307			mediatek,pull-down-adv = <10>;
308		};
309
310		pins_pmu {
311			pinmux = <PINMUX_GPIO178__FUNC_GPIO178>;
312			output-high;
313		};
314	};
315
316	mmc1_pins_uhs: mmc1-pins-uhs {
317		pins_cmd_dat {
318			pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>,
319				 <PINMUX_GPIO32__FUNC_MSDC1_DAT0>,
320				 <PINMUX_GPIO34__FUNC_MSDC1_DAT1>,
321				 <PINMUX_GPIO33__FUNC_MSDC1_DAT2>,
322				 <PINMUX_GPIO30__FUNC_MSDC1_DAT3>;
323			drive-strength = <MTK_DRIVE_6mA>;
324			input-enable;
325			mediatek,pull-up-adv = <10>;
326		};
327
328		pins_clk {
329			pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>;
330			drive-strength = <MTK_DRIVE_8mA>;
331			mediatek,pull-down-adv = <10>;
332			input-enable;
333		};
334	};
335};
336
337&mfg {
338	domain-supply = <&mt6358_vgpu_reg>;
339};
340
341&cpu0 {
342	proc-supply = <&mt6358_vproc12_reg>;
343};
344
345&cpu1 {
346	proc-supply = <&mt6358_vproc12_reg>;
347};
348
349&cpu2 {
350	proc-supply = <&mt6358_vproc12_reg>;
351};
352
353&cpu3 {
354	proc-supply = <&mt6358_vproc12_reg>;
355};
356
357&cpu4 {
358	proc-supply = <&mt6358_vproc11_reg>;
359};
360
361&cpu5 {
362	proc-supply = <&mt6358_vproc11_reg>;
363};
364
365&cpu6 {
366	proc-supply = <&mt6358_vproc11_reg>;
367};
368
369&cpu7 {
370	proc-supply = <&mt6358_vproc11_reg>;
371};
372
373&uart0 {
374	status = "okay";
375};
376
377&scp {
378	status = "okay";
379};
380
381&dsi0 {
382	status = "disabled";
383};
384